include/pcmcia.h

   1 /*
   2  * (C) Copyright 2000-2004
   3  * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
   4  *
   5  * SPDX-License-Identifier:     GPL-2.0+
   6  */
   7
   8 #ifndef _PCMCIA_H
   9 #define _PCMCIA_H
  10
  11 #include <common.h>
  12 #include <config.h>
  13
  14 /*
  15  * Allow configuration to select PCMCIA slot,
  16  * or try to generate a useful default
  17  */
  18 #if defined(CONFIG_CMD_PCMCIA) || \
  19     (defined(CONFIG_CMD_IDE) && \
  20         (defined(CONFIG_IDE_8xx_PCCARD) || defined(CONFIG_IDE_8xx_DIRECT) ) )
  21
  22 #if !defined(CONFIG_PCMCIA_SLOT_A) && !defined(CONFIG_PCMCIA_SLOT_B)
  23
  24 #if defined(CONFIG_TQM8xxL)
  25 # define        CONFIG_PCMCIA_SLOT_B    /* The TQM8xxL use SLOT_B       */
  26 #elif defined(CONFIG_IVMS8) || defined(CONFIG_IVML24)   /* The IVM* use SLOT_A  */
  27 # define CONFIG_PCMCIA_SLOT_A
  28 #elif defined(CONFIG_ATC)               /* The ATC use SLOT_A   */
  29 # define CONFIG_PCMCIA_SLOT_A
  30 #else
  31 # error "PCMCIA Slot not configured"
  32 #endif
  33
  34 #endif /* !defined(CONFIG_PCMCIA_SLOT_A) && !defined(CONFIG_PCMCIA_SLOT_B) */
  35
  36 /* Make sure exactly one slot is defined - we support only one for now */
  37 #if !defined(CONFIG_PCMCIA_SLOT_A) && !defined(CONFIG_PCMCIA_SLOT_B)
  38 #error Neither CONFIG_PCMCIA_SLOT_A nor CONFIG_PCMCIA_SLOT_B configured
  39 #endif
  40 #if defined(CONFIG_PCMCIA_SLOT_A) && defined(CONFIG_PCMCIA_SLOT_B)
  41 #error Both CONFIG_PCMCIA_SLOT_A and CONFIG_PCMCIA_SLOT_B configured
  42 #endif
  43
  44 #ifndef PCMCIA_SOCKETS_NO
  45 #define PCMCIA_SOCKETS_NO       1
  46 #endif
  47 #ifndef PCMCIA_MEM_WIN_NO
  48 #define PCMCIA_MEM_WIN_NO       4
  49 #endif
  50 #define PCMCIA_IO_WIN_NO        2
  51
  52 /* define _slot_ to be able to optimize macros */
  53 #ifdef CONFIG_PCMCIA_SLOT_A
  54 # define _slot_                 0
  55 # define PCMCIA_SLOT_MSG        "slot A"
  56 # define PCMCIA_SLOT_x          PCMCIA_PSLOT_A
  57 #else
  58 # define _slot_                 1
  59 # define PCMCIA_SLOT_MSG        "slot B"
  60 # define PCMCIA_SLOT_x          PCMCIA_PSLOT_B
  61 #endif
  62
  63 /*
  64  * The TQM850L hardware has two pins swapped! Grrrrgh!
  65  */
  66 #ifdef  CONFIG_TQM850L
  67 #define __MY_PCMCIA_GCRX_CXRESET        PCMCIA_GCRX_CXOE
  68 #define __MY_PCMCIA_GCRX_CXOE           PCMCIA_GCRX_CXRESET
  69 #else
  70 #define __MY_PCMCIA_GCRX_CXRESET        PCMCIA_GCRX_CXRESET
  71 #define __MY_PCMCIA_GCRX_CXOE           PCMCIA_GCRX_CXOE
  72 #endif
  73
  74 /*
  75  * This structure is used to address each window in the PCMCIA controller.
  76  *
  77  * Keep in mind that we assume that pcmcia_win_t[n+1] is mapped directly
  78  * after pcmcia_win_t[n]...
  79  */
  80
  81 typedef struct {
  82         ulong   br;
  83         ulong   or;
  84 } pcmcia_win_t;
  85
  86 /*
  87  * Definitions for PCMCIA control registers to operate in IDE mode
  88  *
  89  * All timing related setup (PCMCIA_SHT, PCMCIA_SST, PCMCIA_SL)
  90  * to be done later (depending on CPU clock)
  91  */
  92
  93 /* Window 0:
  94  *      Base: 0xFE100000        CS1
  95  *      Port Size:     2 Bytes
  96  *      Port Size:    16 Bit
  97  *      Common Memory Space
  98  */
  99
 100 #define CONFIG_SYS_PCMCIA_PBR0          0xFE100000
 101 #define CONFIG_SYS_PCMCIA_POR0      (   PCMCIA_BSIZE_2  \
 102                             |   PCMCIA_PPS_16   \
 103                             |   PCMCIA_PRS_MEM  \
 104                             |   PCMCIA_SLOT_x   \
 105                             |   PCMCIA_PV       \
 106                             )
 107
 108 /* Window 1:
 109  *      Base: 0xFE100080        CS1
 110  *      Port Size:     8 Bytes
 111  *      Port Size:     8 Bit
 112  *      Common Memory Space
 113  */
 114
 115 #define CONFIG_SYS_PCMCIA_PBR1          0xFE100080
 116 #define CONFIG_SYS_PCMCIA_POR1      (   PCMCIA_BSIZE_8  \
 117                             |   PCMCIA_PPS_8    \
 118                             |   PCMCIA_PRS_MEM  \
 119                             |   PCMCIA_SLOT_x   \
 120                             |   PCMCIA_PV       \
 121                             )
 122
 123 /* Window 2:
 124  *      Base: 0xFE100100        CS2
 125  *      Port Size:     8 Bytes
 126  *      Port Size:     8 Bit
 127  *      Common Memory Space
 128  */
 129
 130 #define CONFIG_SYS_PCMCIA_PBR2          0xFE100100
 131 #define CONFIG_SYS_PCMCIA_POR2      (   PCMCIA_BSIZE_8  \
 132                             |   PCMCIA_PPS_8    \
 133                             |   PCMCIA_PRS_MEM  \
 134                             |   PCMCIA_SLOT_x   \
 135                             |   PCMCIA_PV       \
 136                             )
 137
 138 /* Window 3:
 139  *      not used
 140  */
 141 #define CONFIG_SYS_PCMCIA_PBR3          0
 142 #define CONFIG_SYS_PCMCIA_POR3          0
 143
 144 /* Window 4:
 145  *      Base: 0xFE100C00        CS1
 146  *      Port Size:     2 Bytes
 147  *      Port Size:    16 Bit
 148  *      Common Memory Space
 149  */
 150
 151 #define CONFIG_SYS_PCMCIA_PBR4          0xFE100C00
 152 #define CONFIG_SYS_PCMCIA_POR4      (   PCMCIA_BSIZE_2  \
 153                             |   PCMCIA_PPS_16   \
 154                             |   PCMCIA_PRS_MEM  \
 155                             |   PCMCIA_SLOT_x   \
 156                             |   PCMCIA_PV       \
 157                             )
 158
 159 /* Window 5:
 160  *      Base: 0xFE100C80        CS1
 161  *      Port Size:     8 Bytes
 162  *      Port Size:     8 Bit
 163  *      Common Memory Space
 164  */
 165
 166 #define CONFIG_SYS_PCMCIA_PBR5          0xFE100C80
 167 #define CONFIG_SYS_PCMCIA_POR5      (   PCMCIA_BSIZE_8  \
 168                             |   PCMCIA_PPS_8    \
 169                             |   PCMCIA_PRS_MEM  \
 170                             |   PCMCIA_SLOT_x   \
 171                             |   PCMCIA_PV       \
 172                             )
 173
 174 /* Window 6:
 175  *      Base: 0xFE100D00        CS2
 176  *      Port Size:     8 Bytes
 177  *      Port Size:     8 Bit
 178  *      Common Memory Space
 179  */
 180
 181 #define CONFIG_SYS_PCMCIA_PBR6          0xFE100D00
 182 #define CONFIG_SYS_PCMCIA_POR6      (   PCMCIA_BSIZE_8  \
 183                             |   PCMCIA_PPS_8    \
 184                             |   PCMCIA_PRS_MEM  \
 185                             |   PCMCIA_SLOT_x   \
 186                             |   PCMCIA_PV       \
 187                             )
 188
 189 /* Window 7:
 190  *      not used
 191  */
 192 #define CONFIG_SYS_PCMCIA_PBR7          0
 193 #define CONFIG_SYS_PCMCIA_POR7          0
 194
 195 /**********************************************************************/
 196
 197 /*
 198  * CIS Tupel codes
 199  */
 200 #define CISTPL_NULL             0x00
 201 #define CISTPL_DEVICE           0x01
 202 #define CISTPL_LONGLINK_CB      0x02
 203 #define CISTPL_INDIRECT         0x03
 204 #define CISTPL_CONFIG_CB        0x04
 205 #define CISTPL_CFTABLE_ENTRY_CB 0x05
 206 #define CISTPL_LONGLINK_MFC     0x06
 207 #define CISTPL_BAR              0x07
 208 #define CISTPL_PWR_MGMNT        0x08
 209 #define CISTPL_EXTDEVICE        0x09
 210 #define CISTPL_CHECKSUM         0x10
 211 #define CISTPL_LONGLINK_A       0x11
 212 #define CISTPL_LONGLINK_C       0x12
 213 #define CISTPL_LINKTARGET       0x13
 214 #define CISTPL_NO_LINK          0x14
 215 #define CISTPL_VERS_1           0x15
 216 #define CISTPL_ALTSTR           0x16
 217 #define CISTPL_DEVICE_A         0x17
 218 #define CISTPL_JEDEC_C          0x18
 219 #define CISTPL_JEDEC_A          0x19
 220 #define CISTPL_CONFIG           0x1a
 221 #define CISTPL_CFTABLE_ENTRY    0x1b
 222 #define CISTPL_DEVICE_OC        0x1c
 223 #define CISTPL_DEVICE_OA        0x1d
 224 #define CISTPL_DEVICE_GEO       0x1e
 225 #define CISTPL_DEVICE_GEO_A     0x1f
 226 #define CISTPL_MANFID           0x20
 227 #define CISTPL_FUNCID           0x21
 228 #define CISTPL_FUNCE            0x22
 229 #define CISTPL_SWIL             0x23
 230 #define CISTPL_END              0xff
 231
 232 /*
 233  * CIS Function ID codes
 234  */
 235 #define CISTPL_FUNCID_MULTI     0x00
 236 #define CISTPL_FUNCID_MEMORY    0x01
 237 #define CISTPL_FUNCID_SERIAL    0x02
 238 #define CISTPL_FUNCID_PARALLEL  0x03
 239 #define CISTPL_FUNCID_FIXED     0x04
 240 #define CISTPL_FUNCID_VIDEO     0x05
 241 #define CISTPL_FUNCID_NETWORK   0x06
 242 #define CISTPL_FUNCID_AIMS      0x07
 243 #define CISTPL_FUNCID_SCSI      0x08
 244
 245 /*
 246  * Fixed Disk FUNCE codes
 247  */
 248 #define CISTPL_IDE_INTERFACE    0x01
 249
 250 #define CISTPL_FUNCE_IDE_IFACE  0x01
 251 #define CISTPL_FUNCE_IDE_MASTER 0x02
 252 #define CISTPL_FUNCE_IDE_SLAVE  0x03
 253
 254 /* First feature byte */
 255 #define CISTPL_IDE_SILICON      0x04
 256 #define CISTPL_IDE_UNIQUE       0x08
 257 #define CISTPL_IDE_DUAL         0x10
 258
 259 /* Second feature byte */
 260 #define CISTPL_IDE_HAS_SLEEP    0x01
 261 #define CISTPL_IDE_HAS_STANDBY  0x02
 262 #define CISTPL_IDE_HAS_IDLE     0x04
 263 #define CISTPL_IDE_LOW_POWER    0x08
 264 #define CISTPL_IDE_REG_INHIBIT  0x10
 265 #define CISTPL_IDE_HAS_INDEX    0x20
 266 #define CISTPL_IDE_IOIS16       0x40
 267
 268 #endif
 269
 270 #ifdef  CONFIG_8xx
 271 extern u_int *pcmcia_pgcrx[];
 272 #define PCMCIA_PGCRX(slot)      (*pcmcia_pgcrx[slot])
 273 #endif
 274
 275 #if defined(CONFIG_CMD_IDE) && defined(CONFIG_IDE_8xx_PCCARD)
 276 extern int check_ide_device(int slot);
 277 #endif
 278
 279 #endif /* _PCMCIA_H */