include/ppc_asm.tmpl

   1 /*
   2  * (C) Copyright 2000-2002
   3  * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
   4  *
   5  * SPDX-License-Identifier:     GPL-2.0+
   6  */
   7
   8 /*
   9  * This file contains all the macros and symbols which define
  10  * a PowerPC assembly language environment.
  11  */
  12 #ifndef __PPC_ASM_TMPL__
  13 #define __PPC_ASM_TMPL__
  14
  15 #include <config.h>
  16
  17 /***************************************************************************
  18  *
  19  * These definitions simplify the ugly declarations necessary for GOT
  20  * definitions.
  21  *
  22  * Stolen from prepboot/bootldr.h, (C) 1998 Gabriel Paubert, paubert@iram.es
  23  *
  24  * Uses r12 to access the GOT
  25  */
  26
  27 #define START_GOT                       \
  28         .section        ".got2","aw";   \
  29 .LCTOC1 = .+32768
  30
  31 #define END_GOT                         \
  32         .text
  33
  34 #define GET_GOT                         \
  35         bl      1f              ;       \
  36         .text   2               ;       \
  37 0:      .long   .LCTOC1-1f      ;       \
  38         .text                   ;       \
  39 1:      mflr    r12             ;       \
  40         lwz     r0,0b-1b(r12)   ;       \
  41         add     r12,r0,r12      ;
  42
  43 #define GOT_ENTRY(NAME)         .L_ ## NAME = . - .LCTOC1 ; .long NAME
  44
  45 #define GOT(NAME)               .L_ ## NAME (r12)
  46
  47
  48 /***************************************************************************
  49  * Register names
  50  */
  51 #define r0      0
  52 #define r1      1
  53 #define r2      2
  54 #define r3      3
  55 #define r4      4
  56 #define r5      5
  57 #define r6      6
  58 #define r7      7
  59 #define r8      8
  60 #define r9      9
  61 #define r10     10
  62 #define r11     11
  63 #define r12     12
  64 #define r13     13
  65 #define r14     14
  66 #define r15     15
  67 #define r16     16
  68 #define r17     17
  69 #define r18     18
  70 #define r19     19
  71 #define r20     20
  72 #define r21     21
  73 #define r22     22
  74 #define r23     23
  75 #define r24     24
  76 #define r25     25
  77 #define r26     26
  78 #define r27     27
  79 #define r28     28
  80 #define r29     29
  81 #define r30     30
  82 #define r31     31
  83
  84
  85 #if defined(CONFIG_8xx)
  86
  87 /* Some special registers */
  88
  89 #define ICR     148     /* Interrupt Cause Register (37-44) */
  90 #define DER     149
  91 #define COUNTA  150     /* Breakpoint Counter       (37-44) */
  92 #define COUNTB  151     /* Breakpoint Counter       (37-44) */
  93 #define LCTRL1  156     /* Load/Store Support       (37-40) */
  94 #define LCTRL2  157     /* Load/Store Support       (37-41) */
  95 #define ICTRL   158
  96
  97 #endif  /* CONFIG_8xx */
  98
  99
 100 #if  defined(CONFIG_5xx)
 101 /* Some special purpose registers */
 102 #define DER     149             /* Debug Enable Register                */
 103 #define COUNTA  150             /* Breakpoint Counter                   */
 104 #define COUNTB  151             /* Breakpoint Counter                   */
 105 #define LCTRL1  156             /* Load/Store Support                   */
 106 #define LCTRL2  157             /* Load/Store Support                   */
 107 #define ICTRL   158             /* I-Bus Support Control Register       */
 108 #define EID     81
 109 #endif  /* CONFIG_5xx */
 110
 111 #if defined(CONFIG_8xx)
 112
 113 /* Registers in the processor's internal memory map that we use.
 114 */
 115 #define SYPCR   0x00000004
 116 #define BR0     0x00000100
 117 #define OR0     0x00000104
 118 #define BR1     0x00000108
 119 #define OR1     0x0000010c
 120 #define BR2     0x00000110
 121 #define OR2     0x00000114
 122 #define BR3     0x00000118
 123 #define OR3     0x0000011c
 124 #define BR4     0x00000120
 125 #define OR4     0x00000124
 126
 127 #define MAR     0x00000164
 128 #define MCR     0x00000168
 129 #define MAMR    0x00000170
 130 #define MBMR    0x00000174
 131 #define MSTAT   0x00000178
 132 #define MPTPR   0x0000017a
 133 #define MDR     0x0000017c
 134
 135 #define TBSCR   0x00000200
 136 #define TBREFF0 0x00000204
 137
 138 #define PLPRCR  0x00000284
 139
 140 #elif defined(CONFIG_MPC8260)
 141
 142 #define HID2            1011
 143
 144 #define HID0_IFEM       (1<<7)
 145
 146 #define HID0_ICE_BITPOS 16
 147 #define HID0_DCE_BITPOS 17
 148
 149 #define IM_REGBASE      0x10000
 150 #define IM_SYPCR        (IM_REGBASE+0x0004)
 151 #define IM_SWSR         (IM_REGBASE+0x000e)
 152 #define IM_BR0          (IM_REGBASE+0x0100)
 153 #define IM_OR0          (IM_REGBASE+0x0104)
 154 #define IM_BR1          (IM_REGBASE+0x0108)
 155 #define IM_OR1          (IM_REGBASE+0x010c)
 156 #define IM_BR2          (IM_REGBASE+0x0110)
 157 #define IM_OR2          (IM_REGBASE+0x0114)
 158 #define IM_MPTPR        (IM_REGBASE+0x0184)
 159 #define IM_PSDMR        (IM_REGBASE+0x0190)
 160 #define IM_PSRT         (IM_REGBASE+0x019c)
 161 #define IM_IMMR         (IM_REGBASE+0x01a8)
 162 #define IM_SCCR         (IM_REGBASE+0x0c80)
 163
 164 #elif defined(CONFIG_MPC5xxx)
 165
 166 #define HID0_ICE_BITPOS 16
 167 #define HID0_DCE_BITPOS 17
 168
 169 #endif
 170
 171 #define curptr r2
 172
 173 #define SYNC \
 174         sync; \
 175         isync
 176
 177 /*
 178  * Macros for storing registers into and loading registers from
 179  * exception frames.
 180  */
 181 #define SAVE_GPR(n, base)       stw     n,GPR0+4*(n)(base)
 182 #define SAVE_2GPRS(n, base)     SAVE_GPR(n, base); SAVE_GPR(n+1, base)
 183 #define SAVE_4GPRS(n, base)     SAVE_2GPRS(n, base); SAVE_2GPRS(n+2, base)
 184 #define SAVE_8GPRS(n, base)     SAVE_4GPRS(n, base); SAVE_4GPRS(n+4, base)
 185 #define SAVE_10GPRS(n, base)    SAVE_8GPRS(n, base); SAVE_2GPRS(n+8, base)
 186 #define REST_GPR(n, base)       lwz     n,GPR0+4*(n)(base)
 187 #define REST_2GPRS(n, base)     REST_GPR(n, base); REST_GPR(n+1, base)
 188 #define REST_4GPRS(n, base)     REST_2GPRS(n, base); REST_2GPRS(n+2, base)
 189 #define REST_8GPRS(n, base)     REST_4GPRS(n, base); REST_4GPRS(n+4, base)
 190 #define REST_10GPRS(n, base)    REST_8GPRS(n, base); REST_2GPRS(n+8, base)
 191
 192 /*
 193  * GCC sometimes accesses words at negative offsets from the stack
 194  * pointer, although the SysV ABI says it shouldn't.  To cope with
 195  * this, we leave this much untouched space on the stack on exception
 196  * entry.
 197  */
 198 #define STACK_UNDERHEAD 64
 199
 200 /*
 201  * Exception entry code.  This code runs with address translation
 202  * turned off, i.e. using physical addresses.
 203  * We assume sprg3 has the physical address of the current
 204  * task's thread_struct.
 205  */
 206 #define EXCEPTION_PROLOG(reg1, reg2)    \
 207         mtspr   SPRG0,r20;      \
 208         mtspr   SPRG1,r21;      \
 209         mfcr    r20;            \
 210         subi    r21,r1,INT_FRAME_SIZE+STACK_UNDERHEAD;  /* alloc exc. frame */\
 211         stw     r20,_CCR(r21);          /* save registers */ \
 212         stw     r22,GPR22(r21); \
 213         stw     r23,GPR23(r21); \
 214         mfspr   r20,SPRG0;      \
 215         stw     r20,GPR20(r21); \
 216         mfspr   r22,SPRG1;      \
 217         stw     r22,GPR21(r21); \
 218         mflr    r20;            \
 219         stw     r20,_LINK(r21); \
 220         mfctr   r22;            \
 221         stw     r22,_CTR(r21);  \
 222         mfspr   r20,XER;        \
 223         stw     r20,_XER(r21);  \
 224         mfspr   r20, DAR_DEAR;  \
 225         stw     r20,_DAR(r21);  \
 226         mfspr   r22,reg1;       \
 227         mfspr   r23,reg2;       \
 228         stw     r0,GPR0(r21);   \
 229         stw     r1,GPR1(r21);   \
 230         stw     r2,GPR2(r21);   \
 231         stw     r1,0(r21);      \
 232         mr      r1,r21;                 /* set new kernel sp */ \
 233         SAVE_4GPRS(3, r21);
 234 /*
 235  * Note: code which follows this uses cr0.eq (set if from kernel),
 236  * r21, r22 (SRR0), and r23 (SRR1).
 237  */
 238
 239 /*
 240  * Exception vectors.
 241  *
 242  * The data words for `hdlr' and `int_return' are initialized with
 243  * OFFSET values only; they must be relocated first before they can
 244  * be used!
 245  */
 246 #define COPY_EE(d, s)           rlwimi d,s,0,16,16
 247 #define NOCOPY(d, s)
 248
 249 #ifdef CONFIG_E500
 250 #define EXC_XFER_TEMPLATE(n, label, hdlr, msr, copyee)  \
 251         stw     r22,_NIP(r21);                          \
 252         stw     r23,_MSR(r21);                          \
 253         li      r23,n;                                  \
 254         stw     r23,TRAP(r21);                          \
 255         li      r20,msr;                                \
 256         copyee(r20,r23);                                \
 257         rlwimi  r20,r23,0,25,25;                        \
 258         mtmsr   r20;                                    \
 259         bl      1f;                                     \
 260 1:      mflr    r23;                                    \
 261         addis   r23,r23,(hdlr - 1b)@ha;                 \
 262         addi    r23,r23,(hdlr - 1b)@l;                  \
 263         b       transfer_to_handler
 264
 265 #define STD_EXCEPTION(n, label, hdlr)                           \
 266 .align 4;                                                       \
 267 label:                                                          \
 268         EXCEPTION_PROLOG(SRR0, SRR1);                           \
 269         addi    r3,r1,STACK_FRAME_OVERHEAD;                     \
 270         EXC_XFER_TEMPLATE(n, label, hdlr, MSR_KERNEL, NOCOPY)   \
 271
 272 #define CRIT_EXCEPTION(n, label, hdlr)                          \
 273 .align 4;                                                       \
 274 label:                                                          \
 275         EXCEPTION_PROLOG(CSRR0, CSRR1);                         \
 276         addi    r3,r1,STACK_FRAME_OVERHEAD;                     \
 277         EXC_XFER_TEMPLATE(n, label, hdlr,                       \
 278         MSR_KERNEL & ~(MSR_ME|MSR_DE|MSR_CE), NOCOPY)           \
 279
 280 #define MCK_EXCEPTION(n, label, hdlr)                           \
 281 .align 4;                                                       \
 282 label:                                                          \
 283         EXCEPTION_PROLOG(MCSRR0, MCSRR1);                       \
 284         addi    r3,r1,STACK_FRAME_OVERHEAD;                     \
 285         EXC_XFER_TEMPLATE(n, label, hdlr,                       \
 286         MSR_KERNEL & ~(MSR_ME|MSR_DE|MSR_CE), NOCOPY)           \
 287
 288 #else   /* !E500 */
 289
 290 #define EXC_XFER_TEMPLATE(label, hdlr, msr, copyee)     \
 291         bl      1f;                                     \
 292 1:      mflr    r20;                                    \
 293         lwz     r20,(.L_ ## label)-1b+8(r20);           \
 294         mtlr    r20;                                    \
 295         li      r20,msr;                                \
 296         copyee(r20,r23);                                \
 297         rlwimi  r20,r23,0,25,25;                        \
 298         blrl;                                           \
 299 .L_ ## label :                                          \
 300         .long   hdlr - _start + _START_OFFSET;          \
 301         .long   int_return - _start + _START_OFFSET;    \
 302         .long   transfer_to_handler - _start + _START_OFFSET
 303
 304 #define STD_EXCEPTION(n, label, hdlr)                           \
 305         . = n;                                                  \
 306 label:                                                          \
 307         EXCEPTION_PROLOG(SRR0, SRR1);                           \
 308         addi    r3,r1,STACK_FRAME_OVERHEAD;                     \
 309         EXC_XFER_TEMPLATE(label, hdlr, MSR_KERNEL, NOCOPY)      \
 310
 311 #define CRIT_EXCEPTION(n, label, hdlr)                          \
 312         . = n;                                                  \
 313 label:                                                          \
 314         EXCEPTION_PROLOG(CSRR0, CSRR1);                         \
 315         addi    r3,r1,STACK_FRAME_OVERHEAD;                     \
 316         EXC_XFER_TEMPLATE(label, hdlr,                          \
 317         MSR_KERNEL & ~(MSR_ME|MSR_DE|MSR_CE), NOCOPY)           \
 318
 319 #define MCK_EXCEPTION(n, label, hdlr)                           \
 320         . = n;                                                  \
 321 label:                                                          \
 322         EXCEPTION_PROLOG(MCSRR0, MCSRR1);                       \
 323         addi    r3,r1,STACK_FRAME_OVERHEAD;                     \
 324         EXC_XFER_TEMPLATE(label, hdlr,                          \
 325         MSR_KERNEL & ~(MSR_ME|MSR_DE|MSR_CE), NOCOPY)           \
 326
 327 #endif  /* !E500 */
 328 #endif  /* __PPC_ASM_TMPL__ */