include/sh_tmu.h

   1 /*
   2  * Copyright (C) 2012  Renesas Solutions Corp.
   3  *
   4  * See file CREDITS for list of people who contributed to this
   5  * project.
   6  *
   7  * This program is free software; you can redistribute it and/or
   8  * modify it under the terms of the GNU General Public License as
   9  * published by the Free Software Foundation; either version 2 of
  10  * the License.
  11  *
  12  * This program is distributed in the hope that it will be useful,
  13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15  * GNU General Public License for more details.
  16  *
  17  * You should have received a copy of the GNU General Public License
  18  * along with this program; if not, write to the Free Software
  19  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  20  * MA 02111-1307 USA
  21  */
  22
  23 #ifndef __SH_TMU_H
  24 #define __SH_TMU_H
  25
  26 #include <asm/types.h>
  27
  28 #if defined(CONFIG_CPU_SH3)
  29 struct tmu_regs {
  30         u8      tocr;
  31         u8      reserved0;
  32         u8      tstr;
  33         u8      reserved1;
  34         u32     tcor0;
  35         u32     tcnt0;
  36         u16     tcr0;
  37         u16     reserved2;
  38         u32     tcor1;
  39         u32     tcnt1;
  40         u16     tcr1;
  41         u16     reserved3;
  42         u32     tcor2;
  43         u32     tcnt2;
  44         u16     tcr2;
  45         u16     reserved4;
  46         u32     tcpr2;
  47 };
  48 #endif /* CONFIG_CPU_SH3 */
  49
  50 #if defined(CONFIG_CPU_SH4) || defined(CONFIG_ARCH_RMOBILE)
  51 struct tmu_regs {
  52         u32 reserved;
  53         u8  tstr;
  54         u8  reserved2[3];
  55         u32 tcor0;
  56         u32 tcnt0;
  57         u16 tcr0;
  58         u16 reserved3;
  59         u32 tcor1;
  60         u32 tcnt1;
  61         u16 tcr1;
  62         u16 reserved4;
  63         u32 tcor2;
  64         u32 tcnt2;
  65         u16 tcr2;
  66         u16 reserved5;
  67 };
  68 #endif /* CONFIG_CPU_SH4 */
  69
  70 static inline unsigned long get_tmu0_clk_rate(void)
  71 {
  72         return CONFIG_SH_TMU_CLK_FREQ;
  73 }
  74
  75 #endif  /* __SH_TMU_H */