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1 /*
2 * Copyright (c) 2011 The Chromium OS Authors.
3 * SPDX-License-Identifier: GPL-2.0+
4 */
5
6 #ifndef USE_HOSTCC
7 #include <common.h>
8 #include <dm.h>
9 #include <errno.h>
10 #include <serial.h>
11 #include <libfdt.h>
12 #include <fdtdec.h>
13 #include <asm/sections.h>
14 #include <linux/ctype.h>
15
16 DECLARE_GLOBAL_DATA_PTR;
17
18 /*
19 * Here are the type we know about. One day we might allow drivers to
20 * register. For now we just put them here. The COMPAT macro allows us to
21 * turn this into a sparse list later, and keeps the ID with the name.
22 *
23 * NOTE: This list is basically a TODO list for things that need to be
24 * converted to driver model. So don't add new things here unless there is a
25 * good reason why driver-model conversion is infeasible. Examples include
26 * things which are used before driver model is available.
27 */
28 #define COMPAT(id, name) name
29 static const char * const compat_names[COMPAT_COUNT] = {
30 COMPAT(UNKNOWN, "<none>"),
31 COMPAT(NVIDIA_TEGRA20_EMC, "nvidia,tegra20-emc"),
32 COMPAT(NVIDIA_TEGRA20_EMC_TABLE, "nvidia,tegra20-emc-table"),
33 COMPAT(NVIDIA_TEGRA20_NAND, "nvidia,tegra20-nand"),
34 COMPAT(NVIDIA_TEGRA124_PMC, "nvidia,tegra124-pmc"),
35 COMPAT(NVIDIA_TEGRA186_SDMMC, "nvidia,tegra186-sdhci"),
36 COMPAT(NVIDIA_TEGRA210_SDMMC, "nvidia,tegra210-sdhci"),
37 COMPAT(NVIDIA_TEGRA124_SDMMC, "nvidia,tegra124-sdhci"),
38 COMPAT(NVIDIA_TEGRA30_SDMMC, "nvidia,tegra30-sdhci"),
39 COMPAT(NVIDIA_TEGRA20_SDMMC, "nvidia,tegra20-sdhci"),
40 COMPAT(NVIDIA_TEGRA124_XUSB_PADCTL, "nvidia,tegra124-xusb-padctl"),
41 COMPAT(NVIDIA_TEGRA210_XUSB_PADCTL, "nvidia,tegra210-xusb-padctl"),
42 COMPAT(SMSC_LAN9215, "smsc,lan9215"),
43 COMPAT(SAMSUNG_EXYNOS5_SROMC, "samsung,exynos-sromc"),
44 COMPAT(SAMSUNG_S3C2440_I2C, "samsung,s3c2440-i2c"),
45 COMPAT(SAMSUNG_EXYNOS5_SOUND, "samsung,exynos-sound"),
46 COMPAT(WOLFSON_WM8994_CODEC, "wolfson,wm8994-codec"),
47 COMPAT(SAMSUNG_EXYNOS_USB_PHY, "samsung,exynos-usb-phy"),
48 COMPAT(SAMSUNG_EXYNOS5_USB3_PHY, "samsung,exynos5250-usb3-phy"),
49 COMPAT(SAMSUNG_EXYNOS_TMU, "samsung,exynos-tmu"),
50 COMPAT(SAMSUNG_EXYNOS_MIPI_DSI, "samsung,exynos-mipi-dsi"),
51 COMPAT(SAMSUNG_EXYNOS_DWMMC, "samsung,exynos-dwmmc"),
52 COMPAT(SAMSUNG_EXYNOS_MMC, "samsung,exynos-mmc"),
53 COMPAT(MAXIM_MAX77686_PMIC, "maxim,max77686"),
54 COMPAT(GENERIC_SPI_FLASH, "spi-flash"),
55 COMPAT(MAXIM_98095_CODEC, "maxim,max98095-codec"),
56 COMPAT(SAMSUNG_EXYNOS5_I2C, "samsung,exynos5-hsi2c"),
57 COMPAT(SAMSUNG_EXYNOS_SYSMMU, "samsung,sysmmu-v3.3"),
58 COMPAT(INTEL_MICROCODE, "intel,microcode"),
59 COMPAT(AMS_AS3722, "ams,as3722"),
60 COMPAT(INTEL_QRK_MRC, "intel,quark-mrc"),
61 COMPAT(SOCIONEXT_XHCI, "socionext,uniphier-xhci"),
62 COMPAT(ALTERA_SOCFPGA_DWMAC, "altr,socfpga-stmmac"),
63 COMPAT(ALTERA_SOCFPGA_DWMMC, "altr,socfpga-dw-mshc"),
64 COMPAT(ALTERA_SOCFPGA_DWC2USB, "snps,dwc2"),
65 COMPAT(INTEL_BAYTRAIL_FSP, "intel,baytrail-fsp"),
66 COMPAT(INTEL_BAYTRAIL_FSP_MDP, "intel,baytrail-fsp-mdp"),
67 COMPAT(INTEL_IVYBRIDGE_FSP, "intel,ivybridge-fsp"),
68 COMPAT(COMPAT_SUNXI_NAND, "allwinner,sun4i-a10-nand"),
69 };
70
71 const char *fdtdec_get_compatible(enum fdt_compat_id id)
72 {
73 /* We allow reading of the 'unknown' ID for testing purposes */
74 assert(id >= 0 && id < COMPAT_COUNT);
75 return compat_names[id];
76 }
77
78 fdt_addr_t fdtdec_get_addr_size_fixed(const void *blob, int node,
79 const char *prop_name, int index, int na, int ns,
80 fdt_size_t *sizep)
81 {
82 const fdt32_t *prop, *prop_end;
83 const fdt32_t *prop_addr, *prop_size, *prop_after_size;
84 int len;
85 fdt_addr_t addr;
86
87 debug("%s: %s: ", __func__, prop_name);
88
89 if (na > (sizeof(fdt_addr_t) / sizeof(fdt32_t))) {
90 debug("(na too large for fdt_addr_t type)\n");
91 return FDT_ADDR_T_NONE;
92 }
93
94 if (ns > (sizeof(fdt_size_t) / sizeof(fdt32_t))) {
95 debug("(ns too large for fdt_size_t type)\n");
96 return FDT_ADDR_T_NONE;
97 }
98
99 prop = fdt_getprop(blob, node, prop_name, &len);
100 if (!prop) {
101 debug("(not found)\n");
102 return FDT_ADDR_T_NONE;
103 }
104 prop_end = prop + (len / sizeof(*prop));
105
106 prop_addr = prop + (index * (na + ns));
107 prop_size = prop_addr + na;
108 prop_after_size = prop_size + ns;
109 if (prop_after_size > prop_end) {
110 debug("(not enough data: expected >= %d cells, got %d cells)\n",
111 (u32)(prop_after_size - prop), ((u32)(prop_end - prop)));
112 return FDT_ADDR_T_NONE;
113 }
114
115 addr = fdtdec_get_number(prop_addr, na);
116
117 if (sizep) {
118 *sizep = fdtdec_get_number(prop_size, ns);
119 debug("addr=%08llx, size=%llx\n", (unsigned long long)addr,
120 (unsigned long long)*sizep);
121 } else {
122 debug("addr=%08llx\n", (unsigned long long)addr);
123 }
124
125 return addr;
126 }
127
128 fdt_addr_t fdtdec_get_addr_size_auto_parent(const void *blob, int parent,
129 int node, const char *prop_name, int index, fdt_size_t *sizep)
130 {
131 int na, ns;
132
133 debug("%s: ", __func__);
134
135 na = fdt_address_cells(blob, parent);
136 if (na < 1) {
137 debug("(bad #address-cells)\n");
138 return FDT_ADDR_T_NONE;
139 }
140
141 ns = fdt_size_cells(blob, parent);
142 if (ns < 0) {
143 debug("(bad #size-cells)\n");
144 return FDT_ADDR_T_NONE;
145 }
146
147 debug("na=%d, ns=%d, ", na, ns);
148
149 return fdtdec_get_addr_size_fixed(blob, node, prop_name, index, na,
150 ns, sizep);
151 }
152
153 fdt_addr_t fdtdec_get_addr_size_auto_noparent(const void *blob, int node,
154 const char *prop_name, int index, fdt_size_t *sizep)
155 {
156 int parent;
157
158 debug("%s: ", __func__);
159
160 parent = fdt_parent_offset(blob, node);
161 if (parent < 0) {
162 debug("(no parent found)\n");
163 return FDT_ADDR_T_NONE;
164 }
165
166 return fdtdec_get_addr_size_auto_parent(blob, parent, node, prop_name,
167 index, sizep);
168 }
169
170 fdt_addr_t fdtdec_get_addr_size(const void *blob, int node,
171 const char *prop_name, fdt_size_t *sizep)
172 {
173 int ns = sizep ? (sizeof(fdt_size_t) / sizeof(fdt32_t)) : 0;
174
175 return fdtdec_get_addr_size_fixed(blob, node, prop_name, 0,
176 sizeof(fdt_addr_t) / sizeof(fdt32_t),
177 ns, sizep);
178 }
179
180 fdt_addr_t fdtdec_get_addr(const void *blob, int node,
181 const char *prop_name)
182 {
183 return fdtdec_get_addr_size(blob, node, prop_name, NULL);
184 }
185
186 #if defined(CONFIG_PCI) && defined(CONFIG_DM_PCI)
187 int fdtdec_get_pci_addr(const void *blob, int node, enum fdt_pci_space type,
188 const char *prop_name, struct fdt_pci_addr *addr)
189 {
190 const u32 *cell;
191 int len;
192 int ret = -ENOENT;
193
194 debug("%s: %s: ", __func__, prop_name);
195
196 /*
197 * If we follow the pci bus bindings strictly, we should check
198 * the value of the node's parent node's #address-cells and
199 * #size-cells. They need to be 3 and 2 accordingly. However,
200 * for simplicity we skip the check here.
201 */
202 cell = fdt_getprop(blob, node, prop_name, &len);
203 if (!cell)
204 goto fail;
205
206 if ((len % FDT_PCI_REG_SIZE) == 0) {
207 int num = len / FDT_PCI_REG_SIZE;
208 int i;
209
210 for (i = 0; i < num; i++) {
211 debug("pci address #%d: %08lx %08lx %08lx\n", i,
212 (ulong)fdt32_to_cpu(cell[0]),
213 (ulong)fdt32_to_cpu(cell[1]),
214 (ulong)fdt32_to_cpu(cell[2]));
215 if ((fdt32_to_cpu(*cell) & type) == type) {
216 addr->phys_hi = fdt32_to_cpu(cell[0]);
217 addr->phys_mid = fdt32_to_cpu(cell[1]);
218 addr->phys_lo = fdt32_to_cpu(cell[1]);
219 break;
220 } else {
221 cell += (FDT_PCI_ADDR_CELLS +
222 FDT_PCI_SIZE_CELLS);
223 }
224 }
225
226 if (i == num) {
227 ret = -ENXIO;
228 goto fail;
229 }
230
231 return 0;
232 } else {
233 ret = -EINVAL;
234 }
235
236 fail:
237 debug("(not found)\n");
238 return ret;
239 }
240
241 int fdtdec_get_pci_vendev(const void *blob, int node, u16 *vendor, u16 *device)
242 {
243 const char *list, *end;
244 int len;
245
246 list = fdt_getprop(blob, node, "compatible", &len);
247 if (!list)
248 return -ENOENT;
249
250 end = list + len;
251 while (list < end) {
252 char *s;
253
254 len = strlen(list);
255 if (len >= strlen("pciVVVV,DDDD")) {
256 s = strstr(list, "pci");
257
258 /*
259 * check if the string is something like pciVVVV,DDDD.RR
260 * or just pciVVVV,DDDD
261 */
262 if (s && s[7] == ',' &&
263 (s[12] == '.' || s[12] == 0)) {
264 s += 3;
265 *vendor = simple_strtol(s, NULL, 16);
266
267 s += 5;
268 *device = simple_strtol(s, NULL, 16);
269
270 return 0;
271 }
272 }
273 list += (len + 1);
274 }
275
276 return -ENOENT;
277 }
278
279 int fdtdec_get_pci_bar32(struct udevice *dev, struct fdt_pci_addr *addr,
280 u32 *bar)
281 {
282 int barnum;
283
284 /* extract the bar number from fdt_pci_addr */
285 barnum = addr->phys_hi & 0xff;
286 if ((barnum < PCI_BASE_ADDRESS_0) || (barnum > PCI_CARDBUS_CIS))
287 return -EINVAL;
288
289 barnum = (barnum - PCI_BASE_ADDRESS_0) / 4;
290 *bar = dm_pci_read_bar32(dev, barnum);
291
292 return 0;
293 }
294 #endif
295
296 uint64_t fdtdec_get_uint64(const void *blob, int node, const char *prop_name,
297 uint64_t default_val)
298 {
299 const uint64_t *cell64;
300 int length;
301
302 cell64 = fdt_getprop(blob, node, prop_name, &length);
303 if (!cell64 || length < sizeof(*cell64))
304 return default_val;
305
306 return fdt64_to_cpu(*cell64);
307 }
308
309 int fdtdec_get_is_enabled(const void *blob, int node)
310 {
311 const char *cell;
312
313 /*
314 * It should say "okay", so only allow that. Some fdts use "ok" but
315 * this is a bug. Please fix your device tree source file. See here
316 * for discussion:
317 *
318 * http://www.mail-archive.com/u-boot@lists.denx.de/msg71598.html
319 */
320 cell = fdt_getprop(blob, node, "status", NULL);
321 if (cell)
322 return 0 == strcmp(cell, "okay");
323 return 1;
324 }
325
326 enum fdt_compat_id fdtdec_lookup(const void *blob, int node)
327 {
328 enum fdt_compat_id id;
329
330 /* Search our drivers */
331 for (id = COMPAT_UNKNOWN; id < COMPAT_COUNT; id++)
332 if (0 == fdt_node_check_compatible(blob, node,
333 compat_names[id]))
334 return id;
335 return COMPAT_UNKNOWN;
336 }
337
338 int fdtdec_next_compatible(const void *blob, int node,
339 enum fdt_compat_id id)
340 {
341 return fdt_node_offset_by_compatible(blob, node, compat_names[id]);
342 }
343
344 int fdtdec_next_compatible_subnode(const void *blob, int node,
345 enum fdt_compat_id id, int *depthp)
346 {
347 do {
348 node = fdt_next_node(blob, node, depthp);
349 } while (*depthp > 1);
350
351 /* If this is a direct subnode, and compatible, return it */
352 if (*depthp == 1 && 0 == fdt_node_check_compatible(
353 blob, node, compat_names[id]))
354 return node;
355
356 return -FDT_ERR_NOTFOUND;
357 }
358
359 int fdtdec_next_alias(const void *blob, const char *name,
360 enum fdt_compat_id id, int *upto)
361 {
362 #define MAX_STR_LEN 20
363 char str[MAX_STR_LEN + 20];
364 int node, err;
365
366 /* snprintf() is not available */
367 assert(strlen(name) < MAX_STR_LEN);
368 sprintf(str, "%.*s%d", MAX_STR_LEN, name, *upto);
369 node = fdt_path_offset(blob, str);
370 if (node < 0)
371 return node;
372 err = fdt_node_check_compatible(blob, node, compat_names[id]);
373 if (err < 0)
374 return err;
375 if (err)
376 return -FDT_ERR_NOTFOUND;
377 (*upto)++;
378 return node;
379 }
380
381 int fdtdec_find_aliases_for_id(const void *blob, const char *name,
382 enum fdt_compat_id id, int *node_list, int maxcount)
383 {
384 memset(node_list, '\0', sizeof(*node_list) * maxcount);
385
386 return fdtdec_add_aliases_for_id(blob, name, id, node_list, maxcount);
387 }
388
389 /* TODO: Can we tighten this code up a little? */
390 int fdtdec_add_aliases_for_id(const void *blob, const char *name,
391 enum fdt_compat_id id, int *node_list, int maxcount)
392 {
393 int name_len = strlen(name);
394 int nodes[maxcount];
395 int num_found = 0;
396 int offset, node;
397 int alias_node;
398 int count;
399 int i, j;
400
401 /* find the alias node if present */
402 alias_node = fdt_path_offset(blob, "/aliases");
403
404 /*
405 * start with nothing, and we can assume that the root node can't
406 * match
407 */
408 memset(nodes, '\0', sizeof(nodes));
409
410 /* First find all the compatible nodes */
411 for (node = count = 0; node >= 0 && count < maxcount;) {
412 node = fdtdec_next_compatible(blob, node, id);
413 if (node >= 0)
414 nodes[count++] = node;
415 }
416 if (node >= 0)
417 debug("%s: warning: maxcount exceeded with alias '%s'\n",
418 __func__, name);
419
420 /* Now find all the aliases */
421 for (offset = fdt_first_property_offset(blob, alias_node);
422 offset > 0;
423 offset = fdt_next_property_offset(blob, offset)) {
424 const struct fdt_property *prop;
425 const char *path;
426 int number;
427 int found;
428
429 node = 0;
430 prop = fdt_get_property_by_offset(blob, offset, NULL);
431 path = fdt_string(blob, fdt32_to_cpu(prop->nameoff));
432 if (prop->len && 0 == strncmp(path, name, name_len))
433 node = fdt_path_offset(blob, prop->data);
434 if (node <= 0)
435 continue;
436
437 /* Get the alias number */
438 number = simple_strtoul(path + name_len, NULL, 10);
439 if (number < 0 || number >= maxcount) {
440 debug("%s: warning: alias '%s' is out of range\n",
441 __func__, path);
442 continue;
443 }
444
445 /* Make sure the node we found is actually in our list! */
446 found = -1;
447 for (j = 0; j < count; j++)
448 if (nodes[j] == node) {
449 found = j;
450 break;
451 }
452
453 if (found == -1) {
454 debug("%s: warning: alias '%s' points to a node "
455 "'%s' that is missing or is not compatible "
456 " with '%s'\n", __func__, path,
457 fdt_get_name(blob, node, NULL),
458 compat_names[id]);
459 continue;
460 }
461
462 /*
463 * Add this node to our list in the right place, and mark
464 * it as done.
465 */
466 if (fdtdec_get_is_enabled(blob, node)) {
467 if (node_list[number]) {
468 debug("%s: warning: alias '%s' requires that "
469 "a node be placed in the list in a "
470 "position which is already filled by "
471 "node '%s'\n", __func__, path,
472 fdt_get_name(blob, node, NULL));
473 continue;
474 }
475 node_list[number] = node;
476 if (number >= num_found)
477 num_found = number + 1;
478 }
479 nodes[found] = 0;
480 }
481
482 /* Add any nodes not mentioned by an alias */
483 for (i = j = 0; i < maxcount; i++) {
484 if (!node_list[i]) {
485 for (; j < maxcount; j++)
486 if (nodes[j] &&
487 fdtdec_get_is_enabled(blob, nodes[j]))
488 break;
489
490 /* Have we run out of nodes to add? */
491 if (j == maxcount)
492 break;
493
494 assert(!node_list[i]);
495 node_list[i] = nodes[j++];
496 if (i >= num_found)
497 num_found = i + 1;
498 }
499 }
500
501 return num_found;
502 }
503
504 int fdtdec_get_alias_seq(const void *blob, const char *base, int offset,
505 int *seqp)
506 {
507 int base_len = strlen(base);
508 const char *find_name;
509 int find_namelen;
510 int prop_offset;
511 int aliases;
512
513 find_name = fdt_get_name(blob, offset, &find_namelen);
514 debug("Looking for '%s' at %d, name %s\n", base, offset, find_name);
515
516 aliases = fdt_path_offset(blob, "/aliases");
517 for (prop_offset = fdt_first_property_offset(blob, aliases);
518 prop_offset > 0;
519 prop_offset = fdt_next_property_offset(blob, prop_offset)) {
520 const char *prop;
521 const char *name;
522 const char *slash;
523 int len, val;
524
525 prop = fdt_getprop_by_offset(blob, prop_offset, &name, &len);
526 debug(" - %s, %s\n", name, prop);
527 if (len < find_namelen || *prop != '/' || prop[len - 1] ||
528 strncmp(name, base, base_len))
529 continue;
530
531 slash = strrchr(prop, '/');
532 if (strcmp(slash + 1, find_name))
533 continue;
534 val = trailing_strtol(name);
535 if (val != -1) {
536 *seqp = val;
537 debug("Found seq %d\n", *seqp);
538 return 0;
539 }
540 }
541
542 debug("Not found\n");
543 return -ENOENT;
544 }
545
546 const char *fdtdec_get_chosen_prop(const void *blob, const char *name)
547 {
548 int chosen_node;
549
550 if (!blob)
551 return NULL;
552 chosen_node = fdt_path_offset(blob, "/chosen");
553 return fdt_getprop(blob, chosen_node, name, NULL);
554 }
555
556 int fdtdec_get_chosen_node(const void *blob, const char *name)
557 {
558 const char *prop;
559
560 prop = fdtdec_get_chosen_prop(blob, name);
561 if (!prop)
562 return -FDT_ERR_NOTFOUND;
563 return fdt_path_offset(blob, prop);
564 }
565
566 int fdtdec_check_fdt(void)
567 {
568 /*
569 * We must have an FDT, but we cannot panic() yet since the console
570 * is not ready. So for now, just assert(). Boards which need an early
571 * FDT (prior to console ready) will need to make their own
572 * arrangements and do their own checks.
573 */
574 assert(!fdtdec_prepare_fdt());
575 return 0;
576 }
577
578 /*
579 * This function is a little odd in that it accesses global data. At some
580 * point if the architecture board.c files merge this will make more sense.
581 * Even now, it is common code.
582 */
583 int fdtdec_prepare_fdt(void)
584 {
585 if (!gd->fdt_blob || ((uintptr_t)gd->fdt_blob & 3) ||
586 fdt_check_header(gd->fdt_blob)) {
587 #ifdef CONFIG_SPL_BUILD
588 puts("Missing DTB\n");
589 #else
590 puts("No valid device tree binary found - please append one to U-Boot binary, use u-boot-dtb.bin or define CONFIG_OF_EMBED. For sandbox, use -d <file.dtb>\n");
591 # ifdef DEBUG
592 if (gd->fdt_blob) {
593 printf("fdt_blob=%p\n", gd->fdt_blob);
594 print_buffer((ulong)gd->fdt_blob, gd->fdt_blob, 4,
595 32, 0);
596 }
597 # endif
598 #endif
599 return -1;
600 }
601 return 0;
602 }
603
604 int fdtdec_lookup_phandle(const void *blob, int node, const char *prop_name)
605 {
606 const u32 *phandle;
607 int lookup;
608
609 debug("%s: %s\n", __func__, prop_name);
610 phandle = fdt_getprop(blob, node, prop_name, NULL);
611 if (!phandle)
612 return -FDT_ERR_NOTFOUND;
613
614 lookup = fdt_node_offset_by_phandle(blob, fdt32_to_cpu(*phandle));
615 return lookup;
616 }
617
618 /**
619 * Look up a property in a node and check that it has a minimum length.
620 *
621 * @param blob FDT blob
622 * @param node node to examine
623 * @param prop_name name of property to find
624 * @param min_len minimum property length in bytes
625 * @param err 0 if ok, or -FDT_ERR_NOTFOUND if the property is not
626 found, or -FDT_ERR_BADLAYOUT if not enough data
627 * @return pointer to cell, which is only valid if err == 0
628 */
629 static const void *get_prop_check_min_len(const void *blob, int node,
630 const char *prop_name, int min_len, int *err)
631 {
632 const void *cell;
633 int len;
634
635 debug("%s: %s\n", __func__, prop_name);
636 cell = fdt_getprop(blob, node, prop_name, &len);
637 if (!cell)
638 *err = -FDT_ERR_NOTFOUND;
639 else if (len < min_len)
640 *err = -FDT_ERR_BADLAYOUT;
641 else
642 *err = 0;
643 return cell;
644 }
645
646 int fdtdec_get_int_array(const void *blob, int node, const char *prop_name,
647 u32 *array, int count)
648 {
649 const u32 *cell;
650 int i, err = 0;
651
652 debug("%s: %s\n", __func__, prop_name);
653 cell = get_prop_check_min_len(blob, node, prop_name,
654 sizeof(u32) * count, &err);
655 if (!err) {
656 for (i = 0; i < count; i++)
657 array[i] = fdt32_to_cpu(cell[i]);
658 }
659 return err;
660 }
661
662 int fdtdec_get_int_array_count(const void *blob, int node,
663 const char *prop_name, u32 *array, int count)
664 {
665 const u32 *cell;
666 int len, elems;
667 int i;
668
669 debug("%s: %s\n", __func__, prop_name);
670 cell = fdt_getprop(blob, node, prop_name, &len);
671 if (!cell)
672 return -FDT_ERR_NOTFOUND;
673 elems = len / sizeof(u32);
674 if (count > elems)
675 count = elems;
676 for (i = 0; i < count; i++)
677 array[i] = fdt32_to_cpu(cell[i]);
678
679 return count;
680 }
681
682 const u32 *fdtdec_locate_array(const void *blob, int node,
683 const char *prop_name, int count)
684 {
685 const u32 *cell;
686 int err;
687
688 cell = get_prop_check_min_len(blob, node, prop_name,
689 sizeof(u32) * count, &err);
690 return err ? NULL : cell;
691 }
692
693 int fdtdec_get_bool(const void *blob, int node, const char *prop_name)
694 {
695 const s32 *cell;
696 int len;
697
698 debug("%s: %s\n", __func__, prop_name);
699 cell = fdt_getprop(blob, node, prop_name, &len);
700 return cell != NULL;
701 }
702
703 int fdtdec_parse_phandle_with_args(const void *blob, int src_node,
704 const char *list_name,
705 const char *cells_name,
706 int cell_count, int index,
707 struct fdtdec_phandle_args *out_args)
708 {
709 const __be32 *list, *list_end;
710 int rc = 0, size, cur_index = 0;
711 uint32_t count = 0;
712 int node = -1;
713 int phandle;
714
715 /* Retrieve the phandle list property */
716 list = fdt_getprop(blob, src_node, list_name, &size);
717 if (!list)
718 return -ENOENT;
719 list_end = list + size / sizeof(*list);
720
721 /* Loop over the phandles until all the requested entry is found */
722 while (list < list_end) {
723 rc = -EINVAL;
724 count = 0;
725
726 /*
727 * If phandle is 0, then it is an empty entry with no
728 * arguments. Skip forward to the next entry.
729 */
730 phandle = be32_to_cpup(list++);
731 if (phandle) {
732 /*
733 * Find the provider node and parse the #*-cells
734 * property to determine the argument length.
735 *
736 * This is not needed if the cell count is hard-coded
737 * (i.e. cells_name not set, but cell_count is set),
738 * except when we're going to return the found node
739 * below.
740 */
741 if (cells_name || cur_index == index) {
742 node = fdt_node_offset_by_phandle(blob,
743 phandle);
744 if (!node) {
745 debug("%s: could not find phandle\n",
746 fdt_get_name(blob, src_node,
747 NULL));
748 goto err;
749 }
750 }
751
752 if (cells_name) {
753 count = fdtdec_get_int(blob, node, cells_name,
754 -1);
755 if (count == -1) {
756 debug("%s: could not get %s for %s\n",
757 fdt_get_name(blob, src_node,
758 NULL),
759 cells_name,
760 fdt_get_name(blob, node,
761 NULL));
762 goto err;
763 }
764 } else {
765 count = cell_count;
766 }
767
768 /*
769 * Make sure that the arguments actually fit in the
770 * remaining property data length
771 */
772 if (list + count > list_end) {
773 debug("%s: arguments longer than property\n",
774 fdt_get_name(blob, src_node, NULL));
775 goto err;
776 }
777 }
778
779 /*
780 * All of the error cases above bail out of the loop, so at
781 * this point, the parsing is successful. If the requested
782 * index matches, then fill the out_args structure and return,
783 * or return -ENOENT for an empty entry.
784 */
785 rc = -ENOENT;
786 if (cur_index == index) {
787 if (!phandle)
788 goto err;
789
790 if (out_args) {
791 int i;
792
793 if (count > MAX_PHANDLE_ARGS) {
794 debug("%s: too many arguments %d\n",
795 fdt_get_name(blob, src_node,
796 NULL), count);
797 count = MAX_PHANDLE_ARGS;
798 }
799 out_args->node = node;
800 out_args->args_count = count;
801 for (i = 0; i < count; i++) {
802 out_args->args[i] =
803 be32_to_cpup(list++);
804 }
805 }
806
807 /* Found it! return success */
808 return 0;
809 }
810
811 node = -1;
812 list += count;
813 cur_index++;
814 }
815
816 /*
817 * Result will be one of:
818 * -ENOENT : index is for empty phandle
819 * -EINVAL : parsing error on data
820 * [1..n] : Number of phandle (count mode; when index = -1)
821 */
822 rc = index < 0 ? cur_index : -ENOENT;
823 err:
824 return rc;
825 }
826
827 int fdtdec_get_child_count(const void *blob, int node)
828 {
829 int subnode;
830 int num = 0;
831
832 fdt_for_each_subnode(blob, subnode, node)
833 num++;
834
835 return num;
836 }
837
838 int fdtdec_get_byte_array(const void *blob, int node, const char *prop_name,
839 u8 *array, int count)
840 {
841 const u8 *cell;
842 int err;
843
844 cell = get_prop_check_min_len(blob, node, prop_name, count, &err);
845 if (!err)
846 memcpy(array, cell, count);
847 return err;
848 }
849
850 const u8 *fdtdec_locate_byte_array(const void *blob, int node,
851 const char *prop_name, int count)
852 {
853 const u8 *cell;
854 int err;
855
856 cell = get_prop_check_min_len(blob, node, prop_name, count, &err);
857 if (err)
858 return NULL;
859 return cell;
860 }
861
862 int fdtdec_get_config_int(const void *blob, const char *prop_name,
863 int default_val)
864 {
865 int config_node;
866
867 debug("%s: %s\n", __func__, prop_name);
868 config_node = fdt_path_offset(blob, "/config");
869 if (config_node < 0)
870 return default_val;
871 return fdtdec_get_int(blob, config_node, prop_name, default_val);
872 }
873
874 int fdtdec_get_config_bool(const void *blob, const char *prop_name)
875 {
876 int config_node;
877 const void *prop;
878
879 debug("%s: %s\n", __func__, prop_name);
880 config_node = fdt_path_offset(blob, "/config");
881 if (config_node < 0)
882 return 0;
883 prop = fdt_get_property(blob, config_node, prop_name, NULL);
884
885 return prop != NULL;
886 }
887
888 char *fdtdec_get_config_string(const void *blob, const char *prop_name)
889 {
890 const char *nodep;
891 int nodeoffset;
892 int len;
893
894 debug("%s: %s\n", __func__, prop_name);
895 nodeoffset = fdt_path_offset(blob, "/config");
896 if (nodeoffset < 0)
897 return NULL;
898
899 nodep = fdt_getprop(blob, nodeoffset, prop_name, &len);
900 if (!nodep)
901 return NULL;
902
903 return (char *)nodep;
904 }
905
906 int fdtdec_decode_region(const void *blob, int node, const char *prop_name,
907 fdt_addr_t *basep, fdt_size_t *sizep)
908 {
909 const fdt_addr_t *cell;
910 int len;
911
912 debug("%s: %s: %s\n", __func__, fdt_get_name(blob, node, NULL),
913 prop_name);
914 cell = fdt_getprop(blob, node, prop_name, &len);
915 if (!cell || (len < sizeof(fdt_addr_t) * 2)) {
916 debug("cell=%p, len=%d\n", cell, len);
917 return -1;
918 }
919
920 *basep = fdt_addr_to_cpu(*cell);
921 *sizep = fdt_size_to_cpu(cell[1]);
922 debug("%s: base=%08lx, size=%lx\n", __func__, (ulong)*basep,
923 (ulong)*sizep);
924
925 return 0;
926 }
927
928 /**
929 * Read a flash entry from the fdt
930 *
931 * @param blob FDT blob
932 * @param node Offset of node to read
933 * @param name Name of node being read
934 * @param entry Place to put offset and size of this node
935 * @return 0 if ok, -ve on error
936 */
937 int fdtdec_read_fmap_entry(const void *blob, int node, const char *name,
938 struct fmap_entry *entry)
939 {
940 const char *prop;
941 u32 reg[2];
942
943 if (fdtdec_get_int_array(blob, node, "reg", reg, 2)) {
944 debug("Node '%s' has bad/missing 'reg' property\n", name);
945 return -FDT_ERR_NOTFOUND;
946 }
947 entry->offset = reg[0];
948 entry->length = reg[1];
949 entry->used = fdtdec_get_int(blob, node, "used", entry->length);
950 prop = fdt_getprop(blob, node, "compress", NULL);
951 entry->compress_algo = prop && !strcmp(prop, "lzo") ?
952 FMAP_COMPRESS_LZO : FMAP_COMPRESS_NONE;
953 prop = fdt_getprop(blob, node, "hash", &entry->hash_size);
954 entry->hash_algo = prop ? FMAP_HASH_SHA256 : FMAP_HASH_NONE;
955 entry->hash = (uint8_t *)prop;
956
957 return 0;
958 }
959
960 u64 fdtdec_get_number(const fdt32_t *ptr, unsigned int cells)
961 {
962 u64 number = 0;
963
964 while (cells--)
965 number = (number << 32) | fdt32_to_cpu(*ptr++);
966
967 return number;
968 }
969
970 int fdt_get_resource(const void *fdt, int node, const char *property,
971 unsigned int index, struct fdt_resource *res)
972 {
973 const fdt32_t *ptr, *end;
974 int na, ns, len, parent;
975 unsigned int i = 0;
976
977 parent = fdt_parent_offset(fdt, node);
978 if (parent < 0)
979 return parent;
980
981 na = fdt_address_cells(fdt, parent);
982 ns = fdt_size_cells(fdt, parent);
983
984 ptr = fdt_getprop(fdt, node, property, &len);
985 if (!ptr)
986 return len;
987
988 end = ptr + len / sizeof(*ptr);
989
990 while (ptr + na + ns <= end) {
991 if (i == index) {
992 res->start = res->end = fdtdec_get_number(ptr, na);
993 res->end += fdtdec_get_number(&ptr[na], ns) - 1;
994 return 0;
995 }
996
997 ptr += na + ns;
998 i++;
999 }
1000
1001 return -FDT_ERR_NOTFOUND;
1002 }
1003
1004 int fdt_get_named_resource(const void *fdt, int node, const char *property,
1005 const char *prop_names, const char *name,
1006 struct fdt_resource *res)
1007 {
1008 int index;
1009
1010 index = fdt_find_string(fdt, node, prop_names, name);
1011 if (index < 0)
1012 return index;
1013
1014 return fdt_get_resource(fdt, node, property, index, res);
1015 }
1016
1017 int fdtdec_decode_memory_region(const void *blob, int config_node,
1018 const char *mem_type, const char *suffix,
1019 fdt_addr_t *basep, fdt_size_t *sizep)
1020 {
1021 char prop_name[50];
1022 const char *mem;
1023 fdt_size_t size, offset_size;
1024 fdt_addr_t base, offset;
1025 int node;
1026
1027 if (config_node == -1) {
1028 config_node = fdt_path_offset(blob, "/config");
1029 if (config_node < 0) {
1030 debug("%s: Cannot find /config node\n", __func__);
1031 return -ENOENT;
1032 }
1033 }
1034 if (!suffix)
1035 suffix = "";
1036
1037 snprintf(prop_name, sizeof(prop_name), "%s-memory%s", mem_type,
1038 suffix);
1039 mem = fdt_getprop(blob, config_node, prop_name, NULL);
1040 if (!mem) {
1041 debug("%s: No memory type for '%s', using /memory\n", __func__,
1042 prop_name);
1043 mem = "/memory";
1044 }
1045
1046 node = fdt_path_offset(blob, mem);
1047 if (node < 0) {
1048 debug("%s: Failed to find node '%s': %s\n", __func__, mem,
1049 fdt_strerror(node));
1050 return -ENOENT;
1051 }
1052
1053 /*
1054 * Not strictly correct - the memory may have multiple banks. We just
1055 * use the first
1056 */
1057 if (fdtdec_decode_region(blob, node, "reg", &base, &size)) {
1058 debug("%s: Failed to decode memory region %s\n", __func__,
1059 mem);
1060 return -EINVAL;
1061 }
1062
1063 snprintf(prop_name, sizeof(prop_name), "%s-offset%s", mem_type,
1064 suffix);
1065 if (fdtdec_decode_region(blob, config_node, prop_name, &offset,
1066 &offset_size)) {
1067 debug("%s: Failed to decode memory region '%s'\n", __func__,
1068 prop_name);
1069 return -EINVAL;
1070 }
1071
1072 *basep = base + offset;
1073 *sizep = offset_size;
1074
1075 return 0;
1076 }
1077
1078 static int decode_timing_property(const void *blob, int node, const char *name,
1079 struct timing_entry *result)
1080 {
1081 int length, ret = 0;
1082 const u32 *prop;
1083
1084 prop = fdt_getprop(blob, node, name, &length);
1085 if (!prop) {
1086 debug("%s: could not find property %s\n",
1087 fdt_get_name(blob, node, NULL), name);
1088 return length;
1089 }
1090
1091 if (length == sizeof(u32)) {
1092 result->typ = fdtdec_get_int(blob, node, name, 0);
1093 result->min = result->typ;
1094 result->max = result->typ;
1095 } else {
1096 ret = fdtdec_get_int_array(blob, node, name, &result->min, 3);
1097 }
1098
1099 return ret;
1100 }
1101
1102 int fdtdec_decode_display_timing(const void *blob, int parent, int index,
1103 struct display_timing *dt)
1104 {
1105 int i, node, timings_node;
1106 u32 val = 0;
1107 int ret = 0;
1108
1109 timings_node = fdt_subnode_offset(blob, parent, "display-timings");
1110 if (timings_node < 0)
1111 return timings_node;
1112
1113 for (i = 0, node = fdt_first_subnode(blob, timings_node);
1114 node > 0 && i != index;
1115 node = fdt_next_subnode(blob, node))
1116 i++;
1117
1118 if (node < 0)
1119 return node;
1120
1121 memset(dt, 0, sizeof(*dt));
1122
1123 ret |= decode_timing_property(blob, node, "hback-porch",
1124 &dt->hback_porch);
1125 ret |= decode_timing_property(blob, node, "hfront-porch",
1126 &dt->hfront_porch);
1127 ret |= decode_timing_property(blob, node, "hactive", &dt->hactive);
1128 ret |= decode_timing_property(blob, node, "hsync-len", &dt->hsync_len);
1129 ret |= decode_timing_property(blob, node, "vback-porch",
1130 &dt->vback_porch);
1131 ret |= decode_timing_property(blob, node, "vfront-porch",
1132 &dt->vfront_porch);
1133 ret |= decode_timing_property(blob, node, "vactive", &dt->vactive);
1134 ret |= decode_timing_property(blob, node, "vsync-len", &dt->vsync_len);
1135 ret |= decode_timing_property(blob, node, "clock-frequency",
1136 &dt->pixelclock);
1137
1138 dt->flags = 0;
1139 val = fdtdec_get_int(blob, node, "vsync-active", -1);
1140 if (val != -1) {
1141 dt->flags |= val ? DISPLAY_FLAGS_VSYNC_HIGH :
1142 DISPLAY_FLAGS_VSYNC_LOW;
1143 }
1144 val = fdtdec_get_int(blob, node, "hsync-active", -1);
1145 if (val != -1) {
1146 dt->flags |= val ? DISPLAY_FLAGS_HSYNC_HIGH :
1147 DISPLAY_FLAGS_HSYNC_LOW;
1148 }
1149 val = fdtdec_get_int(blob, node, "de-active", -1);
1150 if (val != -1) {
1151 dt->flags |= val ? DISPLAY_FLAGS_DE_HIGH :
1152 DISPLAY_FLAGS_DE_LOW;
1153 }
1154 val = fdtdec_get_int(blob, node, "pixelclk-active", -1);
1155 if (val != -1) {
1156 dt->flags |= val ? DISPLAY_FLAGS_PIXDATA_POSEDGE :
1157 DISPLAY_FLAGS_PIXDATA_NEGEDGE;
1158 }
1159
1160 if (fdtdec_get_bool(blob, node, "interlaced"))
1161 dt->flags |= DISPLAY_FLAGS_INTERLACED;
1162 if (fdtdec_get_bool(blob, node, "doublescan"))
1163 dt->flags |= DISPLAY_FLAGS_DOUBLESCAN;
1164 if (fdtdec_get_bool(blob, node, "doubleclk"))
1165 dt->flags |= DISPLAY_FLAGS_DOUBLECLK;
1166
1167 return ret;
1168 }
1169
1170 int fdtdec_setup(void)
1171 {
1172 #if CONFIG_IS_ENABLED(OF_CONTROL)
1173 # ifdef CONFIG_OF_EMBED
1174 /* Get a pointer to the FDT */
1175 gd->fdt_blob = __dtb_dt_begin;
1176 # elif defined CONFIG_OF_SEPARATE
1177 # ifdef CONFIG_SPL_BUILD
1178 /* FDT is at end of BSS unless it is in a different memory region */
1179 if (IS_ENABLED(CONFIG_SPL_SEPARATE_BSS))
1180 gd->fdt_blob = (ulong *)&_image_binary_end;
1181 else
1182 gd->fdt_blob = (ulong *)&__bss_end;
1183 # else
1184 /* FDT is at end of image */
1185 gd->fdt_blob = (ulong *)&_end;
1186 # endif
1187 # elif defined(CONFIG_OF_HOSTFILE)
1188 if (sandbox_read_fdt_from_file()) {
1189 puts("Failed to read control FDT\n");
1190 return -1;
1191 }
1192 # endif
1193 # ifndef CONFIG_SPL_BUILD
1194 /* Allow the early environment to override the fdt address */
1195 gd->fdt_blob = (void *)getenv_ulong("fdtcontroladdr", 16,
1196 (uintptr_t)gd->fdt_blob);
1197 # endif
1198 #endif
1199 return fdtdec_prepare_fdt();
1200 }
1201
1202 #endif /* !USE_HOSTCC */