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1 /*
2 * (C) Copyright 2008 Dmitry Rakhchev, EmCraft Systems, rda@emcraft.com
3 *
4 * Developed for DENX Software Engineering GmbH
5 *
6 * See file CREDITS for list of people who contributed to this
7 * project.
8 *
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of
12 * the License, or (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
22 * MA 02111-1307 USA
23 */
24 #include <common.h>
25
26 #ifdef CONFIG_POST
27
28 /* This test performs testing of FPGA SCRATCH register,
29 * gets FPGA version and run get_ram_size() on FPGA memory
30 */
31
32 #include <post.h>
33
34 #include <asm/io.h>
35
36 DECLARE_GLOBAL_DATA_PTR;
37
38 #define FPGA_SCRATCH_REG 0xC4000050
39 #define FPGA_VERSION_REG 0xC4000040
40 #define FPGA_RAM_START 0xC4200000
41 #define FPGA_RAM_END 0xC4203FFF
42 #define FPGA_STAT 0xC400000C
43
44 #if CONFIG_POST & CFG_POST_BSPEC3
45
46 static int one_scratch_test(uint value)
47 {
48 uint read_value;
49 int ret = 0;
50
51 out_be32((void *)FPGA_SCRATCH_REG, value);
52 /* read other location (protect against data lines capacity) */
53 ret = in_be16((void *)FPGA_VERSION_REG);
54 /* verify test pattern */
55 read_value = in_be32((void *)FPGA_SCRATCH_REG);
56 if (read_value != value) {
57 post_log("FPGA SCRATCH test failed write %08X, read %08X\n",
58 value, read_value);
59 ret = 1;
60 }
61
62 return ret;
63 }
64
65 /* Verify FPGA, get version & memory size */
66 int fpga_post_test(int flags)
67 {
68 uint old_value;
69 ushort version;
70 uint read_value;
71 int ret = 0;
72
73 post_log("\n");
74 old_value = in_be32((void *)FPGA_SCRATCH_REG);
75
76 if (one_scratch_test(0x55555555))
77 ret = 1;
78 if (one_scratch_test(0xAAAAAAAA))
79 ret = 1;
80
81 out_be32((void *)FPGA_SCRATCH_REG, old_value);
82
83 version = in_be16((void *)FPGA_VERSION_REG);
84 post_log("FPGA : version %u.%u\n",
85 (version >> 8) & 0xFF, version & 0xFF);
86
87 /* Enable write to FPGA RAM */
88 out_be32((void *)FPGA_STAT, in_be32((void *)FPGA_STAT) | 0x1000);
89
90 read_value = get_ram_size((void *)CFG_FPGA_BASE_1, 0x4000);
91 post_log("FPGA RAM size: %d bytes\n", read_value);
92
93 return ret;
94 }
95
96 #endif /* CONFIG_POST & CFG_POST_BSPEC3 */
97 #endif /* CONFIG_POST */
98