]> git.ipfire.org Git - people/ms/u-boot.git/blob - post/board/lwmon5/gdc.c
aa1eee05fdc441be287bd4db59ca121580fc6072
[people/ms/u-boot.git] / post / board / lwmon5 / gdc.c
1 /*
2 * (C) Copyright 2008 Dmitry Rakhchev, EmCraft Systems, rda@emcraft.com
3 *
4 * Developed for DENX Software Engineering GmbH
5 *
6 * See file CREDITS for list of people who contributed to this
7 * project.
8 *
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of
12 * the License, or (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
22 * MA 02111-1307 USA
23 */
24 #include <common.h>
25
26 #ifdef CONFIG_POST
27
28 /* This test attempts to verify board GDC. A scratch register tested, then
29 * simple memory test (get_ram_size()) run over GDC memory.
30 */
31
32 #include <post.h>
33
34 #include <asm/io.h>
35
36 DECLARE_GLOBAL_DATA_PTR;
37
38 #define GDC_SCRATCH_REG 0xC1FF8044
39 #define GDC_VERSION_REG 0xC1FF8084
40 #define GDC_RAM_START 0xC0000000
41 #define GDC_RAM_END 0xC2000000
42
43 #if CONFIG_POST & CFG_POST_BSPEC4
44
45 static int gdc_test_reg_one(uint value)
46 {
47 int ret;
48 uint read_value;
49
50 /* write test pattern */
51 out_be32((void *)GDC_SCRATCH_REG, value);
52 /* read other location (protect against data lines capacity) */
53 ret = in_be32((void *)GDC_RAM_START);
54 /* verify test pattern */
55 read_value = in_be32((void *)GDC_SCRATCH_REG);
56 if (read_value != value) {
57 post_log("GDC SCRATCH test failed write %08X, read %08X\n",
58 value, read_value);
59 }
60
61 return (read_value != value);
62 }
63
64 /* Verify GDC, get memory size */
65 int gdc_post_test(int flags)
66 {
67 uint old_value;
68 int ret = 0;
69
70 post_log("\n");
71 old_value = in_be32((void *)GDC_SCRATCH_REG);
72
73 /*
74 * GPIOC2 register behaviour: the LIME graphics processor has a
75 * maximum of 5 GPIO ports that can be used in this hardware
76 * configuration. Thus only the bits for these 5 GPIOs can be
77 * activated in the GPIOC2 register. All other bits will always be
78 * read as zero.
79 */
80 if (gdc_test_reg_one(0x00150015))
81 ret = 1;
82 if (gdc_test_reg_one(0x000A000A))
83 ret = 1;
84
85 out_be32((void *)GDC_SCRATCH_REG, old_value);
86
87 old_value = in_be32((void *)GDC_VERSION_REG);
88 post_log("GDC chip version %u.%u, year %04X\n",
89 (old_value >> 8) & 0xFF, old_value & 0xFF,
90 (old_value >> 16) & 0xFFFF);
91
92 old_value = get_ram_size((void *)GDC_RAM_START,
93 GDC_RAM_END - GDC_RAM_START);
94 post_log("GDC RAM size: %d bytes\n", old_value);
95
96 return ret;
97 }
98 #endif /* CONFIG_POST & CFG_POST_BSPEC4 */
99 #endif /* CONFIG_POST */
100