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git.ipfire.org Git - people/ms/u-boot.git/blob - post/lib_powerpc/rlwnm.c
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
5 * SPDX-License-Identifier: GPL-2.0+
12 * Shift instructions: rlwnm
14 * The test contains a pre-built table of instructions, operands and
15 * expected results. For each table entry, the test will cyclically use
16 * different sets of operand registers and result registers.
22 #if CONFIG_POST & CONFIG_SYS_POST_CPU
24 extern void cpu_post_exec_22 (ulong
*code
, ulong
*cr
, ulong
*res
, ulong op1
,
26 extern ulong
cpu_post_makecr (long v
);
28 static struct cpu_post_rlwnm_s
36 } cpu_post_rlwnm_table
[] =
47 static unsigned int cpu_post_rlwnm_size
= ARRAY_SIZE(cpu_post_rlwnm_table
);
49 int cpu_post_test_rlwnm (void)
53 int flag
= disable_interrupts();
55 for (i
= 0; i
< cpu_post_rlwnm_size
&& ret
== 0; i
++)
57 struct cpu_post_rlwnm_s
*test
= cpu_post_rlwnm_table
+ i
;
59 for (reg
= 0; reg
< 32 && ret
== 0; reg
++)
61 unsigned int reg0
= (reg
+ 0) % 32;
62 unsigned int reg1
= (reg
+ 1) % 32;
63 unsigned int reg2
= (reg
+ 2) % 32;
64 unsigned int stk
= reg
< 16 ? 31 : 15;
65 unsigned long code
[] =
68 ASM_ADDI(stk
, 1, -24),
71 ASM_STW(reg0
, stk
, 8),
72 ASM_STW(reg1
, stk
, 4),
73 ASM_STW(reg2
, stk
, 0),
74 ASM_LWZ(reg1
, stk
, 12),
75 ASM_LWZ(reg0
, stk
, 16),
76 ASM_122(test
->cmd
, reg2
, reg1
, reg0
, test
->mb
, test
->me
),
77 ASM_STW(reg2
, stk
, 12),
78 ASM_LWZ(reg2
, stk
, 0),
79 ASM_LWZ(reg1
, stk
, 4),
80 ASM_LWZ(reg0
, stk
, 8),
86 unsigned long codecr
[] =
89 ASM_ADDI(stk
, 1, -24),
92 ASM_STW(reg0
, stk
, 8),
93 ASM_STW(reg1
, stk
, 4),
94 ASM_STW(reg2
, stk
, 0),
95 ASM_LWZ(reg1
, stk
, 12),
96 ASM_LWZ(reg0
, stk
, 16),
97 ASM_122(test
->cmd
, reg2
, reg1
, reg0
, test
->mb
, test
->me
) |
99 ASM_STW(reg2
, stk
, 12),
100 ASM_LWZ(reg2
, stk
, 0),
101 ASM_LWZ(reg1
, stk
, 4),
102 ASM_LWZ(reg0
, stk
, 8),
104 ASM_ADDI(1, stk
, 24),
114 cpu_post_exec_22 (code
, & cr
, & res
, test
->op1
, test
->op2
);
116 ret
= res
== test
->res
&& cr
== 0 ? 0 : -1;
120 post_log ("Error at rlwnm test %d !\n", i
);
126 cpu_post_exec_22 (codecr
, & cr
, & res
, test
->op1
, test
->op2
);
128 ret
= res
== test
->res
&&
129 (cr
& 0xe0000000) == cpu_post_makecr (res
) ? 0 : -1;
133 post_log ("Error at rlwnm test %d !\n", i
);