scripts/Makefile.build

   1 # ==========================================================================
   2 # Building
   3 # ==========================================================================
   4 #
   5 # SPDX-License-Identifier:      GPL-2.0
   6 #
   7
   8 # Modified for U-Boot
   9 prefix := tpl
  10 src := $(patsubst $(prefix)/%,%,$(obj))
  11 ifeq ($(obj),$(src))
  12 prefix := spl
  13 src := $(patsubst $(prefix)/%,%,$(obj))
  14 ifeq ($(obj),$(src))
  15 prefix := .
  16 endif
  17 endif
  18
  19 PHONY := __build
  20 __build:
  21
  22 # Init all relevant variables used in kbuild files so
  23 # 1) they have correct type
  24 # 2) they do not inherit any value from the environment
  25 obj-y :=
  26 obj-m :=
  27 lib-y :=
  28 lib-m :=
  29 always :=
  30 targets :=
  31 subdir-y :=
  32 subdir-m :=
  33 EXTRA_AFLAGS   :=
  34 EXTRA_CFLAGS   :=
  35 EXTRA_CPPFLAGS :=
  36 EXTRA_LDFLAGS  :=
  37 asflags-y  :=
  38 ccflags-y  :=
  39 cppflags-y :=
  40 ldflags-y  :=
  41
  42 subdir-asflags-y :=
  43 subdir-ccflags-y :=
  44
  45 # Read auto.conf if it exists, otherwise ignore
  46 # Modified for U-Boot
  47 -include include/config/auto.conf
  48 -include $(prefix)/include/autoconf.mk
  49 include scripts/Makefile.uncmd_spl
  50
  51 include scripts/Kbuild.include
  52
  53 # For backward compatibility check that these variables do not change
  54 save-cflags := $(CFLAGS)
  55
  56 # The filename Kbuild has precedence over Makefile
  57 kbuild-dir := $(if $(filter /%,$(src)),$(src),$(srctree)/$(src))
  58 kbuild-file := $(if $(wildcard $(kbuild-dir)/Kbuild),$(kbuild-dir)/Kbuild,$(kbuild-dir)/Makefile)
  59 include $(kbuild-file)
  60
  61 # Added for U-Boot
  62 asflags-y  += $(PLATFORM_CPPFLAGS)
  63 ccflags-y  += $(PLATFORM_CPPFLAGS)
  64 cppflags-y += $(PLATFORM_CPPFLAGS)
  65
  66 # If the save-* variables changed error out
  67 ifeq ($(KBUILD_NOPEDANTIC),)
  68         ifneq ("$(save-cflags)","$(CFLAGS)")
  69                 $(error CFLAGS was changed in "$(kbuild-file)". Fix it to use ccflags-y)
  70         endif
  71 endif
  72
  73 include scripts/Makefile.lib
  74
  75 ifdef host-progs
  76 ifneq ($(hostprogs-y),$(host-progs))
  77 $(warning kbuild: $(obj)/Makefile - Usage of host-progs is deprecated. Please replace with hostprogs-y!)
  78 hostprogs-y += $(host-progs)
  79 endif
  80 endif
  81
  82 # Do not include host rules unless needed
  83 ifneq ($(hostprogs-y)$(hostprogs-m),)
  84 include scripts/Makefile.host
  85 endif
  86
  87 # Uncommented for U-Boot
  88 #  We need to create output dicrectory for SPL and TPL even for in-tree build
  89 #ifneq ($(KBUILD_SRC),)
  90 # Create output directory if not already present
  91 _dummy := $(shell [ -d $(obj) ] || mkdir -p $(obj))
  92
  93 # Create directories for object files if directory does not exist
  94 # Needed when obj-y := dir/file.o syntax is used
  95 _dummy := $(foreach d,$(obj-dirs), $(shell [ -d $(d) ] || mkdir -p $(d)))
  96 #endif
  97
  98 ifndef obj
  99 $(warning kbuild: Makefile.build is included improperly)
 100 endif
 101
 102 # ===========================================================================
 103
 104 ifneq ($(strip $(lib-y) $(lib-m) $(lib-)),)
 105 lib-target := $(obj)/lib.a
 106 endif
 107
 108 ifneq ($(strip $(obj-y) $(obj-m) $(obj-) $(subdir-m) $(lib-target)),)
 109 builtin-target := $(obj)/built-in.o
 110 endif
 111
 112 modorder-target := $(obj)/modules.order
 113
 114 # We keep a list of all modules in $(MODVERDIR)
 115
 116 __build: $(if $(KBUILD_BUILTIN),$(builtin-target) $(lib-target) $(extra-y)) \
 117          $(if $(KBUILD_MODULES),$(obj-m) $(modorder-target)) \
 118          $(subdir-ym) $(always)
 119         @:
 120
 121 # Linus' kernel sanity checking tool
 122 ifneq ($(KBUILD_CHECKSRC),0)
 123   ifeq ($(KBUILD_CHECKSRC),2)
 124     quiet_cmd_force_checksrc = CHECK   $<
 125           cmd_force_checksrc = $(CHECK) $(CHECKFLAGS) $(c_flags) $< ;
 126   else
 127       quiet_cmd_checksrc     = CHECK   $<
 128             cmd_checksrc     = $(CHECK) $(CHECKFLAGS) $(c_flags) $< ;
 129   endif
 130 endif
 131
 132 # Do section mismatch analysis for each module/built-in.o
 133 ifdef CONFIG_DEBUG_SECTION_MISMATCH
 134   cmd_secanalysis = ; scripts/mod/modpost $@
 135 endif
 136
 137 # Compile C sources (.c)
 138 # ---------------------------------------------------------------------------
 139
 140 # Default is built-in, unless we know otherwise
 141 modkern_cflags =                                          \
 142         $(if $(part-of-module),                           \
 143                 $(KBUILD_CFLAGS_MODULE) $(CFLAGS_MODULE), \
 144                 $(KBUILD_CFLAGS_KERNEL) $(CFLAGS_KERNEL))
 145 quiet_modtag := $(empty)   $(empty)
 146
 147 $(real-objs-m)        : part-of-module := y
 148 $(real-objs-m:.o=.i)  : part-of-module := y
 149 $(real-objs-m:.o=.s)  : part-of-module := y
 150 $(real-objs-m:.o=.lst): part-of-module := y
 151
 152 $(real-objs-m)        : quiet_modtag := [M]
 153 $(real-objs-m:.o=.i)  : quiet_modtag := [M]
 154 $(real-objs-m:.o=.s)  : quiet_modtag := [M]
 155 $(real-objs-m:.o=.lst): quiet_modtag := [M]
 156
 157 $(obj-m)              : quiet_modtag := [M]
 158
 159 # Default for not multi-part modules
 160 modname = $(basetarget)
 161
 162 $(multi-objs-m)         : modname = $(modname-multi)
 163 $(multi-objs-m:.o=.i)   : modname = $(modname-multi)
 164 $(multi-objs-m:.o=.s)   : modname = $(modname-multi)
 165 $(multi-objs-m:.o=.lst) : modname = $(modname-multi)
 166 $(multi-objs-y)         : modname = $(modname-multi)
 167 $(multi-objs-y:.o=.i)   : modname = $(modname-multi)
 168 $(multi-objs-y:.o=.s)   : modname = $(modname-multi)
 169 $(multi-objs-y:.o=.lst) : modname = $(modname-multi)
 170
 171 quiet_cmd_cc_s_c = CC $(quiet_modtag)  $@
 172 cmd_cc_s_c       = $(CC) $(c_flags) $(DISABLE_LTO) -fverbose-asm -S -o $@ $<
 173
 174 $(obj)/%.s: $(src)/%.c FORCE
 175         $(call if_changed_dep,cc_s_c)
 176
 177 quiet_cmd_cc_i_c = CPP $(quiet_modtag) $@
 178 cmd_cc_i_c       = $(CPP) $(c_flags)   -o $@ $<
 179
 180 $(obj)/%.i: $(src)/%.c FORCE
 181         $(call if_changed_dep,cc_i_c)
 182
 183 cmd_gensymtypes =                                                           \
 184     $(CPP) -D__GENKSYMS__ $(c_flags) $< |                                   \
 185     $(GENKSYMS) $(if $(1), -T $(2))                                         \
 186      $(patsubst y,-s _,$(CONFIG_HAVE_UNDERSCORE_SYMBOL_PREFIX))             \
 187      $(if $(KBUILD_PRESERVE),-p)                                            \
 188      -r $(firstword $(wildcard $(2:.symtypes=.symref) /dev/null))
 189
 190 quiet_cmd_cc_symtypes_c = SYM $(quiet_modtag) $@
 191 cmd_cc_symtypes_c =                                                         \
 192     set -e;                                                                 \
 193     $(call cmd_gensymtypes,true,$@) >/dev/null;                             \
 194     test -s $@ || rm -f $@
 195
 196 $(obj)/%.symtypes : $(src)/%.c FORCE
 197         $(call cmd,cc_symtypes_c)
 198
 199 # C (.c) files
 200 # The C file is compiled and updated dependency information is generated.
 201 # (See cmd_cc_o_c + relevant part of rule_cc_o_c)
 202
 203 quiet_cmd_cc_o_c = CC $(quiet_modtag)  $@
 204
 205 ifndef CONFIG_MODVERSIONS
 206 cmd_cc_o_c = $(CC) $(c_flags) -c -o $@ $<
 207
 208 else
 209 # When module versioning is enabled the following steps are executed:
 210 # o compile a .tmp_<file>.o from <file>.c
 211 # o if .tmp_<file>.o doesn't contain a __ksymtab version, i.e. does
 212 #   not export symbols, we just rename .tmp_<file>.o to <file>.o and
 213 #   are done.
 214 # o otherwise, we calculate symbol versions using the good old
 215 #   genksyms on the preprocessed source and postprocess them in a way
 216 #   that they are usable as a linker script
 217 # o generate <file>.o from .tmp_<file>.o using the linker to
 218 #   replace the unresolved symbols __crc_exported_symbol with
 219 #   the actual value of the checksum generated by genksyms
 220
 221 cmd_cc_o_c = $(CC) $(c_flags) -c -o $(@D)/.tmp_$(@F) $<
 222 cmd_modversions =                                                               \
 223         if $(OBJDUMP) -h $(@D)/.tmp_$(@F) | grep -q __ksymtab; then             \
 224                 $(call cmd_gensymtypes,$(KBUILD_SYMTYPES),$(@:.o=.symtypes))    \
 225                     > $(@D)/.tmp_$(@F:.o=.ver);                                 \
 226                                                                                 \
 227                 $(LD) $(LDFLAGS) -r -o $@ $(@D)/.tmp_$(@F)                      \
 228                         -T $(@D)/.tmp_$(@F:.o=.ver);                            \
 229                 rm -f $(@D)/.tmp_$(@F) $(@D)/.tmp_$(@F:.o=.ver);                \
 230         else                                                                    \
 231                 mv -f $(@D)/.tmp_$(@F) $@;                                      \
 232         fi;
 233 endif
 234
 235 ifdef CONFIG_FTRACE_MCOUNT_RECORD
 236 ifdef BUILD_C_RECORDMCOUNT
 237 ifeq ("$(origin RECORDMCOUNT_WARN)", "command line")
 238   RECORDMCOUNT_FLAGS = -w
 239 endif
 240 # Due to recursion, we must skip empty.o.
 241 # The empty.o file is created in the make process in order to determine
 242 #  the target endianness and word size. It is made before all other C
 243 #  files, including recordmcount.
 244 sub_cmd_record_mcount =                                 \
 245         if [ $(@) != "scripts/mod/empty.o" ]; then      \
 246                 $(objtree)/scripts/recordmcount $(RECORDMCOUNT_FLAGS) "$(@)";   \
 247         fi;
 248 recordmcount_source := $(srctree)/scripts/recordmcount.c \
 249                     $(srctree)/scripts/recordmcount.h
 250 else
 251 sub_cmd_record_mcount = set -e ; perl $(srctree)/scripts/recordmcount.pl "$(ARCH)" \
 252         "$(if $(CONFIG_CPU_BIG_ENDIAN),big,little)" \
 253         "$(if $(CONFIG_64BIT),64,32)" \
 254         "$(OBJDUMP)" "$(OBJCOPY)" "$(CC) $(KBUILD_CFLAGS)" \
 255         "$(LD)" "$(NM)" "$(RM)" "$(MV)" \
 256         "$(if $(part-of-module),1,0)" "$(@)";
 257 recordmcount_source := $(srctree)/scripts/recordmcount.pl
 258 endif
 259 cmd_record_mcount =                                             \
 260         if [ "$(findstring $(CC_FLAGS_FTRACE),$(_c_flags))" =   \
 261              "$(CC_FLAGS_FTRACE)" ]; then                       \
 262                 $(sub_cmd_record_mcount)                        \
 263         fi;
 264 endif
 265
 266 define rule_cc_o_c
 267         $(call echo-cmd,checksrc) $(cmd_checksrc)                         \
 268         $(call echo-cmd,cc_o_c) $(cmd_cc_o_c);                            \
 269         $(cmd_modversions)                                                \
 270         $(call echo-cmd,record_mcount)                                    \
 271         $(cmd_record_mcount)                                              \
 272         scripts/basic/fixdep $(depfile) $@ '$(call make-cmd,cc_o_c)' >    \
 273                                                       $(dot-target).tmp;  \
 274         rm -f $(depfile);                                                 \
 275         mv -f $(dot-target).tmp $(dot-target).cmd
 276 endef
 277
 278 # Built-in and composite module parts
 279 $(obj)/%.o: $(src)/%.c $(recordmcount_source) FORCE
 280         $(call cmd,force_checksrc)
 281         $(call if_changed_rule,cc_o_c)
 282
 283 # Single-part modules are special since we need to mark them in $(MODVERDIR)
 284
 285 $(single-used-m): $(obj)/%.o: $(src)/%.c $(recordmcount_source) FORCE
 286         $(call cmd,force_checksrc)
 287         $(call if_changed_rule,cc_o_c)
 288         @{ echo $(@:.o=.ko); echo $@; } > $(MODVERDIR)/$(@F:.o=.mod)
 289
 290 quiet_cmd_cc_lst_c = MKLST   $@
 291       cmd_cc_lst_c = $(CC) $(c_flags) -g -c -o $*.o $< && \
 292                      $(CONFIG_SHELL) $(srctree)/scripts/makelst $*.o \
 293                                      System.map $(OBJDUMP) > $@
 294
 295 $(obj)/%.lst: $(src)/%.c FORCE
 296         $(call if_changed_dep,cc_lst_c)
 297
 298 # Compile assembler sources (.S)
 299 # ---------------------------------------------------------------------------
 300
 301 modkern_aflags := $(KBUILD_AFLAGS_KERNEL) $(AFLAGS_KERNEL)
 302
 303 $(real-objs-m)      : modkern_aflags := $(KBUILD_AFLAGS_MODULE) $(AFLAGS_MODULE)
 304 $(real-objs-m:.o=.s): modkern_aflags := $(KBUILD_AFLAGS_MODULE) $(AFLAGS_MODULE)
 305
 306 quiet_cmd_as_s_S = CPP $(quiet_modtag) $@
 307 cmd_as_s_S       = $(CPP) $(a_flags)   -o $@ $<
 308
 309 $(obj)/%.s: $(src)/%.S FORCE
 310         $(call if_changed_dep,as_s_S)
 311
 312 quiet_cmd_as_o_S = AS $(quiet_modtag)  $@
 313 cmd_as_o_S       = $(CC) $(a_flags) -c -o $@ $<
 314
 315 $(obj)/%.o: $(src)/%.S FORCE
 316         $(call if_changed_dep,as_o_S)
 317
 318 targets += $(real-objs-y) $(real-objs-m) $(lib-y)
 319 targets += $(extra-y) $(MAKECMDGOALS) $(always)
 320
 321 # Linker scripts preprocessor (.lds.S -> .lds)
 322 # ---------------------------------------------------------------------------
 323 quiet_cmd_cpp_lds_S = LDS     $@
 324       cmd_cpp_lds_S = $(CPP) $(cpp_flags) -P -C -U$(ARCH) \
 325                              -D__ASSEMBLY__ -DLINKER_SCRIPT -o $@ $<
 326
 327 $(obj)/%.lds: $(src)/%.lds.S FORCE
 328         $(call if_changed_dep,cpp_lds_S)
 329
 330 # ASN.1 grammar
 331 # ---------------------------------------------------------------------------
 332 quiet_cmd_asn1_compiler = ASN.1   $@
 333       cmd_asn1_compiler = $(objtree)/scripts/asn1_compiler $< \
 334                                 $(subst .h,.c,$@) $(subst .c,.h,$@)
 335
 336 .PRECIOUS: $(objtree)/$(obj)/%-asn1.c $(objtree)/$(obj)/%-asn1.h
 337
 338 $(obj)/%-asn1.c $(obj)/%-asn1.h: $(src)/%.asn1 $(objtree)/scripts/asn1_compiler
 339         $(call cmd,asn1_compiler)
 340
 341 # Build the compiled-in targets
 342 # ---------------------------------------------------------------------------
 343
 344 # To build objects in subdirs, we need to descend into the directories
 345 $(sort $(subdir-obj-y)): $(subdir-ym) ;
 346
 347 #
 348 # Rule to compile a set of .o files into one .o file
 349 #
 350 ifdef builtin-target
 351 quiet_cmd_link_o_target = LD      $@
 352 # If the list of objects to link is empty, just create an empty built-in.o
 353 cmd_link_o_target = $(if $(strip $(obj-y)),\
 354                       $(LD) $(ld_flags) -r -o $@ $(filter $(obj-y), $^) \
 355                       $(cmd_secanalysis),\
 356                       rm -f $@; $(AR) rcs$(KBUILD_ARFLAGS) $@)
 357
 358 $(builtin-target): $(obj-y) FORCE
 359         $(call if_changed,link_o_target)
 360
 361 targets += $(builtin-target)
 362 endif # builtin-target
 363
 364 #
 365 # Rule to create modules.order file
 366 #
 367 # Create commands to either record .ko file or cat modules.order from
 368 # a subdirectory
 369 modorder-cmds =                                         \
 370         $(foreach m, $(modorder),                       \
 371                 $(if $(filter %/modules.order, $m),     \
 372                         cat $m;, echo kernel/$m;))
 373
 374 $(modorder-target): $(subdir-ym) FORCE
 375         $(Q)(cat /dev/null; $(modorder-cmds)) > $@
 376
 377 #
 378 # Rule to compile a set of .o files into one .a file
 379 #
 380 ifdef lib-target
 381 quiet_cmd_link_l_target = AR      $@
 382 cmd_link_l_target = rm -f $@; $(AR) rcs$(KBUILD_ARFLAGS) $@ $(lib-y)
 383
 384 $(lib-target): $(lib-y) FORCE
 385         $(call if_changed,link_l_target)
 386
 387 targets += $(lib-target)
 388 endif
 389
 390 #
 391 # Rule to link composite objects
 392 #
 393 #  Composite objects are specified in kbuild makefile as follows:
 394 #    <composite-object>-objs := <list of .o files>
 395 #  or
 396 #    <composite-object>-y    := <list of .o files>
 397 link_multi_deps =                     \
 398 $(filter $(addprefix $(obj)/,         \
 399 $($(subst $(obj)/,,$(@:.o=-objs)))    \
 400 $($(subst $(obj)/,,$(@:.o=-y)))), $^)
 401
 402 quiet_cmd_link_multi-y = LD      $@
 403 cmd_link_multi-y = $(LD) $(ld_flags) -r -o $@ $(link_multi_deps) $(cmd_secanalysis)
 404
 405 quiet_cmd_link_multi-m = LD [M]  $@
 406 cmd_link_multi-m = $(cmd_link_multi-y)
 407
 408 $(multi-used-y): FORCE
 409         $(call if_changed,link_multi-y)
 410 $(call multi_depend, $(multi-used-y), .o, -objs -y)
 411
 412 $(multi-used-m): FORCE
 413         $(call if_changed,link_multi-m)
 414         @{ echo $(@:.o=.ko); echo $(link_multi_deps); } > $(MODVERDIR)/$(@F:.o=.mod)
 415 $(call multi_depend, $(multi-used-m), .o, -objs -y)
 416
 417 targets += $(multi-used-y) $(multi-used-m)
 418
 419
 420 # Descending
 421 # ---------------------------------------------------------------------------
 422
 423 PHONY += $(subdir-ym)
 424 $(subdir-ym):
 425         $(Q)$(MAKE) $(build)=$@
 426
 427 # Add FORCE to the prequisites of a target to force it to be always rebuilt.
 428 # ---------------------------------------------------------------------------
 429
 430 PHONY += FORCE
 431
 432 FORCE:
 433
 434 # Read all saved command lines and dependencies for the $(targets) we
 435 # may be building above, using $(if_changed{,_dep}). As an
 436 # optimization, we don't need to read them if the target does not
 437 # exist, we will rebuild anyway in that case.
 438
 439 targets := $(wildcard $(sort $(targets)))
 440 cmd_files := $(wildcard $(foreach f,$(targets),$(dir $(f)).$(notdir $(f)).cmd))
 441
 442 ifneq ($(cmd_files),)
 443   include $(cmd_files)
 444 endif
 445
 446 # Declare the contents of the .PHONY variable as phony.  We keep that
 447 # information in a variable se we can use it in if_changed and friends.
 448
 449 .PHONY: $(PHONY)