test/dm/i2c.c

   1 /*
   2  * Copyright (C) 2013 Google, Inc
   3  *
   4  * SPDX-License-Identifier:     GPL-2.0+
   5  *
   6  * Note: Test coverage does not include 10-bit addressing
   7  */
   8
   9 #include <common.h>
  10 #include <dm.h>
  11 #include <fdtdec.h>
  12 #include <i2c.h>
  13 #include <asm/state.h>
  14 #include <asm/test.h>
  15 #include <dm/device-internal.h>
  16 #include <dm/test.h>
  17 #include <dm/uclass-internal.h>
  18 #include <dm/util.h>
  19 #include <test/ut.h>
  20
  21 static const int busnum;
  22 static const int chip = 0x2c;
  23
  24 /* Test that we can find buses and chips */
  25 static int dm_test_i2c_find(struct unit_test_state *uts)
  26 {
  27         struct udevice *bus, *dev;
  28         const int no_chip = 0x10;
  29
  30         ut_asserteq(-ENODEV, uclass_find_device_by_seq(UCLASS_I2C, busnum,
  31                                                        false, &bus));
  32
  33         /*
  34          * The post_bind() method will bind devices to chip selects. Check
  35          * this then remove the emulation and the slave device.
  36          */
  37         ut_assertok(uclass_get_device_by_seq(UCLASS_I2C, busnum, &bus));
  38         ut_assertok(dm_i2c_probe(bus, chip, 0, &dev));
  39         ut_asserteq(-ENODEV, dm_i2c_probe(bus, no_chip, 0, &dev));
  40         ut_asserteq(-ENODEV, uclass_get_device_by_seq(UCLASS_I2C, 1, &bus));
  41
  42         return 0;
  43 }
  44 DM_TEST(dm_test_i2c_find, DM_TESTF_SCAN_PDATA | DM_TESTF_SCAN_FDT);
  45
  46 static int dm_test_i2c_read_write(struct unit_test_state *uts)
  47 {
  48         struct udevice *bus, *dev;
  49         uint8_t buf[5];
  50
  51         ut_assertok(uclass_get_device_by_seq(UCLASS_I2C, busnum, &bus));
  52         ut_assertok(i2c_get_chip(bus, chip, 1, &dev));
  53         ut_assertok(dm_i2c_read(dev, 0, buf, 5));
  54         ut_assertok(memcmp(buf, "\0\0\0\0\0", sizeof(buf)));
  55         ut_assertok(dm_i2c_write(dev, 2, (uint8_t *)"AB", 2));
  56         ut_assertok(dm_i2c_read(dev, 0, buf, 5));
  57         ut_assertok(memcmp(buf, "\0\0AB\0", sizeof(buf)));
  58
  59         return 0;
  60 }
  61 DM_TEST(dm_test_i2c_read_write, DM_TESTF_SCAN_PDATA | DM_TESTF_SCAN_FDT);
  62
  63 static int dm_test_i2c_speed(struct unit_test_state *uts)
  64 {
  65         struct udevice *bus, *dev;
  66         uint8_t buf[5];
  67
  68         ut_assertok(uclass_get_device_by_seq(UCLASS_I2C, busnum, &bus));
  69
  70         /* Use test mode so we create the required errors for invalid speeds */
  71         sandbox_i2c_set_test_mode(bus, true);
  72         ut_assertok(i2c_get_chip(bus, chip, 1, &dev));
  73         ut_assertok(dm_i2c_set_bus_speed(bus, 100000));
  74         ut_assertok(dm_i2c_read(dev, 0, buf, 5));
  75         ut_assertok(dm_i2c_set_bus_speed(bus, 400000));
  76         ut_asserteq(400000, dm_i2c_get_bus_speed(bus));
  77         ut_assertok(dm_i2c_read(dev, 0, buf, 5));
  78         ut_asserteq(-EINVAL, dm_i2c_write(dev, 0, buf, 5));
  79         sandbox_i2c_set_test_mode(bus, false);
  80
  81         return 0;
  82 }
  83 DM_TEST(dm_test_i2c_speed, DM_TESTF_SCAN_PDATA | DM_TESTF_SCAN_FDT);
  84
  85 static int dm_test_i2c_offset_len(struct unit_test_state *uts)
  86 {
  87         struct udevice *bus, *dev;
  88         uint8_t buf[5];
  89
  90         ut_assertok(uclass_get_device_by_seq(UCLASS_I2C, busnum, &bus));
  91         ut_assertok(i2c_get_chip(bus, chip, 1, &dev));
  92         ut_assertok(i2c_set_chip_offset_len(dev, 1));
  93         ut_assertok(dm_i2c_read(dev, 0, buf, 5));
  94
  95         /* This is not supported by the uclass */
  96         ut_asserteq(-EINVAL, i2c_set_chip_offset_len(dev, 5));
  97
  98         return 0;
  99 }
 100 DM_TEST(dm_test_i2c_offset_len, DM_TESTF_SCAN_PDATA | DM_TESTF_SCAN_FDT);
 101
 102 static int dm_test_i2c_probe_empty(struct unit_test_state *uts)
 103 {
 104         struct udevice *bus, *dev;
 105
 106         ut_assertok(uclass_get_device_by_seq(UCLASS_I2C, busnum, &bus));
 107
 108         /* Use test mode so that this chip address will always probe */
 109         sandbox_i2c_set_test_mode(bus, true);
 110         ut_assertok(dm_i2c_probe(bus, SANDBOX_I2C_TEST_ADDR, 0, &dev));
 111         sandbox_i2c_set_test_mode(bus, false);
 112
 113         return 0;
 114 }
 115 DM_TEST(dm_test_i2c_probe_empty, DM_TESTF_SCAN_PDATA | DM_TESTF_SCAN_FDT);
 116
 117 static int dm_test_i2c_bytewise(struct unit_test_state *uts)
 118 {
 119         struct udevice *bus, *dev;
 120         struct udevice *eeprom;
 121         uint8_t buf[5];
 122
 123         ut_assertok(uclass_get_device_by_seq(UCLASS_I2C, busnum, &bus));
 124         ut_assertok(i2c_get_chip(bus, chip, 1, &dev));
 125         ut_assertok(dm_i2c_read(dev, 0, buf, 5));
 126         ut_assertok(memcmp(buf, "\0\0\0\0\0", sizeof(buf)));
 127
 128         /* Tell the EEPROM to only read/write one register at a time */
 129         ut_assertok(uclass_first_device(UCLASS_I2C_EMUL, &eeprom));
 130         ut_assertnonnull(eeprom);
 131         sandbox_i2c_eeprom_set_test_mode(eeprom, SIE_TEST_MODE_SINGLE_BYTE);
 132
 133         /* Now we only get the first byte - the rest will be 0xff */
 134         ut_assertok(dm_i2c_read(dev, 0, buf, 5));
 135         ut_assertok(memcmp(buf, "\0\xff\xff\xff\xff", sizeof(buf)));
 136
 137         /* If we do a separate transaction for each byte, it works */
 138         ut_assertok(i2c_set_chip_flags(dev, DM_I2C_CHIP_RD_ADDRESS));
 139         ut_assertok(dm_i2c_read(dev, 0, buf, 5));
 140         ut_assertok(memcmp(buf, "\0\0\0\0\0", sizeof(buf)));
 141
 142         /* This will only write A */
 143         ut_assertok(i2c_set_chip_flags(dev, 0));
 144         ut_assertok(dm_i2c_write(dev, 2, (uint8_t *)"AB", 2));
 145         ut_assertok(dm_i2c_read(dev, 0, buf, 5));
 146         ut_assertok(memcmp(buf, "\0\xff\xff\xff\xff", sizeof(buf)));
 147
 148         /* Check that the B was ignored */
 149         ut_assertok(i2c_set_chip_flags(dev, DM_I2C_CHIP_RD_ADDRESS));
 150         ut_assertok(dm_i2c_read(dev, 0, buf, 5));
 151         ut_assertok(memcmp(buf, "\0\0A\0\0\0", sizeof(buf)));
 152
 153         /* Now write it again with the new flags, it should work */
 154         ut_assertok(i2c_set_chip_flags(dev, DM_I2C_CHIP_WR_ADDRESS));
 155         ut_assertok(dm_i2c_write(dev, 2, (uint8_t *)"AB", 2));
 156         ut_assertok(dm_i2c_read(dev, 0, buf, 5));
 157         ut_assertok(memcmp(buf, "\0\xff\xff\xff\xff", sizeof(buf)));
 158
 159         ut_assertok(i2c_set_chip_flags(dev, DM_I2C_CHIP_WR_ADDRESS |
 160                                                 DM_I2C_CHIP_RD_ADDRESS));
 161         ut_assertok(dm_i2c_read(dev, 0, buf, 5));
 162         ut_assertok(memcmp(buf, "\0\0AB\0\0", sizeof(buf)));
 163
 164         /* Restore defaults */
 165         sandbox_i2c_eeprom_set_test_mode(eeprom, SIE_TEST_MODE_NONE);
 166         ut_assertok(i2c_set_chip_flags(dev, 0));
 167
 168         return 0;
 169 }
 170 DM_TEST(dm_test_i2c_bytewise, DM_TESTF_SCAN_PDATA | DM_TESTF_SCAN_FDT);
 171
 172 static int dm_test_i2c_offset(struct unit_test_state *uts)
 173 {
 174         struct udevice *eeprom;
 175         struct udevice *dev;
 176         uint8_t buf[5];
 177
 178         ut_assertok(i2c_get_chip_for_busnum(busnum, chip, 1, &dev));
 179
 180         /* Do a transfer so we can find the emulator */
 181         ut_assertok(dm_i2c_read(dev, 0, buf, 5));
 182         ut_assertok(uclass_first_device(UCLASS_I2C_EMUL, &eeprom));
 183
 184         /* Offset length 0 */
 185         sandbox_i2c_eeprom_set_offset_len(eeprom, 0);
 186         ut_assertok(i2c_set_chip_offset_len(dev, 0));
 187         ut_assertok(dm_i2c_write(dev, 10 /* ignored */, (uint8_t *)"AB", 2));
 188         ut_assertok(dm_i2c_read(dev, 0, buf, 5));
 189         ut_assertok(memcmp(buf, "AB\0\0\0\0", sizeof(buf)));
 190
 191         /* Offset length 1 */
 192         sandbox_i2c_eeprom_set_offset_len(eeprom, 1);
 193         ut_assertok(i2c_set_chip_offset_len(dev, 1));
 194         ut_assertok(dm_i2c_write(dev, 2, (uint8_t *)"AB", 2));
 195         ut_assertok(dm_i2c_read(dev, 0, buf, 5));
 196         ut_assertok(memcmp(buf, "ABAB\0", sizeof(buf)));
 197
 198         /* Offset length 2 */
 199         sandbox_i2c_eeprom_set_offset_len(eeprom, 2);
 200         ut_assertok(i2c_set_chip_offset_len(dev, 2));
 201         ut_assertok(dm_i2c_write(dev, 0x210, (uint8_t *)"AB", 2));
 202         ut_assertok(dm_i2c_read(dev, 0x210, buf, 5));
 203         ut_assertok(memcmp(buf, "AB\0\0\0", sizeof(buf)));
 204
 205         /* Offset length 3 */
 206         sandbox_i2c_eeprom_set_offset_len(eeprom, 2);
 207         ut_assertok(i2c_set_chip_offset_len(dev, 2));
 208         ut_assertok(dm_i2c_write(dev, 0x410, (uint8_t *)"AB", 2));
 209         ut_assertok(dm_i2c_read(dev, 0x410, buf, 5));
 210         ut_assertok(memcmp(buf, "AB\0\0\0", sizeof(buf)));
 211
 212         /* Offset length 4 */
 213         sandbox_i2c_eeprom_set_offset_len(eeprom, 2);
 214         ut_assertok(i2c_set_chip_offset_len(dev, 2));
 215         ut_assertok(dm_i2c_write(dev, 0x420, (uint8_t *)"AB", 2));
 216         ut_assertok(dm_i2c_read(dev, 0x420, buf, 5));
 217         ut_assertok(memcmp(buf, "AB\0\0\0", sizeof(buf)));
 218
 219         /* Restore defaults */
 220         sandbox_i2c_eeprom_set_offset_len(eeprom, 1);
 221
 222         return 0;
 223 }
 224 DM_TEST(dm_test_i2c_offset, DM_TESTF_SCAN_PDATA | DM_TESTF_SCAN_FDT);