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1 /*
2 * (C) Copyright 2009
3 * Stefano Babic, DENX Software Engineering, sbabic@denx.de.
4 *
5 * SPDX-License-Identifier: GPL-2.0+
6 */
7
8 #ifndef _IMXIMAGE_H_
9 #define _IMXIMAGE_H_
10
11 #define MAX_HW_CFG_SIZE_V2 220 /* Max number of registers imx can set for v2 */
12 #define MAX_PLUGIN_CODE_SIZE (64 * 1024)
13 #define MAX_HW_CFG_SIZE_V1 60 /* Max number of registers imx can set for v1 */
14 #define APP_CODE_BARKER 0xB1
15 #define DCD_BARKER 0xB17219E9
16
17 /*
18 * NOTE: This file must be kept in sync with arch/arm/include/asm/\
19 * imx-common/imximage.cfg because tools/imximage.c can not
20 * cross-include headers from arch/arm/ and vice-versa.
21 */
22 #define CMD_DATA_STR "DATA"
23
24 /* Initial Vector Table Offset */
25 #define FLASH_OFFSET_UNDEFINED 0xFFFFFFFF
26 #define FLASH_OFFSET_STANDARD 0x400
27 #define FLASH_OFFSET_NAND FLASH_OFFSET_STANDARD
28 #define FLASH_OFFSET_SD FLASH_OFFSET_STANDARD
29 #define FLASH_OFFSET_SPI FLASH_OFFSET_STANDARD
30 #define FLASH_OFFSET_ONENAND 0x100
31 #define FLASH_OFFSET_NOR 0x1000
32 #define FLASH_OFFSET_SATA FLASH_OFFSET_STANDARD
33 #define FLASH_OFFSET_QSPI 0x1000
34
35 /* Initial Load Region Size */
36 #define FLASH_LOADSIZE_UNDEFINED 0xFFFFFFFF
37 #define FLASH_LOADSIZE_STANDARD 0x1000
38 #define FLASH_LOADSIZE_NAND FLASH_LOADSIZE_STANDARD
39 #define FLASH_LOADSIZE_SD FLASH_LOADSIZE_STANDARD
40 #define FLASH_LOADSIZE_SPI FLASH_LOADSIZE_STANDARD
41 #define FLASH_LOADSIZE_ONENAND 0x400
42 #define FLASH_LOADSIZE_NOR 0x0 /* entire image */
43 #define FLASH_LOADSIZE_SATA FLASH_LOADSIZE_STANDARD
44 #define FLASH_LOADSIZE_QSPI 0x0 /* entire image */
45
46 /* Command tags and parameters */
47 #define IVT_HEADER_TAG 0xD1
48 #define IVT_VERSION 0x40
49 #define DCD_HEADER_TAG 0xD2
50 #define DCD_VERSION 0x40
51 #define DCD_WRITE_DATA_COMMAND_TAG 0xCC
52 #define DCD_WRITE_DATA_PARAM 0x4
53 #define DCD_WRITE_CLR_BIT_PARAM 0xC
54 #define DCD_CHECK_DATA_COMMAND_TAG 0xCF
55 #define DCD_CHECK_BITS_SET_PARAM 0x14
56 #define DCD_CHECK_BITS_CLR_PARAM 0x04
57
58 enum imximage_cmd {
59 CMD_INVALID,
60 CMD_IMAGE_VERSION,
61 CMD_BOOT_FROM,
62 CMD_BOOT_OFFSET,
63 CMD_WRITE_DATA,
64 CMD_WRITE_CLR_BIT,
65 CMD_CHECK_BITS_SET,
66 CMD_CHECK_BITS_CLR,
67 CMD_CSF,
68 CMD_PLUGIN,
69 };
70
71 enum imximage_fld_types {
72 CFG_INVALID = -1,
73 CFG_COMMAND,
74 CFG_REG_SIZE,
75 CFG_REG_ADDRESS,
76 CFG_REG_VALUE
77 };
78
79 enum imximage_version {
80 IMXIMAGE_VER_INVALID = -1,
81 IMXIMAGE_V1 = 1,
82 IMXIMAGE_V2
83 };
84
85 typedef struct {
86 uint32_t type; /* Type of pointer (byte, halfword, word, wait/read) */
87 uint32_t addr; /* Address to write to */
88 uint32_t value; /* Data to write */
89 } dcd_type_addr_data_t;
90
91 typedef struct {
92 uint32_t barker; /* Barker for sanity check */
93 uint32_t length; /* Device configuration length (without preamble) */
94 } dcd_preamble_t;
95
96 typedef struct {
97 dcd_preamble_t preamble;
98 dcd_type_addr_data_t addr_data[MAX_HW_CFG_SIZE_V1];
99 } dcd_v1_t;
100
101 typedef struct {
102 uint32_t app_code_jump_vector;
103 uint32_t app_code_barker;
104 uint32_t app_code_csf;
105 uint32_t dcd_ptr_ptr;
106 uint32_t super_root_key;
107 uint32_t dcd_ptr;
108 uint32_t app_dest_ptr;
109 } flash_header_v1_t;
110
111 typedef struct {
112 uint32_t length; /* Length of data to be read from flash */
113 } flash_cfg_parms_t;
114
115 typedef struct {
116 flash_header_v1_t fhdr;
117 dcd_v1_t dcd_table;
118 flash_cfg_parms_t ext_header;
119 } imx_header_v1_t;
120
121 typedef struct {
122 uint32_t addr;
123 uint32_t value;
124 } dcd_addr_data_t;
125
126 typedef struct {
127 uint8_t tag;
128 uint16_t length;
129 uint8_t version;
130 } __attribute__((packed)) ivt_header_t;
131
132 typedef struct {
133 uint8_t tag;
134 uint16_t length;
135 uint8_t param;
136 } __attribute__((packed)) write_dcd_command_t;
137
138 struct dcd_v2_cmd {
139 write_dcd_command_t write_dcd_command;
140 dcd_addr_data_t addr_data[MAX_HW_CFG_SIZE_V2];
141 };
142
143 typedef struct {
144 ivt_header_t header;
145 struct dcd_v2_cmd dcd_cmd;
146 uint32_t padding[1]; /* end up on an 8-byte boundary */
147 } dcd_v2_t;
148
149 typedef struct {
150 uint32_t start;
151 uint32_t size;
152 uint32_t plugin;
153 } boot_data_t;
154
155 typedef struct {
156 ivt_header_t header;
157 uint32_t entry;
158 uint32_t reserved1;
159 uint32_t dcd_ptr;
160 uint32_t boot_data_ptr;
161 uint32_t self;
162 uint32_t csf;
163 uint32_t reserved2;
164 } flash_header_v2_t;
165
166 typedef struct {
167 flash_header_v2_t fhdr;
168 boot_data_t boot_data;
169 union {
170 dcd_v2_t dcd_table;
171 char plugin_code[MAX_PLUGIN_CODE_SIZE];
172 } data;
173 } imx_header_v2_t;
174
175 /* The header must be aligned to 4k on MX53 for NAND boot */
176 struct imx_header {
177 union {
178 imx_header_v1_t hdr_v1;
179 imx_header_v2_t hdr_v2;
180 } header;
181 };
182
183 typedef void (*set_dcd_val_t)(struct imx_header *imxhdr,
184 char *name, int lineno,
185 int fld, uint32_t value,
186 uint32_t off);
187
188 typedef void (*set_dcd_param_t)(struct imx_header *imxhdr, uint32_t dcd_len,
189 int32_t cmd);
190
191 typedef void (*set_dcd_rst_t)(struct imx_header *imxhdr,
192 uint32_t dcd_len,
193 char *name, int lineno);
194
195 typedef void (*set_imx_hdr_t)(struct imx_header *imxhdr, uint32_t dcd_len,
196 uint32_t entry_point, uint32_t flash_offset);
197
198 #endif /* _IMXIMAGE_H_ */