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ARM: dra7xx: Change DPLL_PER_HS13 divider value
authorLokesh Vutla <lokeshvutla@ti.com>
Mon, 25 Jul 2016 10:15:44 +0000 (15:45 +0530)
committerJagan Teki <jteki@openedev.com>
Fri, 29 Jul 2016 18:45:00 +0000 (00:15 +0530)
commit4d790788ce009909842290e85d3e57db36935ad4
tree4040e058ed8f74844c18e934a26bd62ac80be3eftree | snapshot
parentb302669f46ebfd7cbc8ee1cdf48d87a68b1cc720commit | diff
ARM: dra7xx: Change DPLL_PER_HS13 divider value

According to AM572x DM SPRS953A, QSPI bus speed can be 76.8MHz, hence
update QSPI input clock divider value (DPLL_PER_HS13) to provide 76.8MHz
clock, so that driver can use the same.

Signed-off-by: Vignesh R <vigneshr@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Mugunthan V N <mugunthanvnm@ti.com>
Reviewed-by: Jagan Teki <jteki@openedev.com>
arch/arm/cpu/armv7/omap5/hw_data.c diff | blob | blame | history
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