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(parent: 06b5301) | patch
pci/layerscape: add support for LS1043A PCIe LUT register access
authorMingkai Hu <Mingkai.Hu@freescale.com>
Wed, 11 Nov 2015 09:58:34 +0000 (17:58 +0800)
committerYork Sun <yorksun@freescale.com>
Mon, 30 Nov 2015 17:11:10 +0000 (09:11 -0800)
commitaf523a0d56b272bfd7d2a7ee4eccf07c7bb9529e
treedeb74cf668e12399f6fbf08a4e48434c6d3e3e85tree | snapshot
parent06b53010436bd7d4d0da6bdb2f505131a094abc6commit | diff
pci/layerscape: add support for LS1043A PCIe LUT register access

The endian and base address of PEX LUT register region is different
between Chassis 2 and Chassis 3, so move the base address definition
to chassis specific header file and add pex_lut_* functions to access
LUT register.

Signed-off-by: Mingkai Hu <Mingkai.Hu@freescale.com>
Signed-off-by: Gong Qianyu <Qianyu.Gong@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
arch/arm/include/asm/arch-fsl-layerscape/config.h diff | blob | blame | history
arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h diff | blob | blame | history
arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h diff | blob | blame | history
arch/arm/include/asm/arch-fsl-layerscape/soc.h diff | blob | blame | history
drivers/pci/pcie_layerscape.c diff | blob | blame | history
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