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ppc4xx: Fix Arches DDR2 initialization
authorStefan Roese <sr@denx.de>
Mon, 27 Jul 2009 08:53:43 +0000 (10:53 +0200)
committerStefan Roese <sr@denx.de>
Tue, 28 Jul 2009 05:22:46 +0000 (07:22 +0200)
commitf3ed3c9b7441cde936d06a1ff7b1490ff0d600e6
tree9a74e71f00e6db47a2cea750509126ab10f12483tree | snapshot
parentab4c62c1ba788bf7f673a985d99a76d9c2fd7ecacommit | diff
ppc4xx: Fix Arches DDR2 initialization

Testing on AMCC Arches with the latest U-Boot version yielded that DDR2
initialization is currently broken. U-Boot hangs upon relocation to SDRAM
or crashes with random traps. This patch fixes this problem. Arches now
uses a different WRDTR and CLKTR default setting than Canyonlands/Glacier.

Signed-off-by: Stefan Roese <sr@denx.de>
board/amcc/canyonlands/canyonlands.c diff | blob | blame | history
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