That's because usb_setup_ehci_gadget() function is looking for the usb
device using the req_sed number.
This change makes the usb device have a req_seq number and the UMS
command work again:
CPU: Freescale i.MX6UL rev1.0 528 MHz (running at 396 MHz)
CPU: Industrial temperature grade (-40C to 105C) at 40C
Reset cause: POR
Model: Armadeus Systems OPOS6UL SoM on OPOS6ULDev board
DRAM: 256 MiB
MMC: FSL_SDHC: 0, FSL_SDHC: 1
Video: 800x480x18
In: serial
Out: serial
Err: serial
Net: FEC [PRIME]
Hit any key to stop autoboot: 0
Signed-off-by: Sébastien Szymanski <sebastien.szymanski@armadeus.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Tom Rini [Sat, 18 Mar 2017 13:01:44 +0000 (09:01 -0400)]
arm: Migrate SYS_THUMB_BUILD to Kconfig, introduce SPL_SYS_THUMB_BUILD
Today, we have cases where we wish to build all of U-Boot in Thumb2 mode for
various reasons. We also have cases where we only build SPL in Thumb2 mode due
to size constraints and wish to build the rest of the system in ARM mode. So
in this migration we introduce a new symbol as well, SPL_SYS_THUMB_BUILD to
control if we build everything or just SPL (or in theory, just U-Boot) in
Thumb2 mode.
Signed-off-by: Tom Rini <trini@konsulko.com> Acked-by: Siarhei Siamashka <siarhei.siamashka@gmail.com>
Andrew F. Davis [Thu, 16 Feb 2017 17:18:40 +0000 (11:18 -0600)]
Kconfig: Disable non-FIT SPL loading for TI secure devices
Non-FIT SPL image loading support should be disabled for TI secure
devices as the image handlers for those image types do not follow
our secure boot flow.
Signed-off-by: Andrew F. Davis <afd@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Andrew F. Davis [Thu, 16 Feb 2017 17:18:39 +0000 (11:18 -0600)]
spl: Add option to enable SPL Legacy image support
Add a Kconfig option that enables Legacy image support, this allows
boards to explicitly disable this, for instance when needed for
security reasons.
Signed-off-by: Andrew F. Davis <afd@ti.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
[trini: Move to common/spl/Kconfig] Signed-off-by: Tom Rini <trini@konsulko.com>
Andrew F. Davis [Thu, 16 Feb 2017 17:18:38 +0000 (11:18 -0600)]
spl: Convert CONFIG_SPL_ABORT_ON_RAW_IMAGE into a positive option
CONFIG_SPL_ABORT_ON_RAW_IMAGE causes SPL to abort and move on when it
encounters RAW images, express this same functionality as a positive
option enabling support for RAW images: CONFIG_SPL_RAW_IMAGE_SUPPORT
Also move uses of this to defconfigs.
Signed-off-by: Andrew F. Davis <afd@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
[trini: Rework Kconfig logic a little, move to common/spl/Kconfig] Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Fri, 17 Mar 2017 13:11:12 +0000 (09:11 -0400)]
Merge git://git.denx.de/u-boot-rockchip
This includes support for rk3188 from Heiko Stübner and and rk3328 from
Kever Yang. Also included is SPL support for rk3399 and a fix for
rk3288 to get it booting again (spl_early_init()).
Vikas Manocha [Sun, 12 Feb 2017 18:25:49 +0000 (10:25 -0800)]
PINCTRL: stm32f7: add pin control driver
This driver uses the same pin control binding as that of linux, binding
document of this patch is copied from linux. One addition done is for
GPIO input and output mode configuration which was missing.
Signed-off-by: Vikas Manocha <vikas.manocha@st.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Andre Przywara [Wed, 15 Mar 2017 01:19:07 +0000 (01:19 +0000)]
configs: move CMD_MD5SUM definition to defconfigs
Boards with an apparent need for the md5sum command had the connected
config symbol defined in their board header file.
Move this over to the respective defconfig files now that md5sum is
configured via Kconfig.
(This is a manual effort, which differs from moveconfig.py, not sure
who is right here. Boards except sandbox loose the md5sum command with
moveconfig.py, though it was explicitly mentioned in their config.h's)
Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Simon Glass <sjg@chromium.org>
[trini: migrate stih410-b2260] Signed-off-by: Tom Rini <trini@konsulko.com>
Andre Przywara [Wed, 15 Mar 2017 01:19:06 +0000 (01:19 +0000)]
Kconfig: define MD5 dependency for FIT support
FIT images require MD5 support to verify image checksums. So far this
was expressed by defining a CPP symbol in image.h. Since MD5 is now a
first class Kconfig citizen, express that in Kconfig instead.
Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Andre Przywara [Wed, 15 Mar 2017 01:19:05 +0000 (01:19 +0000)]
Kconfig: introduce md5sum command selection
So far CONFIG_MD5SUM would need to be set by a board's include file.
Since the command is really generic, move it over to Kconfig to allow
it to be defined by either a board's defconfig, menuconfig or some
config snippet merged via mergeconfig.sh.
Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Andre Przywara [Wed, 15 Mar 2017 01:19:04 +0000 (01:19 +0000)]
kirkwood: remove get_random_hex() and MD5 dependency
Commit 19a5944fcd62 ("mvgbe: remove setting of ethaddr within the
driver") removed the usage of get_random_hex() from the mvgbe driver
about six years ago. However the prototype of that function survived
till today in some kirkwood header file.
Remove that prototype and the CONFIG_MD5 dependency triggered by that.
Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Stefan Roese <sr@denx.de>
Markus Niebel [Tue, 28 Feb 2017 15:37:32 +0000 (16:37 +0100)]
arm: imx6: tqma6: use CONFIG_TQM6x for SOM specific settings
We have a Kconfig name for the module types. Let's Use it.
Some feature selections and configurations are based on the
module. Module selection selects the CPU type.
Signed-off-by: Markus Niebel <Markus.Niebel@tq-group.com>
Jagan Teki [Fri, 24 Feb 2017 10:15:26 +0000 (15:45 +0530)]
i.MX6Q: isiot: Switch the mmc env based on devno
Add board_mmc_get_env_dev
Switch the mmc env based on the mmc devno, instead of separately
defining a config item in include/configs using board_mmc_get_env_dev
- devno 0: sd/esd
- devno 1: mmc/emmc
Cc: Stefano Babic <sbabic@denx.de> Cc: Matteo Lisi <matteo.lisi@engicam.com> Cc: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Jagan Teki [Fri, 24 Feb 2017 10:15:25 +0000 (15:45 +0530)]
i.MX6Q: icorem6_rqs: Add mmc_late_init
Let the runtime code can set the mmcdev and mmcroot based
on the devno using mmc_get_env_dev instead of defining
separately in build-time configs using mmc_late_init func.
Cc: Stefano Babic <sbabic@denx.de> Cc: Matteo Lisi <matteo.lisi@engicam.com> Cc: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Jagan Teki [Fri, 24 Feb 2017 10:15:24 +0000 (15:45 +0530)]
i.MX6Q: icorem6_rqs: Add modeboot env via board_late_init
Add runtime, modeboot env which is setting mmcboot based
on the bootdevice so-that conditional macros for MMC via
CONFIG_BOOTCOMMAND should be avoided in config files.
Cc: Stefano Babic <sbabic@denx.de> Cc: Matteo Lisi <matteo.lisi@engicam.com> Cc: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
CPU: Freescale i.MX6D rev1.2 at 792 MHz
Reset cause: POR
Model: Engicam i.CoreM6 Quad/Dual RQS Starter Kit
DRAM: 512 MiB
MMC: FSL_SDHC: 0, FSL_SDHC: 1
*** Warning - bad CRC, using default environment
In: serial
Out: serial
Err: serial
switch to partitions #0, OK
mmc1(part 0) is current device
Net: No ethernet found.
Hit any key to stop autoboot: 0
Booting from mmc ...
switch to partitions #0, OK
mmc1(part 0) is current device
Cc: Stefano Babic <sbabic@denx.de> Cc: Matteo Lisi <matteo.lisi@engicam.com> Cc: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Markus Niebel [Fri, 3 Feb 2017 15:25:00 +0000 (16:25 +0100)]
imx6: tqma6: disable spi CS unused in U-Boot
Since the CS are not in use, do not map them. User of starterkit
mainboard is free to use them otherwise. When using these pins later
in the OS for instance as GPIO IRQ pin, they need to be input.
Signed-off-by: Markus Niebel <Markus.Niebel@tq-group.com>
Jagan Teki [Fri, 24 Feb 2017 10:15:22 +0000 (15:45 +0530)]
imx6: icorem6_rqs: Update SPL board boot order for eMMC
SPL mmc device index is get based on the boot device, like
- BOOT_DEVICE_MMC1 for mmc device 0
- BOOT_DEVICE_MMC2 for mmc device 1
Currently BOOT_DEVICE_MMC1 is setting both SD/eSD and MMC/eMMC
boot devices in i.MX, So u-boot is loading from mmc device 0 even
"if the board booting from SD/eSD or MMC/eMMC"
So, this patch set BOOT_DEVICE_MMC2 for MMC/eMMC so for MMC/eMMC
the u-boot is loading from mmc device 1 and the board file need to
take care if the board have different mmc device order intialization.
Cc: Matteo Lisi <matteo.lisi@engicam.com> Cc: Michael Trimarchi <michael@amarulasolutions.com>
Reviewed by: Stefano Babic <sbabic@denx.de> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Jagan Teki [Fri, 24 Feb 2017 10:15:20 +0000 (15:45 +0530)]
i.MX6UL: isiot: Switch the mmc env based on devno
Add board_mmc_get_env_dev
Switch the mmc env based on the mmc devno, instead of separately
defining a config item in include/configs using board_mmc_get_env_dev
- devno 0: sd/esd
- devno 1: mmc/emmc
Cc: Stefano Babic <sbabic@denx.de> Cc: Matteo Lisi <matteo.lisi@engicam.com> Cc: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Jagan Teki [Fri, 24 Feb 2017 10:15:19 +0000 (15:45 +0530)]
i.MX6UL: isiot: Add mmc_late_init
Let the runtime code can set the mmcdev and mmcroot based
on the devno using mmc_get_env_dev instead of defining
separately in build-time configs using mmc_late_init func.
Cc: Matteo Lisi <matteo.lisi@engicam.com> Cc: Michael Trimarchi <michael@amarulasolutions.com>
Reviewed by: Stefano Babic <sbabic@denx.de> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Jagan Teki [Fri, 24 Feb 2017 10:15:18 +0000 (15:45 +0530)]
i.MX6UL: isiot: Add modeboot env via board_late_init
Add runtime, modeboot env which is setting mmcboot, or
nandboot based on the bootdevice so-that conditional
macros b/w MMC and NAND for CONFIG_BOOTCOMMAND should
be avoided in config files.
Cc: Matteo Lisi <matteo.lisi@engicam.com> Cc: Michael Trimarchi <michael@amarulasolutions.com>
Reviewed by: Stefano Babic <sbabic@denx.de> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Jagan Teki [Fri, 24 Feb 2017 10:15:16 +0000 (15:45 +0530)]
imx6: isiotmx6ul: Update SPL board boot order for eMMC
SPL mmc device index is get based on the boot device, like
- BOOT_DEVICE_MMC1 for mmc device 0
- BOOT_DEVICE_MMC2 for mmc device 1
Currently BOOT_DEVICE_MMC1 is setting both SD/eSD and MMC/eMMC
boot devices in i.MX, So u-boot is loading from mmc device 0 even
"if the board booting from SD/eSD or MMC/eMMC"
So, this patch set BOOT_DEVICE_MMC2 for MMC/eMMC so for MMC/eMMC
the u-boot is loading from mmc device 1 and the board file need to
take care if the board have different mmc device order intialization.
Cc: Matteo Lisi <matteo.lisi@engicam.com> Cc: Michael Trimarchi <michael@amarulasolutions.com>
Reviewed by: Stefano Babic <sbabic@denx.de> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Jagan Teki [Fri, 24 Feb 2017 10:15:13 +0000 (15:45 +0530)]
imx: spl: Update NAND bootmode detection bit
BOOT_CFG1[7:4] the NAND boot mode selection is done
only when BOOT_CFG1[7] is 1 hence update the NAND
boot mode detection bit case. This information available
on Table 8-11. NAND Boot eFUSE Descriptions, from IMX6DQRM.
Cc: Tim Harvey <tharvey@gateworks.com>
Reviewed by: Stefano Babic <sbabic@denx.de> Signed-off-by: Jagan Teki <jagan@openedev.com>
Jagan Teki [Fri, 24 Feb 2017 10:15:12 +0000 (15:45 +0530)]
imx6: Add imx6_src_get_boot_mode
For i.MX6, the bootmode determine code is part of spl_boot_device,
but there is might be a possibility for other part the code need to
check the desired boot mode for adding new functionalities like
modeboot env variable, or changing boot order etc.
So introduced imx6_src_get_boot_mode which actually reading the
boot mode register for desired modes.
More cleanup will be add in future patches.
Cc: Stefano Babic <sbabic@denx.de> Cc: Tim Harvey <tharvey@gateworks.com> Cc: Matteo Lisi <matteo.lisi@engicam.com> Cc: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Jagan Teki <jagan@openedev.com> Reviewed-by: Stefano Babic <sbabic@denx.de>
Jagan Teki [Fri, 24 Feb 2017 10:02:53 +0000 (15:32 +0530)]
configs: imx6: Don't define USDHC2_BASE_ADDR
USDHC base address will assigned by SPL using fsl_esdhc_initialize
and u-boot with devicetree, hence no remove base address assignment
in config files.
Cc: Matteo Lisi <matteo.lisi@engicam.com> Cc: Michael Trimarchi <michael@amarulasolutions.com> Reviewed-by: Stefano Babic <sbabic@denx.de> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Peng Fan [Wed, 22 Feb 2017 08:21:52 +0000 (16:21 +0800)]
serial: lpuart: add i.MX7ULP support
Add i.MX7ULP support.
The buadrate calculation on i.MX7ULP is different,so add a new setbrg
function for i.MX7ULP.
Add a enum lpuart_devtype for runtime check for different platforms.
Signed-off-by: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Bhuvanchandra DV <bhuvanchandra.dv@toradex.com> Cc: York Sun <york.sun@nxp.com> Cc: Shaohui Xie <Shaohui.Xie@nxp.com> Cc: Alison Wang <b18965@freescale.com>
Peng Fan [Wed, 22 Feb 2017 08:21:51 +0000 (16:21 +0800)]
serial: lpuart: restructure lpuart driver
Drop CONFIG_LPUART_32B_REG.
Move the register structure to a common file include/fsl_lpuart.h
Define lpuart_serial_platdata structure which includes the reg base and flags.
For 32Bit register access, use lpuart_read32/lpuart_write32 which handles
big/little endian.
For 8Bit register access, still use the orignal code.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by : Stefano Babic <sbabic@denx.de> Cc: Bhuvanchandra DV <bhuvanchandra.dv@toradex.com> Cc: York Sun <york.sun@nxp.com> Cc: Shaohui Xie <Shaohui.Xie@nxp.com> Cc: Alison Wang <b18965@freescale.com>
Ye Li [Wed, 22 Feb 2017 08:21:47 +0000 (16:21 +0800)]
mx7ulp: Add iomux pins header file
Add the iomux pins header file from iomux tool team. Change the IOMUXC0 pins
to add IOMUX_CONFIG_MPORTS flags.
Note: The IOMUXC0 offset provided in this file is from 0xD000, this is not
aligned with IOMUXC0 base address. We have adjusted the IOMUXC0 base address
to aligin with it.
Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Ye Li <ye.li@nxp.com> Cc: Stefano Babic <sbabic@denx.de>
Peng Fan [Wed, 22 Feb 2017 08:21:46 +0000 (16:21 +0800)]
mxc_ocotp: Update driver to support OCOTP controller on i.MX7ULP
Update the mxc_ocotp driver to support i.MX7ULP.
The read/write sequence has some changes due to
PDN and OUT_STATUS registers added and TIME register is
removed. Also update the bank size and number.
Add is_mx7ulp macro in sys_proto.h
Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by : Stefano Babic <sbabic@denx.de>
Peng Fan [Wed, 22 Feb 2017 08:21:45 +0000 (16:21 +0800)]
gpio: Add Rapid GPIO2P driver for i.MX7ULP
Add the imx_rgpio2p driver for Rapid GPIO2P controllers on i.MX7ULP.
Have added all ports on RGPIO2P_0 and RGPIO2P_1.
The configurations CONFIG_IMX_RGPIO2P and CONFIG_DM_GPIO must be set
to y to enable the drivers.
To use the GPIO function, the IBE and OBE needs to set in IOMUXC.
We did not set the bits in driver, but leave them to IOMUXC settings
of the GPIO pins. User should use IMX_GPIO_NR to generate the GPIO number
for gpio APIs access.
Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by : Stefano Babic <sbabic@denx.de>
Peng Fan [Wed, 22 Feb 2017 08:21:43 +0000 (16:21 +0800)]
imx: mx7ulp: Add soc level initialization codes and functions
Implement soc level functions to get cpu rev, reset cause, enable cache,
etc. We will disable the wdog and init clocks in s_init at very early u-boot
phase.
Since the we are seeking the way to get chip id for mx7ulp, the get_cpu_rev
is hard coded to a fixed value. This may change in future.
Reuse some code in imx-common.
Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Ye Li <ye.li@nxp.com> Cc: Stefano Babic <sbabic@denx.de>
Peng Fan [Wed, 22 Feb 2017 08:21:42 +0000 (16:21 +0800)]
imx: mx7ulp: Add clock framework and functions
Add a clock framework to support SCG1/PCC2/PCC3 for A7 to support get/set
clock source, divider, clock rate and parent source.
Users need to include pcc.h to use the APIs to for peripherals clock. Each
peripheral clock is defined in enum pcc_clk type.
SCG relevants APIs are defined in scg.h which supports clock rate get, PLL/PFD
enablement and settings, and all SCG clock initialization. User need use enum
scg_clk to access each clock source.
In clock.c, we initialize necessary clocks at u-boot s_init and implement the
clock functions used by driver modules to operate clocks dynamically.
Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Ye Li <ye.li@nxp.com> Cc: Stefano Babic <sbabic@denx.de>
Peng Fan [Wed, 22 Feb 2017 08:21:41 +0000 (16:21 +0800)]
imx: mx7ulp: add iomux driver to support IOMUXC0 and IOMUXC1
Add a new driver under ULP directory to support its IOMUXC
controllers. The ULP has two IOMUXC, the IOMUXC0 is used
for M4 domain, while IOMUXC1 is for A7. We set IOMUXC1 as
the default IOMUX in this driver. Any pins in IOMUXC0 needs
to configure with IOMUX_CONFIG_MPORTS in its mux_mode field.
Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by : Stefano Babic <sbabic@denx.de>
Jernej Skrabec [Wed, 8 Mar 2017 23:34:38 +0000 (00:34 +0100)]
rockchip: video: Remove CSC initialization (HDMI)
Despite the comment in the code, CSC unit is never used. According to
the only public description of DW HDMI controller (i.MX6 manual), CSC
unit is bypassed in MC_FLOWCTRL register and then actually powered
down in MC_CLKDIS register.
Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Simon Glass <sjg@chromium.org>
Heiko Stübner [Thu, 23 Feb 2017 16:30:40 +0000 (17:30 +0100)]
rockchip: rk3188: drop CONFIG_SYS_NO_FLASH
Commit e856bdcfb492 ("flash: complete CONFIG_SYS_NO_FLASH move with renaming")
obsoleted the CONFIG_SYS_NO_FLASH option, which still is in our
rk3188_common.h header, resulting in warnings like
The following new ad-hoc CONFIG options were detected:
CONFIG_SYS_NO_FLASH
So also drop it from the rk3188 header.
Signed-off-by: Heiko Stuebner <heiko@sntech.de> Acked-by: Simon Glass <sjg@chromium.org>
Kever Yang [Thu, 23 Feb 2017 07:37:56 +0000 (15:37 +0800)]
rockchip: rk3328: add defconfig for evb-rk3328
Enable board config for evb-rk3328.
SDcard and eMMC boot is OK in this initial version,
USB and EMAC function is not available now, will comes later.
Signed-off-by: William Zhang <william.zhang@rock-chips.com> Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org>
Kever Yang [Thu, 23 Feb 2017 07:37:55 +0000 (15:37 +0800)]
rockchip: rk3328: add evb-rk3328 support
evb-rk3328 is an evb from Rockchip based on rk3328 SoC:
- 2 USB2.0 Host port;
- 1 USB3.0 Host port;
- 1 HDMI port;
- 2 10/100M eth port;
- 2GB ddr;
- 16GB eMMC;
- UART to USB debug port;
Signed-off-by: William Zhang <william.zhang@rock-chips.com> Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org>
Kever Yang [Thu, 23 Feb 2017 07:37:54 +0000 (15:37 +0800)]
rockchip: rk3328: add sysreset driver
Add rk3328 sysreset driver.
Signed-off-by: William Zhang <william.zhang@rock-chips.com> Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org>
Kever Yang [Thu, 23 Feb 2017 07:37:53 +0000 (15:37 +0800)]
rockchip: rk3328: add pinctrl driver
Add rk3328 pinctrl driver and grf/iomux structure definition.
Signed-off-by: William Zhang <william.zhang@rock-chips.com> Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org>
Kever Yang [Thu, 23 Feb 2017 07:37:51 +0000 (15:37 +0800)]
rockchip: rk3328: add soc basic support
RK3328 is a SoC from Rockchip with quad-core Cortex-A53 CPU.
It supports two USB2.0 EHCI ports. Other interfaces are very
much like RK3288, the DRAM are 32bit width address and support
address from 0 to 4GB-16MB range.
Signed-off-by: William Zhang <william.zhang@rock-chips.com> Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org>
Add empty arch/arm/mach-rockchip/rk3328/Kconfig to avoid build error: Signed-off-by: Simon Glass <sjg@chromium.org>
Kever Yang [Thu, 23 Feb 2017 07:37:50 +0000 (15:37 +0800)]
rockchip: rk3328: add device tree file
Add dts binding header for rk3328, files origin from kernel.
Signed-off-by: William Zhang <william.zhang@rock-chips.com> Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org>
Kever Yang [Wed, 22 Feb 2017 08:56:38 +0000 (16:56 +0800)]
rockchip: config: rk3399: enable SPL config for evb-rk3399
Enable all the CONFIGs which need by SPL.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Added rockchip tag:
Drop CONFIG_ROCKCHIP_DWMMC for now due to build error:
Move changes to arch/arm/mach-rockchip/Kconfig to this patch: Signed-off-by: Simon Glass <sjg@chromium.org>
Kever Yang [Thu, 23 Feb 2017 08:09:05 +0000 (16:09 +0800)]
rockchip: arm64: rk3399: add SPL support
Add SPL support for rk3399, default with of-platdata enabled.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Drop Kconfig changes to fix build error: Signed-off-by: Simon Glass <sjg@chromium.org>
Kever Yang [Wed, 22 Feb 2017 08:56:36 +0000 (16:56 +0800)]
rockchip: dts: rk3399: update for spl require driver
Add syscon and dmc node, and 'u-boot,dm-pre-reloc' option for
required driver.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Added rockchip tag: Signed-off-by: Simon Glass <sjg@chromium.org>
projects / people / ms / u-boot.git / log
