]> git.ipfire.org Git - people/ms/u-boot.git/log
people/ms/u-boot.git
6 years agoMerge branch 'rmobile-mx' of git://git.denx.de/u-boot-sh
Tom Rini [Wed, 13 Dec 2017 22:58:27 +0000 (17:58 -0500)] 
Merge branch 'rmobile-mx' of git://git.denx.de/u-boot-sh

6 years agoMerge git://git.denx.de/u-boot-samsung
Tom Rini [Wed, 13 Dec 2017 22:58:18 +0000 (17:58 -0500)] 
Merge git://git.denx.de/u-boot-samsung

6 years agoREADME: update the kernel coding style reference
Baruch Siach [Sun, 10 Dec 2017 15:34:35 +0000 (17:34 +0200)] 
README: update the kernel coding style reference

The old CodingStyle document has been converted to ReST and moved
elsewhere. Link to the web version of this document instead.

Signed-off-by: Baruch Siach <baruch@tkos.co.il>
6 years agoARM: pxa: Remove unused ifdefs
Tuomas Tynkkynen [Sat, 9 Dec 2017 01:51:48 +0000 (03:51 +0200)] 
ARM: pxa: Remove unused ifdefs

These ifdefs are protecting #include statements for files that have
never existed. AFAICT this hardware.h has been copied from the kernel
and the ifdefs have never served a role in U-Boot, so delete them.

Signed-off-by: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi>
6 years agotest: py: Add an option to skip sleep test
Michal Simek [Fri, 8 Dec 2017 14:47:18 +0000 (15:47 +0100)] 
test: py: Add an option to skip sleep test

Some QEMUs have a problem with time setup that's why
sleep test is failing. Introduce env__sleep_accurate
boardenv variable to have an option to skip sleep test.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
6 years agotest/py: gpt: update size of gpt partition
Patrick Delaunay [Wed, 6 Dec 2017 17:08:20 +0000 (18:08 +0100)] 
test/py: gpt: update size of gpt partition

- avoid disturbing 0MiB partition size (in fact < 1MiB)
- test overlap limit between part1 and part2
- test gpt write with data with modifier 'M' for MiB

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
6 years agoSPL: Add FIT data-position property support
Peng Fan [Tue, 5 Dec 2017 05:20:59 +0000 (13:20 +0800)] 
SPL: Add FIT data-position property support

For external data, FIT has a optional property "data-position" which
can set the external data to a fixed offset to FIT beginning.
Add the support for this property in SPL FIT.

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tomas Melin <tomas.melin@vaisala.com>
Cc: Pantelis Antoniou <pantelis.antoniou@konsulko.com>
Cc: "Andrew F. Davis" <afd@ti.com>
Cc: Igor Grinberg <grinberg@compulab.co.il>
Cc: "tomas.melin@vaisala.com" <tomas.melin@vaisala.com>
Cc: Kever Yang <kever.yang@rock-chips.com>
Cc: Andre Przywara <andre.przywara@arm.com>
Cc: York Sun <york.sun@nxp.com>
Cc: Lokesh Vutla <lokeshvutla@ti.com>
Cc: "Cooper Jr., Franklin" <fcooper@ti.com>
Cc: George McCollister <george.mccollister@gmail.com>
Cc: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi>
Cc: Jean-Jacques Hiblot <jjhiblot@ti.com>
Cc: Rick Altherr <raltherr@google.com>
Cc: Tom Rini <trini@konsulko.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: York Sun <york.sun@nxp.com>
6 years agoARM: omap3_logic: Enable NAND unlocking during Falcon mode
Adam Ford [Mon, 4 Dec 2017 23:54:50 +0000 (17:54 -0600)] 
ARM: omap3_logic: Enable NAND unlocking during Falcon mode

Falcon mode was already working with SD card.  This enables the
unlocking of NAND to allow the NAND read & write.  This also
expands the README file based on the am335x describing how to
setup Falcon mode.

Signed-off-by: Adam Ford <aford173@gmail.com>
6 years agoARM: omap3_logic: Unlock NAND automatically in U-Boot
Adam Ford [Sun, 3 Dec 2017 12:24:53 +0000 (06:24 -0600)] 
ARM: omap3_logic: Unlock NAND automatically in U-Boot

The Micron Flash is locked by default.  This will automaticlly
unlock so manually unlocking is unnecessary in U-Boot.

Signed-off-by: Adam Ford <aford173@gmail.com>
6 years agoomap3_logic: Increase CMD_SPL_WRITE_SIZE
Adam Ford [Sat, 2 Dec 2017 17:10:55 +0000 (11:10 -0600)] 
omap3_logic: Increase CMD_SPL_WRITE_SIZE

The SPL-OS partition is 0x20000, so let's make
CONFIG_CMD_SPL_WRITE_SIZE same size. This should allow for better
falcon mode operation.

Signed-off-by: Adam Ford <aford173@gmail.com>
6 years agodrivers: spmi-msm: fix scanning for peripherals
Jorge Ramirez-Ortiz [Sat, 2 Dec 2017 16:24:42 +0000 (17:24 +0100)] 
drivers: spmi-msm: fix scanning for peripherals

A typo in the probe function causes not all peripherals to be scanned
(in the case of the Dragonboard820c - work in progress - it wont find pmic0).

6 years agoata: Migrate CONFIG_MVSATA_IDE to Kconfig
Tuomas Tynkkynen [Fri, 8 Dec 2017 13:36:21 +0000 (15:36 +0200)] 
ata: Migrate CONFIG_MVSATA_IDE to Kconfig

Signed-off-by: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi>
6 years agoata: Migrate CONFIG_LIBATA to Kconfig
Tuomas Tynkkynen [Fri, 8 Dec 2017 13:36:20 +0000 (15:36 +0200)] 
ata: Migrate CONFIG_LIBATA to Kconfig

This symbol enables some library code used by various SATA drivers,
so make this a non-user-visible symbol select'ed by the respective
drivers, and let moveconfig handle the rest.

Signed-off-by: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi>
6 years agoata: Migrate CONFIG_SCSI_AHCI to Kconfig
Tuomas Tynkkynen [Fri, 8 Dec 2017 13:36:19 +0000 (15:36 +0200)] 
ata: Migrate CONFIG_SCSI_AHCI to Kconfig

And use 'imply' liberally.

Signed-off-by: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi>
6 years agoata: Migrate CONFIG_DWC_AHSATA to Kconfig
Tuomas Tynkkynen [Fri, 8 Dec 2017 13:36:18 +0000 (15:36 +0200)] 
ata: Migrate CONFIG_DWC_AHSATA to Kconfig

Signed-off-by: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi>
6 years agoata: Migrate CONFIG_FSL_SATA to Kconfig
Tuomas Tynkkynen [Fri, 8 Dec 2017 13:36:17 +0000 (15:36 +0200)] 
ata: Migrate CONFIG_FSL_SATA to Kconfig

Use 'imply' here liberally to avoid the combinatorial explosion of
defconfig changes in the PowerPC boards.

Signed-off-by: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi>
6 years agoata: Migrate CONFIG_SATA_MV to Kconfig
Tuomas Tynkkynen [Fri, 8 Dec 2017 13:36:16 +0000 (15:36 +0200)] 
ata: Migrate CONFIG_SATA_MV to Kconfig

Signed-off-by: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi>
6 years agoata: Migrate CONFIG_SATA_SIL3114 to Kconfig
Tuomas Tynkkynen [Fri, 8 Dec 2017 13:36:15 +0000 (15:36 +0200)] 
ata: Migrate CONFIG_SATA_SIL3114 to Kconfig

Signed-off-by: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi>
6 years agoata: Migrate CONFIG_SATA_SIL to Kconfig
Tuomas Tynkkynen [Fri, 8 Dec 2017 13:36:14 +0000 (15:36 +0200)] 
ata: Migrate CONFIG_SATA_SIL to Kconfig

Use 'imply' here liberally to avoid the combinatorial explosion of
defconfig changes in the PowerPC boards.

Signed-off-by: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi>
6 years agoata: Drop CONFIG_MX51_PATA
Tuomas Tynkkynen [Fri, 8 Dec 2017 13:36:13 +0000 (15:36 +0200)] 
ata: Drop CONFIG_MX51_PATA

The last user of this driver went away in August 2015 in commit:
b6073fd2115 ("arm: Remove mx51_efikamx, mx51_efikasb boards")

Signed-off-by: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi>
6 years agoata: Drop CONFIG_SATA_DWC
Tuomas Tynkkynen [Fri, 8 Dec 2017 13:36:12 +0000 (15:36 +0200)] 
ata: Drop CONFIG_SATA_DWC

The last user of this driver went away in June 2017, in commit:
98f705c9ce ("powerpc: remove 4xx support")

Signed-off-by: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi>
6 years agoMerge git://git.denx.de/u-boot-arc
Tom Rini [Tue, 12 Dec 2017 15:57:58 +0000 (10:57 -0500)] 
Merge git://git.denx.de/u-boot-arc

6 years agogpio/hsdk: Depend on DM_GPIO instead of simple DM
Alexey Brodkin [Sun, 10 Dec 2017 17:55:44 +0000 (20:55 +0300)] 
gpio/hsdk: Depend on DM_GPIO instead of simple DM

This driver really is DM GPIO one and so we need to have a correct
dependency, because DM alone doesn't provide required for CMD_GPIO
call and we're seeing build failures like this:
---------------------->8---------------------
cmd/built-in.o: In function 'do_gpio':
.../cmd/gpio.c:188: undefined reference to 'gpio_request'
...
---------------------->8---------------------

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Cc: Eugeniy Paltsev <paltsev@synopsys.com>
Cc: Simon Glass <sjg@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
6 years agoMerge git://git.denx.de/u-boot-uniphier
Tom Rini [Mon, 11 Dec 2017 22:06:04 +0000 (17:06 -0500)] 
Merge git://git.denx.de/u-boot-uniphier

6 years agoMerge git://git.denx.de/u-boot-arc
Tom Rini [Mon, 11 Dec 2017 22:05:43 +0000 (17:05 -0500)] 
Merge git://git.denx.de/u-boot-arc

6 years agoARM: uniphier: use FIELD_PREP for PLL settings
Masahiro Yamada [Wed, 6 Dec 2017 05:16:34 +0000 (14:16 +0900)] 
ARM: uniphier: use FIELD_PREP for PLL settings

It is tedious to define both mask and bit-shift.  <linux/bitfield.h>
provides a convenient way to get access to register fields with a
single shifted mask.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
6 years agoARM: uniphier: compute SSCPLL values more precisely
Masahiro Yamada [Wed, 6 Dec 2017 05:16:33 +0000 (14:16 +0900)] 
ARM: uniphier: compute SSCPLL values more precisely

Use DIV_ROUND_CLOSEST().  To make the JK value even more precise,
I used a bigger coefficient, then divide it by 512.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
6 years agoARM: uniphier: fix SSCPLL init code for LD11 SoC
Dai Okamura [Wed, 6 Dec 2017 05:16:32 +0000 (14:16 +0900)] 
ARM: uniphier: fix SSCPLL init code for LD11 SoC

Commit 682e09ff9f35 ("ARM: uniphier: add PLL init code for LD20 SoC")
missed to write the computed value to the SSCPLLCTRL2 register.

Fixes: 682e09ff9f35 ("ARM: uniphier: add PLL init code for LD20 SoC")
Signed-off-by: Dai Okamura <okamura.dai@socionext.com>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
6 years agomtd: nand: denali: make NAND_DENALI unconfigurable option
Masahiro Yamada [Wed, 6 Dec 2017 04:51:50 +0000 (13:51 +0900)] 
mtd: nand: denali: make NAND_DENALI unconfigurable option

denali.c has no driver entry in itself.  It makes sense only when
compiled together with denali_dt.c

Let NAND_DENALI_DT select NAND_DENALI, and hide NAND_DENALI from
the Kconfig menu.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
6 years agoARM: uniphier: compile pll-base-ld20.c for PXs3
Masahiro Yamada [Wed, 6 Dec 2017 04:16:45 +0000 (13:16 +0900)] 
ARM: uniphier: compile pll-base-ld20.c for PXs3

Fix the link error for the combination of
  CONFIG_ARCH_UNIPHIER_LD11=n
  CONFIG_ARCH_UNIPHIER_LD20=n
  CONFIG_ARCH_UNIPHIER_PXS3=y

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
6 years agoARC: clk: introduce HSDK CGU clock driver
Eugeniy Paltsev [Sun, 10 Dec 2017 18:20:08 +0000 (21:20 +0300)] 
ARC: clk: introduce HSDK CGU clock driver

Synopsys HSDK clock controller generates and supplies clocks to various
controllers and peripherals within the SoC.

Each clock has assigned identifier and client device tree nodes can use
this identifier to specify the clock which they consume. All available
clocks are defined as preprocessor macros in the
dt-bindings/clock/snps,hsdk-cgu.h header and can be used in device
tree sources.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
6 years agoARC: cache: explicitly initialize "*_exists" variables
Eugeniy Paltsev [Thu, 30 Nov 2017 14:41:32 +0000 (17:41 +0300)] 
ARC: cache: explicitly initialize "*_exists" variables

dcache_exists, icache_exists, slc_exists and ioc_exists global
variables in "arch/arc/lib/cache.c" remain uninitialized if
SoC doesn't have corresponding HW.

This happens because we use the next constructions for their
definition and initialization:
-------------------------->>---------------------
int ioc_exists __section(".data");

if (/* condition */)
ioc_exists = 1;
-------------------------->>---------------------

That's quite a non-trivial issue as one may think of it.
The point is we intentionally put those variables in ".data" section
so they might survive relocation (remember we initilaize them very early
before relocation and continue to use after reloaction). While being
non-initialized and not explicitly put in .data section they would end-up
in ".bss" section which by definition is filled with zeroes.
But since we place those variables in .data section we need to care
about their proper initialization ourselves.

Also while at it we change their type to "bool" as more appropriate.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
6 years agoARC: add defines of some cache and xCCM AUX registers
Eugeniy Paltsev [Tue, 28 Nov 2017 13:51:07 +0000 (16:51 +0300)] 
ARC: add defines of some cache and xCCM AUX registers

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
6 years agoARC: add macro to get CPU id
Eugeniy Paltsev [Tue, 28 Nov 2017 13:48:40 +0000 (16:48 +0300)] 
ARC: add macro to get CPU id

ARCNUM [15:8] field in ARC_AUX_IDENTITY register allows us to
uniquely identify each core in a multi-core system.

I.e. with help of this macro each core may get its index in SMP system.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
6 years agoARC: HSDK: Fixup DW SDIO CIU frequency to 50000000Hz
Eugeniy Paltsev [Sat, 21 Oct 2017 12:35:12 +0000 (15:35 +0300)] 
ARC: HSDK: Fixup DW SDIO CIU frequency to 50000000Hz

DW SDIO controller has external CIU clock divider controlled via
register in the SDIO IP. Due to its unexpected default value
(we expected it to divide by 1 but in reality it divides by 8)
SDIO IP uses wrong CIU clock (it should be 100000000Hz but actual
is 12500000Hz) and works unstable (see STAR 9001204800).

So increase SDIO CIU frequency from actual 12500000Hz to 50000000Hz
by switching from the default divisor value (div-by-8) to the
minimum possible value of the divisor (div-by-2) in HSDK platform
code.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
6 years agoARC: add asm/gpio.h to fix compilation error with CONFIG_CMD_GPIO
Eugeniy Paltsev [Mon, 16 Oct 2017 12:15:33 +0000 (15:15 +0300)] 
ARC: add asm/gpio.h to fix compilation error with CONFIG_CMD_GPIO

With CONFIG_CMD_GPIO compilation reports error:
-------------------------->8---------------------
common/cmd_gpio.c:13:22: fatal error: asm/gpio.h: No such file or directory
 #include <asm/gpio.h>
                      ^
-------------------------->8---------------------

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
6 years agoARM: rmobile: Add R8A77995 D3 Draak board
Marek Vasut [Sun, 8 Oct 2017 18:41:18 +0000 (20:41 +0200)] 
ARM: rmobile: Add R8A77995 D3 Draak board

Add bits to support yet another board, the R8A77995 D3 Draak.
The DT file is from Linux 4.15-rc1 , commit
b35334447513c14a4dd55a67c269a743d4a4824b .

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
6 years agoARM: rmobile: Add R8A77970 V3M Eagle board
Marek Vasut [Mon, 9 Oct 2017 19:08:10 +0000 (21:08 +0200)] 
ARM: rmobile: Add R8A77970 V3M Eagle board

Add bits to support yet another board, the R8A77970 V3M Eagle.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
6 years agonet: ravb: Add R8A77995 D3 compatible
Marek Vasut [Sat, 21 Oct 2017 09:35:49 +0000 (11:35 +0200)] 
net: ravb: Add R8A77995 D3 compatible

Add new compatible to the Ethernet AVB driver for R8A77995 D3 SoC.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
6 years agonet: ravb: Add R8A77970 V3M compatible
Marek Vasut [Sat, 21 Oct 2017 09:33:17 +0000 (11:33 +0200)] 
net: ravb: Add R8A77970 V3M compatible

Add new compatible to the Ethernet AVB driver for R8A77970 V3M SoC.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
6 years agommc: uniphier-sd: Add R8A77995 D3 compatible
Marek Vasut [Sat, 21 Oct 2017 09:33:20 +0000 (11:33 +0200)] 
mmc: uniphier-sd: Add R8A77995 D3 compatible

Add new compatible to the Uniphier SD driver for R8A77995 D3 SoC.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
6 years agommc: uniphier-sd: Add R8A77970 V3M compatible
Marek Vasut [Sat, 21 Oct 2017 09:31:57 +0000 (11:31 +0200)] 
mmc: uniphier-sd: Add R8A77970 V3M compatible

Add new compatible to the Uniphier SD driver for R8A77970 V3M SoC.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
6 years agogpio: rmobile: Add generic Gen3 compatible
Marek Vasut [Sat, 21 Oct 2017 09:30:41 +0000 (11:30 +0200)] 
gpio: rmobile: Add generic Gen3 compatible

Add generic compatible to the GPIO driver for Gen3 SoCs.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
6 years agogpio: rmobile: Add R8A77995 D3 compatible
Marek Vasut [Sat, 21 Oct 2017 09:28:06 +0000 (11:28 +0200)] 
gpio: rmobile: Add R8A77995 D3 compatible

Add new compatible to the GPIO driver for R8A77995 D3 SoC.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
6 years agogpio: rmobile: Add R8A77970 V3M compatible
Marek Vasut [Sat, 21 Oct 2017 09:27:04 +0000 (11:27 +0200)] 
gpio: rmobile: Add R8A77970 V3M compatible

Add new compatible to the GPIO driver for R8A77970 V3M SoC.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
6 years agopinctrl: rmobile: Add R8A77995 D3 PFC tables
Marek Vasut [Sun, 8 Oct 2017 18:57:37 +0000 (20:57 +0200)] 
pinctrl: rmobile: Add R8A77995 D3 PFC tables

Add PFC tables for R8A77995 D3 SoC.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
6 years agopinctrl: rmobile: Add R8A77970 V3M PFC tables
Marek Vasut [Mon, 9 Oct 2017 18:57:29 +0000 (20:57 +0200)] 
pinctrl: rmobile: Add R8A77970 V3M PFC tables

Add PFC tables for R8A77970 V3M SoC.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
6 years agoclk: rmobile: Add R8A77995 D3 clock tables
Marek Vasut [Sun, 8 Oct 2017 19:09:15 +0000 (21:09 +0200)] 
clk: rmobile: Add R8A77995 D3 clock tables

Add clock tables for R8A77995 D3 SoC.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
6 years agoclk: rmobile: Add R8A77970 V3M clock tables
Marek Vasut [Mon, 9 Oct 2017 18:52:33 +0000 (20:52 +0200)] 
clk: rmobile: Add R8A77970 V3M clock tables

Add clock tables for R8A77970 V3M SoC.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
6 years agoARM: rmobile: Add R8A77995 SoC
Marek Vasut [Sun, 8 Oct 2017 18:52:52 +0000 (20:52 +0200)] 
ARM: rmobile: Add R8A77995 SoC

Add bits to support yet another SoC, the R8A77995 D3 .

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
6 years agoARM: rmobile: Add R8A77970 SoC
Marek Vasut [Mon, 9 Oct 2017 18:39:47 +0000 (20:39 +0200)] 
ARM: rmobile: Add R8A77970 SoC

Add bits to support yet another SoC, the R8A77970 V3M .

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
6 years agoclk: rmobile: Fix typo in R8A7796 RPC clock table entry
Marek Vasut [Thu, 30 Nov 2017 02:01:52 +0000 (03:01 +0100)] 
clk: rmobile: Fix typo in R8A7796 RPC clock table entry

Fix a copy-paste typo in the clock table entry, s/7795/7796/.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
6 years agoMerge git://git.denx.de/u-boot-mpc85xx
Tom Rini [Fri, 8 Dec 2017 17:02:01 +0000 (12:02 -0500)] 
Merge git://git.denx.de/u-boot-mpc85xx

6 years agoMerge git://git.denx.de/u-boot-rockchip
Tom Rini [Fri, 8 Dec 2017 14:32:10 +0000 (09:32 -0500)] 
Merge git://git.denx.de/u-boot-rockchip

6 years agorockchip: rk3399-puma: preserve leading zeros in serial#
Jakob Unterwurzacher [Thu, 7 Dec 2017 15:20:44 +0000 (16:20 +0100)] 
rockchip: rk3399-puma: preserve leading zeros in serial#

Linux preserves leading zeros in /proc/cpuinfo, so we
should as well.

Otherwise we have the situation that
/sys/firmware/devicetree/base/serial-number
and /proc/cpuinfo disagree in Linux.

Signed-off-by: Jakob Unterwurzacher <jakob.unterwurzacher@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
6 years agoMerge git://git.denx.de/u-boot-fsl-qoriq
Tom Rini [Thu, 7 Dec 2017 22:56:51 +0000 (17:56 -0500)] 
Merge git://git.denx.de/u-boot-fsl-qoriq

6 years agoarmv8: fix gd after relocation
York Sun [Thu, 7 Dec 2017 21:16:07 +0000 (13:16 -0800)] 
armv8: fix gd after relocation

Commit 21f4486faa5d ("armv8: update gd after relocate") sets x18
without checking the return value of spl_relocate_stack_gd().

Reviewed-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: York Sun <york.sun@nxp.com>
CC: Kever Yang <kever.yang@rock-chips.com>
CC: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
6 years agolog: Add documentation
Simon Glass [Mon, 4 Dec 2017 20:48:31 +0000 (13:48 -0700)] 
log: Add documentation

Add documentation for the log system.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
6 years agolog: test: Add a pytest for logging
Simon Glass [Mon, 4 Dec 2017 20:48:30 +0000 (13:48 -0700)] 
log: test: Add a pytest for logging

Add a test which tries out various filters and options to make sure that
logging works as expected.

Signed-off-by: Simon Glass <sjg@chromium.org>
6 years agolog: sandbox: Enable logging
Simon Glass [Mon, 4 Dec 2017 20:48:29 +0000 (13:48 -0700)] 
log: sandbox: Enable logging

Enable all logging features on sandbox so that the tests can be run.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
6 years agolog: Plumb logging into the init sequence
Simon Glass [Mon, 4 Dec 2017 20:48:28 +0000 (13:48 -0700)] 
log: Plumb logging into the init sequence

Set up logging both before and after relocation.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
6 years agolog: Add a test command
Simon Glass [Mon, 4 Dec 2017 20:48:27 +0000 (13:48 -0700)] 
log: Add a test command

Add a command which exercises the logging system.

Signed-off-by: Simon Glass <sjg@chromium.org>
6 years agolog: Add a 'log level' command
Simon Glass [Mon, 4 Dec 2017 20:48:26 +0000 (13:48 -0700)] 
log: Add a 'log level' command

Add a command for adjusting the log level.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
6 years agolog: Add a console driver
Simon Glass [Mon, 4 Dec 2017 20:48:25 +0000 (13:48 -0700)] 
log: Add a console driver

It is useful to display log messages on the console. Add a simple driver
to handle this.

Note that this driver outputs to the console, which may be serial or
video. It does not specifically select serial output.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
6 years agolog: Add an implementation of logging
Simon Glass [Mon, 4 Dec 2017 20:48:24 +0000 (13:48 -0700)] 
log: Add an implementation of logging

Add the logging header file and implementation with some configuration
options to control it.

Signed-off-by: Simon Glass <sjg@chromium.org>
6 years agoDrop the log buffer
Simon Glass [Mon, 4 Dec 2017 20:48:23 +0000 (13:48 -0700)] 
Drop the log buffer

This does not appear to be used by any boards. Before introducing a new
log system, remove this old one.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
6 years agousb: Correct use of debug()
Simon Glass [Mon, 4 Dec 2017 20:48:22 +0000 (13:48 -0700)] 
usb: Correct use of debug()

With clang this gives a warning because hubsts appears to be used before
it is set, even if ultimately it is not used. Simplify the code to avoid
this problem.

Signed-off-by: Simon Glass <sjg@chromium.org>
6 years agomtdparts: Correct use of debug()
Simon Glass [Mon, 4 Dec 2017 20:48:21 +0000 (13:48 -0700)] 
mtdparts: Correct use of debug()

The debug() macro now evaluates its expression so does not need #ifdef
protection. In fact the current code causes a warning with the new log
implementation. Adjust the code to fix this.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
6 years agoMove debug and logging support to a separate header
Simon Glass [Mon, 4 Dec 2017 20:48:20 +0000 (13:48 -0700)] 
Move debug and logging support to a separate header

Before adding new features, move these definitions to a separate header
to avoid further cluttering common.h.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
6 years agoRevert "sandbox: Drop special case console code for sandbox"
Simon Glass [Mon, 4 Dec 2017 20:48:19 +0000 (13:48 -0700)] 
Revert "sandbox: Drop special case console code for sandbox"

While sandbox works OK without the special-case code, it does result in
console output being stored in the pre-console buffer while sandbox starts
up. If there is a crash or a problem then there is no indication of what
is going on.

For ease of debugging it seems better to revert this change also.

This reverts commit d8c6fb8cedbc35eee27730a7fa544e499b3c81cc.

Signed-off-by: Simon Glass <sjg@chromium.org>
6 years agosandbox: Adjust pre-console address to avoid conflict
Simon Glass [Mon, 4 Dec 2017 20:48:18 +0000 (13:48 -0700)] 
sandbox: Adjust pre-console address to avoid conflict

We cannot use sandbox memory at 0 since other things use memory at that
address. Move it up out of the way.

Note that the pre-console buffer is currently disabled with sandbox, but
this change will avoid confusion if it is manually enabled.

Signed-off-by: Simon Glass <sjg@chromium.org>
6 years agoRevert "sandbox: remove os_putc() and os_puts()"
Simon Glass [Mon, 4 Dec 2017 20:48:17 +0000 (13:48 -0700)] 
Revert "sandbox: remove os_putc() and os_puts()"

While sandbox works OK without the special-case code, it does result in
console output being stored in the pre-console buffer while sandbox starts
up. If there is a crash or a problem then there is no indication of what
is going on.

For ease of debugging it seems better to revert this change.

This reverts commit 47b98ad0f6779485d0f0c14f337c3eece273eb54.

Signed-off-by: Simon Glass <sjg@chromium.org>
6 years agoMerge git://git.denx.de/u-boot-i2c
Tom Rini [Thu, 7 Dec 2017 12:28:20 +0000 (07:28 -0500)] 
Merge git://git.denx.de/u-boot-i2c

6 years agocmd: i2c: Fix use sdram sub command with CONFIG_DM_I2C
Nobuhiro Iwamatsu [Fri, 1 Dec 2017 05:39:40 +0000 (14:39 +0900)] 
cmd: i2c: Fix use sdram sub command with CONFIG_DM_I2C

sdram sub command of i2c command does not support Drivers Model.
This adds Drivers Model support to sdram sub command.

Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heiko Schocher <hs@denx.de>
6 years agoi2c: at91_i2c: remove the .probe_chip function
Alan Ott [Wed, 29 Nov 2017 03:25:24 +0000 (22:25 -0500)] 
i2c: at91_i2c: remove the .probe_chip function

The .probe_chip function is supposed to probe an i2c device on the bus to
determine whether a device is answering to a particular address.
at91_i2c_probe_chip() did not do anything resembling this and always
returned 0.

It looks as though at91_i2c_probe_chip() was intended to be a .probe
function for the controller, as it was copied-and-pasted to become
at91_i2c_probe() in 0bc8f640a4d7ed.

Removing the at91_i2c_probe_chip() function makes the higher layer
(i2c_probe_chip()) try a zero-length read transfer to test for the
presence of a device instead, which does work.

Signed-off-by: Alan Ott <alan@softiron.com>
Acked-by: Wenyou Yang <wenyou.yang@microchip.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
6 years agoi2c: at91_i2c: Wait for TXRDY after sending the first byte
Alan Ott [Wed, 29 Nov 2017 03:25:23 +0000 (22:25 -0500)] 
i2c: at91_i2c: Wait for TXRDY after sending the first byte

The driver must wait for TXRDY after each byte is pushed into
the i2c FIFO before pushing the next byte. Previously this was
not done for the first byte, causing a race condition with zeros
sometimes being sent for the next byte (which is typically the
first actual data byte).

Signed-off-by: Alan Ott <alan@softiron.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
6 years agoi2c: meson: add some comments
Beniamino Galvani [Sun, 26 Nov 2017 16:40:57 +0000 (17:40 +0100)] 
i2c: meson: add some comments

Add some comment describing the purpose of struct members and
functions.

Signed-off-by: Beniamino Galvani <b.galvani@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heiko Schocher <hs@denx.de>
6 years agoi2c: meson: fix return codes on error
Beniamino Galvani [Sun, 26 Nov 2017 16:40:56 +0000 (17:40 +0100)] 
i2c: meson: fix return codes on error

Change meson_i2c_xfer_msg() to return -EREMOTEIO in case of NACK, as
done by other drivers. Also, don't change the return error in
meson_i2c_xfer().

Signed-off-by: Beniamino Galvani <b.galvani@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heiko Schocher <hs@denx.de>
6 years agoi2c: meson: reduce timeout
Beniamino Galvani [Sun, 26 Nov 2017 16:40:55 +0000 (17:40 +0100)] 
i2c: meson: reduce timeout

The datasheet doesn't specify a suggested timeout and 500ms seems very
long: reduce it to 100ms.

Signed-off-by: Beniamino Galvani <b.galvani@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heiko Schocher <hs@denx.de>
6 years agoi2c: meson: improve Kconfig description
Beniamino Galvani [Sun, 26 Nov 2017 16:40:54 +0000 (17:40 +0100)] 
i2c: meson: improve Kconfig description

Expand the Kconfig description with hardware features.

Signed-off-by: Beniamino Galvani <b.galvani@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heiko Schocher <hs@denx.de>
6 years agoarmv8: ls1088a: Add nand support for ls1088ardb
Ashish Kumar [Tue, 28 Nov 2017 05:22:17 +0000 (10:52 +0530)] 
armv8: ls1088a: Add nand support for ls1088ardb

Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
6 years agodriver: fsl-mc: MC object cleanup when DPL not loaded
Yogesh Gaur [Tue, 28 Nov 2017 04:41:14 +0000 (10:11 +0530)] 
driver: fsl-mc: MC object cleanup when DPL not loaded

For case when MC is loaded but DPL is not deployed perform MC
object [DPBP, DPIO, DPNI and DPRC] cleanup.

Signed-off-by: Yogesh Gaur <yogeshnarayan.gaur@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
6 years agoSECURE BOOT: Add fall back option
Vinitha Pillai-B57223 [Wed, 22 Nov 2017 05:08:35 +0000 (10:38 +0530)] 
SECURE BOOT: Add fall back option

Add fall back option, to boot from NOR/QSPI/SD for LS1043, LS1046,
LS1021 in case of distro boot failure.

For LS1046, add kernel validation in case of secure boot in sd_bootcmd
and qspi_bootcmd. For LS1043 and LS1021, add kernel validation in case
of secure boot in sd_bootcmd, qspi_bootcmdand  nor_bootcmd.

Signed-off-by: Vinitha Pillai <vinitha.pillai@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
6 years agoarmv8: LS2080A_SECURE_BOOT: Enable CONFIG_FSL_LS_PPA.
Udit Agarwal [Wed, 22 Nov 2017 03:32:07 +0000 (09:02 +0530)] 
armv8: LS2080A_SECURE_BOOT: Enable CONFIG_FSL_LS_PPA.

Adds config CONFIG_FSL_LS_PPA and CONFIG_FSL_CAAM in
LS2080AQDS and LS2080ARDB secure boot defconfig.

Removes CONFIG_FIT, as with CONFIG_FSL_LS_PPA enabled,
CONFIG_FIT is selected.

Removes CONFIG_SPL_RSA as in NOR boot SPL boot is not done.

Signed-off-by: Udit Agarwal <udit.agarwal@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
6 years agoarmv8: LS1088A_QSPI: Add secure boot defconfigs for QSPI boot.
Udit Agarwal [Wed, 22 Nov 2017 03:31:27 +0000 (09:01 +0530)] 
armv8: LS1088A_QSPI: Add secure boot defconfigs for QSPI boot.

Add the secure boot defconfigs for QSPI boot on LS1088ARDB
and LS1088AQDS platforms.

Signed-off-by: Udit Agarwal <udit.agarwal@nxp.com>
Signed-off-by: Vinitha Pillai-B57223 <vinitha.pillai@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
6 years agoarmv8: LS1088A_QSPI: SECURE_BOOT: Images validation
Udit Agarwal [Wed, 22 Nov 2017 03:31:26 +0000 (09:01 +0530)] 
armv8: LS1088A_QSPI: SECURE_BOOT: Images validation

Validates PPA, MC, DPC, Bootscript, DPL and Kernel images in ESBC
phase using esbc_validate command.

Enable validation of boot.scr script prior to its execution dependent
on "secureboot" flag in environment

Add header address for PPA to be validated during ESBC phase for
LS1088A platform based on LAyerscape Chasis 3.

Moves sec_init prior to ppa_init as for validation of PPA sec must
be initialised before the PPA is initialised.

Signed-off-by: Udit Agarwal <udit.agarwal@nxp.com>
Signed-off-by: Vinitha Pillai-B57223 <vinitha.pillai@nxp.com>
Signed-off-by: Sumit Garg <sumit.garg@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
6 years agoarmv8: ls1012a: Modify Kernel and Environment offset
Bhaskar Upadhaya [Mon, 13 Nov 2017 23:35:10 +0000 (05:05 +0530)] 
armv8: ls1012a: Modify Kernel and Environment offset

Kernel is now located at 0x1000000 instead of 0xa00000
and envirorment variables are located at 3MB offset instead of
2MB in Flash.

Signed-off-by: Bhaskar Upadhaya <Bhaskar.Upadhaya@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
6 years agoarmv8: Workaround for USB erratua on LS1012A
Ran Wang [Mon, 13 Nov 2017 08:14:48 +0000 (16:14 +0800)] 
armv8: Workaround for USB erratua on LS1012A

This is suplement for patch which handle below errata:
A-009007, A-009008, A-008997, A-009798

Signed-off-by: Ran Wang <ran.wang_1@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
6 years agoarmv8: fsl-layerscape: Add support of disabling core prefetch
Prabhakar Kushwaha [Fri, 10 Nov 2017 06:02:52 +0000 (11:32 +0530)] 
armv8: fsl-layerscape: Add support of disabling core prefetch

Instruction prefetch feature is by default enabled during core
release. This patch add support of disabling instruction prefetch
by setting core mask in PPA. Here each core mask bit represents a
core and prefetch is disabled at the time of core release.

Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
6 years agoarmv8: ls1088: Add fsl_fdt_fixup_flash
Ashish Kumar [Thu, 9 Nov 2017 05:44:24 +0000 (11:14 +0530)] 
armv8: ls1088: Add fsl_fdt_fixup_flash

IFC-NOR and QSPI-NOR signals are muxed on SoC to save pins

Add fsl_fdt_fixup_flash() to disable IFC-NOR node in dts
if QSPI is enabled and vice-versa

Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
6 years agodriver: net: fsl-mc: flib changes for MC 10.3.0
Yogesh Gaur [Wed, 15 Nov 2017 06:29:31 +0000 (11:59 +0530)] 
driver: net: fsl-mc: flib changes for MC 10.3.0

Existing MC driver framework is based on MC-9.x.x flib. This patch
migrates MC obj (DPBP, DPNI, DPRC, DPMAC etc) to use latest MC flib
which is MC-10.3.0.

Changes introduced due to migration:
1. To get OBJ token, pair of create and open API replaces create APIs
2. Pair of close and destroy APIs replaces destroy APIs
3. For version read, get_version APIs replaces get_attributes APIs
4. dpni_get/reset_statistics APIs replaces dpni_get/set_counter APIs
5. Simplifies struct dpni_cfg and removes dpni_extended_cfg struct
6. Single API dpni_get_buffer_layout/set_buffer_layout replaces
   dpni_get_rx/set_rx, tx related, tx_conf_buffer_layout related APIs.
   New API takes a queue type as an argument.
7. Similarly dpni_get_queue/set_queue replaces
   dpni_get_rx_flow/set_rx_flow , tx_flow related, tx_conf related
   APIs

Signed-off-by: Yogesh Gaur <yogeshnarayan.gaur@nxp.com>
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
6 years agoarmv8: ls1088a: Unset USE_BOOTCOMMAND in defconfig
Ashish Kumar [Thu, 23 Nov 2017 09:03:49 +0000 (14:33 +0530)] 
armv8: ls1088a: Unset USE_BOOTCOMMAND in defconfig

Unset USE_BOOTCOMMAND for all ls1088 defconfig files to fix
redefinition error. USE_BOOTCOMMAND was introduced in commit
b6251db8c3f ("Kconfig: Introduce USE_BOOTCOMMAND and migrate
BOOTCOMMAND").

Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
6 years agopowerpc: mpc85xx: Fix static TLB table for SDRAM
York Sun [Tue, 5 Dec 2017 18:57:54 +0000 (10:57 -0800)] 
powerpc: mpc85xx: Fix static TLB table for SDRAM

Most predefined TLB tables don't have memory coherence bit set for
SDRAM. This wasn't an issue before invalidate_dcache_range() function
was enabled. Without the coherence bit, dcache invalidation doesn't
automatically flush the cache. The coherence bit is already set when
dynamic TLB table is used. For some boards with different SPL boot
method, or with legacy fixed setting, this bit needs to be set in
TLB files.

Signed-off-by: York Sun <york.sun@nxp.com>
6 years agopowerpc/p1_p2_rdb_pc: Fix endian access issue on EHCI intinalization
Ran Wang [Mon, 27 Nov 2017 02:51:55 +0000 (10:51 +0800)] 
powerpc/p1_p2_rdb_pc: Fix endian access issue on EHCI intinalization

This issue is exposed after commit 9000eddbae0d ("drivers/usb/ehci:
Use platform-specific accessors"), the wrong endianness of EHCI
controller programing will cause USB function down.

Signed-off-by: Ran Wang <ran.wang_1@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
6 years agopowerpc/T104xRDB: Fix endian access issue on EHCI intinalization
Ran Wang [Mon, 27 Nov 2017 02:51:54 +0000 (10:51 +0800)] 
powerpc/T104xRDB: Fix endian access issue on EHCI intinalization

This issue is exposed after commit 9000eddbae0d ("drivers/usb/ehci:
Use platform-specific accessors"), the wrong endianness of EHCI
controller programing will cause USB function down.

Signed-off-by: Ran Wang <ran.wang_1@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
6 years agotools: omapimage: fix corner-case in byteswap path
Philipp Tomsich [Mon, 4 Dec 2017 16:04:02 +0000 (17:04 +0100)] 
tools: omapimage: fix corner-case in byteswap path

Since commit 2614a208471e ("common: command: tempory buffer should
have size of command line buf"), there have been consistent Travis CI
failures on my builds (interestingly not for Tom, even though building
the same commit id) due to a SEGV in building the byteswapped
omapimage:
          arm: pcm051_rev3
     make[2]: *** [MLO.byteswap] Error 139
                       ^^^ error code for a SEGV

Turns out that the word-based byte-swapping loop in omapimage.c is to
blame. With the loop condition
       while (swapped <= (sbuf->st_size / sizeof(uint32_t)))
there had been one-too-many iterations for all file sizes divisible by
the sizeof(uint32_t).  I.e. we had 1 iteration for 0 bytes (and also 1
through 3 bytes) and 2 iterations at 4 bytes... clearly overshooting
on 0 and 4 bytes.

This commit fixes the calculation of an up-rounded word-count and
makes sure to keep the zero-based loop-counter below the number of
words to be processed.

References: 2614a20 ("common: command: tempory buffer should have size of command line buf")
Fixes: 79b9ebb ("omapimage: Add support for byteswapped SPI images")
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Martin Elshuber <martin.elshuber@theobroma-systems.com>
6 years agoMerge tag 'signed-efi-next' of git://github.com/agraf/u-boot
Tom Rini [Tue, 5 Dec 2017 22:52:16 +0000 (17:52 -0500)] 
Merge tag 'signed-efi-next' of git://github.com/agraf/u-boot

Patch queue for efi - 2017-12-05

Highlights for this release:

  - Dynamic EFI object creation (lists instead of static arrays)
  - EFI selftest improvements
  - Minor fixes

6 years agoefi_stub: Use efi_uintn_t
Alexander Graf [Mon, 4 Dec 2017 15:33:51 +0000 (16:33 +0100)] 
efi_stub: Use efi_uintn_t

Commit f5a2a93892f ("efi_loader: consistently use efi_uintn_t in boot
services") changed the internal EFI API header without adapting its existing
EFI stub users. Let's adapt the EFI stub as well.

Fixes: f5a2a93892f ("efi_loader: consistently use efi_uintn_t in boot services")
Signed-off-by: Alexander Graf <agraf@suse.de>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
6 years agoARM: Samsung: Add Exynos5422-based Odroid HC1 support
Marek Szyprowski [Fri, 3 Nov 2017 08:30:30 +0000 (09:30 +0100)] 
ARM: Samsung: Add Exynos5422-based Odroid HC1 support

Odroid HC1 board is based on Odroid XU4 board, but it has no HDMI,
no eMMC, no build-in USB3.0 hub, no extension port pins, and no GPIO
button. USB3.0 ports are used for build-in JMicron USB to SATA bridge
and Gigabit R8152 ethernet chips. HC1 uses only passive cooling.

This patch also updates Odroid's ADCmax array and reduces ADC tolerance
to 1% to ensure that XU4 and HC1 revisions are properly detected.

I've tested this with XU3, XU3-lite, XU4 and HC1 boards. In case of my test
boards I got following values from ADC register: 372, 370, 1281 and 1313.

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
Tested-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
6 years agoarm: dts: exynos4: fix the device-tree compile warning
Jaehoon Chung [Tue, 28 Nov 2017 07:20:39 +0000 (16:20 +0900)] 
arm: dts: exynos4: fix the device-tree compile warning

After updating dtc-1.4.5 version, there are too many warning.
This patch is to fix about exynos4 series.

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>