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Commit | Line | Data |
---|---|---|
00e5a55c BS |
1 | From: Alok Kataria <akataria@vmware.com> |
2 | Subject: x86: add a synthetic TSC_RELIABLE feature bit | |
3 | Patch-mainline: | |
4 | References: bnc#441338 | |
5 | ||
6 | Impact: None, bit reservation only | |
7 | ||
8 | Add a synthetic TSC_RELIABLE feature bit which will be used to mark | |
9 | TSC as reliable so that we could skip all the runtime checks for | |
10 | TSC stablity, which have false positives in virtual environment. | |
11 | ||
12 | Signed-off-by: Alok N Kataria <akataria@vmware.com> | |
13 | Signed-off-by: Dan Hecht <dhecht@vmware.com> | |
14 | Signed-off-by: H. Peter Anvin <hpa@zytor.com> | |
15 | Signed-off-by: Takashi Iwai <tiwai@suse.de> | |
16 | --- | |
17 | ||
18 | include/asm-x86/cpufeature.h | 1 + | |
19 | 1 files changed, 1 insertions(+), 0 deletions(-) | |
20 | ||
21 | ||
22 | Index: linux-2.6.27.4-2-beta4/include/asm-x86/cpufeature.h | |
23 | =================================================================== | |
24 | --- linux-2.6.27.4-2-beta4.orig/include/asm-x86/cpufeature.h 2008-10-28 16:32:43.000000000 -0700 | |
25 | +++ linux-2.6.27.4-2-beta4/include/asm-x86/cpufeature.h 2008-11-10 12:41:49.000000000 -0800 | |
26 | @@ -83,7 +83,7 @@ | |
27 | #define X86_FEATURE_NOPL (3*32+20) /* The NOPL (0F 1F) instructions */ | |
28 | #define X86_FEATURE_AMDC1E (3*32+21) /* AMD C1E detected */ | |
29 | #define X86_FEATURE_XTOPOLOGY (3*32+22) /* cpu topology enum extensions */ | |
30 | - | |
31 | +#define X86_FEATURE_TSC_RELIABLE (3*32+23) /* TSC is known to be reliable */ | |
32 | ||
33 | /* Intel-defined CPU features, CPUID level 0x00000001 (ecx), word 4 */ | |
34 | #define X86_FEATURE_XMM3 (4*32+ 0) /* Streaming SIMD Extensions-3 */ |