cpu/ChangeLog

   1 2021-03-29  Alan Modra  <amodra@gmail.com>
   2
   3         * frv.opc (frv_is_branch_major, frv_is_float_major),
   4         (frv_is_media_major, frv_is_branch_insn, frv_is_float_insn),
   5         (frv_is_media_insn, spr_valid): Correct prototypes.
   6
   7 2021-01-09  Nick Clifton  <nickc@redhat.com>
   8
   9         * 2.36 release branch crated.
  10
  11 2020-10-05  Samanta Navarro  <ferivoz@riseup.net>
  12
  13         * m32r.cpu: Fix spelling mistakes.
  14
  15 2020-09-18  David Faust  <david.faust@oracle.com>
  16
  17         * bpf.cpu (insn-op-code-alu): Add SDIV and SMOD.
  18         (define-alu-insn-bin, daib): Take ISAs as an argument.
  19         (define-alu-instructions): Update calls to daib pmacro with
  20         ISAs; add sdiv and smod.
  21
  22 2020-09-08  David Faust  <david.faust@oracle.com>
  23
  24         * bpf.cpu (define-alu-instructions): Correct semantic operators
  25         for div, mod to unsigned versions.
  26
  27 2020-09-01  Alan Modra  <amodra@gmail.com>
  28
  29         * mep-core.cpu (f-8s8a2, f-12s4a2, f-17s16a2): Multiply signed
  30         value by two rather than shifting left.
  31         (f-24s5a2n): Similarly multiply signed f-24s5a2n-hi to extract.
  32
  33 2020-08-26  David Faust  <david.faust@oracle.com>
  34
  35         * bpf.cpu (arch bpf): Add xbpf mach and isas.
  36         (define-xbpf-isa) New pmacro.
  37         (all-isas) Add xbpfle,xbpfbe.
  38         (endian-isas): New pmacro.
  39         (mach xbpf): New.
  40         (model xbpf-def): Likewise.
  41         (h-gpr): Add xbpf mach.
  42         (f-dstle, f-srcle, dstle, srcle): Add xbpfle isa.
  43         (f-dstbe, f-srcbe, dstbe, srcbe): Add xbpfbe isa.
  44         (define-alu-insn-un): Use new endian-isas pmacro.
  45         (define-alu-insn-bin, define-alu-insn-mov): Likewise.
  46         (define-endian-insn, define-lddw): Likewise.
  47         (dlind, dxli, dxsi, dsti): Likewise.
  48         (define-cond-jump-insn, define-call-insn): Likewise.
  49         (define-atomic-insns): Likewise.
  50
  51 2020-07-04  Nick Clifton  <nickc@redhat.com>
  52
  53         Binutils 2.35 branch created.
  54
  55 2020-06-25 David Faust  <david.faust@oracle.com>
  56
  57         * bpf.cpu (f-offset16): Change type from INT to HI.
  58         (dxli): Simplify memory access.
  59         (dxsi): Likewise.
  60         (define-endian-insn): Update c-call in semantics.
  61         (dlabs) Likewise.
  62         (dlind) Likewise.
  63
  64 2020-06-02  Jose E. Marchesi  <jose.marchesi@oracle.com>
  65
  66         * bpf.cpu (define-bpf-isa): Set base-insn-bitsize to 64.
  67         * bpf.opc (bpf_print_insn): Do not set endian_code here.
  68
  69 2020-06-02  Jose E. Marchesi  <jose.marchesi@oracle.com>
  70
  71         * mep.opc (print_slot_insn): Pass the insn endianness to
  72         cgen_get_insn_value.
  73
  74 2020-05-28  Jose E. Marchesi  <jose.marchesi@oracle.com>
  75             David Faust <david.faust@oracle.com>
  76
  77         * bpf.cpu (define-alu-insn-un): Add definitions of semantics.
  78         (define-alu-insn-mov): Likewise.
  79         (daib): Likewise.
  80         (define-alu-instructions): Likewise.
  81         (define-endian-insn): Likewise.
  82         (define-lddw): Likewise.
  83         (dlabs): Likewise.
  84         (dlind): Likewise.
  85         (dxli): Likewise.
  86         (dxsi): Likewise.
  87         (dsti): Likewise.
  88         (define-ldstx-insns): Likewise.
  89         (define-st-insns): Likewise.
  90         (define-cond-jump-insn): Likewise.
  91         (dcji): Likewise.
  92         (define-condjump-insns): Likewise.
  93         (define-call-insn): Likewise.
  94         (ja): Likewise.
  95         ("exit"): Likewise.
  96         (define-atomic-insns): Likewise.
  97         (sem-exchange-and-add): New macro.
  98         * bpf.cpu ("brkpt"): New instruction.
  99         (bpfbf): Set word-bitsize to 32 and insn-endian big.
 100         (h-gpr): Prefer r0 to `a' and r6 to `ctx'.
 101         (h-pc): Expand definition.
 102         * bpf.opc (bpf_print_insn): Set endian_code to BIG.
 103
 104 2020-05-21  Alan Modra  <amodra@gmail.com>
 105
 106         * mep.opc (mep_cgen_expand_macros_and_parse_operand): Replace
 107         "if (x) free (x)" with "free (x)".
 108
 109 2020-05-19  Stafford Horne  <shorne@gmail.com>
 110
 111         PR 25184
 112         * or1k.cpu (arch or1k): Remove or64 and or64nd machs.
 113         (ORBIS-MACHS, ORFPX32-MACHS): Remove pmacros.
 114         (cpu or1k64bf, mach or64, mach or64nd): Remove definitions.
 115         * or1kcommon.cpu (h-fdr): Remove hardware.
 116         * or1korfpx.cpu (rDDF, rADF, rBDF): Remove operand definitions.
 117         (float-regreg-insn): Remove lf- mnemonic -d instruction pattern.
 118         (float-setflag-insn-base): Remove lf-sf mnemonic -d pattern.
 119         (float-cust-insn): Remove "lf-cust" cust-num "-d" pattern.
 120         (lf-rem-d, lf-itof-d, lf-ftoi-d, lf-madd-d): Remove.
 121
 122 2020-02-16  David Faust  <david.faust@oracle.com>
 123
 124         * bpf.cpu (define-cond-jump-insn): Renamed from djci.
 125         (dcji) New version with support for JMP32
 126
 127 2020-02-03  Alan Modra  <amodra@gmail.com>
 128
 129         * m32c.cpu (f-dsp-64-s16): Mask before shifting signed value.
 130
 131 2020-02-01  Alan Modra  <amodra@gmail.com>
 132
 133         * frv.cpu (f-u12): Multiply rather than left shift signed values.
 134         (f-label16, f-label24): Likewise.
 135
 136 2020-01-30  Alan Modra  <amodra@gmail.com>
 137
 138         * m32c.cpu (f-src32-rn-unprefixed-QI): Shift before inverting.
 139         (f-src32-rn-prefixed-QI, f-dst32-rn-unprefixed-QI): Likewise.
 140         (f-dst32-rn-prefixed-QI): Likewise.
 141         (f-dsp-32-s32): Mask before shifting left.
 142         (f-dsp-48-u32, f-dsp-48-s32): Likewise.
 143         (f-bitbase32-16-s11-unprefixed): Multiply signed field rather than
 144         shifting left.
 145         (f-bitbase32-24-s11-prefixed, f-bitbase32-24-s19-prefixed): Likewise.
 146         (h-gr-SI): Mask before shifting.
 147
 148 2020-01-30  Jose E. Marchesi  <jose.marchesi@oracle.com>
 149
 150         * bpf.cpu (define-alu-insn-un): The unary BPF instructions
 151         (neg and neg32) use OP_SRC_K even if they operate only in
 152         registers.
 153
 154 2020-01-18  Nick Clifton  <nickc@redhat.com>
 155
 156         Binutils 2.34 branch created.
 157
 158 2020-01-13  Alan Modra  <amodra@gmail.com>
 159
 160         * fr30.cpu (f-disp9, f-disp10, f-s10, f-rel9, f-rel12): Don't
 161         left shift signed values.
 162
 163 2020-01-06  Alan Modra  <amodra@gmail.com>
 164
 165         * m32c.cpu (f-dsp-8-u16, f-dsp-8-s16): Rearrange to mask any sign
 166         bits before shifting rather than masking after shifting.
 167         (f-dsp-16-u16, f-dsp-16-s16, f-dsp-32-u16, f-dsp-32-s16): Likewise.
 168         (f-dsp-40-u16, f-dsp-40-s16, f-dsp-48-u16, f-dsp-48-s16): Likewise.
 169         (f-dsp-64-u16, f-dsp-8-s24): Likewise.
 170         (f-bitbase32-16-s19-unprefixed): Avoid signed left shift.
 171
 172 2020-01-04  Alan Modra  <amodra@gmail.com>
 173
 174         * m32r.cpu (f-disp8): Avoid left shift of negative values.
 175         (f-disp16, f-disp24): Likewise.
 176
 177 2019-12-23  Alan Modra  <amodra@gmail.com>
 178
 179         * iq2000.cpu (f-offset): Avoid left shift of negative values.
 180
 181 2019-12-20  Alan Modra  <amodra@gmail.com>
 182
 183         * or1korbis.cpu (f-disp26, f-disp21): Don't left shift negative values.
 184
 185 2019-12-17  Alan Modra  <amodra@gmail.com>
 186
 187         * bpf.cpu (f-imm64): Avoid signed overflow.
 188
 189 2019-12-16  Alan Modra  <amodra@gmail.com>
 190
 191         * xstormy16.cpu (f-rel12a): Avoid signed overflow.
 192
 193 2019-12-11  Alan Modra  <amodra@gmail.com>
 194
 195         * epiphany.cpu (f-sdisp11): Don't sign extend with shifts.
 196         * lm32.cpu (f-branch, f-vall): Likewise.
 197         * m32.cpu (f-lab-8-16): Likewise.
 198
 199 2019-12-11  Alan Modra  <amodra@gmail.com>
 200
 201         * epiphany.cpu (f-simm8, f-simm24): Use multiply rather than
 202         shift left to avoid UB on left shift of negative values.
 203
 204 2019-11-20  Jose E. Marchesi  <jose.marchesi@oracle.com>
 205
 206         * bpf.cpu: Fix comment describing the 128-bit instruction format.
 207
 208 2019-09-09  Phil Blundell  <pb@pbcl.net>
 209
 210         binutils 2.33 branch created.
 211
 212 2019-07-19  Jose E. Marchesi  <jose.marchesi@oracle.com>
 213
 214         * bpf.cpu (h-gpr): when disassembling, use %r0 and %r6 instead of
 215         %a and %ctx.
 216
 217 2019-07-15  Jose E. Marchesi  <jose.marchesi@oracle.com>
 218
 219         * bpf.cpu (dlabs): New pmacro.
 220         (dlind): Likewise.
 221
 222 2019-07-14  Jose E. Marchesi  <jose.marchesi@oracle.com>
 223
 224         * bpf.cpu (dlsi): ldabs and ldind instructions do not take an
 225         explicit 'dst' argument.
 226
 227 2019-06-13  Stafford Horne  <shorne@gmail.com>
 228
 229         * or1korfpx.cpu (float-setflag-insn-base): Add 'sf' to symbol.
 230
 231 2019-06-13  Stafford Horne  <shorne@gmail.com>
 232
 233         * or1k.cpu (or64nd, or32nd, or1200nd): Update comment.a
 234         (l-adrp): Improve comment.
 235
 236 2019-06-13  Stafford Horne  <shorne@gmail.com>
 237
 238         * or1korfpx.cpu (insn-opcode-float-regreg): Add SFUEQ_S, SFUNE_S,
 239         SFUGT_S, SFUGE_S, SFULT_S, SFULE_S, SFUN_S, SFUEQ_D, SFUNE_D, SFUGT_D,
 240         SFUGE_D, SFULT_D, SFULE_D, SFUN_D opcodes.
 241         (float-setflag-insn-base): New pmacro based on float-setflag-insn.
 242         (float-setflag-symantics, float-setflag-unordered-cmp-symantics,
 243         float-setflag-unordered-symantics): New pmacro for instruction
 244         symantics.
 245         (float-setflag-insn): Update to use float-setflag-insn-base.
 246         (float-setflag-unordered-insn): New pmacro for generating instructions.
 247
 248 2019-06-13  Andrey Bacherov  <avbacherov@opencores.org>
 249             Stafford Horne  <shorne@gmail.com>
 250
 251         * or1k.cpu (ORFPX64A32-MACHS): New pmacro.
 252         (ORFPX-MACHS): Removed pmacro.
 253         * or1k.opc (or1k_cgen_insn_supported): New function.
 254         (CGEN_VALIDATE_INSN_SUPPORTED): Define macro.
 255         (parse_regpair, print_regpair): New functions.
 256         * or1kcommon.cpu (h-spr, spr-shift, spr-address, h-gpr): Reorder
 257         and add comments.
 258         (h-fdr): Update comment to indicate or64.
 259         (reg-pair-reg-lo, reg-pair-reg-hi): New pmacros for register pairs.
 260         (h-fd32r): New hardware for 64-bit fpu registers.
 261         (h-i64r): New hardware for 64-bit int registers.
 262         * or1korbis.cpu (f-resv-8-1): New field.
 263         * or1korfpx.cpu (rDSF, rASF, rBSF): Update attribute to ORFPX32-MACHS.
 264         (rDDF, rADF, rBDF): Update operand comment to indicate or64.
 265         (f-rdoff-10-1, f-raoff-9-1, f-rboff-8-1): New fields.
 266         (h-roff1): New hardware.
 267         (double-field-and-ops mnemonic): New pmacro to generate operations
 268         rDD32F, rAD32F, rBD32F, rDDI and rADI.
 269         (float-regreg-insn): Update single precision generator to MACH
 270         ORFPX32-MACHS.  Add generator for or32 64-bit instructions.
 271         (float-setflag-insn): Update single precision generator to MACH
 272         ORFPX32-MACHS.  Fix double instructions from single to double
 273         precision.  Add generator for or32 64-bit instructions.
 274         (float-cust-insn cust-num): Update single precision generator to MACH
 275         ORFPX32-MACHS.  Add generator for or32 64-bit instructions.
 276         (lf-rem-s, lf-itof-s, lf-ftoi-s, lf-madd-s): Update MACH to
 277         ORFPX32-MACHS.
 278         (lf-rem-d): Fix operation from mod to rem.
 279         (lf-rem-d32, lf-itof-d32, lf-ftoi-d32, lf-madd-d32): New instruction.
 280         (lf-itof-d): Fix operands from single to double.
 281         (lf-ftoi-d): Update operand mode from DI to WI.
 282
 283 2019-05-23  Jose E. Marchesi  <jose.marchesi@oracle.com>
 284
 285         * bpf.cpu: New file.
 286         * bpf.opc: Likewise.
 287
 288 2018-06-24  Nick Clifton  <nickc@redhat.com>
 289
 290         2.32 branch created.
 291
 292 2018-10-05  Richard Henderson  <rth@twiddle.net>
 293             Stafford Horne  <shorne@gmail.com>
 294
 295         * or1korbis.cpu (insn-opcode-mac): Add opcodes for MACU and MSBU.
 296         (insn-opcode-alu-regreg): Add opcodes for MULD and MULDU.
 297         (l-mul): Fix overflow support and indentation.
 298         (l-mulu): Fix overflow support and indentation.
 299         (l-muld, l-muldu, l-msbu, l-macu): New instructions.
 300         (l-div); Remove incorrect carry behavior.
 301         (l-divu): Fix carry and overflow behavior.
 302         (l-mac): Add overflow support.
 303         (l-msb, l-msbu): Add carry and overflow support.
 304
 305 2018-10-05  Richard Henderson  <rth@twiddle.net>
 306
 307         * or1k.opc (parse_disp26): Add support for plta() relocations.
 308         (parse_disp21): New function.
 309         (or1k_rclass): New enum.
 310         (or1k_rtype): New enum.
 311         (or1k_imm16_relocs): Define new PO and SPO relocation mappings.
 312         (parse_reloc): Add new po(), gotpo() and gottppo() for LO13 relocations.
 313         (parse_imm16): Add support for the new 21bit and 13bit relocations.
 314         * or1korbis.cpu (f-disp26): Don't assume SI.
 315         (f-disp21): New pc-relative 21-bit 13 shifted to right.
 316         (insn-opcode): Add ADRP.
 317         (l-adrp): New instruction.
 318
 319 2018-10-05  Richard Henderson  <rth@twiddle.net>
 320
 321         * or1k.opc: Add RTYPE_ enum.
 322         (INVALID_STORE_RELOC): New string.
 323         (or1k_imm16_relocs): New array array.
 324         (parse_reloc): New static function that just does the parsing.
 325         (parse_imm16): New static function for generic parsing.
 326         (parse_simm16): Change to just call parse_imm16.
 327         (parse_simm16_split): New function.
 328         (parse_uimm16): Change to call parse_imm16.
 329         (parse_uimm16_split): New function.
 330         * or1korbis.cpu (simm16-split): Change to use new simm16_split.
 331         (uimm16-split): Change to use new uimm16_split.
 332
 333 2018-07-24  Alan Modra  <amodra@gmail.com>
 334
 335         PR 23430
 336         * or1kcommon.cpu (spr-reg-indices): Fix description typo.
 337
 338 2018-05-09  Sebastian Rasmussen  <sebras@gmail.com>
 339
 340         * or1kcommon.cpu (spr-reg-info): Typo fix.
 341
 342 2018-03-03  Alan Modra  <amodra@gmail.com>
 343
 344         * frv.opc: Include opintl.h.
 345         (add_next_to_vliw): Use opcodes_error_handler to print error.
 346         Standardize error message.
 347         (fr500_check_insn_major_constraints, frv_vliw_add_insn): Likewise.
 348
 349 2018-01-13  Nick Clifton  <nickc@redhat.com>
 350
 351         2.30 branch created.
 352
 353 2017-03-15  Stafford Horne  <shorne@gmail.com>
 354
 355         * or1kcommon.cpu: Add pc set semantics to also update ppc.
 356
 357 2016-10-06  Alan Modra  <amodra@gmail.com>
 358
 359         * mep.opc (expand_string): Add fall through comment.
 360
 361 2016-03-03  Alan Modra  <amodra@gmail.com>
 362
 363         * fr30.cpu (f-m4): Replace bogus comment with a better guess
 364         at what is really going on.
 365
 366 2016-03-02  Alan Modra  <amodra@gmail.com>
 367
 368         * fr30.cpu (f-m4): Replace -1 << 4 with -16.
 369
 370 2016-02-02  Andrew Burgess  <andrew.burgess@embecosm.com>
 371
 372         * epiphany.opc (epiphany_print_insn): Set info->bytes_per_line to
 373         a constant to better align disassembler output.
 374
 375 2014-07-20  Stefan Kristiansson  <stefan.kristiansson@saunalahti.fi>
 376
 377         * or1korbis.cpu (l-msync, l-psync, l-csync): New instructions.
 378
 379 2014-06-12  Alan Modra  <amodra@gmail.com>
 380
 381         * or1k.opc: Whitespace fixes.
 382
 383 2014-05-08  Stefan Kristiansson  <stefan.kristiansson@saunalahti.fi>
 384
 385         * or1korbis.cpu (h-atomic-reserve): New hardware.
 386         (h-atomic-address): Likewise.
 387         (insn-opcode): Add opcodes for LWA and SWA.
 388         (atomic-reserve): New operand.
 389         (atomic-address): Likewise.
 390         (l-lwa, l-swa): New instructions.
 391         (l-lbs): Fix typo in comment.
 392         (store-insn): Clear atomic reserve on store to atomic-address.
 393         Fix register names in fmt field.
 394
 395 2014-04-22  Christian Svensson  <blue@cmd.nu>
 396
 397         * openrisc.cpu: Delete.
 398         * openrisc.opc: Delete.
 399         * or1k.cpu: New file.
 400         * or1k.opc: New file.
 401         * or1kcommon.cpu: New file.
 402         * or1korbis.cpu: New file.
 403         * or1korfpx.cpu: New file.
 404
 405 2013-12-07  Mike Frysinger  <vapier@gentoo.org>
 406
 407         * epiphany.opc: Remove +x file mode.
 408
 409 2013-03-08  Yann Sionneau  <yann.sionneau@gmail.com>
 410
 411         PR binutils/15241
 412         * lm32.cpu (Control and status registers): Add CFG2, PSW,
 413         TLBVADDR, TLBPADDR and TLBBADVADDR.
 414
 415 2012-11-30  Oleg Raikhman  <oleg@adapteva.com>
 416             Joern Rennecke  <joern.rennecke@embecosm.com>
 417
 418         * epiphany.cpu (keyword gr-names): Move sb/sl/ip after r9/r10/r12.
 419         (load_insn): Add NO-DIS attribute to x, p, d, dpm, dl0, dl0.l.
 420         (testset-insn): Add NO_DIS attribute to t.l.
 421         (store-insn): Add NO-DIS attribute to x.l, p.l, d.l, dpm.l, dl0.l.
 422         (move-insns): Add NO-DIS attribute to cmov.l.
 423         (op-mmr-movts): Add NO-DIS attribute to movts.l.
 424         (op-mmr-movfs): Add NO-DIS attribute to movfs.l.
 425         (op-rrr): Add NO-DIS attribute to .l.
 426         (shift-rrr): Add NO-DIS attribute to .l.
 427         (op-shift-rri): Add NO-DIS attribute to i32.l.
 428         (bitrl, movtl): Add NO-DIS attribute.
 429         (op-iextrrr): Add NO-DIS attribute to .l
 430         (op-two_operands-float, op-fabs-float): Add NO-DIS attribute to f32.l.
 431         (op-fix2float-float, op-float2fix-float, op-fextop-float): Likewise.
 432
 433 2012-02-27  Alan Modra  <amodra@gmail.com>
 434
 435         * mt.opc (print_dollarhex): Trim values to 32 bits.
 436
 437 2011-12-15  Nick Clifton  <nickc@redhat.com>
 438
 439         * frv.opc (parse_uhi16): Fix handling of %hi operator on 64-bit
 440         hosts.
 441
 442 2011-10-26  Joern Rennecke  <joern.rennecke@embecosm.com>
 443
 444         * epiphany.opc (parse_branch_addr): Fix type of valuep.
 445         Cast value before printing it as a long.
 446         (parse_postindex): Fix type of valuep.
 447
 448 2011-10-25  Joern Rennecke  <joern.rennecke@embecosm.com>
 449
 450         * cpu/epiphany.cpu: New file.
 451         * cpu/epiphany.opc: New file.
 452
 453 2011-08-22  Nick Clifton  <nickc@redhat.com>
 454
 455         * fr30.cpu: Newly contributed file.
 456         * fr30.opc: Likewise.
 457         * ip2k.cpu: Likewise.
 458         * ip2k.opc: Likewise.
 459         * mep-avc.cpu: Likewise.
 460         * mep-avc2.cpu: Likewise.
 461         * mep-c5.cpu: Likewise.
 462         * mep-core.cpu: Likewise.
 463         * mep-default.cpu: Likewise.
 464         * mep-ext-cop.cpu: Likewise.
 465         * mep-fmax.cpu: Likewise.
 466         * mep-h1.cpu: Likewise.
 467         * mep-ivc2.cpu: Likewise.
 468         * mep-rhcop.cpu: Likewise.
 469         * mep-sample-ucidsp.cpu: Likewise.
 470         * mep.cpu: Likewise.
 471         * mep.opc: Likewise.
 472         * openrisc.cpu: Likewise.
 473         * openrisc.opc: Likewise.
 474         * xstormy16.cpu: Likewise.
 475         * xstormy16.opc: Likewise.
 476
 477 2010-10-08  Pierre Muller  <muller@ics.u-strasbg.fr>
 478
 479         * frv.opc: #undef DEBUG.
 480
 481 2010-07-03  DJ Delorie  <dj@delorie.com>
 482
 483         * m32c.cpu (f-dsp-8-s24): Mask high byte after shifting it.
 484
 485 2010-02-11  Doug Evans  <dje@sebabeach.org>
 486
 487         * m32r.cpu (HASH-PREFIX): Delete.
 488         (duhpo, dshpo): New pmacros.
 489         (simm8, simm16): Delete HASH-PREFIX attribute, define with dshpo.
 490         (uimm3, uimm4, uimm5, uimm8, uimm16, imm1): Delete HASH-PREFIX
 491         attribute, define with dshpo.
 492         (uimm24): Delete HASH-PREFIX attribute.
 493         * m32r.opc (CGEN_PRINT_NORMAL): Delete.
 494         (print_signed_with_hash_prefix): New function.
 495         (print_unsigned_with_hash_prefix): New function.
 496         * xc16x.cpu (dowh): New pmacro.
 497         (upof16): Define with dowh, specify print handler.
 498         (qbit, qlobit, qhibit): Ditto.
 499         (upag16): Ditto.
 500         * xc16x.opc (CGEN_PRINT_NORMAL): Delete.
 501         (print_with_dot_prefix): New functions.
 502         (print_with_pof_prefix, print_with_pag_prefix): New functions.
 503
 504 2010-01-24  Doug Evans  <dje@sebabeach.org>
 505
 506         * frv.cpu (floating-point-conversion): Update call to fp conv op.
 507         (floating-point-dual-conversion, ne-floating-point-dual-conversion,
 508         conditional-floating-point-conversion, ne-floating-point-conversion,
 509         float-parallel-mul-add-double-semantics): Ditto.
 510
 511 2010-01-05  Doug Evans  <dje@sebabeach.org>
 512
 513         * m32c.cpu (f-dsp-32-u24): Fix mode of extract handler.
 514         (f-dsp-40-u20, f-dsp-40-u24): Ditto.
 515
 516 2010-01-02  Doug Evans  <dje@sebabeach.org>
 517
 518         * m32c.opc (parse_signed16): Fix typo.
 519
 520 2009-12-11  Nick Clifton  <nickc@redhat.com>
 521
 522         * frv.opc: Fix shadowed variable warnings.
 523         * m32c.opc: Fix shadowed variable warnings.
 524
 525 2009-11-14  Doug Evans  <dje@sebabeach.org>
 526
 527         Must use VOID expression in VOID context.
 528         * xc16x.cpu (mov4): Fix mode of `sequence'.
 529         (mov9, mov10): Ditto.
 530         (movbsrr, moveb1, jmprel, jmpseg, jmps): Fix mode of `if'.
 531         (callr, callseg, calls, trap, rets, reti): Ditto.
 532         (jb, jbc, jnb, jnbs): Fix mode of `if'.  Comment out no-op `sll'.
 533         (atomic, extr, extp, extp1, extpg1, extpr, extpr1): Fix mode of `cond'.
 534         (exts, exts1, extsr, extsr1, prior): Ditto.
 535
 536 2009-10-23  Doug Evans  <dje@sebabeach.org>
 537
 538         * m32c.opc (opc.h): cgen-types.h -> cgen/basic-modes.h.
 539         cgen-ops.h -> cgen/basic-ops.h.
 540
 541 2009-09-25  Alan Modra  <amodra@bigpond.net.au>
 542
 543         * m32r.cpu (stb-plus): Typo fix.
 544
 545 2009-09-23  Doug Evans  <dje@sebabeach.org>
 546
 547         * m32r.cpu (sth-plus): Fix address mode and calculation.
 548         (stb-plus): Ditto.
 549         (clrpsw): Fix mask calculation.
 550         (bset, bclr, btst): Make mode in bit calculation match expression.
 551
 552         * xc16x.cpu (rtl-version): Set to 0.8.
 553         (gr-names, ext-names,psw-names): Update, print-name -> enum-prefix,
 554         make uppercase.  Remove unnecessary name-prefix spec.
 555         (grb-names, conditioncode-names, extconditioncode-names): Ditto.
 556         (grb8-names, r8-names, regmem8-names, regdiv8-names): Ditto.
 557         (reg0-name, reg0-name1, regbmem8-names, memgr8-names): Ditto.
 558         (h-cr): New hardware.
 559         (muls): Comment out parts that won't compile, add fixme.
 560         (mulu, divl, divlu, jmpabs, jmpa-, jmprel, jbc, jnbs, callr): Ditto.
 561         (scxti, scxtmg, scxtm, bclear, bclr18, bset19, bitset, bmov): Ditto.
 562         (bmovn, band, bor, bxor, bcmp, bfldl, bfldh): Ditto.
 563
 564 2009-07-16  Doug Evans  <dje@sebabeach.org>
 565
 566         * cpu/simplify.inc (*): One line doc strings don't need \n.
 567         (df): Invoke define-full-ifield instead of claiming it's an alias.
 568         (dno): Define.
 569         (dnop): Mark as deprecated.
 570
 571 2009-06-22  Alan Modra  <amodra@bigpond.net.au>
 572
 573         * m32c.opc (parse_lab_5_3): Use correct enum.
 574
 575 2009-01-07  Hans-Peter Nilsson  <hp@axis.com>
 576
 577         * frv.cpu (mabshs): Explicitly sign-extend arguments of abs to DI.
 578         (DI-ext-HI, DI-ext-UHI, DI-ext-DI): New pmacros.
 579         (media-arith-sat-semantics): Explicitly sign- or zero-extend
 580         arguments of "operation" to DI using "mode" and the new pmacros.
 581
 582 2009-01-03  Hans-Peter Nilsson  <hp@axis.com>
 583
 584         * cris.cpu (cris-implemented-writable-specregs-v32): Correct size
 585         of number 2, PID.
 586
 587 2008-12-23  Jon Beniston <jon@beniston.com>
 588
 589         * lm32.cpu: New file.
 590         * lm32.opc: New file.
 591
 592 2008-01-29  Alan Modra  <amodra@bigpond.net.au>
 593
 594         * mt.opc (parse_imm16): Apply 2007-09-26 opcodes/mt-asm.c change
 595         to source.
 596
 597 2007-10-22  Hans-Peter Nilsson  <hp@axis.com>
 598
 599         * cris.cpu (movs, movu): Use result of extension operation when
 600         updating flags.
 601
 602 2007-07-04  Nick Clifton  <nickc@redhat.com>
 603
 604         * cris.cpu: Update copyright notice to refer to GPLv3.
 605         * frv.cpu, frv.opc, iq10.cpu, iq2000m.cpu, iq2000.opc, m32c.cpu,
 606         m32c.opc, m32r.cpu, m32r.opc, mt.cpu, mt.opc, sh64-compact.cpu,
 607         sh64-media.cpu, sh.cpu, sh.opc, simplify.inc, xc16x.cpu,
 608         xc16x.opc: Likewise.
 609         * iq2000.cpu: Fix copyright notice to refer to FSF.
 610
 611 2007-04-30  Mark Salter  <msalter@sadr.localdomain>
 612
 613         * frv.cpu (spr-names): Support new coprocessor SPR registers.
 614
 615 2007-04-20  Nick Clifton  <nickc@redhat.com>
 616
 617         * xc16x.cpu: Restore after accidentally overwriting this file with
 618         xc16x.opc.
 619
 620 2007-03-29  DJ Delorie  <dj@redhat.com>
 621
 622         * m32c.cpu (Imm-8-s4n): Fix print hook.
 623         (Lab-24-8, Lab-32-8, Lab-40-8): Fix.
 624         (arith-jnz-imm4-dst-defn): Make relaxable.
 625         (arith-jnz16-imm4-dst-defn): Fix encodings.
 626
 627 2007-03-20  DJ Delorie  <dj@redhat.com>
 628
 629         * m32c.cpu (f-dsp-40-u20, f-dsp-48-u20, Dsp-40-u20, Dsp-40-u20,
 630         mem20): New.
 631         (src16-16-20-An-relative-*): New.
 632         (dst16-*-20-An-relative-*): New.
 633         (dst16-16-16sa-*): New
 634         (dst16-16-16ar-*): New
 635         (dst32-16-16sa-Unprefixed-*): New
 636         (jsri): Fix operands.
 637         (setzx): Fix encoding.
 638
 639 2007-03-08  Alan Modra  <amodra@bigpond.net.au>
 640
 641         * m32r.opc: Formatting.
 642
 643 2006-05-22  Nick Clifton  <nickc@redhat.com>
 644
 645         * iq2000.cpu: Fix include paths for iq2000m.cpu and iq10.cpu.
 646
 647 2006-04-10  DJ Delorie  <dj@redhat.com>
 648
 649         * m32c.opc (parse_unsigned_bitbase): Take a new parameter which
 650         decides if this function accepts symbolic constants or not.
 651         (parse_signed_bitbase): Likewise.
 652         (parse_unsigned_bitbase8): Pass the new parameter.
 653         (parse_unsigned_bitbase11): Likewise.
 654         (parse_unsigned_bitbase16): Likewise.
 655         (parse_unsigned_bitbase19): Likewise.
 656         (parse_unsigned_bitbase27): Likewise.
 657         (parse_signed_bitbase8): Likewise.
 658         (parse_signed_bitbase11): Likewise.
 659         (parse_signed_bitbase19): Likewise.
 660
 661 2006-03-13  DJ Delorie  <dj@redhat.com>
 662
 663         * m32c.cpu (Bit3-S): New.
 664         (btst:s): New.
 665         * m32c.opc (parse_bit3_S): New.
 666
 667         * m32c.cpu (decimal-subtraction16-insn): Add second operand.
 668         (btst): Add optional :G suffix for MACH32.
 669         (or.b:S): New.
 670         (pop.w:G): Add optional :G suffix for MACH16.
 671         (push.b.imm): Fix syntax.
 672
 673 2006-03-10  DJ Delorie  <dj@redhat.com>
 674
 675         * m32c.cpu (mul.l): New.
 676         (mulu.l): New.
 677
 678 2006-03-03 Shrirang Khisti <shrirangk@kpitcummins.com)
 679
 680         * xc16x.opc (parse_hash): Return NULL if the input was parsed or
 681         an error message otherwise.
 682         (parse_dot, parse_pof, parse_pag, parse_sof, parse_seg): Likewise.
 683         Fix up comments to correctly describe the functions.
 684
 685 2006-02-24  DJ Delorie  <dj@redhat.com>
 686
 687         * m32c.cpu (RL_TYPE): New attribute, with macros.
 688         (Lab-8-24): Add RELAX.
 689         (unary-insn-defn-g, binary-arith-imm-dst-defn,
 690         binary-arith-imm4-dst-defn): Add 1ADDR attribute.
 691         (binary-arith-src-dst-defn): Add 2ADDR attribute.
 692         (jcnd16-5, jcnd16, jcnd32, jmp16.s, jmp16.b, jmp16.w, jmp16.a,
 693         jmp32.s, jmp32.b, jmp32.w, jmp32.a, jsr16.w, jsr16.a): Add JUMP
 694         attribute.
 695         (jsri16, jsri32): Add 1ADDR attribute.
 696         (jsr32.w, jsr32.a): Add JUMP attribute.
 697
 698 2006-02-17  Shrirang Khisti  <shrirangk@kpitcummins.com>
 699             Anil Paranjape   <anilp1@kpitcummins.com>
 700             Shilin Shakti    <shilins@kpitcummins.com>
 701
 702         * xc16x.cpu: New file containing complete CGEN specific XC16X CPU
 703         description.
 704         * xc16x.opc: New file containing supporting XC16C routines.
 705
 706 2006-02-10  Nick Clifton  <nickc@redhat.com>
 707
 708         * iq2000.opc (parse_hi16): Truncate shifted values to 16 bits.
 709
 710 2006-01-06  DJ Delorie  <dj@redhat.com>
 711
 712         * m32c.cpu (mov.w:q): Fix mode.
 713         (push32.b.imm): Likewise, for the comment.
 714
 715 2005-12-16  Nathan Sidwell  <nathan@codesourcery.com>
 716
 717         Second part of ms1 to mt renaming.
 718         * mt.cpu (define-arch, define-isa): Set name to mt.
 719         (define-mach): Adjust.
 720         * mt.opc (CGEN_ASM_HASH): Update.
 721         (mt_asm_hash, mt_cgen_insn_supported): Renamed.
 722         (parse_loopsize, parse_imm16): Adjust.
 723
 724 2005-12-13  DJ Delorie  <dj@redhat.com>
 725
 726         * m32c.cpu (jsri): Fix order so register names aren't treated as
 727         symbols.
 728         (indexb, indexbd, indexbs, indexl, indexld, indexls, indexw,
 729         indexwd, indexws): Fix encodings.
 730
 731 2005-12-12  Nathan Sidwell  <nathan@codesourcery.com>
 732
 733         * mt.cpu: Rename from ms1.cpu.
 734         * mt.opc: Rename from ms1.opc.
 735
 736 2005-12-06  Hans-Peter Nilsson  <hp@axis.com>
 737
 738         * cris.cpu (simplecris-common-writable-specregs)
 739         (simplecris-common-readable-specregs): Split from
 740         simplecris-common-specregs.  All users changed.
 741         (cris-implemented-writable-specregs-v0)
 742         (cris-implemented-readable-specregs-v0): Similar from
 743         cris-implemented-specregs-v0.
 744         (cris-implemented-writable-specregs-v3)
 745         (cris-implemented-readable-specregs-v3)
 746         (cris-implemented-writable-specregs-v8)
 747         (cris-implemented-readable-specregs-v8)
 748         (cris-implemented-writable-specregs-v10)
 749         (cris-implemented-readable-specregs-v10)
 750         (cris-implemented-writable-specregs-v32)
 751         (cris-implemented-readable-specregs-v32): Similar.
 752         (bdap-32-pc, move-m-pcplus-p0, move-m-spplus-p8): New
 753         insns and specializations.
 754
 755 2005-11-08  Nathan Sidwell  <nathan@codesourcery.com>
 756
 757         Add ms2
 758         * ms1.cpu (ms2, ms2bf): New architecture variant, cpu, machine and
 759         model.
 760         (f-uu8, f-uu1, f-imm16l, f-loopo, f-cb1sel, f-cb2sel, f-cb1incr,
 761         f-cb2incr, f-rc3): New fields.
 762         (LOOP): New instruction.
 763         (JAL-HAZARD): New hazard.
 764         (imm16o, loopsize, imm16l, rc3, cb1sel, cb2sel, cb1incr, cb2incr):
 765         New operands.
 766         (mul, muli, dbnz, iflush): Enable for ms2
 767         (jal, reti): Has JAL-HAZARD.
 768         (ldctxt, ldfb, stfb): Only ms1.
 769         (fbcb): Only ms1,ms1-003.
 770         (wfbinc, mefbinc, wfbincr, mwfbincr, fbcbincs, mfbcbincs,
 771         fbcbincrs, mfbcbincrs): Enable for ms2.
 772         (loop, loopu, dfbc, dwfb, fbwfb, dfbr): New ms2 insns.
 773         * ms1.opc (parse_loopsize): New.
 774         (parse_imm16): hi16/lo16 relocs are applicable to IMM16L.
 775         (print_pcrel): New.
 776
 777 2005-10-28  Dave Brolley  <brolley@redhat.com>
 778
 779         Contribute the following change:
 780         2003-09-24  Dave Brolley  <brolley@redhat.com>
 781
 782         * frv.opc: Use CGEN_ATTR_VALUE_ENUM_TYPE in place of
 783         CGEN_ATTR_VALUE_TYPE.
 784         * m32c.opc (m32c_cgen_insn_supported): Use CGEN_INSN_BITSET_ATTR_VALUE.
 785         Use cgen_bitset_intersect_p.
 786
 787 2005-10-27  DJ Delorie  <dj@redhat.com>
 788
 789         * m32c.cpu (Imm-8-s4n, Imm-12-s4n): New.
 790         (arith-jnz16-imm4-dst-defn, arith-jnz32-imm4-dst-defn,
 791         arith-jnz-imm4-dst-mach, arith-jnz-imm4-dst): Keep track of which
 792         imm operand is needed.
 793         (adjnz, sbjnz): Pass the right operands.
 794         (unary-insn-defn, unary16-defn, unary32-defn, unary-insn-mach,
 795         unary-insn): Add -g variants for opcodes that need to support :G.
 796         (not.BW:G, push.BW:G): Call it.
 797         (stzx16-imm8-imm8-dsp8sb, stzx16-imm8-imm8-dsp8fb,
 798         stzx16-imm8-imm8-abs16): Fix operand typos.
 799         * m32c.opc (m32c_asm_hash): Support bnCND.
 800         (parse_signed4n, print_signed4n): New.
 801
 802 2005-10-26  DJ Delorie  <dj@redhat.com>
 803
 804         * m32c.cpu (f-dsp-8-s24, Dsp-8-s24): New.
 805         (mov-dspsp-dst-defn, mov-src-dspsp-defn, mov16-dspsp-dst-defn,
 806         mov16-src-dspsp-defn, mov32-dspsp-dst-defn, mov32-src-dspsp-defn):
 807         dsp8[sp] is signed.
 808         (mov.WL:S #imm,A0/A1): dsp24 is signed (i.e. -0x800000..0xffffff).
 809         (mov.BW:S r0,r1): Fix typo r1l->r1.
 810         (tst): Allow :G suffix.
 811         * m32c.opc (parse_signed24): New, for -0x800000..0xffffff.
 812
 813 2005-10-26  Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
 814
 815         * m32r.opc (parse_hi16): Do not assume a 32-bit host word size.
 816
 817 2005-10-25  DJ Delorie  <dj@redhat.com>
 818
 819         * m32c.cpu (add16-bQ-sp,add16-wQ-sp): Fix to allow either width by
 820         making one a macro of the other.
 821
 822 2005-10-21  DJ Delorie  <dj@redhat.com>
 823
 824         * m32c.cpu (lde, ste): Add dsp[a0] and [a1a] addressing.
 825         (indexb, indexbd, indexbs, indexw, indexwd, indexws, indexl,
 826         indexld, indexls): .w variants have `1' bit.
 827         (rot32.b): QI, not SI.
 828         (rot32.w): HI, not SI.
 829         (xchg16): HI for .w variant.
 830
 831 2005-10-19  Nick Clifton  <nickc@redhat.com>
 832
 833         * m32r.opc (parse_slo16): Fix bad application of previous patch.
 834
 835 2005-10-18  Andreas Schwab  <schwab@suse.de>
 836
 837         * m32r.opc (parse_slo16): Better version of previous patch.
 838
 839 2005-10-14  Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
 840
 841         * cpu/m32r.opc (parse_slo16): Do not assume a 32-bit host word
 842         size.
 843
 844 2005-07-25  DJ Delorie  <dj@redhat.com>
 845
 846         * m32c.opc (parse_unsigned8): Add %dsp8().
 847         (parse_signed8): Add %hi8().
 848         (parse_unsigned16): Add %dsp16().
 849         (parse_signed16): Add %lo16() and %hi16().
 850         (parse_lab_5_3): Make valuep a bfd_vma *.
 851
 852 2005-07-18  Nick Clifton  <nickc@redhat.com>
 853
 854         * m32c.cpu (f-16-8, f-24-8, f-32-16, f-dsp-8-u24): New opcode
 855         components.
 856         (f-lab32-jmp-s): Fix insertion sequence.
 857         (Dsp-8-u24, Lab-5-3, Lab32-jmp-s): New operands.
 858         (Dsp-40-s8): Make parameter be signed.
 859         (Dsp-40-s16): Likewise.
 860         (Dsp-48-s8): Likewise.
 861         (Dsp-48-s16): Likewise.
 862         (Imm-13-u3): Likewise. (Despite its name!)
 863         (BitBase16-16-s8): Make the parameter be unsigned.
 864         (BitBase16-8-u11-S): Likewise.
 865         (Lab-8-8, Lab-8-16, Lab-16-8, jcnd16-5, jcnd16, jcnd32, jmp16.s,
 866         jmp16.b, jmp16.w, jmp32.s, jmp32.b, jmp32.w, jsp16.w, jsr32.w): Allow
 867         relaxation.
 868
 869         * m32c.opc: Fix formatting.
 870         Use safe-ctype.h instead of ctype.h
 871         Move duplicated code sequences into a macro.
 872         Fix compile time warnings about signedness mismatches.
 873         Remove dead code.
 874         (parse_lab_5_3): New parser function.
 875
 876 2005-07-16  Jim Blandy  <jimb@redhat.com>
 877
 878         * m32c.opc (m32c_cgen_insn_supported): Use int, not CGEN_BITSET,
 879         to represent isa sets.
 880
 881 2005-07-15  Jim Blandy  <jimb@redhat.com>
 882
 883         * m32c.cpu, m32c.opc: Fix copyright.
 884
 885 2005-07-14  Jim Blandy  <jimb@redhat.com>
 886
 887         * m32c.cpu, m32c.opc: Machine description for the Renesas M32C.
 888
 889 2005-07-14  Alan Modra  <amodra@bigpond.net.au>
 890
 891         * ms1.opc (print_dollarhex): Correct format string.
 892
 893 2005-07-06  Alan Modra  <amodra@bigpond.net.au>
 894
 895         * iq2000.cpu: Include from binutils cpu dir.
 896
 897 2005-07-05  Nick Clifton  <nickc@redhat.com>
 898
 899         * iq2000.opc (parse_lo16, parse_mlo16): Make value parameter
 900         unsigned in order to avoid compile time warnings about sign
 901         conflicts.
 902
 903         * ms1.opc (parse_*): Likewise.
 904         (parse_imm16): Use a "void *" as it is passed both signed and
 905         unsigned arguments.
 906
 907 2005-07-01  Nick Clifton  <nickc@redhat.com>
 908
 909         * frv.opc: Update to ISO C90 function declaration style.
 910         * iq2000.opc: Likewise.
 911         * m32r.opc: Likewise.
 912         * sh.opc: Likewise.
 913
 914 2005-06-15  Dave Brolley  <brolley@redhat.com>
 915
 916         Contributed by Red Hat.
 917         * ms1.cpu: New file.  Written by Nick Clifton, Stan Cox.
 918         * ms1.opc: New file.  Written by Stan Cox.
 919
 920 2005-05-10  Nick Clifton  <nickc@redhat.com>
 921
 922         * Update the address and phone number of the FSF organization in
 923         the GPL notices in the following files:
 924         cris.cpu, frv.cpu, frv.opc, iq10.cpu, iq2000.opc, iq2000m.cpu,
 925         m32r.cpu, m32r.opc, sh.cpu, sh.opc, sh64-compact.cpu,
 926         sh64-media.cpu, simplify.inc
 927
 928 2005-02-24  Alan Modra  <amodra@bigpond.net.au>
 929
 930         * frv.opc (parse_A): Warning fix.
 931
 932 2005-02-23  Nick Clifton  <nickc@redhat.com>
 933
 934         * frv.opc: Fixed compile time warnings about differing signed'ness
 935         of pointers passed to functions.
 936         * m32r.opc: Likewise.
 937
 938 2005-02-11  Nick Clifton  <nickc@redhat.com>
 939
 940         * iq2000.opc (parse_jtargq10): Change type of valuep argument to
 941         'bfd_vma *' in order avoid compile time warning message.
 942
 943 2005-01-28  Hans-Peter Nilsson  <hp@axis.com>
 944
 945         * cris.cpu (mstep): Add missing insn.
 946
 947 2005-01-25  Alexandre Oliva  <aoliva@redhat.com>
 948
 949         2004-11-10  Alexandre Oliva  <aoliva@redhat.com>
 950         * frv.cpu: Add support for TLS annotations in loads and calll.
 951         * frv.opc (parse_symbolic_address): New.
 952         (parse_ldd_annotation): New.
 953         (parse_call_annotation): New.
 954         (parse_ld_annotation): New.
 955         (parse_ulo16, parse_uslo16): Use parse_symbolic_address.
 956         Introduce TLS relocations.
 957         (parse_d12, parse_s12, parse_u12): Likewise.
 958         (parse_uhi16): Likewise.  Fix constant checking on 64-bit host.
 959         (parse_call_label, print_at): New.
 960
 961 2004-12-21  Mikael Starvik  <starvik@axis.com>
 962
 963         * cris.cpu (cris-set-mem): Correct integral write semantics.
 964
 965 2004-11-29  Hans-Peter Nilsson  <hp@axis.com>
 966
 967         * cris.cpu: New file.
 968
 969 2004-11-15  Michael K. Lechner <mike.lechner@gmail.com>
 970
 971         * iq2000.cpu: Added quotes around macro arguments so that they
 972         will work with newer versions of guile.
 973
 974 2004-10-27  Nick Clifton  <nickc@redhat.com>
 975
 976         * iq2000m.cpu (pkrlr1, pkrlr30, rbr1, rbr30, rxr1, rxr30, wbr1,
 977         wbr1u, wbr30, wbr30u, wxr1, wxr1u, wxr30, wxr30u): Add an index
 978         operand.
 979         * iq2000.cpu (dnop index): Rename to _index to avoid complications
 980         with guile.
 981
 982 2004-08-27  Richard Sandiford  <rsandifo@redhat.com>
 983
 984         * frv.cpu (cfmovs): Change UNIT attribute to FMALL.
 985
 986 2004-05-15  Nick Clifton  <nickc@redhat.com>
 987
 988         * iq2000.opc (iq2000_cgen_insn_supported): Make 'insn' argument const.
 989
 990 2004-03-30  Kazuhiro Inaoka  <inaoka.kazuhiro@renesas.com>
 991
 992         * m32r.opc (parse_hi16): Fixed shigh(0xffff8000) bug.
 993
 994 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
 995
 996         * frv.cpu (define-arch frv): Add fr450 mach.
 997         (define-mach fr450): New.
 998         (define-model fr450): New.  Add profile units to every fr450 insn.
 999         (define-attr UNIT): Add MDCUTSSI.
1000         (define-attr FR450-MAJOR): New enum.  Add to every fr450 insn.
1001         (define-attr AUDIO): New boolean.
1002         (f-LRAE, f-LRAD, f-LRAS, f-TLBPRopx, f-TLBPRL)
1003         (f-LRA-null, f-TLBPR-null): New fields.
1004         (scr0, scr1, scr2, scr3, imavr1, damvr1, cxnr, ttbr)
1005         (tplr, tppr, tpxr, timerh, timerl, timerd, btbr): New SPRs.
1006         (LRAE, LRAD, LRAS, TLBPRopx, TLBPRL): New operands.
1007         (LRA-null, TLBPR-null): New macros.
1008         (iacc-multiply-r-r, slass, scutss, int-arith-ss-r-r): Add AUDIO attr.
1009         (load-real-address): New macro.
1010         (lrai, lrad, tlbpr): New instructions.
1011         (media-cut-acc, media-cut-acc-ss): Add fr450-major argument.
1012         (mcut, mcuti, mcutss, mcutssi): Adjust accordingly.
1013         (mdcutssi): Change UNIT attribute to MDCUTSSI.
1014         (media-low-clear-semantics, media-scope-limit-semantics)
1015         (media-quad-limit, media-quad-shift): New macros.
1016         (mqlclrhs, mqlmths, mqsllhi, mqsrahi): New instructions.
1017         * frv.opc (frv_is_branch_major, frv_is_float_major, frv_is_media_major)
1018         (frv_is_branch_insn, frv_is_float_insn, frv_is_media_insn)
1019         (frv_vliw_reset, frv_vliw_add_insn): Handle bfd_mach_fr450.
1020         (fr450_unit_mapping): New array.
1021         (fr400_unit_mapping, fr500_unit_mapping, fr550_unit_mapping): Add entry
1022         for new MDCUTSSI unit.
1023         (fr450_check_insn_major_constraints): New function.
1024         (check_insn_major_constraints): Use it.
1025
1026 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
1027
1028         * frv.cpu (nsdiv, nudiv, nsdivi, nudivi): Remove fr400 profiling unit.
1029         (scutss): Change unit to I0.
1030         (calll, callil, ccalll): Add missing FR550-MAJOR and profile unit.
1031         (mqsaths): Fix FR400-MAJOR categorization.
1032         (media-quad-multiply-cross-acc, media-quad-cross-multiply-cross-acc)
1033         (media-quad-cross-multiply-acc): Change unit from MDUALACC to FMALL.
1034         * frv.opc (fr400_check_insn_major_constraints): Check for (M-2,M-1)
1035         combinations.
1036
1037 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
1038
1039         * frv.cpu (r-store, r-store-dual, r-store-quad): Delete.
1040         (rstb, rsth, rst, rstd, rstq): Delete.
1041         (rstbf, rsthf, rstf, rstdf, rstqf): Delete.
1042
1043 2004-02-23  Nick Clifton  <nickc@redhat.com>
1044
1045         * Apply these patches from Renesas:
1046
1047         2004-02-10  Kazuhiro Inaoka  <inaoka.kazuhiro@renesas.com>
1048
1049         * cpu/m32r.opc (my_print_insn): Fixed incorrect output when
1050         disassembling codes for 0x*2 addresses.
1051
1052         2003-12-15  Kazuhiro Inaoka  <inaoka.kazuhiro@renesas.com>
1053
1054         * cpu/m32r.cpu: Add PIPE_O attribute to "pop" instruction.
1055
1056         2003-12-03  Kazuhiro Inaoka  <inaoka.kazuhiro@renesas.com>
1057
1058         * cpu/m32r.cpu : Add new model m32r2.
1059         Add new instructions.
1060         Replace occurrances of 'Mitsubishi' with 'Renesas'.
1061         Changed PIPE attr of push from O to OS.
1062         Care for Little-endian of M32R.
1063         * cpu/m32r.opc (CGEN_DIS_HASH, my_print_insn):
1064         Care for Little-endian of M32R.
1065         (parse_slo16): signed extension for value.
1066
1067 2004-02-20  Andrew Cagney  <cagney@redhat.com>
1068
1069         * m32r.opc, m32r.cpu: New files.  Written by , Doug Evans, Nick
1070         Clifton, Ben Elliston, Matthew Green, and Andrew Haley.
1071
1072         * sh.cpu, sh.opc, sh64-compact.cpu, sh64-media.cpu: New files, all
1073         written by Ben Elliston.
1074
1075 2004-01-14  Richard Sandiford  <rsandifo@redhat.com>
1076
1077         * frv.cpu (UNIT): Add IACC.
1078         (iacc-multiply-r-r): Use it.
1079         * frv.opc (fr400_unit_mapping): Add entry for IACC.
1080         (fr500_unit_mapping, fr550_unit_mapping): Likewise.
1081
1082 2004-01-06  Alexandre Oliva  <aoliva@redhat.com>
1083
1084         2003-12-19  Alexandre Oliva  <aoliva@redhat.com>
1085         * frv.opc (parse_ulo16, parse_uhi16, parse_d12): Fix some
1086         cut&paste errors in shifting/truncating numerical operands.
1087         2003-08-08  Alexandre Oliva  <aoliva@redhat.com>
1088         * frv.opc (parse_ulo16): Parse gotofflo and gotofffuncdesclo.
1089         (parse_uslo16): Likewise.
1090         (parse_uhi16): Parse gotoffhi and gotofffuncdeschi.
1091         (parse_d12): Parse gotoff12 and gotofffuncdesc12.
1092         (parse_s12): Likewise.
1093         2003-08-04  Alexandre Oliva  <aoliva@redhat.com>
1094         * frv.opc (parse_ulo16): Parse gotlo and gotfuncdesclo.
1095         (parse_uslo16): Likewise.
1096         (parse_uhi16): Parse gothi and gotfuncdeschi.
1097         (parse_d12): Parse got12 and gotfuncdesc12.
1098         (parse_s12): Likewise.
1099
1100 2003-10-10  Dave Brolley  <brolley@redhat.com>
1101
1102         * frv.cpu (dnpmop): New p-macro.
1103         (GRdoublek): Use dnpmop.
1104         (CPRdoublek, FRdoublei, FRdoublej, FRdoublek): Ditto.
1105         (store-double-r-r): Use (.sym regtype doublek).
1106         (r-store-double): Ditto.
1107         (store-double-r-r-u): Ditto.
1108         (conditional-store-double): Ditto.
1109         (conditional-store-double-u): Ditto.
1110         (store-double-r-simm): Ditto.
1111         (fmovs): Assign to UNIT FMALL.
1112
1113 2003-10-06  Dave Brolley  <brolley@redhat.com>
1114
1115         * frv.cpu, frv.opc: Add support for fr550.
1116
1117 2003-09-24  Dave Brolley  <brolley@redhat.com>
1118
1119         * frv.cpu (u-commit): New modelling unit for fr500.
1120         (mwtaccg): Use frv_ref_SI to reference ACC40Sk as an input operand.
1121         (commit-r): Use u-commit model for fr500.
1122         (commit): Ditto.
1123         (conditional-float-binary-op): Take profiling data as an argument.
1124         Update callers.
1125         (ne-float-binary-op): Ditto.
1126
1127 2003-09-19  Michael Snyder  <msnyder@redhat.com>
1128
1129         * frv.cpu (nldqi): Delete unimplemented instruction.
1130
1131 2003-09-12  Dave Brolley  <brolley@redhat.com>
1132
1133         * frv.cpu (u-clrgr, u-clrfr): New units of model fr500.
1134         (clear-ne-flag-r): Pass insn profiling in as an argument. Call
1135         frv_ref_SI to get input register referenced for profiling.
1136         (clear-ne-flag-all): Pass insn profiling in as an argument.
1137         (clrgr,clrfr,clrga,clrfa): Add profiling information.
1138
1139 2003-09-11  Michael Snyder  <msnyder@redhat.com>
1140
1141         * frv.cpu: Typographical corrections.
1142
1143 2003-09-09  Dave Brolley  <brolley@redhat.com>
1144
1145         * frv.cpu (media-dual-complex): Change UNIT to FMALL.
1146         (conditional-media-dual-complex, media-quad-complex): Likewise.
1147
1148 2003-09-04  Dave Brolley  <brolley@redhat.com>
1149
1150         * frv.cpu (register-transfer): Pass in all attributes in on argument.
1151         Update all callers.
1152         (conditional-register-transfer): Ditto.
1153         (cache-preload): Ditto.
1154         (floating-point-conversion): Ditto.
1155         (floating-point-neg): Ditto.
1156         (float-abs): Ditto.
1157         (float-binary-op-s): Ditto.
1158         (conditional-float-binary-op): Ditto.
1159         (ne-float-binary-op): Ditto.
1160         (float-dual-arith): Ditto.
1161         (ne-float-dual-arith): Ditto.
1162
1163 2003-09-03  Dave Brolley  <brolley@redhat.com>
1164
1165         * frv.opc (parse_A, parse_A0, parse_A1): New parse handlers.
1166         * frv.cpu (UNIT): Add IALL, FMALL, FMLOW, STORE, SCAN, DCPL, MDUALACC,
1167         MCLRACC-1.
1168         (A): Removed operand.
1169         (A0,A1): New operands replace operand A.
1170         (mnop): Now a real insn
1171         (mclracc): Removed insn.
1172         (mclracc-0, mclracc-1): New insns replace mclracc.
1173         (all insns): Use new UNIT attributes.
1174
1175 2003-08-21  Nick Clifton  <nickc@redhat.com>
1176
1177         * frv.cpu (mbtoh): Replace input parameter to u-media-dual-expand
1178         and u-media-dual-btoh with output parameter.
1179         (cmbtoh): Add profiling hack.
1180
1181 2003-08-19  Michael Snyder  <msnyder@redhat.com>
1182
1183         * frv.cpu: Fix typo, Frintkeven -> FRintkeven
1184
1185 2003-06-10  Doug Evans  <dje@sebabeach.org>
1186
1187         * frv.cpu: Add IDOC attribute.
1188
1189 2003-06-06  Andrew Cagney  <cagney@redhat.com>
1190
1191         Contributed by Red Hat.
1192         * iq2000.cpu: New file.  Written by Ben Elliston, Jeff Johnston,
1193         Stan Cox, and Frank Ch. Eigler.
1194         * iq2000.opc: New file.  Written by Ben Elliston, Frank
1195         Ch. Eigler, Chris Moller, Jeff Johnston, and Stan Cox.
1196         * iq2000m.cpu: New file.  Written by Jeff Johnston.
1197         * iq10.cpu: New file.  Written by Jeff Johnston.
1198
1199 2003-06-05  Nick Clifton  <nickc@redhat.com>
1200
1201         * frv.cpu (FRintieven): New operand.  An even-numbered only
1202         version of the FRinti operand.
1203         (FRintjeven): Likewise for FRintj.
1204         (FRintkeven): Likewise for FRintk.
1205         (mdcutssi, media-dual-word-rotate-r-r, mqsaths,
1206         media-quad-arith-sat-semantics, media-quad-arith-sat,
1207         conditional-media-quad-arith-sat, mdunpackh,
1208         media-quad-multiply-semantics, media-quad-multiply,
1209         conditional-media-quad-multiply, media-quad-complex-i,
1210         media-quad-multiply-acc-semantics, media-quad-multiply-acc,
1211         conditional-media-quad-multiply-acc, munpackh,
1212         media-quad-multiply-cross-acc-semantics, mdpackh,
1213         media-quad-multiply-cross-acc, mbtoh-semantics,
1214         media-quad-cross-multiply-cross-acc-semantics,
1215         media-quad-cross-multiply-cross-acc, mbtoh, mhtob-semantics,
1216         media-quad-cross-multiply-acc-semantics, cmbtoh,
1217         media-quad-cross-multiply-acc, media-quad-complex, mhtob,
1218         media-expand-halfword-to-double-semantics, mexpdhd, cmexpdhd,
1219         cmhtob): Use new operands.
1220         * frv.opc (CGEN_VERBOSE_ASSEMBLER_ERRORS): Define.
1221         (parse_even_register): New function.
1222
1223 2003-06-03  Nick Clifton  <nickc@redhat.com>
1224
1225         * frv.cpu (media-dual-word-rotate-r-r): Use a signed 6-bit
1226         immediate value not unsigned.
1227
1228 2003-06-03  Andrew Cagney  <cagney@redhat.com>
1229
1230         Contributed by Red Hat.
1231         * frv.cpu: New file.  Written by Dave Brolley, Catherine Moore,
1232         and Eric Christopher.
1233         * frv.opc: New file.  Written by Catherine Moore, and Dave
1234         Brolley.
1235         * simplify.inc: New file.  Written by Doug Evans.
1236
1237 2003-05-02  Andrew Cagney  <cagney@redhat.com>
1238
1239         * New file.
1240
1241 \f
1242 Copyright (C) 2003-2012 Free Software Foundation, Inc.
1243
1244 Copying and distribution of this file, with or without modification,
1245 are permitted in any medium without royalty provided the copyright
1246 notice and this notice are preserved.
1247
1248 Local Variables:
1249 mode: change-log
1250 left-margin: 8
1251 fill-column: 74
1252 version-control: never
1253 End: