cpu/ChangeLog

   1 2019-06-13  Stafford Horne  <shorne@gmail.com>
   2
   3         * or1korfpx.cpu (insn-opcode-float-regreg): Add SFUEQ_S, SFUNE_S,
   4         SFUGT_S, SFUGE_S, SFULT_S, SFULE_S, SFUN_S, SFUEQ_D, SFUNE_D, SFUGT_D,
   5         SFUGE_D, SFULT_D, SFULE_D, SFUN_D opcodes.
   6         (float-setflag-insn-base): New pmacro based on float-setflag-insn.
   7         (float-setflag-symantics, float-setflag-unordered-cmp-symantics,
   8         float-setflag-unordered-symantics): New pmacro for instruction
   9         symantics.
  10         (float-setflag-insn): Update to use float-setflag-insn-base.
  11         (float-setflag-unordered-insn): New pmacro for generating instructions.
  12
  13 2019-06-13  Andrey Bacherov  <avbacherov@opencores.org>
  14             Stafford Horne  <shorne@gmail.com>
  15
  16         * or1k.cpu (ORFPX64A32-MACHS): New pmacro.
  17         (ORFPX-MACHS): Removed pmacro.
  18         * or1k.opc (or1k_cgen_insn_supported): New function.
  19         (CGEN_VALIDATE_INSN_SUPPORTED): Define macro.
  20         (parse_regpair, print_regpair): New functions.
  21         * or1kcommon.cpu (h-spr, spr-shift, spr-address, h-gpr): Reorder
  22         and add comments.
  23         (h-fdr): Update comment to indicate or64.
  24         (reg-pair-reg-lo, reg-pair-reg-hi): New pmacros for register pairs.
  25         (h-fd32r): New hardware for 64-bit fpu registers.
  26         (h-i64r): New hardware for 64-bit int registers.
  27         * or1korbis.cpu (f-resv-8-1): New field.
  28         * or1korfpx.cpu (rDSF, rASF, rBSF): Update attribute to ORFPX32-MACHS.
  29         (rDDF, rADF, rBDF): Update operand comment to indicate or64.
  30         (f-rdoff-10-1, f-raoff-9-1, f-rboff-8-1): New fields.
  31         (h-roff1): New hardware.
  32         (double-field-and-ops mnemonic): New pmacro to generate operations
  33         rDD32F, rAD32F, rBD32F, rDDI and rADI.
  34         (float-regreg-insn): Update single precision generator to MACH
  35         ORFPX32-MACHS.  Add generator for or32 64-bit instructions.
  36         (float-setflag-insn): Update single precision generator to MACH
  37         ORFPX32-MACHS.  Fix double instructions from single to double
  38         precision.  Add generator for or32 64-bit instructions.
  39         (float-cust-insn cust-num): Update single precision generator to MACH
  40         ORFPX32-MACHS.  Add generator for or32 64-bit instructions.
  41         (lf-rem-s, lf-itof-s, lf-ftoi-s, lf-madd-s): Update MACH to
  42         ORFPX32-MACHS.
  43         (lf-rem-d): Fix operation from mod to rem.
  44         (lf-rem-d32, lf-itof-d32, lf-ftoi-d32, lf-madd-d32): New instruction.
  45         (lf-itof-d): Fix operands from single to double.
  46         (lf-ftoi-d): Update operand mode from DI to WI.
  47
  48 2019-05-23  Jose E. Marchesi  <jose.marchesi@oracle.com>
  49
  50         * bpf.cpu: New file.
  51         * bpf.opc: Likewise.
  52
  53 2018-06-24  Nick Clifton  <nickc@redhat.com>
  54
  55         2.32 branch created.
  56
  57 2018-10-05  Richard Henderson  <rth@twiddle.net>
  58             Stafford Horne  <shorne@gmail.com>
  59
  60         * or1korbis.cpu (insn-opcode-mac): Add opcodes for MACU and MSBU.
  61         (insn-opcode-alu-regreg): Add opcodes for MULD and MULDU.
  62         (l-mul): Fix overflow support and indentation.
  63         (l-mulu): Fix overflow support and indentation.
  64         (l-muld, l-muldu, l-msbu, l-macu): New instructions.
  65         (l-div); Remove incorrect carry behavior.
  66         (l-divu): Fix carry and overflow behavior.
  67         (l-mac): Add overflow support.
  68         (l-msb, l-msbu): Add carry and overflow support.
  69
  70 2018-10-05  Richard Henderson  <rth@twiddle.net>
  71
  72         * or1k.opc (parse_disp26): Add support for plta() relocations.
  73         (parse_disp21): New function.
  74         (or1k_rclass): New enum.
  75         (or1k_rtype): New enum.
  76         (or1k_imm16_relocs): Define new PO and SPO relocation mappings.
  77         (parse_reloc): Add new po(), gotpo() and gottppo() for LO13 relocations.
  78         (parse_imm16): Add support for the new 21bit and 13bit relocations.
  79         * or1korbis.cpu (f-disp26): Don't assume SI.
  80         (f-disp21): New pc-relative 21-bit 13 shifted to right.
  81         (insn-opcode): Add ADRP.
  82         (l-adrp): New instruction.
  83
  84 2018-10-05  Richard Henderson  <rth@twiddle.net>
  85
  86         * or1k.opc: Add RTYPE_ enum.
  87         (INVALID_STORE_RELOC): New string.
  88         (or1k_imm16_relocs): New array array.
  89         (parse_reloc): New static function that just does the parsing.
  90         (parse_imm16): New static function for generic parsing.
  91         (parse_simm16): Change to just call parse_imm16.
  92         (parse_simm16_split): New function.
  93         (parse_uimm16): Change to call parse_imm16.
  94         (parse_uimm16_split): New function.
  95         * or1korbis.cpu (simm16-split): Change to use new simm16_split.
  96         (uimm16-split): Change to use new uimm16_split.
  97
  98 2018-07-24  Alan Modra  <amodra@gmail.com>
  99
 100         PR 23430
 101         * or1kcommon.cpu (spr-reg-indices): Fix description typo.
 102
 103 2018-05-09  Sebastian Rasmussen  <sebras@gmail.com>
 104
 105         * or1kcommon.cpu (spr-reg-info): Typo fix.
 106
 107 2018-03-03  Alan Modra  <amodra@gmail.com>
 108
 109         * frv.opc: Include opintl.h.
 110         (add_next_to_vliw): Use opcodes_error_handler to print error.
 111         Standardize error message.
 112         (fr500_check_insn_major_constraints, frv_vliw_add_insn): Likewise.
 113
 114 2018-01-13  Nick Clifton  <nickc@redhat.com>
 115
 116         2.30 branch created.
 117
 118 2017-03-15  Stafford Horne  <shorne@gmail.com>
 119
 120         * or1kcommon.cpu: Add pc set semantics to also update ppc.
 121
 122 2016-10-06  Alan Modra  <amodra@gmail.com>
 123
 124         * mep.opc (expand_string): Add fall through comment.
 125
 126 2016-03-03  Alan Modra  <amodra@gmail.com>
 127
 128         * fr30.cpu (f-m4): Replace bogus comment with a better guess
 129         at what is really going on.
 130
 131 2016-03-02  Alan Modra  <amodra@gmail.com>
 132
 133         * fr30.cpu (f-m4): Replace -1 << 4 with -16.
 134
 135 2016-02-02  Andrew Burgess  <andrew.burgess@embecosm.com>
 136
 137         * epiphany.opc (epiphany_print_insn): Set info->bytes_per_line to
 138         a constant to better align disassembler output.
 139
 140 2014-07-20  Stefan Kristiansson  <stefan.kristiansson@saunalahti.fi>
 141
 142         * or1korbis.cpu (l-msync, l-psync, l-csync): New instructions.
 143
 144 2014-06-12  Alan Modra  <amodra@gmail.com>
 145
 146         * or1k.opc: Whitespace fixes.
 147
 148 2014-05-08  Stefan Kristiansson  <stefan.kristiansson@saunalahti.fi>
 149
 150         * or1korbis.cpu (h-atomic-reserve): New hardware.
 151         (h-atomic-address): Likewise.
 152         (insn-opcode): Add opcodes for LWA and SWA.
 153         (atomic-reserve): New operand.
 154         (atomic-address): Likewise.
 155         (l-lwa, l-swa): New instructions.
 156         (l-lbs): Fix typo in comment.
 157         (store-insn): Clear atomic reserve on store to atomic-address.
 158         Fix register names in fmt field.
 159
 160 2014-04-22  Christian Svensson  <blue@cmd.nu>
 161
 162         * openrisc.cpu: Delete.
 163         * openrisc.opc: Delete.
 164         * or1k.cpu: New file.
 165         * or1k.opc: New file.
 166         * or1kcommon.cpu: New file.
 167         * or1korbis.cpu: New file.
 168         * or1korfpx.cpu: New file.
 169
 170 2013-12-07  Mike Frysinger  <vapier@gentoo.org>
 171
 172         * epiphany.opc: Remove +x file mode.
 173
 174 2013-03-08  Yann Sionneau  <yann.sionneau@gmail.com>
 175
 176         PR binutils/15241
 177         * lm32.cpu (Control and status registers): Add CFG2, PSW,
 178         TLBVADDR, TLBPADDR and TLBBADVADDR.
 179
 180 2012-11-30  Oleg Raikhman  <oleg@adapteva.com>
 181             Joern Rennecke  <joern.rennecke@embecosm.com>
 182
 183         * epiphany.cpu (keyword gr-names): Move sb/sl/ip after r9/r10/r12.
 184         (load_insn): Add NO-DIS attribute to x, p, d, dpm, dl0, dl0.l.
 185         (testset-insn): Add NO_DIS attribute to t.l.
 186         (store-insn): Add NO-DIS attribute to x.l, p.l, d.l, dpm.l, dl0.l.
 187         (move-insns): Add NO-DIS attribute to cmov.l.
 188         (op-mmr-movts): Add NO-DIS attribute to movts.l.
 189         (op-mmr-movfs): Add NO-DIS attribute to movfs.l.
 190         (op-rrr): Add NO-DIS attribute to .l.
 191         (shift-rrr): Add NO-DIS attribute to .l.
 192         (op-shift-rri): Add NO-DIS attribute to i32.l.
 193         (bitrl, movtl): Add NO-DIS attribute.
 194         (op-iextrrr): Add NO-DIS attribute to .l
 195         (op-two_operands-float, op-fabs-float): Add NO-DIS attribute to f32.l.
 196         (op-fix2float-float, op-float2fix-float, op-fextop-float): Likewise.
 197
 198 2012-02-27  Alan Modra  <amodra@gmail.com>
 199
 200         * mt.opc (print_dollarhex): Trim values to 32 bits.
 201
 202 2011-12-15  Nick Clifton  <nickc@redhat.com>
 203
 204         * frv.opc (parse_uhi16): Fix handling of %hi operator on 64-bit
 205         hosts.
 206
 207 2011-10-26  Joern Rennecke  <joern.rennecke@embecosm.com>
 208
 209         * epiphany.opc (parse_branch_addr): Fix type of valuep.
 210         Cast value before printing it as a long.
 211         (parse_postindex): Fix type of valuep.
 212
 213 2011-10-25  Joern Rennecke  <joern.rennecke@embecosm.com>
 214
 215         * cpu/epiphany.cpu: New file.
 216         * cpu/epiphany.opc: New file.
 217
 218 2011-08-22  Nick Clifton  <nickc@redhat.com>
 219
 220         * fr30.cpu: Newly contributed file.
 221         * fr30.opc: Likewise.
 222         * ip2k.cpu: Likewise.
 223         * ip2k.opc: Likewise.
 224         * mep-avc.cpu: Likewise.
 225         * mep-avc2.cpu: Likewise.
 226         * mep-c5.cpu: Likewise.
 227         * mep-core.cpu: Likewise.
 228         * mep-default.cpu: Likewise.
 229         * mep-ext-cop.cpu: Likewise.
 230         * mep-fmax.cpu: Likewise.
 231         * mep-h1.cpu: Likewise.
 232         * mep-ivc2.cpu: Likewise.
 233         * mep-rhcop.cpu: Likewise.
 234         * mep-sample-ucidsp.cpu: Likewise.
 235         * mep.cpu: Likewise.
 236         * mep.opc: Likewise.
 237         * openrisc.cpu: Likewise.
 238         * openrisc.opc: Likewise.
 239         * xstormy16.cpu: Likewise.
 240         * xstormy16.opc: Likewise.
 241
 242 2010-10-08  Pierre Muller  <muller@ics.u-strasbg.fr>
 243
 244         * frv.opc: #undef DEBUG.
 245
 246 2010-07-03  DJ Delorie  <dj@delorie.com>
 247
 248         * m32c.cpu (f-dsp-8-s24): Mask high byte after shifting it.
 249
 250 2010-02-11  Doug Evans  <dje@sebabeach.org>
 251
 252         * m32r.cpu (HASH-PREFIX): Delete.
 253         (duhpo, dshpo): New pmacros.
 254         (simm8, simm16): Delete HASH-PREFIX attribute, define with dshpo.
 255         (uimm3, uimm4, uimm5, uimm8, uimm16, imm1): Delete HASH-PREFIX
 256         attribute, define with dshpo.
 257         (uimm24): Delete HASH-PREFIX attribute.
 258         * m32r.opc (CGEN_PRINT_NORMAL): Delete.
 259         (print_signed_with_hash_prefix): New function.
 260         (print_unsigned_with_hash_prefix): New function.
 261         * xc16x.cpu (dowh): New pmacro.
 262         (upof16): Define with dowh, specify print handler.
 263         (qbit, qlobit, qhibit): Ditto.
 264         (upag16): Ditto.
 265         * xc16x.opc (CGEN_PRINT_NORMAL): Delete.
 266         (print_with_dot_prefix): New functions.
 267         (print_with_pof_prefix, print_with_pag_prefix): New functions.
 268
 269 2010-01-24  Doug Evans  <dje@sebabeach.org>
 270
 271         * frv.cpu (floating-point-conversion): Update call to fp conv op.
 272         (floating-point-dual-conversion, ne-floating-point-dual-conversion,
 273         conditional-floating-point-conversion, ne-floating-point-conversion,
 274         float-parallel-mul-add-double-semantics): Ditto.
 275
 276 2010-01-05  Doug Evans  <dje@sebabeach.org>
 277
 278         * m32c.cpu (f-dsp-32-u24): Fix mode of extract handler.
 279         (f-dsp-40-u20, f-dsp-40-u24): Ditto.
 280
 281 2010-01-02  Doug Evans  <dje@sebabeach.org>
 282
 283         * m32c.opc (parse_signed16): Fix typo.
 284
 285 2009-12-11  Nick Clifton  <nickc@redhat.com>
 286
 287         * frv.opc: Fix shadowed variable warnings.
 288         * m32c.opc: Fix shadowed variable warnings.
 289
 290 2009-11-14  Doug Evans  <dje@sebabeach.org>
 291
 292         Must use VOID expression in VOID context.
 293         * xc16x.cpu (mov4): Fix mode of `sequence'.
 294         (mov9, mov10): Ditto.
 295         (movbsrr, moveb1, jmprel, jmpseg, jmps): Fix mode of `if'.
 296         (callr, callseg, calls, trap, rets, reti): Ditto.
 297         (jb, jbc, jnb, jnbs): Fix mode of `if'.  Comment out no-op `sll'.
 298         (atomic, extr, extp, extp1, extpg1, extpr, extpr1): Fix mode of `cond'.
 299         (exts, exts1, extsr, extsr1, prior): Ditto.
 300
 301 2009-10-23  Doug Evans  <dje@sebabeach.org>
 302
 303         * m32c.opc (opc.h): cgen-types.h -> cgen/basic-modes.h.
 304         cgen-ops.h -> cgen/basic-ops.h.
 305
 306 2009-09-25  Alan Modra  <amodra@bigpond.net.au>
 307
 308         * m32r.cpu (stb-plus): Typo fix.
 309
 310 2009-09-23  Doug Evans  <dje@sebabeach.org>
 311
 312         * m32r.cpu (sth-plus): Fix address mode and calculation.
 313         (stb-plus): Ditto.
 314         (clrpsw): Fix mask calculation.
 315         (bset, bclr, btst): Make mode in bit calculation match expression.
 316
 317         * xc16x.cpu (rtl-version): Set to 0.8.
 318         (gr-names, ext-names,psw-names): Update, print-name -> enum-prefix,
 319         make uppercase.  Remove unnecessary name-prefix spec.
 320         (grb-names, conditioncode-names, extconditioncode-names): Ditto.
 321         (grb8-names, r8-names, regmem8-names, regdiv8-names): Ditto.
 322         (reg0-name, reg0-name1, regbmem8-names, memgr8-names): Ditto.
 323         (h-cr): New hardware.
 324         (muls): Comment out parts that won't compile, add fixme.
 325         (mulu, divl, divlu, jmpabs, jmpa-, jmprel, jbc, jnbs, callr): Ditto.
 326         (scxti, scxtmg, scxtm, bclear, bclr18, bset19, bitset, bmov): Ditto.
 327         (bmovn, band, bor, bxor, bcmp, bfldl, bfldh): Ditto.
 328
 329 2009-07-16  Doug Evans  <dje@sebabeach.org>
 330
 331         * cpu/simplify.inc (*): One line doc strings don't need \n.
 332         (df): Invoke define-full-ifield instead of claiming it's an alias.
 333         (dno): Define.
 334         (dnop): Mark as deprecated.
 335
 336 2009-06-22  Alan Modra  <amodra@bigpond.net.au>
 337
 338         * m32c.opc (parse_lab_5_3): Use correct enum.
 339
 340 2009-01-07  Hans-Peter Nilsson  <hp@axis.com>
 341
 342         * frv.cpu (mabshs): Explicitly sign-extend arguments of abs to DI.
 343         (DI-ext-HI, DI-ext-UHI, DI-ext-DI): New pmacros.
 344         (media-arith-sat-semantics): Explicitly sign- or zero-extend
 345         arguments of "operation" to DI using "mode" and the new pmacros.
 346
 347 2009-01-03  Hans-Peter Nilsson  <hp@axis.com>
 348
 349         * cris.cpu (cris-implemented-writable-specregs-v32): Correct size
 350         of number 2, PID.
 351
 352 2008-12-23  Jon Beniston <jon@beniston.com>
 353
 354         * lm32.cpu: New file.
 355         * lm32.opc: New file.
 356
 357 2008-01-29  Alan Modra  <amodra@bigpond.net.au>
 358
 359         * mt.opc (parse_imm16): Apply 2007-09-26 opcodes/mt-asm.c change
 360         to source.
 361
 362 2007-10-22  Hans-Peter Nilsson  <hp@axis.com>
 363
 364         * cris.cpu (movs, movu): Use result of extension operation when
 365         updating flags.
 366
 367 2007-07-04  Nick Clifton  <nickc@redhat.com>
 368
 369         * cris.cpu: Update copyright notice to refer to GPLv3.
 370         * frv.cpu, frv.opc, iq10.cpu, iq2000m.cpu, iq2000.opc, m32c.cpu,
 371         m32c.opc, m32r.cpu, m32r.opc, mt.cpu, mt.opc, sh64-compact.cpu,
 372         sh64-media.cpu, sh.cpu, sh.opc, simplify.inc, xc16x.cpu,
 373         xc16x.opc: Likewise.
 374         * iq2000.cpu: Fix copyright notice to refer to FSF.
 375
 376 2007-04-30  Mark Salter  <msalter@sadr.localdomain>
 377
 378         * frv.cpu (spr-names): Support new coprocessor SPR registers.
 379
 380 2007-04-20  Nick Clifton  <nickc@redhat.com>
 381
 382         * xc16x.cpu: Restore after accidentally overwriting this file with
 383         xc16x.opc.
 384
 385 2007-03-29  DJ Delorie  <dj@redhat.com>
 386
 387         * m32c.cpu (Imm-8-s4n): Fix print hook.
 388         (Lab-24-8, Lab-32-8, Lab-40-8): Fix.
 389         (arith-jnz-imm4-dst-defn): Make relaxable.
 390         (arith-jnz16-imm4-dst-defn): Fix encodings.
 391
 392 2007-03-20  DJ Delorie  <dj@redhat.com>
 393
 394         * m32c.cpu (f-dsp-40-u20, f-dsp-48-u20, Dsp-40-u20, Dsp-40-u20,
 395         mem20): New.
 396         (src16-16-20-An-relative-*): New.
 397         (dst16-*-20-An-relative-*): New.
 398         (dst16-16-16sa-*): New
 399         (dst16-16-16ar-*): New
 400         (dst32-16-16sa-Unprefixed-*): New
 401         (jsri): Fix operands.
 402         (setzx): Fix encoding.
 403
 404 2007-03-08  Alan Modra  <amodra@bigpond.net.au>
 405
 406         * m32r.opc: Formatting.
 407
 408 2006-05-22  Nick Clifton  <nickc@redhat.com>
 409
 410         * iq2000.cpu: Fix include paths for iq2000m.cpu and iq10.cpu.
 411
 412 2006-04-10  DJ Delorie  <dj@redhat.com>
 413
 414         * m32c.opc (parse_unsigned_bitbase): Take a new parameter which
 415         decides if this function accepts symbolic constants or not.
 416         (parse_signed_bitbase): Likewise.
 417         (parse_unsigned_bitbase8): Pass the new parameter.
 418         (parse_unsigned_bitbase11): Likewise.
 419         (parse_unsigned_bitbase16): Likewise.
 420         (parse_unsigned_bitbase19): Likewise.
 421         (parse_unsigned_bitbase27): Likewise.
 422         (parse_signed_bitbase8): Likewise.
 423         (parse_signed_bitbase11): Likewise.
 424         (parse_signed_bitbase19): Likewise.
 425
 426 2006-03-13  DJ Delorie  <dj@redhat.com>
 427
 428         * m32c.cpu (Bit3-S): New.
 429         (btst:s): New.
 430         * m32c.opc (parse_bit3_S): New.
 431
 432         * m32c.cpu (decimal-subtraction16-insn): Add second operand.
 433         (btst): Add optional :G suffix for MACH32.
 434         (or.b:S): New.
 435         (pop.w:G): Add optional :G suffix for MACH16.
 436         (push.b.imm): Fix syntax.
 437
 438 2006-03-10  DJ Delorie  <dj@redhat.com>
 439
 440         * m32c.cpu (mul.l): New.
 441         (mulu.l): New.
 442
 443 2006-03-03 Shrirang Khisti <shrirangk@kpitcummins.com)
 444
 445         * xc16x.opc (parse_hash): Return NULL if the input was parsed or
 446         an error message otherwise.
 447         (parse_dot, parse_pof, parse_pag, parse_sof, parse_seg): Likewise.
 448         Fix up comments to correctly describe the functions.
 449
 450 2006-02-24  DJ Delorie  <dj@redhat.com>
 451
 452         * m32c.cpu (RL_TYPE): New attribute, with macros.
 453         (Lab-8-24): Add RELAX.
 454         (unary-insn-defn-g, binary-arith-imm-dst-defn,
 455         binary-arith-imm4-dst-defn): Add 1ADDR attribute.
 456         (binary-arith-src-dst-defn): Add 2ADDR attribute.
 457         (jcnd16-5, jcnd16, jcnd32, jmp16.s, jmp16.b, jmp16.w, jmp16.a,
 458         jmp32.s, jmp32.b, jmp32.w, jmp32.a, jsr16.w, jsr16.a): Add JUMP
 459         attribute.
 460         (jsri16, jsri32): Add 1ADDR attribute.
 461         (jsr32.w, jsr32.a): Add JUMP attribute.
 462
 463 2006-02-17  Shrirang Khisti  <shrirangk@kpitcummins.com>
 464             Anil Paranjape   <anilp1@kpitcummins.com>
 465             Shilin Shakti    <shilins@kpitcummins.com>
 466
 467         * xc16x.cpu: New file containing complete CGEN specific XC16X CPU
 468         description.
 469         * xc16x.opc: New file containing supporting XC16C routines.
 470
 471 2006-02-10  Nick Clifton  <nickc@redhat.com>
 472
 473         * iq2000.opc (parse_hi16): Truncate shifted values to 16 bits.
 474
 475 2006-01-06  DJ Delorie  <dj@redhat.com>
 476
 477         * m32c.cpu (mov.w:q): Fix mode.
 478         (push32.b.imm): Likewise, for the comment.
 479
 480 2005-12-16  Nathan Sidwell  <nathan@codesourcery.com>
 481
 482         Second part of ms1 to mt renaming.
 483         * mt.cpu (define-arch, define-isa): Set name to mt.
 484         (define-mach): Adjust.
 485         * mt.opc (CGEN_ASM_HASH): Update.
 486         (mt_asm_hash, mt_cgen_insn_supported): Renamed.
 487         (parse_loopsize, parse_imm16): Adjust.
 488
 489 2005-12-13  DJ Delorie  <dj@redhat.com>
 490
 491         * m32c.cpu (jsri): Fix order so register names aren't treated as
 492         symbols.
 493         (indexb, indexbd, indexbs, indexl, indexld, indexls, indexw,
 494         indexwd, indexws): Fix encodings.
 495
 496 2005-12-12  Nathan Sidwell  <nathan@codesourcery.com>
 497
 498         * mt.cpu: Rename from ms1.cpu.
 499         * mt.opc: Rename from ms1.opc.
 500
 501 2005-12-06  Hans-Peter Nilsson  <hp@axis.com>
 502
 503         * cris.cpu (simplecris-common-writable-specregs)
 504         (simplecris-common-readable-specregs): Split from
 505         simplecris-common-specregs.  All users changed.
 506         (cris-implemented-writable-specregs-v0)
 507         (cris-implemented-readable-specregs-v0): Similar from
 508         cris-implemented-specregs-v0.
 509         (cris-implemented-writable-specregs-v3)
 510         (cris-implemented-readable-specregs-v3)
 511         (cris-implemented-writable-specregs-v8)
 512         (cris-implemented-readable-specregs-v8)
 513         (cris-implemented-writable-specregs-v10)
 514         (cris-implemented-readable-specregs-v10)
 515         (cris-implemented-writable-specregs-v32)
 516         (cris-implemented-readable-specregs-v32): Similar.
 517         (bdap-32-pc, move-m-pcplus-p0, move-m-spplus-p8): New
 518         insns and specializations.
 519
 520 2005-11-08  Nathan Sidwell  <nathan@codesourcery.com>
 521
 522         Add ms2
 523         * ms1.cpu (ms2, ms2bf): New architecture variant, cpu, machine and
 524         model.
 525         (f-uu8, f-uu1, f-imm16l, f-loopo, f-cb1sel, f-cb2sel, f-cb1incr,
 526         f-cb2incr, f-rc3): New fields.
 527         (LOOP): New instruction.
 528         (JAL-HAZARD): New hazard.
 529         (imm16o, loopsize, imm16l, rc3, cb1sel, cb2sel, cb1incr, cb2incr):
 530         New operands.
 531         (mul, muli, dbnz, iflush): Enable for ms2
 532         (jal, reti): Has JAL-HAZARD.
 533         (ldctxt, ldfb, stfb): Only ms1.
 534         (fbcb): Only ms1,ms1-003.
 535         (wfbinc, mefbinc, wfbincr, mwfbincr, fbcbincs, mfbcbincs,
 536         fbcbincrs, mfbcbincrs): Enable for ms2.
 537         (loop, loopu, dfbc, dwfb, fbwfb, dfbr): New ms2 insns.
 538         * ms1.opc (parse_loopsize): New.
 539         (parse_imm16): hi16/lo16 relocs are applicable to IMM16L.
 540         (print_pcrel): New.
 541
 542 2005-10-28  Dave Brolley  <brolley@redhat.com>
 543
 544         Contribute the following change:
 545         2003-09-24  Dave Brolley  <brolley@redhat.com>
 546
 547         * frv.opc: Use CGEN_ATTR_VALUE_ENUM_TYPE in place of
 548         CGEN_ATTR_VALUE_TYPE.
 549         * m32c.opc (m32c_cgen_insn_supported): Use CGEN_INSN_BITSET_ATTR_VALUE.
 550         Use cgen_bitset_intersect_p.
 551
 552 2005-10-27  DJ Delorie  <dj@redhat.com>
 553
 554         * m32c.cpu (Imm-8-s4n, Imm-12-s4n): New.
 555         (arith-jnz16-imm4-dst-defn, arith-jnz32-imm4-dst-defn,
 556         arith-jnz-imm4-dst-mach, arith-jnz-imm4-dst): Keep track of which
 557         imm operand is needed.
 558         (adjnz, sbjnz): Pass the right operands.
 559         (unary-insn-defn, unary16-defn, unary32-defn, unary-insn-mach,
 560         unary-insn): Add -g variants for opcodes that need to support :G.
 561         (not.BW:G, push.BW:G): Call it.
 562         (stzx16-imm8-imm8-dsp8sb, stzx16-imm8-imm8-dsp8fb,
 563         stzx16-imm8-imm8-abs16): Fix operand typos.
 564         * m32c.opc (m32c_asm_hash): Support bnCND.
 565         (parse_signed4n, print_signed4n): New.
 566
 567 2005-10-26  DJ Delorie  <dj@redhat.com>
 568
 569         * m32c.cpu (f-dsp-8-s24, Dsp-8-s24): New.
 570         (mov-dspsp-dst-defn, mov-src-dspsp-defn, mov16-dspsp-dst-defn,
 571         mov16-src-dspsp-defn, mov32-dspsp-dst-defn, mov32-src-dspsp-defn):
 572         dsp8[sp] is signed.
 573         (mov.WL:S #imm,A0/A1): dsp24 is signed (i.e. -0x800000..0xffffff).
 574         (mov.BW:S r0,r1): Fix typo r1l->r1.
 575         (tst): Allow :G suffix.
 576         * m32c.opc (parse_signed24): New, for -0x800000..0xffffff.
 577
 578 2005-10-26  Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
 579
 580         * m32r.opc (parse_hi16): Do not assume a 32-bit host word size.
 581
 582 2005-10-25  DJ Delorie  <dj@redhat.com>
 583
 584         * m32c.cpu (add16-bQ-sp,add16-wQ-sp): Fix to allow either width by
 585         making one a macro of the other.
 586
 587 2005-10-21  DJ Delorie  <dj@redhat.com>
 588
 589         * m32c.cpu (lde, ste): Add dsp[a0] and [a1a] addressing.
 590         (indexb, indexbd, indexbs, indexw, indexwd, indexws, indexl,
 591         indexld, indexls): .w variants have `1' bit.
 592         (rot32.b): QI, not SI.
 593         (rot32.w): HI, not SI.
 594         (xchg16): HI for .w variant.
 595
 596 2005-10-19  Nick Clifton  <nickc@redhat.com>
 597
 598         * m32r.opc (parse_slo16): Fix bad application of previous patch.
 599
 600 2005-10-18  Andreas Schwab  <schwab@suse.de>
 601
 602         * m32r.opc (parse_slo16): Better version of previous patch.
 603
 604 2005-10-14  Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
 605
 606         * cpu/m32r.opc (parse_slo16): Do not assume a 32-bit host word
 607         size.
 608
 609 2005-07-25  DJ Delorie  <dj@redhat.com>
 610
 611         * m32c.opc (parse_unsigned8): Add %dsp8().
 612         (parse_signed8): Add %hi8().
 613         (parse_unsigned16): Add %dsp16().
 614         (parse_signed16): Add %lo16() and %hi16().
 615         (parse_lab_5_3): Make valuep a bfd_vma *.
 616
 617 2005-07-18  Nick Clifton  <nickc@redhat.com>
 618
 619         * m32c.cpu (f-16-8, f-24-8, f-32-16, f-dsp-8-u24): New opcode
 620         components.
 621         (f-lab32-jmp-s): Fix insertion sequence.
 622         (Dsp-8-u24, Lab-5-3, Lab32-jmp-s): New operands.
 623         (Dsp-40-s8): Make parameter be signed.
 624         (Dsp-40-s16): Likewise.
 625         (Dsp-48-s8): Likewise.
 626         (Dsp-48-s16): Likewise.
 627         (Imm-13-u3): Likewise. (Despite its name!)
 628         (BitBase16-16-s8): Make the parameter be unsigned.
 629         (BitBase16-8-u11-S): Likewise.
 630         (Lab-8-8, Lab-8-16, Lab-16-8, jcnd16-5, jcnd16, jcnd32, jmp16.s,
 631         jmp16.b, jmp16.w, jmp32.s, jmp32.b, jmp32.w, jsp16.w, jsr32.w): Allow
 632         relaxation.
 633
 634         * m32c.opc: Fix formatting.
 635         Use safe-ctype.h instead of ctype.h
 636         Move duplicated code sequences into a macro.
 637         Fix compile time warnings about signedness mismatches.
 638         Remove dead code.
 639         (parse_lab_5_3): New parser function.
 640
 641 2005-07-16  Jim Blandy  <jimb@redhat.com>
 642
 643         * m32c.opc (m32c_cgen_insn_supported): Use int, not CGEN_BITSET,
 644         to represent isa sets.
 645
 646 2005-07-15  Jim Blandy  <jimb@redhat.com>
 647
 648         * m32c.cpu, m32c.opc: Fix copyright.
 649
 650 2005-07-14  Jim Blandy  <jimb@redhat.com>
 651
 652         * m32c.cpu, m32c.opc: Machine description for the Renesas M32C.
 653
 654 2005-07-14  Alan Modra  <amodra@bigpond.net.au>
 655
 656         * ms1.opc (print_dollarhex): Correct format string.
 657
 658 2005-07-06  Alan Modra  <amodra@bigpond.net.au>
 659
 660         * iq2000.cpu: Include from binutils cpu dir.
 661
 662 2005-07-05  Nick Clifton  <nickc@redhat.com>
 663
 664         * iq2000.opc (parse_lo16, parse_mlo16): Make value parameter
 665         unsigned in order to avoid compile time warnings about sign
 666         conflicts.
 667
 668         * ms1.opc (parse_*): Likewise.
 669         (parse_imm16): Use a "void *" as it is passed both signed and
 670         unsigned arguments.
 671
 672 2005-07-01  Nick Clifton  <nickc@redhat.com>
 673
 674         * frv.opc: Update to ISO C90 function declaration style.
 675         * iq2000.opc: Likewise.
 676         * m32r.opc: Likewise.
 677         * sh.opc: Likewise.
 678
 679 2005-06-15  Dave Brolley  <brolley@redhat.com>
 680
 681         Contributed by Red Hat.
 682         * ms1.cpu: New file.  Written by Nick Clifton, Stan Cox.
 683         * ms1.opc: New file.  Written by Stan Cox.
 684
 685 2005-05-10  Nick Clifton  <nickc@redhat.com>
 686
 687         * Update the address and phone number of the FSF organization in
 688         the GPL notices in the following files:
 689         cris.cpu, frv.cpu, frv.opc, iq10.cpu, iq2000.opc, iq2000m.cpu,
 690         m32r.cpu, m32r.opc, sh.cpu, sh.opc, sh64-compact.cpu,
 691         sh64-media.cpu, simplify.inc
 692
 693 2005-02-24  Alan Modra  <amodra@bigpond.net.au>
 694
 695         * frv.opc (parse_A): Warning fix.
 696
 697 2005-02-23  Nick Clifton  <nickc@redhat.com>
 698
 699         * frv.opc: Fixed compile time warnings about differing signed'ness
 700         of pointers passed to functions.
 701         * m32r.opc: Likewise.
 702
 703 2005-02-11  Nick Clifton  <nickc@redhat.com>
 704
 705         * iq2000.opc (parse_jtargq10): Change type of valuep argument to
 706         'bfd_vma *' in order avoid compile time warning message.
 707
 708 2005-01-28  Hans-Peter Nilsson  <hp@axis.com>
 709
 710         * cris.cpu (mstep): Add missing insn.
 711
 712 2005-01-25  Alexandre Oliva  <aoliva@redhat.com>
 713
 714         2004-11-10  Alexandre Oliva  <aoliva@redhat.com>
 715         * frv.cpu: Add support for TLS annotations in loads and calll.
 716         * frv.opc (parse_symbolic_address): New.
 717         (parse_ldd_annotation): New.
 718         (parse_call_annotation): New.
 719         (parse_ld_annotation): New.
 720         (parse_ulo16, parse_uslo16): Use parse_symbolic_address.
 721         Introduce TLS relocations.
 722         (parse_d12, parse_s12, parse_u12): Likewise.
 723         (parse_uhi16): Likewise.  Fix constant checking on 64-bit host.
 724         (parse_call_label, print_at): New.
 725
 726 2004-12-21  Mikael Starvik  <starvik@axis.com>
 727
 728         * cris.cpu (cris-set-mem): Correct integral write semantics.
 729
 730 2004-11-29  Hans-Peter Nilsson  <hp@axis.com>
 731
 732         * cris.cpu: New file.
 733
 734 2004-11-15  Michael K. Lechner <mike.lechner@gmail.com>
 735
 736         * iq2000.cpu: Added quotes around macro arguments so that they
 737         will work with newer versions of guile.
 738
 739 2004-10-27  Nick Clifton  <nickc@redhat.com>
 740
 741         * iq2000m.cpu (pkrlr1, pkrlr30, rbr1, rbr30, rxr1, rxr30, wbr1,
 742         wbr1u, wbr30, wbr30u, wxr1, wxr1u, wxr30, wxr30u): Add an index
 743         operand.
 744         * iq2000.cpu (dnop index): Rename to _index to avoid complications
 745         with guile.
 746
 747 2004-08-27  Richard Sandiford  <rsandifo@redhat.com>
 748
 749         * frv.cpu (cfmovs): Change UNIT attribute to FMALL.
 750
 751 2004-05-15  Nick Clifton  <nickc@redhat.com>
 752
 753         * iq2000.opc (iq2000_cgen_insn_supported): Make 'insn' argument const.
 754
 755 2004-03-30  Kazuhiro Inaoka  <inaoka.kazuhiro@renesas.com>
 756
 757         * m32r.opc (parse_hi16): Fixed shigh(0xffff8000) bug.
 758
 759 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
 760
 761         * frv.cpu (define-arch frv): Add fr450 mach.
 762         (define-mach fr450): New.
 763         (define-model fr450): New.  Add profile units to every fr450 insn.
 764         (define-attr UNIT): Add MDCUTSSI.
 765         (define-attr FR450-MAJOR): New enum.  Add to every fr450 insn.
 766         (define-attr AUDIO): New boolean.
 767         (f-LRAE, f-LRAD, f-LRAS, f-TLBPRopx, f-TLBPRL)
 768         (f-LRA-null, f-TLBPR-null): New fields.
 769         (scr0, scr1, scr2, scr3, imavr1, damvr1, cxnr, ttbr)
 770         (tplr, tppr, tpxr, timerh, timerl, timerd, btbr): New SPRs.
 771         (LRAE, LRAD, LRAS, TLBPRopx, TLBPRL): New operands.
 772         (LRA-null, TLBPR-null): New macros.
 773         (iacc-multiply-r-r, slass, scutss, int-arith-ss-r-r): Add AUDIO attr.
 774         (load-real-address): New macro.
 775         (lrai, lrad, tlbpr): New instructions.
 776         (media-cut-acc, media-cut-acc-ss): Add fr450-major argument.
 777         (mcut, mcuti, mcutss, mcutssi): Adjust accordingly.
 778         (mdcutssi): Change UNIT attribute to MDCUTSSI.
 779         (media-low-clear-semantics, media-scope-limit-semantics)
 780         (media-quad-limit, media-quad-shift): New macros.
 781         (mqlclrhs, mqlmths, mqsllhi, mqsrahi): New instructions.
 782         * frv.opc (frv_is_branch_major, frv_is_float_major, frv_is_media_major)
 783         (frv_is_branch_insn, frv_is_float_insn, frv_is_media_insn)
 784         (frv_vliw_reset, frv_vliw_add_insn): Handle bfd_mach_fr450.
 785         (fr450_unit_mapping): New array.
 786         (fr400_unit_mapping, fr500_unit_mapping, fr550_unit_mapping): Add entry
 787         for new MDCUTSSI unit.
 788         (fr450_check_insn_major_constraints): New function.
 789         (check_insn_major_constraints): Use it.
 790
 791 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
 792
 793         * frv.cpu (nsdiv, nudiv, nsdivi, nudivi): Remove fr400 profiling unit.
 794         (scutss): Change unit to I0.
 795         (calll, callil, ccalll): Add missing FR550-MAJOR and profile unit.
 796         (mqsaths): Fix FR400-MAJOR categorization.
 797         (media-quad-multiply-cross-acc, media-quad-cross-multiply-cross-acc)
 798         (media-quad-cross-multiply-acc): Change unit from MDUALACC to FMALL.
 799         * frv.opc (fr400_check_insn_major_constraints): Check for (M-2,M-1)
 800         combinations.
 801
 802 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
 803
 804         * frv.cpu (r-store, r-store-dual, r-store-quad): Delete.
 805         (rstb, rsth, rst, rstd, rstq): Delete.
 806         (rstbf, rsthf, rstf, rstdf, rstqf): Delete.
 807
 808 2004-02-23  Nick Clifton  <nickc@redhat.com>
 809
 810         * Apply these patches from Renesas:
 811
 812         2004-02-10  Kazuhiro Inaoka  <inaoka.kazuhiro@renesas.com>
 813
 814         * cpu/m32r.opc (my_print_insn): Fixed incorrect output when
 815         disassembling codes for 0x*2 addresses.
 816
 817         2003-12-15  Kazuhiro Inaoka  <inaoka.kazuhiro@renesas.com>
 818
 819         * cpu/m32r.cpu: Add PIPE_O attribute to "pop" instruction.
 820
 821         2003-12-03  Kazuhiro Inaoka  <inaoka.kazuhiro@renesas.com>
 822
 823         * cpu/m32r.cpu : Add new model m32r2.
 824         Add new instructions.
 825         Replace occurrances of 'Mitsubishi' with 'Renesas'.
 826         Changed PIPE attr of push from O to OS.
 827         Care for Little-endian of M32R.
 828         * cpu/m32r.opc (CGEN_DIS_HASH, my_print_insn):
 829         Care for Little-endian of M32R.
 830         (parse_slo16): signed extension for value.
 831
 832 2004-02-20  Andrew Cagney  <cagney@redhat.com>
 833
 834         * m32r.opc, m32r.cpu: New files.  Written by , Doug Evans, Nick
 835         Clifton, Ben Elliston, Matthew Green, and Andrew Haley.
 836
 837         * sh.cpu, sh.opc, sh64-compact.cpu, sh64-media.cpu: New files, all
 838         written by Ben Elliston.
 839
 840 2004-01-14  Richard Sandiford  <rsandifo@redhat.com>
 841
 842         * frv.cpu (UNIT): Add IACC.
 843         (iacc-multiply-r-r): Use it.
 844         * frv.opc (fr400_unit_mapping): Add entry for IACC.
 845         (fr500_unit_mapping, fr550_unit_mapping): Likewise.
 846
 847 2004-01-06  Alexandre Oliva  <aoliva@redhat.com>
 848
 849         2003-12-19  Alexandre Oliva  <aoliva@redhat.com>
 850         * frv.opc (parse_ulo16, parse_uhi16, parse_d12): Fix some
 851         cut&paste errors in shifting/truncating numerical operands.
 852         2003-08-08  Alexandre Oliva  <aoliva@redhat.com>
 853         * frv.opc (parse_ulo16): Parse gotofflo and gotofffuncdesclo.
 854         (parse_uslo16): Likewise.
 855         (parse_uhi16): Parse gotoffhi and gotofffuncdeschi.
 856         (parse_d12): Parse gotoff12 and gotofffuncdesc12.
 857         (parse_s12): Likewise.
 858         2003-08-04  Alexandre Oliva  <aoliva@redhat.com>
 859         * frv.opc (parse_ulo16): Parse gotlo and gotfuncdesclo.
 860         (parse_uslo16): Likewise.
 861         (parse_uhi16): Parse gothi and gotfuncdeschi.
 862         (parse_d12): Parse got12 and gotfuncdesc12.
 863         (parse_s12): Likewise.
 864
 865 2003-10-10  Dave Brolley  <brolley@redhat.com>
 866
 867         * frv.cpu (dnpmop): New p-macro.
 868         (GRdoublek): Use dnpmop.
 869         (CPRdoublek, FRdoublei, FRdoublej, FRdoublek): Ditto.
 870         (store-double-r-r): Use (.sym regtype doublek).
 871         (r-store-double): Ditto.
 872         (store-double-r-r-u): Ditto.
 873         (conditional-store-double): Ditto.
 874         (conditional-store-double-u): Ditto.
 875         (store-double-r-simm): Ditto.
 876         (fmovs): Assign to UNIT FMALL.
 877
 878 2003-10-06  Dave Brolley  <brolley@redhat.com>
 879
 880         * frv.cpu, frv.opc: Add support for fr550.
 881
 882 2003-09-24  Dave Brolley  <brolley@redhat.com>
 883
 884         * frv.cpu (u-commit): New modelling unit for fr500.
 885         (mwtaccg): Use frv_ref_SI to reference ACC40Sk as an input operand.
 886         (commit-r): Use u-commit model for fr500.
 887         (commit): Ditto.
 888         (conditional-float-binary-op): Take profiling data as an argument.
 889         Update callers.
 890         (ne-float-binary-op): Ditto.
 891
 892 2003-09-19  Michael Snyder  <msnyder@redhat.com>
 893
 894         * frv.cpu (nldqi): Delete unimplemented instruction.
 895
 896 2003-09-12  Dave Brolley  <brolley@redhat.com>
 897
 898         * frv.cpu (u-clrgr, u-clrfr): New units of model fr500.
 899         (clear-ne-flag-r): Pass insn profiling in as an argument. Call
 900         frv_ref_SI to get input register referenced for profiling.
 901         (clear-ne-flag-all): Pass insn profiling in as an argument.
 902         (clrgr,clrfr,clrga,clrfa): Add profiling information.
 903
 904 2003-09-11  Michael Snyder  <msnyder@redhat.com>
 905
 906         * frv.cpu: Typographical corrections.
 907
 908 2003-09-09  Dave Brolley  <brolley@redhat.com>
 909
 910         * frv.cpu (media-dual-complex): Change UNIT to FMALL.
 911         (conditional-media-dual-complex, media-quad-complex): Likewise.
 912
 913 2003-09-04  Dave Brolley  <brolley@redhat.com>
 914
 915         * frv.cpu (register-transfer): Pass in all attributes in on argument.
 916         Update all callers.
 917         (conditional-register-transfer): Ditto.
 918         (cache-preload): Ditto.
 919         (floating-point-conversion): Ditto.
 920         (floating-point-neg): Ditto.
 921         (float-abs): Ditto.
 922         (float-binary-op-s): Ditto.
 923         (conditional-float-binary-op): Ditto.
 924         (ne-float-binary-op): Ditto.
 925         (float-dual-arith): Ditto.
 926         (ne-float-dual-arith): Ditto.
 927
 928 2003-09-03  Dave Brolley  <brolley@redhat.com>
 929
 930         * frv.opc (parse_A, parse_A0, parse_A1): New parse handlers.
 931         * frv.cpu (UNIT): Add IALL, FMALL, FMLOW, STORE, SCAN, DCPL, MDUALACC,
 932         MCLRACC-1.
 933         (A): Removed operand.
 934         (A0,A1): New operands replace operand A.
 935         (mnop): Now a real insn
 936         (mclracc): Removed insn.
 937         (mclracc-0, mclracc-1): New insns replace mclracc.
 938         (all insns): Use new UNIT attributes.
 939
 940 2003-08-21  Nick Clifton  <nickc@redhat.com>
 941
 942         * frv.cpu (mbtoh): Replace input parameter to u-media-dual-expand
 943         and u-media-dual-btoh with output parameter.
 944         (cmbtoh): Add profiling hack.
 945
 946 2003-08-19  Michael Snyder  <msnyder@redhat.com>
 947
 948         * frv.cpu: Fix typo, Frintkeven -> FRintkeven
 949
 950 2003-06-10  Doug Evans  <dje@sebabeach.org>
 951
 952         * frv.cpu: Add IDOC attribute.
 953
 954 2003-06-06  Andrew Cagney  <cagney@redhat.com>
 955
 956         Contributed by Red Hat.
 957         * iq2000.cpu: New file.  Written by Ben Elliston, Jeff Johnston,
 958         Stan Cox, and Frank Ch. Eigler.
 959         * iq2000.opc: New file.  Written by Ben Elliston, Frank
 960         Ch. Eigler, Chris Moller, Jeff Johnston, and Stan Cox.
 961         * iq2000m.cpu: New file.  Written by Jeff Johnston.
 962         * iq10.cpu: New file.  Written by Jeff Johnston.
 963
 964 2003-06-05  Nick Clifton  <nickc@redhat.com>
 965
 966         * frv.cpu (FRintieven): New operand.  An even-numbered only
 967         version of the FRinti operand.
 968         (FRintjeven): Likewise for FRintj.
 969         (FRintkeven): Likewise for FRintk.
 970         (mdcutssi, media-dual-word-rotate-r-r, mqsaths,
 971         media-quad-arith-sat-semantics, media-quad-arith-sat,
 972         conditional-media-quad-arith-sat, mdunpackh,
 973         media-quad-multiply-semantics, media-quad-multiply,
 974         conditional-media-quad-multiply, media-quad-complex-i,
 975         media-quad-multiply-acc-semantics, media-quad-multiply-acc,
 976         conditional-media-quad-multiply-acc, munpackh,
 977         media-quad-multiply-cross-acc-semantics, mdpackh,
 978         media-quad-multiply-cross-acc, mbtoh-semantics,
 979         media-quad-cross-multiply-cross-acc-semantics,
 980         media-quad-cross-multiply-cross-acc, mbtoh, mhtob-semantics,
 981         media-quad-cross-multiply-acc-semantics, cmbtoh,
 982         media-quad-cross-multiply-acc, media-quad-complex, mhtob,
 983         media-expand-halfword-to-double-semantics, mexpdhd, cmexpdhd,
 984         cmhtob): Use new operands.
 985         * frv.opc (CGEN_VERBOSE_ASSEMBLER_ERRORS): Define.
 986         (parse_even_register): New function.
 987
 988 2003-06-03  Nick Clifton  <nickc@redhat.com>
 989
 990         * frv.cpu (media-dual-word-rotate-r-r): Use a signed 6-bit
 991         immediate value not unsigned.
 992
 993 2003-06-03  Andrew Cagney  <cagney@redhat.com>
 994
 995         Contributed by Red Hat.
 996         * frv.cpu: New file.  Written by Dave Brolley, Catherine Moore,
 997         and Eric Christopher.
 998         * frv.opc: New file.  Written by Catherine Moore, and Dave
 999         Brolley.
1000         * simplify.inc: New file.  Written by Doug Evans.
1001
1002 2003-05-02  Andrew Cagney  <cagney@redhat.com>
1003
1004         * New file.
1005
1006 \f
1007 Copyright (C) 2003-2012 Free Software Foundation, Inc.
1008
1009 Copying and distribution of this file, with or without modification,
1010 are permitted in any medium without royalty provided the copyright
1011 notice and this notice are preserved.
1012
1013 Local Variables:
1014 mode: change-log
1015 left-margin: 8
1016 fill-column: 74
1017 version-control: never
1018 End: