[BFD][AARCH64]Properly truncate no overflow checking relocation value for load/store...

bfd/ChangeLog:

2018-06-20  Renlin Li  <renlin.li@arm.com>

	* elfxx-aarch64.c (_bfd_aarch64_elf_resolve_relocation): Use PG_OFFSET
	to resolve BFD_RELOC_AARCH64_TLSLD_LDST16_DTPREL_LO12_NC,
	BFD_RELOC_AARCH64_TLSLD_LDST32_DTPREL_LO12_NC,
	BFD_RELOC_AARCH64_TLSLD_LDST64_DTPREL_LO12_NC,
	BFD_RELOC_AARCH64_TLSLD_LDST8_DTPREL_LO12_NC,
	BFD_RELOC_AARCH64_TLSLE_LDST16_TPREL_LO12_NC,
	BFD_RELOC_AARCH64_TLSLE_LDST32_TPREL_LO12_NC,
	BFD_RELOC_AARCH64_TLSLE_LDST64_TPREL_LO12_NC,
	BFD_RELOC_AARCH64_TLSLE_LDST8_TPREL_LO12_NC.

ld/ChangeLog:

2018-06-20 Renlin Li  <renlin.li@arm.com>

	* testsuite/ld-aarch64/emit-relocs-115.d: Update test with new value.
	* testsuite/ld-aarch64/emit-relocs-534.d: Likewise.
	* testsuite/ld-aarch64/emit-relocs-555.d: Likewise.

diff --git a/bfd/ChangeLog b/bfd/ChangeLog
index d0f6668dcdec3edc5fae58543f288bb252231e1c..110115c438ea9db828c148b48cbe8e5e68078100 100644 (file)
--- a/bfd/ChangeLog
+++ b/bfd/ChangeLog
@@ -1,3 +1,15 @@
+2018-06-20  Renlin Li  <renlin.li@arm.com>
+
+       * elfxx-aarch64.c (_bfd_aarch64_elf_resolve_relocation): Use PG_OFFSET
+       to resolve BFD_RELOC_AARCH64_TLSLD_LDST16_DTPREL_LO12_NC,
+       BFD_RELOC_AARCH64_TLSLD_LDST32_DTPREL_LO12_NC,
+       BFD_RELOC_AARCH64_TLSLD_LDST64_DTPREL_LO12_NC,
+       BFD_RELOC_AARCH64_TLSLD_LDST8_DTPREL_LO12_NC,
+       BFD_RELOC_AARCH64_TLSLE_LDST16_TPREL_LO12_NC,
+       BFD_RELOC_AARCH64_TLSLE_LDST32_TPREL_LO12_NC,
+       BFD_RELOC_AARCH64_TLSLE_LDST64_TPREL_LO12_NC,
+       BFD_RELOC_AARCH64_TLSLE_LDST8_TPREL_LO12_NC.
+
 2018-06-20  Nick Clifton  <nickc@redhat.com>
 
        PR 23299

diff --git a/bfd/elfxx-aarch64.c b/bfd/elfxx-aarch64.c
index 3ea8dadf6d94fa74777b4d26a06d5effcca99a81..61a5ffb8a81bfc26fc307fb5d8c1d44ab9ddb5b1 100644 (file)
--- a/bfd/elfxx-aarch64.c
+++ b/bfd/elfxx-aarch64.c
@@ -452,26 +452,18 @@ _bfd_aarch64_elf_resolve_relocation (bfd_reloc_code_real_type r_type,
     case BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12:
     case BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12_NC:
     case BFD_RELOC_AARCH64_TLSLD_LDST16_DTPREL_LO12:
-    case BFD_RELOC_AARCH64_TLSLD_LDST16_DTPREL_LO12_NC:
     case BFD_RELOC_AARCH64_TLSLD_LDST32_DTPREL_LO12:
-    case BFD_RELOC_AARCH64_TLSLD_LDST32_DTPREL_LO12_NC:
     case BFD_RELOC_AARCH64_TLSLD_LDST64_DTPREL_LO12:
-    case BFD_RELOC_AARCH64_TLSLD_LDST64_DTPREL_LO12_NC:
     case BFD_RELOC_AARCH64_TLSLD_LDST8_DTPREL_LO12:
-    case BFD_RELOC_AARCH64_TLSLD_LDST8_DTPREL_LO12_NC:
     case BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G0:
     case BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G0_NC:
     case BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G1:
     case BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G1_NC:
     case BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G2:
     case BFD_RELOC_AARCH64_TLSLE_LDST16_TPREL_LO12:
-    case BFD_RELOC_AARCH64_TLSLE_LDST16_TPREL_LO12_NC:
     case BFD_RELOC_AARCH64_TLSLE_LDST32_TPREL_LO12:
-    case BFD_RELOC_AARCH64_TLSLE_LDST32_TPREL_LO12_NC:
     case BFD_RELOC_AARCH64_TLSLE_LDST64_TPREL_LO12:
-    case BFD_RELOC_AARCH64_TLSLE_LDST64_TPREL_LO12_NC:
     case BFD_RELOC_AARCH64_TLSLE_LDST8_TPREL_LO12:
-    case BFD_RELOC_AARCH64_TLSLE_LDST8_TPREL_LO12_NC:
       value = value + addend;
       break;
 
@@ -521,7 +513,15 @@ _bfd_aarch64_elf_resolve_relocation (bfd_reloc_code_real_type r_type,
     case BFD_RELOC_AARCH64_TLSGD_ADD_LO12_NC:
     case BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC:
     case BFD_RELOC_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC:
+    case BFD_RELOC_AARCH64_TLSLD_LDST16_DTPREL_LO12_NC:
+    case BFD_RELOC_AARCH64_TLSLD_LDST32_DTPREL_LO12_NC:
+    case BFD_RELOC_AARCH64_TLSLD_LDST64_DTPREL_LO12_NC:
+    case BFD_RELOC_AARCH64_TLSLD_LDST8_DTPREL_LO12_NC:
     case BFD_RELOC_AARCH64_TLSLE_ADD_TPREL_LO12_NC:
+    case BFD_RELOC_AARCH64_TLSLE_LDST16_TPREL_LO12_NC:
+    case BFD_RELOC_AARCH64_TLSLE_LDST32_TPREL_LO12_NC:
+    case BFD_RELOC_AARCH64_TLSLE_LDST64_TPREL_LO12_NC:
+    case BFD_RELOC_AARCH64_TLSLE_LDST8_TPREL_LO12_NC:
       value = PG_OFFSET (value + addend);
       break;
 

diff --git a/ld/ChangeLog b/ld/ChangeLog
index 235fa514574f315f0b476a897ae8ca0b1a70e9b6..4e9cc2adbb054b72b56451ba4e8ae00f6da95432 100644 (file)
--- a/ld/ChangeLog
+++ b/ld/ChangeLog
@@ -1,3 +1,9 @@
+2018-06-20 Renlin Li  <renlin.li@arm.com>
+
+       * testsuite/ld-aarch64/emit-relocs-115.d: Update test with new value.
+       * testsuite/ld-aarch64/emit-relocs-534.d: Likewise.
+       * testsuite/ld-aarch64/emit-relocs-555.d: Likewise.
+
 2018-06-19  Maciej W. Rozycki  <macro@mips.com>
 
        PR ld/22966

diff --git a/ld/testsuite/ld-aarch64/emit-relocs-115.d b/ld/testsuite/ld-aarch64/emit-relocs-115.d
index f436d32c61fca5abf7b1b59fa822fbc086dc9722..95a6e317448513a8afa0739adf3533de6fe2f90f 100644 (file)
--- a/ld/testsuite/ld-aarch64/emit-relocs-115.d
+++ b/ld/testsuite/ld-aarch64/emit-relocs-115.d
@@ -6,5 +6,5 @@
 00010000 <.text>:
    10000:      798019d6        ldrsh   x22, \[x14, #12\]
                        10000: R_AARCH64_P32_TLSLE_LDST16_TPREL_LO12_NC v2
-   10004:      79a72a28        ldrsh   x8, \[x17, #5012\]
+   10004:      79872a28        ldrsh   x8, \[x17, #916\]
                        10004: R_AARCH64_P32_TLSLE_LDST16_TPREL_LO12_NC v3

diff --git a/ld/testsuite/ld-aarch64/emit-relocs-534.d b/ld/testsuite/ld-aarch64/emit-relocs-534.d
index 121fdc4c0b2330475fff04ebd32dc66ba293382d..fe59b23182d1adff2786a6e7559a38c1c1230940 100644 (file)
--- a/ld/testsuite/ld-aarch64/emit-relocs-534.d
+++ b/ld/testsuite/ld-aarch64/emit-relocs-534.d
@@ -5,5 +5,5 @@
 0000000000010000 <.text>:
    10000:      798009d6        ldrsh   x22, \[x14, #4\]
                        10000: R_AARCH64_TLSLD_LDST16_DTPREL_LO12_NC    v2
-   10004:      79a71a28        ldrsh   x8, \[x17, #5004\]
+   10004:      79871a28        ldrsh   x8, \[x17, #908\]
                        10004: R_AARCH64_TLSLD_LDST16_DTPREL_LO12_NC    v3

diff --git a/ld/testsuite/ld-aarch64/emit-relocs-555.d b/ld/testsuite/ld-aarch64/emit-relocs-555.d
index e866b6034c4405edaf4459f2b0aa22697458075a..1e33998e3579b674e707c659facc3e5b3f988f77 100644 (file)
--- a/ld/testsuite/ld-aarch64/emit-relocs-555.d
+++ b/ld/testsuite/ld-aarch64/emit-relocs-555.d
@@ -5,5 +5,5 @@
 0000000000010000 <.text>:
    10000:      798029d6        ldrsh   x22, \[x14, #20\]
                        10000: R_AARCH64_TLSLE_LDST16_TPREL_LO12_NC     v2
-   10004:      79a73a28        ldrsh   x8, \[x17, #5020\]
+   10004:      79873a28        ldrsh   x8, \[x17, #924\]
                        10004: R_AARCH64_TLSLE_LDST16_TPREL_LO12_NC     v3