]> git.ipfire.org Git - thirdparty/binutils-gdb.git/commitdiff
Add new AArch64 FP16 FM{A|S} instructions.
authorTamar Christina <tamar.christina@arm.com>
Thu, 16 Nov 2017 16:19:37 +0000 (16:19 +0000)
committerTamar Christina <tamar.christina@arm.com>
Thu, 16 Nov 2017 16:27:35 +0000 (16:27 +0000)
This patch separates the new FP16 instructions backported from Armv8.4-a to Armv8.2-a
into a new flag order to distinguish them from the rest of the already existing optional
FP16 instructions in Armv8.2-a.

The new flag "+fp16fml" is available from Armv8.2-a and implies +fp16 and is mandatory on
Armv8.4-a.

gas/

* config/tc-aarch64.c (fp16fml): New.
* doc/c-aarch64.texi (fp16fml): New.
* testsuite/gas/aarch64/armv8_2-a-crypto-fp16.d (fp16): Make fp16fml.
* testsuite/gas/aarch64/armv8_3-a-crypto-fp16.d (fp16): Make fp16fml.

include/

* opcode/aarch64.h: (AARCH64_FEATURE_F16_FML): New.
(AARCH64_ARCH_V8_4): Enable AARCH64_FEATURE_F16_FML by default.

opcodes/

* aarch64-tbl.h (aarch64_feature_fp_16_v8_2): Require AARCH64_FEATURE_F16_FML
and AARCH64_FEATURE_F16.

gas/ChangeLog
gas/config/tc-aarch64.c
gas/doc/c-aarch64.texi
gas/testsuite/gas/aarch64/armv8_2-a-crypto-fp16.d
gas/testsuite/gas/aarch64/armv8_3-a-crypto-fp16.d
include/ChangeLog
include/opcode/aarch64.h
opcodes/ChangeLog
opcodes/aarch64-tbl.h

index 78b2f945e26581de51a9f581ec04db387d1d8354..ee1ec6fe0e5d14954aa6018abf25847f31af9415 100644 (file)
@@ -1,3 +1,10 @@
+2017-11-16  Tamar Christina  <tamar.christina@arm.com>
+
+       * config/tc-aarch64.c (fp16fml): New.
+       * doc/c-aarch64.texi (fp16fml): New.
+       * testsuite/gas/aarch64/armv8_2-a-crypto-fp16.d (fp16): Make fp16fml.
+       * testsuite/gas/aarch64/armv8_3-a-crypto-fp16.d (fp16): Make fp16fml.
+
 2017-11-16  Tamar Christina  <tamar.christina@arm.com>
 
        * opcodes/aarch64-tbl.h
index 87542376cab52dd700de312d384310280e10568a..4ae0624f1e2ccd4de1449cfaee4bf0692c2ed892 100644 (file)
@@ -8499,6 +8499,9 @@ static const struct aarch64_option_cpu_value_table aarch64_features[] = {
                        AARCH64_FEATURE (AARCH64_FEATURE_SIMD, 0)},
   {"fp16",             AARCH64_FEATURE (AARCH64_FEATURE_F16, 0),
                        AARCH64_FEATURE (AARCH64_FEATURE_FP, 0)},
+  {"fp16fml",          AARCH64_FEATURE (AARCH64_FEATURE_F16_FML, 0),
+                       AARCH64_FEATURE (AARCH64_FEATURE_FP
+                                        | AARCH64_FEATURE_F16, 0)},
   {"profile",          AARCH64_FEATURE (AARCH64_FEATURE_PROFILE, 0),
                        AARCH64_ARCH_NONE},
   {"sve",              AARCH64_FEATURE (AARCH64_FEATURE_SVE, 0),
index 7d872b0049f9e466f4d2aa7e4a82276cfb9755a5..538b103e2034f805e5fd768e93d39ff326298dae 100644 (file)
@@ -176,6 +176,9 @@ automatically cause those extensions to be disabled.
  @code{simd} and @code{compnum}.
 @item @code{dotprod} @tab ARMv8.2-A @tab ARMv8.4-A or later
  @tab Enable the Dot Product extension.  This implies @code{simd}.
+@item @code{fp16fml} @tab ARMv8.2-A @tab ARMv8.4-A or later
+ @tab Enable ARMv8.2 16-bit floating-point multiplication variant support.
+ This implies @code{fp16}.
 @end multitable
 
 @node AArch64 Syntax
index 10c7786e4ad59cce02c5eae3de9b332cc88a2fcb..244ba1424c53a3926ad7c5a15ff2f3802c7ad93e 100644 (file)
@@ -1,4 +1,4 @@
-#as: -march=armv8.2-a+crypto+sm4+sha3+fp16
+#as: -march=armv8.2-a+crypto+sm4+sha3+fp16fml
 #objdump: -dr
 
 .*:     file format .*
index 93909f17720743eb6010a022f3134aca389d991a..6a4c9e3a4421a5b6712d9ef0d9459d6eba2a991f 100644 (file)
@@ -1,4 +1,4 @@
-#as: -march=armv8.3-a+crypto+sm4+sha3+fp16
+#as: -march=armv8.3-a+crypto+sm4+sha3+fp16fml
 #source: armv8_2-a-crypto-fp16.s
 #objdump: -dr
 
index 79b6eeb7738a86e4792c4b731e4b1a6b4d5024a6..670456cecea92027368dd4b7bcbaecca23756f89 100644 (file)
@@ -1,3 +1,8 @@
+2017-11-16  Tamar Christina  <tamar.christina@arm.com>
+
+       * opcode/aarch64.h: (AARCH64_FEATURE_F16_FML): New.
+       (AARCH64_ARCH_V8_4): Enable AARCH64_FEATURE_F16_FML by default.
+
 2017-11-15  Tamar Christina  <tamar.christina@arm.com>
 
        * opcode/arm.h: (ARM_EXT2_FP16_FML): New.
index 37c4a43559147626345705eba0e80ec3236b5f65..73ebd8042225c45543d03526caf95f5f01b2a9e2 100644 (file)
@@ -61,6 +61,7 @@ typedef uint32_t aarch64_insn;
 #define AARCH64_FEATURE_RCPC   0x20000000      /* RCPC instructions.  */
 #define AARCH64_FEATURE_COMPNUM        0x40000000      /* Complex # instructions.  */
 #define AARCH64_FEATURE_DOTPROD 0x080000000     /* Dot Product instructions.  */
+#define AARCH64_FEATURE_F16_FML        0x1000000000ULL /* v8.2 FP16FML ins.  */
 
 /* Architectures are the sum of the base and extensions.  */
 #define AARCH64_ARCH_V8                AARCH64_FEATURE (AARCH64_FEATURE_V8, \
@@ -82,7 +83,8 @@ typedef uint32_t aarch64_insn;
                                                 | AARCH64_FEATURE_COMPNUM)
 #define AARCH64_ARCH_V8_4      AARCH64_FEATURE (AARCH64_ARCH_V8_3,     \
                                                 AARCH64_FEATURE_V8_4   \
-                                                | AARCH64_FEATURE_DOTPROD)
+                                                | AARCH64_FEATURE_DOTPROD \
+                                                | AARCH64_FEATURE_F16_FML)
 
 #define AARCH64_ARCH_NONE      AARCH64_FEATURE (0, 0)
 #define AARCH64_ANY            AARCH64_FEATURE (-1, 0) /* Any basic core.  */
index de2024b1d4efabe6cbc8cb698ae9a0323ba68298..84eaa6f0d854d7b93b205aa7ede993916a6877d7 100644 (file)
@@ -1,3 +1,8 @@
+2017-11-16  Tamar Christina  <tamar.christina@arm.com>
+
+       * aarch64-tbl.h (aarch64_feature_fp_16_v8_2): Require AARCH64_FEATURE_F16_FML
+       and AARCH64_FEATURE_F16.
+
 2017-11-16  Tamar Christina  <tamar.christina@arm.com>
 
        * aarch64-tbl.h (sha512h, sha512h2, sha512su0, sha512su1, eor3): New.
index ad6fae4f6fdfcfbadab8e6d844170d36c6e40526..11587dc5733ec2d62b9ab7eda253bfadb455d850 100644 (file)
@@ -2143,8 +2143,8 @@ static const aarch64_feature_set aarch64_feature_sha3 =
   AARCH64_FEATURE (AARCH64_FEATURE_V8_2 | AARCH64_FEATURE_SHA2
                   | AARCH64_FEATURE_SHA3 | AARCH64_FEATURE_SIMD | AARCH64_FEATURE_FP, 0);
 static const aarch64_feature_set aarch64_feature_fp_16_v8_2 =
-  AARCH64_FEATURE (AARCH64_FEATURE_V8_2 | AARCH64_FEATURE_F16
-                  | AARCH64_FEATURE_FP, 0);
+  AARCH64_FEATURE (AARCH64_FEATURE_V8_2 | AARCH64_FEATURE_F16_FML
+                  | AARCH64_FEATURE_F16 | AARCH64_FEATURE_FP, 0);
 
 #define CORE           &aarch64_feature_v8
 #define FP             &aarch64_feature_fp