opcodes: discriminate endianness and insn-endianness in CGEN ports

The CGEN support code in opcodes accesses instruction contents using a
couple of functions defined in cgen-opc.c: cgen_get_insn_value and
cgen_put_insn_value.  These functions use the "instruction endianness"
in the CPU description to order the read/written bytes.

The process of writing an instruction to the object file is:

  a) cgen_put_insn_value        ;; Writes out the opcodes.
  b) ARCH_cgen_insert_operand
       insert_normal
         insert_1
           cgen_put_insn_value  ;; Writes out the bytes of the
                                ;; operand.

Likewise, the process of reading an instruction from the object file
is:

  a) cgen_get_insn_value        ;; Reads the opcodes.
  b) ARCH_cgen_extract_operand
       extract_normal
         extract_1
           cgen_get_insn_value  ;; Reads in the bytes of the
                                ;; operand.

As can be seen above, cgen_{get,put}_insn_value are used to both
process the instruction opcodes (the constant fields conforming the
base instruction) and also the values of the instruction operands,
such as immediates.

This is problematic for architectures in which the endianness of
instructions is different to the endianness of data.  An example is
BPF, where instructions are always encoded big-endian but the data may
be either big or little.

This patch changes the cgen_{get,put}_insn_value functions in order to
get an extra argument with the endianness to use, and adapts the
existin callers to these functions in order to provide cd->endian or
cd->insn_endian, whatever appropriate.  Callers like extract_1 and
insert_1 pass cd->endian (since they are reading/writing operand
values) while callers reading/writing the base instruction pass
cd->insn_endian instead.

A few little adjustments have been needed in some existing CGEN based
ports:
* The BPF assembler uses cgen_put_insn_value.  It has been adapted to
  pass the new endian argument.
* The mep port has code in mep.opc that uses cgen_{get,put}_insn_value.
  It has been adapted to pass the new endianargument.  Ditto for a
  call in the assembler.

Tested with --enable-targets=all.
Regested in all supported targets.
No regressions.

include/ChangeLog:

2020-06-04  Jose E. Marchesi  <jose.marchesi@oracle.com>

	* opcode/cgen.h: Get an `endian' argument in both
	cgen_get_insn_value and cgen_put_insn_value.

opcodes/ChangeLog:

2020-06-04  Jose E. Marchesi  <jose.marchesi@oracle.com>

	* cgen-opc.c (cgen_get_insn_value): Get an `endian' argument.
	(cgen_put_insn_value): Likewise.
	(cgen_lookup_insn): Pass endianness to cgen_{get,put}_insn_value.
	* cgen-dis.in (print_insn): Likewise.
	* cgen-ibld.in (insert_1): Likewise.
	(insert_1): Likewise.
	(insert_insn_normal): Likewise.
	(extract_1): Likewise.
	* bpf-dis.c: Regenerate.
	* bpf-ibld.c: Likewise.
	* bpf-ibld.c: Likewise.
	* cgen-dis.in: Likewise.
	* cgen-ibld.in: Likewise.
	* cgen-opc.c: Likewise.
	* epiphany-dis.c: Likewise.
	* epiphany-ibld.c: Likewise.
	* fr30-dis.c: Likewise.
	* fr30-ibld.c: Likewise.
	* frv-dis.c: Likewise.
	* frv-ibld.c: Likewise.
	* ip2k-dis.c: Likewise.
	* ip2k-ibld.c: Likewise.
	* iq2000-dis.c: Likewise.
	* iq2000-ibld.c: Likewise.
	* lm32-dis.c: Likewise.
	* lm32-ibld.c: Likewise.
	* m32c-dis.c: Likewise.
	* m32c-ibld.c: Likewise.
	* m32r-dis.c: Likewise.
	* m32r-ibld.c: Likewise.
	* mep-dis.c: Likewise.
	* mep-ibld.c: Likewise.
	* mt-dis.c: Likewise.
	* mt-ibld.c: Likewise.
	* or1k-dis.c: Likewise.
	* or1k-ibld.c: Likewise.
	* xc16x-dis.c: Likewise.
	* xc16x-ibld.c: Likewise.
	* xstormy16-dis.c: Likewise.
	* xstormy16-ibld.c: Likewise.

gas/ChangeLog:

2020-06-04  Jose E. Marchesi  <jose.marchesi@oracle.com>

	* cgen.c (gas_cgen_finish_insn): Pass the endianness to
	cgen_put_insn_value.
	(gas_cgen_md_apply_fix): Likewise.
	(gas_cgen_md_apply_fix): Likewise.
	* config/tc-bpf.c (md_apply_fix): Pass data endianness to
	cgen_put_insn_value.
	* config/tc-mep.c (mep_check_ivc2_scheduling): Pass endianness to
	cgen_put_insn_value.

cpu/ChangeLog:

2020-06-02  Jose E. Marchesi  <jose.marchesi@oracle.com>

	* mep.opc (print_slot_insn): Pass the insn endianness to
	cgen_get_insn_value.

diff --git a/cpu/ChangeLog b/cpu/ChangeLog
index 30b884c9512ace0e52d9f6f1b12a727d8e506929..41ff18123423a9e1f0ca7413f03dd5df4ed2556b 100644 (file)
--- a/cpu/ChangeLog
+++ b/cpu/ChangeLog
@@ -1,3 +1,8 @@
+2020-06-02  Jose E. Marchesi  <jose.marchesi@oracle.com>
+
+       * mep.opc (print_slot_insn): Pass the insn endianness to
+       cgen_get_insn_value.
+
 2020-05-28  Jose E. Marchesi  <jose.marchesi@oracle.com>
            David Faust <david.faust@oracle.com>
 

diff --git a/cpu/mep.opc b/cpu/mep.opc
index 34e279d98e1f0a44179a6ddaa6ae622944398d44..5a4c93dc3abed96daf209ba7de076ac746903782 100644 (file)
--- a/cpu/mep.opc
+++ b/cpu/mep.opc
@@ -1271,7 +1271,7 @@ print_slot_insn (CGEN_CPU_DESC cd,
   CGEN_INSN_INT insn_value;
   CGEN_EXTRACT_INFO ex_info;
 
-  insn_value = cgen_get_insn_value (cd, buf, 32);
+  insn_value = cgen_get_insn_value (cd, buf, 32, cd->insn_endian);
 
   /* Fill in ex_info fields like read_insn would.  Don't actually call
      read_insn, since the incoming buffer is already read (and possibly

diff --git a/gas/ChangeLog b/gas/ChangeLog
index 6484c62d308eba1392933d44b36c8e9924386ae6..bb917ccc70e4da384d9832d5f2a258e8ee8e0d85 100644 (file)
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,14 @@
+2020-06-04  Jose E. Marchesi  <jose.marchesi@oracle.com>
+
+       * cgen.c (gas_cgen_finish_insn): Pass the endianness to
+       cgen_put_insn_value.
+       (gas_cgen_md_apply_fix): Likewise.
+       (gas_cgen_md_apply_fix): Likewise.
+       * config/tc-bpf.c (md_apply_fix): Pass data endianness to
+       cgen_put_insn_value.
+       * config/tc-mep.c (mep_check_ivc2_scheduling): Pass endianness to
+       cgen_put_insn_value.
+
 2020-06-04  Alan Modra  <amodra@gmail.com>
 
        * testsuite/config/default.exp: Remove global directive outside

diff --git a/gas/cgen.c b/gas/cgen.c
index b94802ebc8f8f2427c42e16862e72ef13b4fb32b..8d1867b731147811228185e86f1b802d34b35dca 100644 (file)
--- a/gas/cgen.c
+++ b/gas/cgen.c
@@ -621,7 +621,8 @@ gas_cgen_finish_insn (const CGEN_INSN *insn, CGEN_INSN_BYTES_PTR buf,
   /* If we're recording insns as numbers (rather than a string of bytes),
      target byte order handling is deferred until now.  */
 #if CGEN_INT_INSN_P
-  cgen_put_insn_value (gas_cgen_cpu_desc, (unsigned char *) f, length, *buf);
+  cgen_put_insn_value (gas_cgen_cpu_desc, (unsigned char *) f, length, *buf,
+                       gas_cgen_cpu_desc->insn_endian);
 #else
   memcpy (f, buf, byte_len);
 #endif
@@ -906,13 +907,15 @@ gas_cgen_md_apply_fix (fixS *fixP, valueT *valP, segT seg ATTRIBUTE_UNUSED)
          {
            CGEN_INSN_INT insn_value =
              cgen_get_insn_value (cd, (unsigned char *) where,
-                                  CGEN_INSN_BITSIZE (insn));
+                                  CGEN_INSN_BITSIZE (insn),
+                                   cd->insn_endian);
 
            /* ??? 0 is passed for `pc'.  */
            errmsg = CGEN_CPU_INSERT_OPERAND (cd) (cd, opindex, fields,
                                                   &insn_value, (bfd_vma) 0);
            cgen_put_insn_value (cd, (unsigned char *) where,
-                                CGEN_INSN_BITSIZE (insn), insn_value);
+                                CGEN_INSN_BITSIZE (insn), insn_value,
+                                 cd->insn_endian);
          }
 #else
          /* ??? 0 is passed for `pc'.  */

diff --git a/gas/config/tc-bpf.c b/gas/config/tc-bpf.c
index a379acbbed5f2f6750156cd79bae25bdcddfe616..7c7d22e477604ba907eb9b18059b2fcc79fd9a59 100644 (file)
--- a/gas/config/tc-bpf.c
+++ b/gas/config/tc-bpf.c
@@ -324,7 +324,8 @@ md_apply_fix (fixS *fixP, valueT *valP, segT seg)
              this code is executed only once per instruction.  */
           where = fixP->fx_frag->fr_literal + fixP->fx_where;
           cgen_put_insn_value (gas_cgen_cpu_desc, (unsigned char *) where + 1, 8,
-                               target_big_endian ? 0x01 : 0x10);
+                               target_big_endian ? 0x01 : 0x10,
+                               gas_cgen_cpu_desc->endian);
           /* Fallthrough.  */
         case BPF_OPERAND_DISP16:
           /* The PC-relative displacement fields in jump instructions

diff --git a/gas/config/tc-mep.c b/gas/config/tc-mep.c
index 26fb80ec8a89df4d549e1932bb0d17b79e569c37..6b52841fa9dacd799cb174a9fe021258007a95af 100644 (file)
--- a/gas/config/tc-mep.c
+++ b/gas/config/tc-mep.c
@@ -1111,7 +1111,7 @@ mep_check_ivc2_scheduling (void)
 
 #if CGEN_INT_INSN_P
       cgen_put_insn_value (gas_cgen_cpu_desc, (unsigned char *) temp, 32,
-                          m->buffer[0]);
+                          m->buffer[0], gas_cgen_cpu_desc->insn_endian);
 #else
       memcpy (temp, m->buffer, byte_len);
 #endif

diff --git a/include/ChangeLog b/include/ChangeLog
index df4208eda10cb660aabb849327000bcb5b98b921..e0bef674381d30cbf66006dd15ee2e548b3ab62f 100644 (file)
--- a/include/ChangeLog
+++ b/include/ChangeLog
@@ -1,3 +1,8 @@
+2020-06-04  Jose E. Marchesi  <jose.marchesi@oracle.com>
+
+       * opcode/cgen.h: Get an `endian' argument in both
+       cgen_get_insn_value and cgen_put_insn_value.
+
 2020-06-04  Jose E. Marchesi  <jemarch@gnu.org>
 
        * opcode/cgen.h (enum cgen_cpu_open_arg): New value

diff --git a/include/opcode/cgen.h b/include/opcode/cgen.h
index 3f325447b9ecd4389f21e697727c3364580cb5bb..cae279541fd4a04b69bf13c9497be41192e33f8f 100644 (file)
--- a/include/opcode/cgen.h
+++ b/include/opcode/cgen.h
@@ -1463,9 +1463,9 @@ extern const CGEN_INSN * cgen_lookup_get_insn_operands
 /* Cover fns to bfd_get/set.  */
 
 extern CGEN_INSN_INT cgen_get_insn_value
-  (CGEN_CPU_DESC, unsigned char *, int);
+  (CGEN_CPU_DESC, unsigned char *, int, int);
 extern void cgen_put_insn_value
-  (CGEN_CPU_DESC, unsigned char *, int, CGEN_INSN_INT);
+  (CGEN_CPU_DESC, unsigned char *, int, CGEN_INSN_INT, int);
 
 extern CGEN_INSN_INT cgen_get_base_insn_value
   (CGEN_CPU_DESC, unsigned char *, int);

diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index dc4c285eb06907daf4e15e18c46e0e0c465bace0..39df27efd71c372608f460aa26d086ca127908d7 100644 (file)
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,46 @@
+2020-06-03  Jose E. Marchesi  <jose.marchesi@oracle.com>
+
+       * cgen-opc.c (cgen_get_insn_value): Get an `endian' argument.
+       (cgen_put_insn_value): Likewise.
+       (cgen_lookup_insn): Pass endianness to cgen_{get,put}_insn_value.
+       * cgen-dis.in (print_insn): Likewise.
+       * cgen-ibld.in (insert_1): Likewise.
+       (insert_1): Likewise.
+       (insert_insn_normal): Likewise.
+       (extract_1): Likewise.
+       * bpf-dis.c: Regenerate.
+       * bpf-ibld.c: Likewise.
+       * bpf-ibld.c: Likewise.
+       * cgen-dis.in: Likewise.
+       * cgen-ibld.in: Likewise.
+       * cgen-opc.c: Likewise.
+       * epiphany-dis.c: Likewise.
+       * epiphany-ibld.c: Likewise.
+       * fr30-dis.c: Likewise.
+       * fr30-ibld.c: Likewise.
+       * frv-dis.c: Likewise.
+       * frv-ibld.c: Likewise.
+       * ip2k-dis.c: Likewise.
+       * ip2k-ibld.c: Likewise.
+       * iq2000-dis.c: Likewise.
+       * iq2000-ibld.c: Likewise.
+       * lm32-dis.c: Likewise.
+       * lm32-ibld.c: Likewise.
+       * m32c-dis.c: Likewise.
+       * m32c-ibld.c: Likewise.
+       * m32r-dis.c: Likewise.
+       * m32r-ibld.c: Likewise.
+       * mep-dis.c: Likewise.
+       * mep-ibld.c: Likewise.
+       * mt-dis.c: Likewise.
+       * mt-ibld.c: Likewise.
+       * or1k-dis.c: Likewise.
+       * or1k-ibld.c: Likewise.
+       * xc16x-dis.c: Likewise.
+       * xc16x-ibld.c: Likewise.
+       * xstormy16-dis.c: Likewise.
+       * xstormy16-ibld.c: Likewise.
+
 2020-06-04  Jose E. Marchesi  <jemarch@gnu.org>
 
        * cgen-dis.in (cpu_desc_list): New field `insn_endian'.

diff --git a/opcodes/bpf-dis.c b/opcodes/bpf-dis.c
index 21d9308be038a1b7f293564484b9f35a10308edf..4d01112d25f7fdfae61c82309de83ddf0e0b3b0b 100644 (file)
--- a/opcodes/bpf-dis.c
+++ b/opcodes/bpf-dis.c
@@ -376,7 +376,7 @@ print_insn (CGEN_CPU_DESC cd,
   /* Extract base part of instruction, just in case CGEN_DIS_* uses it. */
   basesize = cd->base_insn_bitsize < buflen * 8 ?
                                      cd->base_insn_bitsize : buflen * 8;
-  insn_value = cgen_get_insn_value (cd, buf, basesize);
+  insn_value = cgen_get_insn_value (cd, buf, basesize, cd->insn_endian);
 
 
   /* Fill in ex_info fields like read_insn would.  Don't actually call

diff --git a/opcodes/bpf-ibld.c b/opcodes/bpf-ibld.c
index d5fa57a1c4a6ec9b26fcf0c53737426ab76d5db8..392dcebdd27ae9374643f73aaed5c0787adc5a2b 100644 (file)
--- a/opcodes/bpf-ibld.c
+++ b/opcodes/bpf-ibld.c
@@ -88,7 +88,7 @@ insert_1 (CGEN_CPU_DESC cd,
   unsigned long x,mask;
   int shift;
 
-  x = cgen_get_insn_value (cd, bufp, word_length);
+  x = cgen_get_insn_value (cd, bufp, word_length, cd->endian);
 
   /* Written this way to avoid undefined behaviour.  */
   mask = (((1L << (length - 1)) - 1) << 1) | 1;
@@ -98,7 +98,7 @@ insert_1 (CGEN_CPU_DESC cd,
     shift = (word_length - (start + length));
   x = (x & ~(mask << shift)) | ((value & mask) << shift);
 
-  cgen_put_insn_value (cd, bufp, word_length, (bfd_vma) x);
+  cgen_put_insn_value (cd, bufp, word_length, (bfd_vma) x, cd->endian);
 }
 
 #endif /* ! CGEN_INT_INSN_P */
@@ -269,8 +269,8 @@ insert_insn_normal (CGEN_CPU_DESC cd,
 #else
 
   cgen_put_insn_value (cd, buffer, min ((unsigned) cd->base_insn_bitsize,
-                                       (unsigned) CGEN_FIELDS_BITSIZE (fields)),
-                      value);
+                                        (unsigned) CGEN_FIELDS_BITSIZE (fields)),
+                      value, cd->insn_endian);
 
 #endif /* ! CGEN_INT_INSN_P */
 
@@ -387,7 +387,7 @@ extract_1 (CGEN_CPU_DESC cd,
   unsigned long x;
   int shift;
 
-  x = cgen_get_insn_value (cd, bufp, word_length);
+  x = cgen_get_insn_value (cd, bufp, word_length, cd->endian);
 
   if (CGEN_INSN_LSB0_P)
     shift = (start + 1) - length;

diff --git a/opcodes/cgen-dis.in b/opcodes/cgen-dis.in
index 378b984551dbd72929280e73c1f8eef22df4f2fb..2d5feebdb82e2e3bf9cbc83f36ab7d522b7075df 100644 (file)
--- a/opcodes/cgen-dis.in
+++ b/opcodes/cgen-dis.in
@@ -210,7 +210,7 @@ print_insn (CGEN_CPU_DESC cd,
   /* Extract base part of instruction, just in case CGEN_DIS_* uses it. */
   basesize = cd->base_insn_bitsize < buflen * 8 ?
                                      cd->base_insn_bitsize : buflen * 8;
-  insn_value = cgen_get_insn_value (cd, buf, basesize);
+  insn_value = cgen_get_insn_value (cd, buf, basesize, cd->insn_endian);
 
 
   /* Fill in ex_info fields like read_insn would.  Don't actually call

diff --git a/opcodes/cgen-ibld.in b/opcodes/cgen-ibld.in
index 6a9b97fcb5749291a94e649988e2951341e4920d..ae9d20d6f45a2a2b5072217aa4c51e284e743a48 100644 (file)
--- a/opcodes/cgen-ibld.in
+++ b/opcodes/cgen-ibld.in
@@ -87,7 +87,7 @@ insert_1 (CGEN_CPU_DESC cd,
   unsigned long x,mask;
   int shift;
 
-  x = cgen_get_insn_value (cd, bufp, word_length);
+  x = cgen_get_insn_value (cd, bufp, word_length, cd->endian);
 
   /* Written this way to avoid undefined behaviour.  */
   mask = (((1L << (length - 1)) - 1) << 1) | 1;
@@ -97,7 +97,7 @@ insert_1 (CGEN_CPU_DESC cd,
     shift = (word_length - (start + length));
   x = (x & ~(mask << shift)) | ((value & mask) << shift);
 
-  cgen_put_insn_value (cd, bufp, word_length, (bfd_vma) x);
+  cgen_put_insn_value (cd, bufp, word_length, (bfd_vma) x, cd->endian);
 }
 
 #endif /* ! CGEN_INT_INSN_P */
@@ -268,8 +268,8 @@ insert_insn_normal (CGEN_CPU_DESC cd,
 #else
 
   cgen_put_insn_value (cd, buffer, min ((unsigned) cd->base_insn_bitsize,
-                                       (unsigned) CGEN_FIELDS_BITSIZE (fields)),
-                      value);
+                                        (unsigned) CGEN_FIELDS_BITSIZE (fields)),
+                      value, cd->insn_endian);
 
 #endif /* ! CGEN_INT_INSN_P */
 
@@ -386,7 +386,7 @@ extract_1 (CGEN_CPU_DESC cd,
   unsigned long x;
   int shift;
 
-  x = cgen_get_insn_value (cd, bufp, word_length);
+  x = cgen_get_insn_value (cd, bufp, word_length, cd->endian);
 
   if (CGEN_INSN_LSB0_P)
     shift = (start + 1) - length;

diff --git a/opcodes/cgen-opc.c b/opcodes/cgen-opc.c
index f3cfa9d9c38e35442ec6296f642729f4a128acc9..18f9aae9712cb6517ddc034e7b9743632fd6d634 100644 (file)
--- a/opcodes/cgen-opc.c
+++ b/opcodes/cgen-opc.c
@@ -357,9 +357,10 @@ cgen_macro_insn_count (CGEN_CPU_DESC cd)
 /* Cover function to read and properly byteswap an insn value.  */
 
 CGEN_INSN_INT
-cgen_get_insn_value (CGEN_CPU_DESC cd, unsigned char *buf, int length)
+cgen_get_insn_value (CGEN_CPU_DESC cd, unsigned char *buf, int length,
+                     int endian)
 {
-  int big_p = (cd->insn_endian == CGEN_ENDIAN_BIG);
+  int big_p = (endian == CGEN_ENDIAN_BIG);
   int insn_chunk_bitsize = cd->insn_chunk_bitsize;
   CGEN_INSN_INT value = 0;
 
@@ -385,7 +386,7 @@ cgen_get_insn_value (CGEN_CPU_DESC cd, unsigned char *buf, int length)
     }
   else
     {
-      value = bfd_get_bits (buf, length, cd->insn_endian == CGEN_ENDIAN_BIG);
+      value = bfd_get_bits (buf, length, endian == CGEN_ENDIAN_BIG);
     }
 
   return value;
@@ -397,9 +398,10 @@ void
 cgen_put_insn_value (CGEN_CPU_DESC cd,
                     unsigned char *buf,
                     int length,
-                    CGEN_INSN_INT value)
+                    CGEN_INSN_INT value,
+                     int endian)
 {
-  int big_p = (cd->insn_endian == CGEN_ENDIAN_BIG);
+  int big_p = (endian == CGEN_ENDIAN_BIG);
   int insn_chunk_bitsize = cd->insn_chunk_bitsize;
 
   if (insn_chunk_bitsize != 0 && insn_chunk_bitsize < length)
@@ -459,7 +461,8 @@ cgen_lookup_insn (CGEN_CPU_DESC cd,
     {
       info = NULL;
       insn_bytes_value = (unsigned char *) xmalloc (cd->max_insn_bitsize / 8);
-      cgen_put_insn_value (cd, insn_bytes_value, length, insn_int_value);
+      cgen_put_insn_value (cd, insn_bytes_value, length, insn_int_value,
+                           cd->insn_endian);
     }
   else
     {
@@ -467,7 +470,8 @@ cgen_lookup_insn (CGEN_CPU_DESC cd,
       ex_info.dis_info = NULL;
       ex_info.insn_bytes = insn_bytes_value;
       ex_info.valid = -1;
-      insn_int_value = cgen_get_insn_value (cd, insn_bytes_value, length);
+      insn_int_value = cgen_get_insn_value (cd, insn_bytes_value, length,
+                                            cd->insn_endian);
     }
 
   if (!insn)

diff --git a/opcodes/epiphany-dis.c b/opcodes/epiphany-dis.c
index 966b39fe099ef19a4f1d7156facc5eb87737f41d..83f8d7969ee880506ff801f346d390c05b94db84 100644 (file)
--- a/opcodes/epiphany-dis.c
+++ b/opcodes/epiphany-dis.c
@@ -451,7 +451,7 @@ print_insn (CGEN_CPU_DESC cd,
   /* Extract base part of instruction, just in case CGEN_DIS_* uses it. */
   basesize = cd->base_insn_bitsize < buflen * 8 ?
                                      cd->base_insn_bitsize : buflen * 8;
-  insn_value = cgen_get_insn_value (cd, buf, basesize);
+  insn_value = cgen_get_insn_value (cd, buf, basesize, cd->insn_endian);
 
 
   /* Fill in ex_info fields like read_insn would.  Don't actually call

diff --git a/opcodes/epiphany-ibld.c b/opcodes/epiphany-ibld.c
index c23a969294ebdcfd0fda3f2770bb0bc3e78ab7e1..4a974edccdac3bfe5ace1ffef6dd797680338b42 100644 (file)
--- a/opcodes/epiphany-ibld.c
+++ b/opcodes/epiphany-ibld.c
@@ -88,7 +88,7 @@ insert_1 (CGEN_CPU_DESC cd,
   unsigned long x,mask;
   int shift;
 
-  x = cgen_get_insn_value (cd, bufp, word_length);
+  x = cgen_get_insn_value (cd, bufp, word_length, cd->endian);
 
   /* Written this way to avoid undefined behaviour.  */
   mask = (((1L << (length - 1)) - 1) << 1) | 1;
@@ -98,7 +98,7 @@ insert_1 (CGEN_CPU_DESC cd,
     shift = (word_length - (start + length));
   x = (x & ~(mask << shift)) | ((value & mask) << shift);
 
-  cgen_put_insn_value (cd, bufp, word_length, (bfd_vma) x);
+  cgen_put_insn_value (cd, bufp, word_length, (bfd_vma) x, cd->endian);
 }
 
 #endif /* ! CGEN_INT_INSN_P */
@@ -269,8 +269,8 @@ insert_insn_normal (CGEN_CPU_DESC cd,
 #else
 
   cgen_put_insn_value (cd, buffer, min ((unsigned) cd->base_insn_bitsize,
-                                       (unsigned) CGEN_FIELDS_BITSIZE (fields)),
-                      value);
+                                        (unsigned) CGEN_FIELDS_BITSIZE (fields)),
+                      value, cd->insn_endian);
 
 #endif /* ! CGEN_INT_INSN_P */
 
@@ -387,7 +387,7 @@ extract_1 (CGEN_CPU_DESC cd,
   unsigned long x;
   int shift;
 
-  x = cgen_get_insn_value (cd, bufp, word_length);
+  x = cgen_get_insn_value (cd, bufp, word_length, cd->endian);
 
   if (CGEN_INSN_LSB0_P)
     shift = (start + 1) - length;

diff --git a/opcodes/fr30-dis.c b/opcodes/fr30-dis.c
index b98ea94a1a6e1f87f8079ca73b72fa4d5710a78d..ed89926cef1dd1aa528b8b5b079b4b880aa4e2f5 100644 (file)
--- a/opcodes/fr30-dis.c
+++ b/opcodes/fr30-dis.c
@@ -472,7 +472,7 @@ print_insn (CGEN_CPU_DESC cd,
   /* Extract base part of instruction, just in case CGEN_DIS_* uses it. */
   basesize = cd->base_insn_bitsize < buflen * 8 ?
                                      cd->base_insn_bitsize : buflen * 8;
-  insn_value = cgen_get_insn_value (cd, buf, basesize);
+  insn_value = cgen_get_insn_value (cd, buf, basesize, cd->insn_endian);
 
 
   /* Fill in ex_info fields like read_insn would.  Don't actually call

diff --git a/opcodes/fr30-ibld.c b/opcodes/fr30-ibld.c
index 5544d550f52cd91d17e867cbf5e695990c475550..6816154ab277fd484b461fe69eb9873f7bdfff82 100644 (file)
--- a/opcodes/fr30-ibld.c
+++ b/opcodes/fr30-ibld.c
@@ -88,7 +88,7 @@ insert_1 (CGEN_CPU_DESC cd,
   unsigned long x,mask;
   int shift;
 
-  x = cgen_get_insn_value (cd, bufp, word_length);
+  x = cgen_get_insn_value (cd, bufp, word_length, cd->endian);
 
   /* Written this way to avoid undefined behaviour.  */
   mask = (((1L << (length - 1)) - 1) << 1) | 1;
@@ -98,7 +98,7 @@ insert_1 (CGEN_CPU_DESC cd,
     shift = (word_length - (start + length));
   x = (x & ~(mask << shift)) | ((value & mask) << shift);
 
-  cgen_put_insn_value (cd, bufp, word_length, (bfd_vma) x);
+  cgen_put_insn_value (cd, bufp, word_length, (bfd_vma) x, cd->endian);
 }
 
 #endif /* ! CGEN_INT_INSN_P */
@@ -269,8 +269,8 @@ insert_insn_normal (CGEN_CPU_DESC cd,
 #else
 
   cgen_put_insn_value (cd, buffer, min ((unsigned) cd->base_insn_bitsize,
-                                       (unsigned) CGEN_FIELDS_BITSIZE (fields)),
-                      value);
+                                        (unsigned) CGEN_FIELDS_BITSIZE (fields)),
+                      value, cd->insn_endian);
 
 #endif /* ! CGEN_INT_INSN_P */
 
@@ -387,7 +387,7 @@ extract_1 (CGEN_CPU_DESC cd,
   unsigned long x;
   int shift;
 
-  x = cgen_get_insn_value (cd, bufp, word_length);
+  x = cgen_get_insn_value (cd, bufp, word_length, cd->endian);
 
   if (CGEN_INSN_LSB0_P)
     shift = (start + 1) - length;

diff --git a/opcodes/frv-dis.c b/opcodes/frv-dis.c
index 60f1a6141ed7cadf5576cbe22789be7e312fad42..48b33596d00f147b21cd22c7b4c705c1a6df4b84 100644 (file)
--- a/opcodes/frv-dis.c
+++ b/opcodes/frv-dis.c
@@ -569,7 +569,7 @@ print_insn (CGEN_CPU_DESC cd,
   /* Extract base part of instruction, just in case CGEN_DIS_* uses it. */
   basesize = cd->base_insn_bitsize < buflen * 8 ?
                                      cd->base_insn_bitsize : buflen * 8;
-  insn_value = cgen_get_insn_value (cd, buf, basesize);
+  insn_value = cgen_get_insn_value (cd, buf, basesize, cd->insn_endian);
 
 
   /* Fill in ex_info fields like read_insn would.  Don't actually call

diff --git a/opcodes/frv-ibld.c b/opcodes/frv-ibld.c
index 0421884908714461a69f9136baa1b11c7881667e..43bccbac59136b42999535fc46fd8edd43331ebe 100644 (file)
--- a/opcodes/frv-ibld.c
+++ b/opcodes/frv-ibld.c
@@ -88,7 +88,7 @@ insert_1 (CGEN_CPU_DESC cd,
   unsigned long x,mask;
   int shift;
 
-  x = cgen_get_insn_value (cd, bufp, word_length);
+  x = cgen_get_insn_value (cd, bufp, word_length, cd->endian);
 
   /* Written this way to avoid undefined behaviour.  */
   mask = (((1L << (length - 1)) - 1) << 1) | 1;
@@ -98,7 +98,7 @@ insert_1 (CGEN_CPU_DESC cd,
     shift = (word_length - (start + length));
   x = (x & ~(mask << shift)) | ((value & mask) << shift);
 
-  cgen_put_insn_value (cd, bufp, word_length, (bfd_vma) x);
+  cgen_put_insn_value (cd, bufp, word_length, (bfd_vma) x, cd->endian);
 }
 
 #endif /* ! CGEN_INT_INSN_P */
@@ -269,8 +269,8 @@ insert_insn_normal (CGEN_CPU_DESC cd,
 #else
 
   cgen_put_insn_value (cd, buffer, min ((unsigned) cd->base_insn_bitsize,
-                                       (unsigned) CGEN_FIELDS_BITSIZE (fields)),
-                      value);
+                                        (unsigned) CGEN_FIELDS_BITSIZE (fields)),
+                      value, cd->insn_endian);
 
 #endif /* ! CGEN_INT_INSN_P */
 
@@ -387,7 +387,7 @@ extract_1 (CGEN_CPU_DESC cd,
   unsigned long x;
   int shift;
 
-  x = cgen_get_insn_value (cd, bufp, word_length);
+  x = cgen_get_insn_value (cd, bufp, word_length, cd->endian);
 
   if (CGEN_INSN_LSB0_P)
     shift = (start + 1) - length;

diff --git a/opcodes/ip2k-dis.c b/opcodes/ip2k-dis.c
index 4a53a7c24631e1314d2025cbc33d3464a092145f..6cc08ba9d4fea13049af262a1012dd25d190da34 100644 (file)
--- a/opcodes/ip2k-dis.c
+++ b/opcodes/ip2k-dis.c
@@ -461,7 +461,7 @@ print_insn (CGEN_CPU_DESC cd,
   /* Extract base part of instruction, just in case CGEN_DIS_* uses it. */
   basesize = cd->base_insn_bitsize < buflen * 8 ?
                                      cd->base_insn_bitsize : buflen * 8;
-  insn_value = cgen_get_insn_value (cd, buf, basesize);
+  insn_value = cgen_get_insn_value (cd, buf, basesize, cd->insn_endian);
 
 
   /* Fill in ex_info fields like read_insn would.  Don't actually call

diff --git a/opcodes/ip2k-ibld.c b/opcodes/ip2k-ibld.c
index 9258f7d3ad87cd16c6f48b473d6874e751c7e2b0..605d0bde04e50df510769c62f752217b4b3ff08e 100644 (file)
--- a/opcodes/ip2k-ibld.c
+++ b/opcodes/ip2k-ibld.c
@@ -88,7 +88,7 @@ insert_1 (CGEN_CPU_DESC cd,
   unsigned long x,mask;
   int shift;
 
-  x = cgen_get_insn_value (cd, bufp, word_length);
+  x = cgen_get_insn_value (cd, bufp, word_length, cd->endian);
 
   /* Written this way to avoid undefined behaviour.  */
   mask = (((1L << (length - 1)) - 1) << 1) | 1;
@@ -98,7 +98,7 @@ insert_1 (CGEN_CPU_DESC cd,
     shift = (word_length - (start + length));
   x = (x & ~(mask << shift)) | ((value & mask) << shift);
 
-  cgen_put_insn_value (cd, bufp, word_length, (bfd_vma) x);
+  cgen_put_insn_value (cd, bufp, word_length, (bfd_vma) x, cd->endian);
 }
 
 #endif /* ! CGEN_INT_INSN_P */
@@ -269,8 +269,8 @@ insert_insn_normal (CGEN_CPU_DESC cd,
 #else
 
   cgen_put_insn_value (cd, buffer, min ((unsigned) cd->base_insn_bitsize,
-                                       (unsigned) CGEN_FIELDS_BITSIZE (fields)),
-                      value);
+                                        (unsigned) CGEN_FIELDS_BITSIZE (fields)),
+                      value, cd->insn_endian);
 
 #endif /* ! CGEN_INT_INSN_P */
 
@@ -387,7 +387,7 @@ extract_1 (CGEN_CPU_DESC cd,
   unsigned long x;
   int shift;
 
-  x = cgen_get_insn_value (cd, bufp, word_length);
+  x = cgen_get_insn_value (cd, bufp, word_length, cd->endian);
 
   if (CGEN_INSN_LSB0_P)
     shift = (start + 1) - length;

diff --git a/opcodes/iq2000-dis.c b/opcodes/iq2000-dis.c
index 3aab139c51f01913382550859b2a29682532d7ae..fbe70c02b4bdcb4869399dc89e1295e6c501326a 100644 (file)
--- a/opcodes/iq2000-dis.c
+++ b/opcodes/iq2000-dis.c
@@ -362,7 +362,7 @@ print_insn (CGEN_CPU_DESC cd,
   /* Extract base part of instruction, just in case CGEN_DIS_* uses it. */
   basesize = cd->base_insn_bitsize < buflen * 8 ?
                                      cd->base_insn_bitsize : buflen * 8;
-  insn_value = cgen_get_insn_value (cd, buf, basesize);
+  insn_value = cgen_get_insn_value (cd, buf, basesize, cd->insn_endian);
 
 
   /* Fill in ex_info fields like read_insn would.  Don't actually call

diff --git a/opcodes/iq2000-ibld.c b/opcodes/iq2000-ibld.c
index 319e994d84050417775689e14b7997ac0747ab0a..2a87c709aff71cd0badacd39a2cf7fe1029df9f2 100644 (file)
--- a/opcodes/iq2000-ibld.c
+++ b/opcodes/iq2000-ibld.c
@@ -88,7 +88,7 @@ insert_1 (CGEN_CPU_DESC cd,
   unsigned long x,mask;
   int shift;
 
-  x = cgen_get_insn_value (cd, bufp, word_length);
+  x = cgen_get_insn_value (cd, bufp, word_length, cd->endian);
 
   /* Written this way to avoid undefined behaviour.  */
   mask = (((1L << (length - 1)) - 1) << 1) | 1;
@@ -98,7 +98,7 @@ insert_1 (CGEN_CPU_DESC cd,
     shift = (word_length - (start + length));
   x = (x & ~(mask << shift)) | ((value & mask) << shift);
 
-  cgen_put_insn_value (cd, bufp, word_length, (bfd_vma) x);
+  cgen_put_insn_value (cd, bufp, word_length, (bfd_vma) x, cd->endian);
 }
 
 #endif /* ! CGEN_INT_INSN_P */
@@ -269,8 +269,8 @@ insert_insn_normal (CGEN_CPU_DESC cd,
 #else
 
   cgen_put_insn_value (cd, buffer, min ((unsigned) cd->base_insn_bitsize,
-                                       (unsigned) CGEN_FIELDS_BITSIZE (fields)),
-                      value);
+                                        (unsigned) CGEN_FIELDS_BITSIZE (fields)),
+                      value, cd->insn_endian);
 
 #endif /* ! CGEN_INT_INSN_P */
 
@@ -387,7 +387,7 @@ extract_1 (CGEN_CPU_DESC cd,
   unsigned long x;
   int shift;
 
-  x = cgen_get_insn_value (cd, bufp, word_length);
+  x = cgen_get_insn_value (cd, bufp, word_length, cd->endian);
 
   if (CGEN_INSN_LSB0_P)
     shift = (start + 1) - length;

diff --git a/opcodes/lm32-dis.c b/opcodes/lm32-dis.c
index 7ba84b3a66e5fabea54cf412ca113508b50e1f41..e66ad06ba4c3959499e3cc031c4f5c86b3f3589a 100644 (file)
--- a/opcodes/lm32-dis.c
+++ b/opcodes/lm32-dis.c
@@ -320,7 +320,7 @@ print_insn (CGEN_CPU_DESC cd,
   /* Extract base part of instruction, just in case CGEN_DIS_* uses it. */
   basesize = cd->base_insn_bitsize < buflen * 8 ?
                                      cd->base_insn_bitsize : buflen * 8;
-  insn_value = cgen_get_insn_value (cd, buf, basesize);
+  insn_value = cgen_get_insn_value (cd, buf, basesize, cd->insn_endian);
 
 
   /* Fill in ex_info fields like read_insn would.  Don't actually call

diff --git a/opcodes/lm32-ibld.c b/opcodes/lm32-ibld.c
index 9b594e8e0e248561cdf96281a1aed8e465f2bb27..2b0efdaa3f73521b698d9eb48e45e78a2e0b11ac 100644 (file)
--- a/opcodes/lm32-ibld.c
+++ b/opcodes/lm32-ibld.c
@@ -88,7 +88,7 @@ insert_1 (CGEN_CPU_DESC cd,
   unsigned long x,mask;
   int shift;
 
-  x = cgen_get_insn_value (cd, bufp, word_length);
+  x = cgen_get_insn_value (cd, bufp, word_length, cd->endian);
 
   /* Written this way to avoid undefined behaviour.  */
   mask = (((1L << (length - 1)) - 1) << 1) | 1;
@@ -98,7 +98,7 @@ insert_1 (CGEN_CPU_DESC cd,
     shift = (word_length - (start + length));
   x = (x & ~(mask << shift)) | ((value & mask) << shift);
 
-  cgen_put_insn_value (cd, bufp, word_length, (bfd_vma) x);
+  cgen_put_insn_value (cd, bufp, word_length, (bfd_vma) x, cd->endian);
 }
 
 #endif /* ! CGEN_INT_INSN_P */
@@ -269,8 +269,8 @@ insert_insn_normal (CGEN_CPU_DESC cd,
 #else
 
   cgen_put_insn_value (cd, buffer, min ((unsigned) cd->base_insn_bitsize,
-                                       (unsigned) CGEN_FIELDS_BITSIZE (fields)),
-                      value);
+                                        (unsigned) CGEN_FIELDS_BITSIZE (fields)),
+                      value, cd->insn_endian);
 
 #endif /* ! CGEN_INT_INSN_P */
 
@@ -387,7 +387,7 @@ extract_1 (CGEN_CPU_DESC cd,
   unsigned long x;
   int shift;
 
-  x = cgen_get_insn_value (cd, bufp, word_length);
+  x = cgen_get_insn_value (cd, bufp, word_length, cd->endian);
 
   if (CGEN_INSN_LSB0_P)
     shift = (start + 1) - length;

diff --git a/opcodes/m32c-dis.c b/opcodes/m32c-dis.c
index 41afca3cc0a8f598911b9ab0e1afbffcaba3c79d..19135fa0b20acac30e90fd35a57e6b411502d057 100644 (file)
--- a/opcodes/m32c-dis.c
+++ b/opcodes/m32c-dis.c
@@ -1064,7 +1064,7 @@ print_insn (CGEN_CPU_DESC cd,
   /* Extract base part of instruction, just in case CGEN_DIS_* uses it. */
   basesize = cd->base_insn_bitsize < buflen * 8 ?
                                      cd->base_insn_bitsize : buflen * 8;
-  insn_value = cgen_get_insn_value (cd, buf, basesize);
+  insn_value = cgen_get_insn_value (cd, buf, basesize, cd->insn_endian);
 
 
   /* Fill in ex_info fields like read_insn would.  Don't actually call

diff --git a/opcodes/m32c-ibld.c b/opcodes/m32c-ibld.c
index c1fca2e169813ff752f7a819f19f9054149fbb0f..6ad4da967da56711f3fa00bedc90f1c9f886219e 100644 (file)
--- a/opcodes/m32c-ibld.c
+++ b/opcodes/m32c-ibld.c
@@ -88,7 +88,7 @@ insert_1 (CGEN_CPU_DESC cd,
   unsigned long x,mask;
   int shift;
 
-  x = cgen_get_insn_value (cd, bufp, word_length);
+  x = cgen_get_insn_value (cd, bufp, word_length, cd->endian);
 
   /* Written this way to avoid undefined behaviour.  */
   mask = (((1L << (length - 1)) - 1) << 1) | 1;
@@ -98,7 +98,7 @@ insert_1 (CGEN_CPU_DESC cd,
     shift = (word_length - (start + length));
   x = (x & ~(mask << shift)) | ((value & mask) << shift);
 
-  cgen_put_insn_value (cd, bufp, word_length, (bfd_vma) x);
+  cgen_put_insn_value (cd, bufp, word_length, (bfd_vma) x, cd->endian);
 }
 
 #endif /* ! CGEN_INT_INSN_P */
@@ -269,8 +269,8 @@ insert_insn_normal (CGEN_CPU_DESC cd,
 #else
 
   cgen_put_insn_value (cd, buffer, min ((unsigned) cd->base_insn_bitsize,
-                                       (unsigned) CGEN_FIELDS_BITSIZE (fields)),
-                      value);
+                                        (unsigned) CGEN_FIELDS_BITSIZE (fields)),
+                      value, cd->insn_endian);
 
 #endif /* ! CGEN_INT_INSN_P */
 
@@ -387,7 +387,7 @@ extract_1 (CGEN_CPU_DESC cd,
   unsigned long x;
   int shift;
 
-  x = cgen_get_insn_value (cd, bufp, word_length);
+  x = cgen_get_insn_value (cd, bufp, word_length, cd->endian);
 
   if (CGEN_INSN_LSB0_P)
     shift = (start + 1) - length;

diff --git a/opcodes/m32r-dis.c b/opcodes/m32r-dis.c
index e66673980191e2b3bf009206a86fdc775040192d..e15d3c3b94cca10ac2ea0f4b773f606e6cb6151a 100644 (file)
--- a/opcodes/m32r-dis.c
+++ b/opcodes/m32r-dis.c
@@ -452,7 +452,7 @@ print_insn (CGEN_CPU_DESC cd,
   /* Extract base part of instruction, just in case CGEN_DIS_* uses it. */
   basesize = cd->base_insn_bitsize < buflen * 8 ?
                                      cd->base_insn_bitsize : buflen * 8;
-  insn_value = cgen_get_insn_value (cd, buf, basesize);
+  insn_value = cgen_get_insn_value (cd, buf, basesize, cd->insn_endian);
 
 
   /* Fill in ex_info fields like read_insn would.  Don't actually call

diff --git a/opcodes/m32r-ibld.c b/opcodes/m32r-ibld.c
index ddebc32428ec0483c3eeefc168910db133670bc2..559f47135fae9b1347f170d4a91e7589db5b0a19 100644 (file)
--- a/opcodes/m32r-ibld.c
+++ b/opcodes/m32r-ibld.c
@@ -88,7 +88,7 @@ insert_1 (CGEN_CPU_DESC cd,
   unsigned long x,mask;
   int shift;
 
-  x = cgen_get_insn_value (cd, bufp, word_length);
+  x = cgen_get_insn_value (cd, bufp, word_length, cd->endian);
 
   /* Written this way to avoid undefined behaviour.  */
   mask = (((1L << (length - 1)) - 1) << 1) | 1;
@@ -98,7 +98,7 @@ insert_1 (CGEN_CPU_DESC cd,
     shift = (word_length - (start + length));
   x = (x & ~(mask << shift)) | ((value & mask) << shift);
 
-  cgen_put_insn_value (cd, bufp, word_length, (bfd_vma) x);
+  cgen_put_insn_value (cd, bufp, word_length, (bfd_vma) x, cd->endian);
 }
 
 #endif /* ! CGEN_INT_INSN_P */
@@ -269,8 +269,8 @@ insert_insn_normal (CGEN_CPU_DESC cd,
 #else
 
   cgen_put_insn_value (cd, buffer, min ((unsigned) cd->base_insn_bitsize,
-                                       (unsigned) CGEN_FIELDS_BITSIZE (fields)),
-                      value);
+                                        (unsigned) CGEN_FIELDS_BITSIZE (fields)),
+                      value, cd->insn_endian);
 
 #endif /* ! CGEN_INT_INSN_P */
 
@@ -387,7 +387,7 @@ extract_1 (CGEN_CPU_DESC cd,
   unsigned long x;
   int shift;
 
-  x = cgen_get_insn_value (cd, bufp, word_length);
+  x = cgen_get_insn_value (cd, bufp, word_length, cd->endian);
 
   if (CGEN_INSN_LSB0_P)
     shift = (start + 1) - length;

diff --git a/opcodes/mep-dis.c b/opcodes/mep-dis.c
index d2df5883031fe7e1845c8212b73f21b004acb6e9..1292d830cbdeada6c5ba21887a9f4ed8e0d4c1ee 100644 (file)
--- a/opcodes/mep-dis.c
+++ b/opcodes/mep-dis.c
@@ -467,7 +467,7 @@ print_slot_insn (CGEN_CPU_DESC cd,
   CGEN_INSN_INT insn_value;
   CGEN_EXTRACT_INFO ex_info;
 
-  insn_value = cgen_get_insn_value (cd, buf, 32);
+  insn_value = cgen_get_insn_value (cd, buf, 32, cd->insn_endian);
 
   /* Fill in ex_info fields like read_insn would.  Don't actually call
      read_insn, since the incoming buffer is already read (and possibly
@@ -1360,7 +1360,7 @@ print_insn (CGEN_CPU_DESC cd,
   /* Extract base part of instruction, just in case CGEN_DIS_* uses it. */
   basesize = cd->base_insn_bitsize < buflen * 8 ?
                                      cd->base_insn_bitsize : buflen * 8;
-  insn_value = cgen_get_insn_value (cd, buf, basesize);
+  insn_value = cgen_get_insn_value (cd, buf, basesize, cd->insn_endian);
 
 
   /* Fill in ex_info fields like read_insn would.  Don't actually call

diff --git a/opcodes/mep-ibld.c b/opcodes/mep-ibld.c
index 6a73f419c9848579e16180d0969384428648a0d8..66a30e1b4565057b5dae2c649f0ea6bfb5a66fc2 100644 (file)
--- a/opcodes/mep-ibld.c
+++ b/opcodes/mep-ibld.c
@@ -88,7 +88,7 @@ insert_1 (CGEN_CPU_DESC cd,
   unsigned long x,mask;
   int shift;
 
-  x = cgen_get_insn_value (cd, bufp, word_length);
+  x = cgen_get_insn_value (cd, bufp, word_length, cd->endian);
 
   /* Written this way to avoid undefined behaviour.  */
   mask = (((1L << (length - 1)) - 1) << 1) | 1;
@@ -98,7 +98,7 @@ insert_1 (CGEN_CPU_DESC cd,
     shift = (word_length - (start + length));
   x = (x & ~(mask << shift)) | ((value & mask) << shift);
 
-  cgen_put_insn_value (cd, bufp, word_length, (bfd_vma) x);
+  cgen_put_insn_value (cd, bufp, word_length, (bfd_vma) x, cd->endian);
 }
 
 #endif /* ! CGEN_INT_INSN_P */
@@ -269,8 +269,8 @@ insert_insn_normal (CGEN_CPU_DESC cd,
 #else
 
   cgen_put_insn_value (cd, buffer, min ((unsigned) cd->base_insn_bitsize,
-                                       (unsigned) CGEN_FIELDS_BITSIZE (fields)),
-                      value);
+                                        (unsigned) CGEN_FIELDS_BITSIZE (fields)),
+                      value, cd->insn_endian);
 
 #endif /* ! CGEN_INT_INSN_P */
 
@@ -387,7 +387,7 @@ extract_1 (CGEN_CPU_DESC cd,
   unsigned long x;
   int shift;
 
-  x = cgen_get_insn_value (cd, bufp, word_length);
+  x = cgen_get_insn_value (cd, bufp, word_length, cd->endian);
 
   if (CGEN_INSN_LSB0_P)
     shift = (start + 1) - length;

diff --git a/opcodes/mt-dis.c b/opcodes/mt-dis.c
index 3d552e8acbbe330641e32fdaa6cbb094f9c02ff2..b0358e34e255d13fd8759f7d898b7fb123b4a303 100644 (file)
--- a/opcodes/mt-dis.c
+++ b/opcodes/mt-dis.c
@@ -463,7 +463,7 @@ print_insn (CGEN_CPU_DESC cd,
   /* Extract base part of instruction, just in case CGEN_DIS_* uses it. */
   basesize = cd->base_insn_bitsize < buflen * 8 ?
                                      cd->base_insn_bitsize : buflen * 8;
-  insn_value = cgen_get_insn_value (cd, buf, basesize);
+  insn_value = cgen_get_insn_value (cd, buf, basesize, cd->insn_endian);
 
 
   /* Fill in ex_info fields like read_insn would.  Don't actually call

diff --git a/opcodes/mt-ibld.c b/opcodes/mt-ibld.c
index 53a0775f7af1d37e5e9a941bbfb7c2f662dbf368..683b76b2b482466646199e4a3b818bfe5823ca4d 100644 (file)
--- a/opcodes/mt-ibld.c
+++ b/opcodes/mt-ibld.c
@@ -88,7 +88,7 @@ insert_1 (CGEN_CPU_DESC cd,
   unsigned long x,mask;
   int shift;
 
-  x = cgen_get_insn_value (cd, bufp, word_length);
+  x = cgen_get_insn_value (cd, bufp, word_length, cd->endian);
 
   /* Written this way to avoid undefined behaviour.  */
   mask = (((1L << (length - 1)) - 1) << 1) | 1;
@@ -98,7 +98,7 @@ insert_1 (CGEN_CPU_DESC cd,
     shift = (word_length - (start + length));
   x = (x & ~(mask << shift)) | ((value & mask) << shift);
 
-  cgen_put_insn_value (cd, bufp, word_length, (bfd_vma) x);
+  cgen_put_insn_value (cd, bufp, word_length, (bfd_vma) x, cd->endian);
 }
 
 #endif /* ! CGEN_INT_INSN_P */
@@ -269,8 +269,8 @@ insert_insn_normal (CGEN_CPU_DESC cd,
 #else
 
   cgen_put_insn_value (cd, buffer, min ((unsigned) cd->base_insn_bitsize,
-                                       (unsigned) CGEN_FIELDS_BITSIZE (fields)),
-                      value);
+                                        (unsigned) CGEN_FIELDS_BITSIZE (fields)),
+                      value, cd->insn_endian);
 
 #endif /* ! CGEN_INT_INSN_P */
 
@@ -387,7 +387,7 @@ extract_1 (CGEN_CPU_DESC cd,
   unsigned long x;
   int shift;
 
-  x = cgen_get_insn_value (cd, bufp, word_length);
+  x = cgen_get_insn_value (cd, bufp, word_length, cd->endian);
 
   if (CGEN_INSN_LSB0_P)
     shift = (start + 1) - length;

diff --git a/opcodes/or1k-dis.c b/opcodes/or1k-dis.c
index d350d2bbae2de48a842d0f967cd379d6036af021..87ff2064884e1155e112337686e019ce2c3ac0f4 100644 (file)
--- a/opcodes/or1k-dis.c
+++ b/opcodes/or1k-dis.c
@@ -347,7 +347,7 @@ print_insn (CGEN_CPU_DESC cd,
   /* Extract base part of instruction, just in case CGEN_DIS_* uses it. */
   basesize = cd->base_insn_bitsize < buflen * 8 ?
                                      cd->base_insn_bitsize : buflen * 8;
-  insn_value = cgen_get_insn_value (cd, buf, basesize);
+  insn_value = cgen_get_insn_value (cd, buf, basesize, cd->insn_endian);
 
 
   /* Fill in ex_info fields like read_insn would.  Don't actually call

diff --git a/opcodes/or1k-ibld.c b/opcodes/or1k-ibld.c
index 2e476cb1523cc32443ac9143bf4bab86b6bb0b67..7b89260bf53fd3aa72543a80f09db8140fa79459 100644 (file)
--- a/opcodes/or1k-ibld.c
+++ b/opcodes/or1k-ibld.c
@@ -88,7 +88,7 @@ insert_1 (CGEN_CPU_DESC cd,
   unsigned long x,mask;
   int shift;
 
-  x = cgen_get_insn_value (cd, bufp, word_length);
+  x = cgen_get_insn_value (cd, bufp, word_length, cd->endian);
 
   /* Written this way to avoid undefined behaviour.  */
   mask = (((1L << (length - 1)) - 1) << 1) | 1;
@@ -98,7 +98,7 @@ insert_1 (CGEN_CPU_DESC cd,
     shift = (word_length - (start + length));
   x = (x & ~(mask << shift)) | ((value & mask) << shift);
 
-  cgen_put_insn_value (cd, bufp, word_length, (bfd_vma) x);
+  cgen_put_insn_value (cd, bufp, word_length, (bfd_vma) x, cd->endian);
 }
 
 #endif /* ! CGEN_INT_INSN_P */
@@ -269,8 +269,8 @@ insert_insn_normal (CGEN_CPU_DESC cd,
 #else
 
   cgen_put_insn_value (cd, buffer, min ((unsigned) cd->base_insn_bitsize,
-                                       (unsigned) CGEN_FIELDS_BITSIZE (fields)),
-                      value);
+                                        (unsigned) CGEN_FIELDS_BITSIZE (fields)),
+                      value, cd->insn_endian);
 
 #endif /* ! CGEN_INT_INSN_P */
 
@@ -387,7 +387,7 @@ extract_1 (CGEN_CPU_DESC cd,
   unsigned long x;
   int shift;
 
-  x = cgen_get_insn_value (cd, bufp, word_length);
+  x = cgen_get_insn_value (cd, bufp, word_length, cd->endian);
 
   if (CGEN_INSN_LSB0_P)
     shift = (start + 1) - length;

diff --git a/opcodes/xc16x-dis.c b/opcodes/xc16x-dis.c
index 2cf926b68f8120b8dc33b608e80ad5cb7457ac72..d4c24f033dfa095ab366297de455ac51ada23a32 100644 (file)
--- a/opcodes/xc16x-dis.c
+++ b/opcodes/xc16x-dis.c
@@ -593,7 +593,7 @@ print_insn (CGEN_CPU_DESC cd,
   /* Extract base part of instruction, just in case CGEN_DIS_* uses it. */
   basesize = cd->base_insn_bitsize < buflen * 8 ?
                                      cd->base_insn_bitsize : buflen * 8;
-  insn_value = cgen_get_insn_value (cd, buf, basesize);
+  insn_value = cgen_get_insn_value (cd, buf, basesize, cd->insn_endian);
 
 
   /* Fill in ex_info fields like read_insn would.  Don't actually call

diff --git a/opcodes/xc16x-ibld.c b/opcodes/xc16x-ibld.c
index 6b228bcdfcdefeb02f7981ca51bbc0561429f5d0..b2802fecb6998a936b601952cdc392a30d85ac33 100644 (file)
--- a/opcodes/xc16x-ibld.c
+++ b/opcodes/xc16x-ibld.c
@@ -88,7 +88,7 @@ insert_1 (CGEN_CPU_DESC cd,
   unsigned long x,mask;
   int shift;
 
-  x = cgen_get_insn_value (cd, bufp, word_length);
+  x = cgen_get_insn_value (cd, bufp, word_length, cd->endian);
 
   /* Written this way to avoid undefined behaviour.  */
   mask = (((1L << (length - 1)) - 1) << 1) | 1;
@@ -98,7 +98,7 @@ insert_1 (CGEN_CPU_DESC cd,
     shift = (word_length - (start + length));
   x = (x & ~(mask << shift)) | ((value & mask) << shift);
 
-  cgen_put_insn_value (cd, bufp, word_length, (bfd_vma) x);
+  cgen_put_insn_value (cd, bufp, word_length, (bfd_vma) x, cd->endian);
 }
 
 #endif /* ! CGEN_INT_INSN_P */
@@ -269,8 +269,8 @@ insert_insn_normal (CGEN_CPU_DESC cd,
 #else
 
   cgen_put_insn_value (cd, buffer, min ((unsigned) cd->base_insn_bitsize,
-                                       (unsigned) CGEN_FIELDS_BITSIZE (fields)),
-                      value);
+                                        (unsigned) CGEN_FIELDS_BITSIZE (fields)),
+                      value, cd->insn_endian);
 
 #endif /* ! CGEN_INT_INSN_P */
 
@@ -387,7 +387,7 @@ extract_1 (CGEN_CPU_DESC cd,
   unsigned long x;
   int shift;
 
-  x = cgen_get_insn_value (cd, bufp, word_length);
+  x = cgen_get_insn_value (cd, bufp, word_length, cd->endian);
 
   if (CGEN_INSN_LSB0_P)
     shift = (start + 1) - length;

diff --git a/opcodes/xstormy16-dis.c b/opcodes/xstormy16-dis.c
index 8382c3da85d1ad1f5a99ceda022d1976df9d91ee..c2723167fa14f7dd7acd301b7c72334c6b8ad928 100644 (file)
--- a/opcodes/xstormy16-dis.c
+++ b/opcodes/xstormy16-dis.c
@@ -341,7 +341,7 @@ print_insn (CGEN_CPU_DESC cd,
   /* Extract base part of instruction, just in case CGEN_DIS_* uses it. */
   basesize = cd->base_insn_bitsize < buflen * 8 ?
                                      cd->base_insn_bitsize : buflen * 8;
-  insn_value = cgen_get_insn_value (cd, buf, basesize);
+  insn_value = cgen_get_insn_value (cd, buf, basesize, cd->insn_endian);
 
 
   /* Fill in ex_info fields like read_insn would.  Don't actually call

diff --git a/opcodes/xstormy16-ibld.c b/opcodes/xstormy16-ibld.c
index 70cf88d546bdf68d6e74d67e471166b4355e1fea..eaffbeef90d7cdd652972a7d845782f100d4d542 100644 (file)
--- a/opcodes/xstormy16-ibld.c
+++ b/opcodes/xstormy16-ibld.c
@@ -88,7 +88,7 @@ insert_1 (CGEN_CPU_DESC cd,
   unsigned long x,mask;
   int shift;
 
-  x = cgen_get_insn_value (cd, bufp, word_length);
+  x = cgen_get_insn_value (cd, bufp, word_length, cd->endian);
 
   /* Written this way to avoid undefined behaviour.  */
   mask = (((1L << (length - 1)) - 1) << 1) | 1;
@@ -98,7 +98,7 @@ insert_1 (CGEN_CPU_DESC cd,
     shift = (word_length - (start + length));
   x = (x & ~(mask << shift)) | ((value & mask) << shift);
 
-  cgen_put_insn_value (cd, bufp, word_length, (bfd_vma) x);
+  cgen_put_insn_value (cd, bufp, word_length, (bfd_vma) x, cd->endian);
 }
 
 #endif /* ! CGEN_INT_INSN_P */
@@ -269,8 +269,8 @@ insert_insn_normal (CGEN_CPU_DESC cd,
 #else
 
   cgen_put_insn_value (cd, buffer, min ((unsigned) cd->base_insn_bitsize,
-                                       (unsigned) CGEN_FIELDS_BITSIZE (fields)),
-                      value);
+                                        (unsigned) CGEN_FIELDS_BITSIZE (fields)),
+                      value, cd->insn_endian);
 
 #endif /* ! CGEN_INT_INSN_P */
 
@@ -387,7 +387,7 @@ extract_1 (CGEN_CPU_DESC cd,
   unsigned long x;
   int shift;
 
-  x = cgen_get_insn_value (cd, bufp, word_length);
+  x = cgen_get_insn_value (cd, bufp, word_length, cd->endian);
 
   if (CGEN_INSN_LSB0_P)
     shift = (start + 1) - length;