nobody [Mon, 30 Oct 2006 21:56:43 +0000 (21:56 +0000)]
This commit was manufactured by cvs2svn to create tag 'binutils-csl-arm-
2006q3-26'.
Sprout from binutils-csl-2_17-branch 2006-10-30 21:56:42 UTC Paul Brook <paul@codesourcery.com> '2006-10-30 Paul Brook <paul@codesourcery.com>'
Delete:
ld/emultempl/mipself.em
ld/testsuite/ld-mips-elf/hash1.s
ld/testsuite/ld-mips-elf/hash1a.d
ld/testsuite/ld-mips-elf/hash1b.d
ld/testsuite/ld-mips-elf/hash1c.d
Paul Brook [Mon, 30 Oct 2006 21:56:42 +0000 (21:56 +0000)]
2006-10-30 Paul Brook <paul@codesourcery.com>
bfd/
* elf32-arm.c (elf32_arm_to_thumb_export_stub): Assert that output
section is present.
(allocate_dynrelocs): Only add export stub for symbols definind in
this object.
gprof/
* Makefile.in (corefile.o): Depend on hist.h.
* corefile.c: Include hist.h.
2006-10-06 Vladimir Prus <vladimir@codesourcery.com>
* hist.h (struct histogram)
(histograms, num_histograms): New.
* hist.c (find_histogram, find_histogram_for_pc)
(read_histogram_header): New.
(s_lowpc, s_highpc, lowpc, highpc, hist_num_bins)
(hist_sample): Remove.
(hist_read_rec): Use the above, and handle multiple
histogram records with disjoint address ranges.
(hist_write_hist): Support several histogram records.
(scale_and_align_entries): Adjust for multiple histograms.
(hist_assign_samples_1): New.
(hist_assign_samples): Use the above.
(hist_clip_symbol_address): New.
* hist.h (hist_check_address)
(hist_clip_symbol_address): Declare.
* gmon_io.c (gmon_out_read, gmon_out_write): Adjust handling
of legacy format for multiple histogram changes.
* corefile.c (find_call): Check for core_text_space and
clip symbol address range here.
* vax.c (vax_find_call): Don't check for
core_text_space, or clip the symbol's address range here.
Use hist_check_address to check call's target address.
* sparc.c: Likewise.
* tahoe.c: Likewise.
* i386.c: Likewise.
* mips.c: Likewise. Also use core_text_sect->vma as the base
address for code accesses, just like other machine-specific
routines do.
2006-08-03 Kazu Hirata <kazu@codesourcery.com>
* gas/config/tc-m68k.c (archs): Add -mfido as an alias for
-mfido_a.
2006-06-23 Kazu Hirata <kazu@codesourcery.com>
* gas/config/tc-m68k.c (cpu_of_arch): Replace fido with
fido_a.
(archs): Likewise.
(m68k_ip): Likewise.
(select_control_regs): Likewise.
(md_show_usage): Replace -mfido with -mfidoa.
* include/opcode/m68k.h (fido): Rename to fido_a.
* opcodes/m68k-opc.c (m68k_opcodes): Replace fido with fido_a.
* gas/config/m68k-parse.h (m68k_register): Add CAC and MBB.
* gas/config/tc-m68k.c (fido_control_regs): New.
(cpu_of_arch): Add fido.
(archs): Add an entry for fido.
(m68k_ip): Add warnings for uses of tbl[su]{n,}[bwl] on
fido. Recognize CAC and MBB.
(init_tabl): Add CAC and MBB.
(select_control_regs): Choose fido as the current chip
when the current architecture is fido or when -mfido
is given explicitly.
* gas/testsuite/gas/m68k/all.exp: Disable operands, cas, and
bitfield on fido-*-*. Run fido on fido-*-*.
* gas/testsuite/gas/m68k/fido.d: New.
* gas/testsuite/gas/m68k/fido.s: Likewise.
* include/opcode/m68k.h: Document new control registers CAC
and MBB.
* opcodes/m68k-dis.c (print_insn_arg): Add cac and mbb.
* opcodes/m68k-opc.c (m68k_opcodes): Add sleep and trapx.
2005-07-22 Kazu Hirata <kazu@codesourcery.com>
* gas/config/tc-m68k.c (archs): Add fido as an OR of
cpu32 and fido.
(md_show_usage): Add -mfido.
* include/opcode/m68k.h (fido): New.
Paul Brook [Sun, 29 Oct 2006 00:03:03 +0000 (00:03 +0000)]
2006-10-28 Paul Brook <paul@codesourcery.com>
Julian Brown <julian@codesourcery.com>
bfd/
* elf32-arm.c (copy_eabi_attributes): Correct starting offset.
(elf32_arm_merge_eabi_attributes): Mark output as initialized.
Only set Tag_CPU_name and Tag_ABI_PCS_R9_use if input attribute
is present.
Paul Brook [Thu, 26 Oct 2006 19:44:34 +0000 (19:44 +0000)]
2006-10-26 Paul Brook <paul@codesourcery.com>
gas/
* config/tc-arm.c (arm_is_eabi): New function.
* config/tc-arm.h (arm_is_eabi): New prototype.
(THUMB_IS_FUNC): Use ELF function type for EABI objects.
* doc/c-arm.texi (.thumb_func): Update documentation.
Joseph Myers [Tue, 3 Oct 2006 22:55:01 +0000 (22:55 +0000)]
ld/
* configure.tgt (i[3-7]86-*-linux-*): Also define
targ_extra_libpath in want64 case.
* emulparams/elf_x86_64.sh: Handle i[3-7]86-*-linux-* the same as
x86_64*-linux*.
libiberty/
* pex-common.c: New function pex_run_in_environment.
* pex-common.h: Add environment parameter to exec_child.
* pex-msdos.c: Add environment parameter to pex_msdos_exec_child.
* pex-djgpp.c: Add environment parameter to pex_djgpp_exec_child.
(pex_djgpp_exec_child): Pass environment to child process.
* pex-unix.c: Add environment parameter to pex_unix_exec_child.
(pex_unix_exec_child): Pass environment to child process.
* pex-win32.c: Add environment parameter to pex_win32_exec_child.
New function env_compare for comparing VAR=VALUE pairs.
(win32_spawn): Assemble environment block and pass to CreateProcess.
(spawn_script): Pass environment through to win32_spawn.
(pex_win32_exec_child): Pass environment through to spawn_script and
win32_spawn.
* functions.texi: Regenerate.
* pexecute.txh: Document pex_run_in_environment.
Joseph Myers [Tue, 19 Sep 2006 18:45:45 +0000 (18:45 +0000)]
2006-09-19 Mark Shinwell <shinwell@codesourcery.com>
Joseph Myers <joseph@codesourcery.com>
Ian Lance Taylor <ian@wasabisystems.com>
Ben Elliston <bje@wasabisystems.com>
gas/
* config/tc-arm.c (enum operand_parse_code): New code OP_RIWR_I32z.
(parse_operands): Handle OP_RIWR_I32z.
(do_iwmmxt_wmerge): New function.
(do_iwmmxt_wldstd): Handle iwmmxt2 case where second operand is
a register.
(do_iwmmxt_wrwrwr_or_imm5): New function.
(insns): Mark instructions as RIWR_I32z as appropriate.
Also add torvsc<b,h,w>, wabs<b,h,w>, wabsdiff<b,h,w>,
waddbhus<l,m>, waddhc, waddwc, waddsubhx, wavg4{r}, wmaddu{x,n},
wmadds{x,n}, wmerge, wmiaxy{n}, wmiawxy{n}, wmul<sm,um>{r},
wmulw<um,sm,l>{r}, wqmiaxy{n}, wqmulm{r}, wqmulwm{r}, wsubaddhx.
(md_begin): Handle IWMMXT2.
(arm_cpus): Add iwmmxt2.
(arm_extensions): Likewise.
(arm_archs): Likewise.
gas/testsuite/
* gas/arm/iwmmxt2.s: New file.
* gas/arm/iwmmxt2.d: New file.
opcodes/
* arm-dis.c (coprocessor_opcodes): The X-qualifier to WMADD may
only be used with the default multiply-add operation, so if N is
set, don't bother printing X. Add new iwmmxt instructions.
(IWMMXT_INSN_COUNT): Update.
(iwmmxt_wwssnames): Qualify "wwss" names at index 2, 6, 10 and 14
with a 'c' suffix.
(print_insn_coprocessor): Check for iWMMXt2. Handle format
specifiers 'r', 'i'.
gas/testsuite/
* testsuite/gas/arm/neon-cov.s: Test pseudo-instruction forms of
vmov, vmvn and logic immediate instructions.
* testsuite/gas/arm/neon-cov.d: ditto.
Julian Brown [Thu, 14 Sep 2006 13:57:36 +0000 (13:57 +0000)]
gas/
* config/tc-arm.c (parse_immediate): Add BOUNDED parameter, rename
to...
(parse_immediate_maybe_bounded): This. Only bounds-check if BOUNDED
is true.
(parse_immediate_bounded): New function, with same arguments and
semantics as previous parse_immediate.
(parse_immediate_unbounded): New function. Parse an unbounded
integer (with sizeof (exp.X_add_number)).
(parse_big_immediate): Allow for 64-bit exp.X_add_number when
parsing 64-bit immediates.
(parse_address_main): Use parse_immediate_bounded not
parse_immediate.
(parse_ror): Likewise.
(parse_operands): Likewise. For Neon immediates, use
parse_immediate_unbounded. Add new local po_imm_unb_or_fail macro.
Paul Brook [Tue, 5 Sep 2006 16:25:48 +0000 (16:25 +0000)]
2006-09-05 Vladimir Prus <vladimir@codesourcery.com>
bfd/
* elf32-arm.c (elf32_arm_swap_symbol_out): Remove
unconditionall setting of low bit for Thumb symbol
mistakenly left behind after check for external
symbols was added.
ld/testsuite/
* ld-arm/use-thumb-lib.sym: Use regexps instead of
absolute addresses, for robustness.
Paul Brook [Mon, 4 Sep 2006 15:55:36 +0000 (15:55 +0000)]
2006-09-04 Paul Brook <paul@codesourcery.com>
gas/
* config/tc-arm.c (do_neon_dyadic_if_i): Remove.
(do_neon_dyadic_if_i_d): Avoid setting U bit.
(do_neon_mac_maybe_scalar): Ditto.
(do_neon_dyadic_narrow): Force operand type to NT_integer.
(insns): Remove out of date comments.
gas/testsuite/
* gas/arm/neon-cov.s: Test .u and .s aliases for .i suffixes.
* gas/arm/neon-cov.d: Adjust expected output.
opcodes/
* arm-dis.c (neon_opcode): Fix suffix on VMOVN.
Mark Shinwell [Wed, 30 Aug 2006 17:39:17 +0000 (17:39 +0000)]
bfd/
* elf32-arm.c (elf32_arm_final_link_relocate): Add support for
R_ARM_MOVW_BREL_NC, R_ARM_MOVW_BREL, R_ARM_MOVT_BREL,
R_ARM_THM_MOVW_BREL_NC, R_ARM_THM_MOVW_BREL and
R_ARM_THM_MOVT_BREL relocations.
Nathan Sidwell [Tue, 29 Aug 2006 11:03:30 +0000 (11:03 +0000)]
ld/
Backport 2006-08-28 Alan Modra <amodra@bigpond.net.au>
* scripttempl/elf.sc: Ensure that crtbegin and crtend entries will
not match random object files in a path containing "crtbegin" or
"crtend" as part of a directory name.
* scripttempl/armbpabi.sc: Likewise.
* scripttempl/crisaout.sc: Likewise.
* scripttempl/elf32crx.sc: Likewise.
* scripttempl/elf32sh-symbian.sc: Likewise.
* scripttempl/elf_chaos.sc: Likewise.
* scripttempl/elfd10v.sc: Likewise.
* scripttempl/elfd30v.sc: Likewise.
* scripttempl/elfxtensa.sc: Likewise.
* scripttempl/iq2000.sc: Likewise.
* scripttempl/mmo.sc: Likewise.
* scripttempl/xstormy16.sc: Likewise.
nobody [Tue, 29 Aug 2006 05:16:19 +0000 (05:16 +0000)]
This commit was manufactured by cvs2svn to create branch 'binutils-csl-
2_17-branch'.
Cherrypick from master 2006-08-29 05:16:18 UTC Alan Modra <amodra@gmail.com> 'Adjust target test.':
ld/testsuite/ld-elf/loadaddr3.t
ld/testsuite/ld-elf/loadaddr3a.d
ld/testsuite/ld-elf/loadaddr3b.d
Mark Shinwell [Thu, 24 Aug 2006 14:49:52 +0000 (14:49 +0000)]
bfd/
* elf32-arm.c (elf32_arm_howto_table_1): Change offset for
R_THM_CALL to 25 and remove FIXME comment.
(using_thumb2): New function.
(elf32_arm_final_link_relocate): Cope with Thumb-2 BL encoding.
Joseph Myers [Sat, 19 Aug 2006 16:27:35 +0000 (16:27 +0000)]
gas/
* config/tc-arm.c (s_arm_unwind_save_mmxwr): Correct condition for
merging with previous long opcode.
gas/testsuite/
* gas/arm/unwind.s: Test not merging iWMMXt register save with
previous long opcode.
* gas/arm/unwind.d, gas/arm/unwind_vxworks.d: Update.
nobody [Fri, 18 Aug 2006 15:00:19 +0000 (15:00 +0000)]
This commit was manufactured by cvs2svn to create branch 'binutils-csl-
2_17-branch'.
Cherrypick from master 2006-08-18 15:00:18 UTC Paul Brook <paul@codesourcery.com> '2006-08-18 Paul Brook <paul@codesourcery.com>':
ld/testsuite/ld-arm/armthumb-lib.d
ld/testsuite/ld-arm/armthumb-lib.sym
ld/testsuite/ld-elf/loadaddr.s
Julian Brown [Wed, 16 Aug 2006 10:37:32 +0000 (10:37 +0000)]
gas/
* config/tc-arm.c (md_assemble): Improve diagnostic when attempting
to use ARM instructions on non-ARM-supporting cores.
(autoselect_thumb_from_cpu_variant): New function. Switch on Thumb
mode automatically based on cpu variant.
(md_begin): Call above function.
gas/testsuite/
* gas/arm/noarm.s: Add test for disabled ARM insns.
* gas/arm/noarm.d: Drive test for above.
* gas/arm/noarm.l: Expected error output.
nobody [Wed, 16 Aug 2006 10:32:41 +0000 (10:32 +0000)]
This commit was manufactured by cvs2svn to create branch 'binutils-csl-
2_17-branch'.
Cherrypick from master 2006-08-16 10:32:40 UTC Julian Brown <julian@codesourcery.com> ' * gas/arm/noarm.s: Add test for disabled ARM insns.':
gas/testsuite/gas/arm/noarm.d
gas/testsuite/gas/arm/noarm.l
gas/testsuite/gas/arm/noarm.s
ld/emultempl/mipself.em
ld/testsuite/ld-mips-elf/hash1.s
ld/testsuite/ld-mips-elf/hash1a.d
ld/testsuite/ld-mips-elf/hash1b.d
ld/testsuite/ld-mips-elf/hash1c.d
Mark Shinwell [Tue, 15 Aug 2006 10:50:40 +0000 (10:50 +0000)]
* config/tc-arm.c (s_arm_unwind_save_vfp_armv6): New. Parse
a directive saving VFP registers for ARMv6 or later.
(s_arm_unwind_save): Add parameter arch_v6 and call
s_arm_unwind_save_vfp or s_arm_unwind_save_vfp_armv6 as
appropriate.
(md_pseudo_table): Add entry for new "vsave" directive.
* doc/c-arm.texi: Correct error in example for "save"
directive (fstmdf -> fstmdx). Also document "vsave" directive.
bfd/
* Makefile.am: (VERSUFFIX_s): New. Pass it to compiler
via -D.
* Makefile.in: Regenerated.
* configure: Regenerated.
* configure.in: Add --with-versuffix option.
* version.h: Add BFD_VERSION_SUFFIX, use it
in BFD_VERSION_STRING.
binutils/
* Makefile.am: (REPORT_BUGS_TO_s): New. Pass it to compiler
via -D.
* Makefile.in: Regenerated.
* configure: Regenerated.
* configure.in: Add --with-bugurl option.
gas/
* Makefile.am: (REPORT_BUGS_TO_s): New. Pass it to compiler
via -D.
* Makefile.in: Regenerated.
* configure: Regenerated.
* configure.in: Add --with-bugurl option.
gprof/
* Makefile.am: (VERSUFFIX_s, REPORT_BUGS_TO_s): New. Pass
them to compiler via -D.
* Makefile.in: Regenerated.
* configure: Regenerated.
* configure.in: Add --with-versuffix and --with-bugurl option.
* gprof.c: Print version suffix.
ld/
* Makefile.am: (REPORT_BUGS_TO_s): New. Pass it to compiler
via -D.
* Makefile.in: Regenerated.
* configure: Regenerated.
* configure.in: Add --with-bugurl option.
gas/
* tc-arm.c (do_t_add_sub): Use addw/subw when source is PC.
(md_convert_frag): Use correct reloc for add_pc. Use
BFD_RELOC_ARM_T32_ADD_IMM for normal add/sum.
(md_apply_fix): Handle BFD_RELOC_ARM_T32_ADD_IMM.
(arm_force_relocation): Handle BFD_RELOC_ARM_T32_ADD_IMM.
gas/testsuite/
* gas/arm/thumb2_add.d: New test.
* gas/arm/thumb2_add.s: New test.
This commit was manufactured by cvs2svn to create branch 'binutils-csl-
2_17-branch'.
Cherrypick from master 2006-07-18 16:44:47 UTC Paul Brook <paul@codesourcery.com> '2006-07-18 Paul Brook <paul@codesourcery.com>':
gas/testsuite/gas/arm/thumb2_add.d
gas/testsuite/gas/arm/thumb2_add.s
This commit was manufactured by cvs2svn to create branch 'binutils-csl-
2_17-branch'.
Cherrypick from master 2006-07-12 12:47:00 UTC Richard Sandiford <rdsandiford@googlemail.com> 'bfd/':
ld/testsuite/ld-elf/eh1.d
ld/testsuite/ld-elf/eh2.d
ld/testsuite/ld-elf/eh3.d
ld/testsuite/ld-m68k/merge-ok-1c.d
Mark Shinwell [Wed, 21 Jun 2006 14:40:24 +0000 (14:40 +0000)]
ld/
* ldlang.c (lang_insert_orphan): Correctly handle the case where
the section is to end up after the section currently at the end
of the list in output_bfd.
Mark Shinwell [Thu, 15 Jun 2006 15:53:11 +0000 (15:53 +0000)]
Support for ARM "group relocations" numbers 4, and 57 through 83.
* include/elf/arm.h: Correct names of R_ARM_LDC_G{0,1,2}
to R_ARM_LDC_SB_G{0,1,2} respectively.
bfd/
* bfd-in2.h: Regenerate.
* elf32-arm.c (R_ARM_ALU_PC_G0_NC, R_ARM_ALU_PC_G0,
R_ARM_ALU_PC_G1_NC, R_ARM_ALU_PC_G1, R_ARM_ALU_PC_G2,
R_ARM_LDR_PC_G1, R_ARM_LDR_PC_G2, R_ARM_LDRS_PC_G0,
R_ARM_LDRS_PC_G1, R_ARM_LDRS_PC_G2, R_ARM_LDC_PC_G0,
R_ARM_LDC_PC_G1, R_ARM_LDC_PC_G2, R_ARM_ALU_SB_G0_NC,
R_ARM_ALU_SB_G0, R_ARM_ALU_SB_G1_NC, R_ARM_ALU_SB_G1,
R_ARM_ALU_SB_G2, R_ARM_LDR_SB_G0, R_ARM_LDR_SB_G1,
R_ARM_LDR_SB_G2, R_ARM_LDRS_SB_G0, R_ARM_LDRS_SB_G1,
R_ARM_LDRS_SB_G2, R_ARM_LDC_SB_G0, R_ARM_LDC_SB_G1,
R_ARM_LDC_SB_G2): New relocation types.
(R_ARM_PC13): Rename to AAELF name R_ARM_LDR_PC_G0 and
adjust HOWTO entry to be consistent with R_ARM_LDR_PC_G1
and friends.
(elf32_arm_howto_table_3): Delete; contents merged into
elf32_arm_howto_table_2.
(elf32_arm_howto_from_type): Adjust correspondingly.
(elf32_arm_reloc_map): Extend with the above relocations.
(calculate_group_reloc_mask): New function.
(identify_add_or_sub): New function.
(elf32_arm_final_link_relocate): Support for the above
relocations.
* reloc.c: Add enumeration entries for BFD_RELOC_ARM_...
codes to correspond to the above relocations.
gas/
* config/tc-arm.c (enum parse_operand_result): New.
(struct group_reloc_table_entry): New.
(enum group_reloc_type): New.
(group_reloc_table): New array.
(find_group_reloc_table_entry): New function.
(parse_shifter_operand_group_reloc): New function.
(parse_address_main): New function, incorporating code
from the old parse_address function. To be used via...
(parse_address): wrapper for parse_address_main; and
(parse_address_group_reloc): new function, likewise.
(enum operand_parse_code): New codes OP_SHG, OP_ADDRGLDR,
OP_ADDRGLDRS, OP_ADDRGLDC.
(parse_operands): Support for these new operand codes.
New macro po_misc_or_fail_no_backtrack.
(encode_arm_cp_address): Preserve group relocations.
(insns): Modify to use the above operand codes where group
relocations are permitted.
(md_apply_fix): Handle the group relocations
ALU_PC_G0_NC through LDC_SB_G2.
(tc_gen_reloc): Likewise.
(arm_force_relocation): Leave group relocations for the linker.
(arm_fix_adjustable): Likewise.
gas/testsuite/
* gas/arm/group-reloc-alu.d: New test.
* gas/arm/group-reloc-alu-encoding-bad.d: New test.
* gas/arm/group-reloc-alu-encoding-bad.l: New test.
* gas/arm/group-reloc-alu-encoding-bad.s: New test.
* gas/arm/group-reloc-alu-parsing-bad.d: New test.
* gas/arm/group-reloc-alu-parsing-bad.l: New test.
* gas/arm/group-reloc-alu-parsing-bad.s: New test.
* gas/arm/group-reloc-alu.s: New test.
* gas/arm/group-reloc-ldc.d: New test.
* gas/arm/group-reloc-ldc-encoding-bad.d: New test.
* gas/arm/group-reloc-ldc-encoding-bad.l: New test.
* gas/arm/group-reloc-ldc-encoding-bad.s: New test.
* gas/arm/group-reloc-ldc-parsing-bad.d: New test.
* gas/arm/group-reloc-ldc-parsing-bad.l: New test.
* gas/arm/group-reloc-ldc-parsing-bad.s: New test.
* gas/arm/group-reloc-ldc.s: New test.
* gas/arm/group-reloc-ldr.d: New test.
* gas/arm/group-reloc-ldr-encoding-bad.d: New test.
* gas/arm/group-reloc-ldr-encoding-bad.l: New test.
* gas/arm/group-reloc-ldr-encoding-bad.s: New test.
* gas/arm/group-reloc-ldr-parsing-bad.d: New test.
* gas/arm/group-reloc-ldr-parsing-bad.l: New test.
* gas/arm/group-reloc-ldr-parsing-bad.s: New test.
* gas/arm/group-reloc-ldr.s: New test.
* gas/arm/group-reloc-ldrs.d: New test.
* gas/arm/group-reloc-ldrs-encoding-bad.d: New test.
* gas/arm/group-reloc-ldrs-encoding-bad.l: New test.
* gas/arm/group-reloc-ldrs-encoding-bad.s: New test.
* gas/arm/group-reloc-ldrs-parsing-bad.d: New test.
* gas/arm/group-reloc-ldrs-parsing-bad.l: New test.
* gas/arm/group-reloc-ldrs-parsing-bad.s: New test.
* gas/arm/group-reloc-ldrs.s: New test.
ld/testsuite/
* ld-arm/group-relocs-alu-bad.d: New test.
* ld-arm/group-relocs-alu-bad.s: New test.
* ld-arm/group-relocs.d: New test.
* ld-arm/group-relocs-ldc-bad.d: New test.
* ld-arm/group-relocs-ldc-bad.s: New test.
* ld-arm/group-relocs-ldr-bad.d: New test.
* ld-arm/group-relocs-ldr-bad.s: New test.
* ld-arm/group-relocs-ldrs-bad.d: New test.
* ld-arm/group-relocs-ldrs-bad.s: New test.
* ld-arm/group-relocs.s: New test.
* ld-arm/arm-elf.exp: Wire in new tests.
Julian Brown [Thu, 25 May 2006 16:49:50 +0000 (16:49 +0000)]
* elf.c (sym_is_global): Return a bfd_boolean.
(ignore_section_sym): New function.
(elf_map_symbols): Use ignore_section_sym to discard some syms.
(_bfd_elf_symbol_from_bfd_symbol): Ensure section belongs to
bfd before using elf_section_syms.
Paul Brook [Wed, 24 May 2006 16:24:56 +0000 (16:24 +0000)]
2006-05-24 Paul Brook <paul@codesourcery.com>
Backport form mainline.
* bfd/elf32-arm.c (put_arm_insn, put_thumb_insn): New functions.
(elf32_thumb_to_arm_stub, elf32_arm_to_thumb_stub,
elf32_arm_finish_dynamic_symbol): Use them.
nobody [Mon, 15 May 2006 19:57:36 +0000 (19:57 +0000)]
This commit was manufactured by cvs2svn to create branch 'binutils-csl-
2_17-branch'.
Cherrypick from master 2006-05-15 19:57:35 UTC Paul Brook <paul@codesourcery.com> '2006-05-15 Paul Brook <paul@codesourcery.com>':
ld/testsuite/ld-arm/arm-be8.d
ld/testsuite/ld-arm/arm-be8.s
Joseph Myers [Sat, 6 May 2006 17:22:14 +0000 (17:22 +0000)]
Backport:
2006-03-30 Jakub Jelinek <jakub@redhat.com>
* ldmisc.c (vfinfo): Revert 2005-10-05 changes. If
bfd_find_nearest_line succeeded for %C or %D, but filename
is NULL, print section+offset at the end.
Julian Brown [Fri, 5 May 2006 18:31:29 +0000 (18:31 +0000)]
* gas/config/tc-arm.c (stdarg.h): include.
(arm_it): Add uncond_value field. Add isvec and issingle to operand
array.
(arm_reg_type): Add REG_TYPE_VFSD (single or double VFP reg) and
REG_TYPE_NSDQ (single, double or quad vector reg).
(reg_expected_msgs): Update.
(BAD_FPU): Add macro for unsupported FPU instruction error.
(parse_neon_type): Support 'd' as an alias for .f64.
(parse_typed_reg_or_scalar): Support REG_TYPE_VFSD, REG_TYPE_NSDQ
sets of registers.
(parse_vfp_reg_list): Don't update first arg on error.
(parse_neon_mov): Support extra syntax for VFP moves.
(operand_parse_code): Add OP_RVSD, OP_RNSDQ, OP_VRSDLST, OP_RVSD_IO,
OP_RNSDQ_RNSC, OP_RVC_PSR, OP_APSR_RR, OP_oRNSDQ.
(parse_operands): Support isvec, issingle operands fields, new parse
codes above.
(do_vfp_nsyn_mrs, do_vfp_nsyn_msr): New functions. Support VFP mrs,
msr variants.
(do_mrs, do_msr, do_t_mrs, do_t_msr): Add support for above.
(NEON_ENC_TAB): Add vnmul, vnmla, vnmls, vcmp, vcmpz, vcmpe, vcmpez.
(NEON_ENC_SINGLE, NEON_ENC_DOUBLE): Define macros.
(NEON_SHAPE_DEF): New macro. Define table of possible instruction
shapes.
(neon_shape): Redefine in terms of above.
(neon_shape_class): New enumeration, table of shape classes.
(neon_shape_el): New enumeration. One element of a shape.
(neon_shape_el_size): Register widths of above, where appropriate.
(neon_shape_info): New struct. Info for shape table.
(neon_shape_tab): New array.
(neon_type_mask): Add N_F64, N_VFP. Update N_MAX_NONSPECIAL.
(neon_check_shape): Rewrite as...
(neon_select_shape): New function to classify instruction shapes,
driven by new table neon_shape_tab array.
(neon_quad): New function. Return 1 if shape should set Q flag in
instructions (or equivalent), 0 otherwise.
(type_chk_of_el_type): Support F64.
(el_type_of_type_chk): Likewise.
(neon_check_type): Add support for VFP type checking (VFP data
elements fill their containing registers).
(do_vfp_cond_or_thumb): Fill in condition field in ARM mode, or 0xE
in thumb mode for VFP instructions.
(do_vfp_nsyn_opcode): New function. Look up the opcode in argument,
and encode the current instruction as if it were that opcode.
(try_vfp_nsyn): New. If this looks like a VFP instruction with ARGS
arguments, call function in PFN.
(do_vfp_nsyn_add_sub, do_vfp_nsyn_mla_mls, do_vfp_nsyn_mul)
(do_vfp_nsyn_abs_neg, do_vfp_nsyn_ldm_stm, do_vfp_nsyn_ldr_str)
(do_vfp_nsyn_sqrt, do_vfp_nsyn_div, do_vfp_nsyn_nmul)
(do_vfp_nsyn_cmp, nsyn_insert_sp, do_vfp_nsyn_push)
(do_vfp_nsyn_pop, do_vfp_nsyn_cvt, do_vfp_nsyn_cvtz): New functions.
Redirect Neon-syntax VFP instructions to VFP instruction handlers.
(do_neon_dyadic_i_su, do_neon_dyadic_i64_su, do_neon_shl_imm)
(do_neon_qshl_imm, do_neon_logic, do_neon_bitfield)
(neon_dyadic_misc, neon_compare, do_neon_tst, do_neon_qdmulh)
(do_neon_fcmp_absolute, do_neon_step, do_neon_sli, do_neon_sri)
(do_neon_qshlu_imm, neon_move_immediate, do_neon_mvn, do_neon_ext)
(do_neon_rev, do_neon_dup, do_neon_rshift_round_imm, do_neon_trn)
(do_neon_zip_uzp, do_neon_sat_abs_neg, do_neon_pair_long)
(do_neon_recip_est, do_neon_cls, do_neon_clz, do_neon_cnt)
(do_neon_swp): Use neon_select_shape not neon_check_shape. Use
neon_quad.
(vfp_or_neon_is_neon): New function. Call if a mnemonic shared
between VFP and Neon turns out to belong to Neon. Perform
architecture check and fill in condition field if appropriate.
(do_neon_addsub_if_i, do_neon_mac_maybe_scalar, do_neon_abs_neg)
(do_neon_cvt): Add support for VFP variants of instructions.
(neon_cvt_flavour): Extend to cover VFP conversions.
(do_neon_mov): Rewrite to use neon_select_shape. Add support for VFP
vmov variants.
(do_neon_ldr_str): Handle single-precision VFP load/store.
(do_neon_ld_st_interleave, do_neon_ld_st_lane, do_neon_ld_dup): Use
NS_NULL not NS_IGNORE.
(opcode_tag): Add OT_csuffixF for operands which either take a
conditional suffix, or have 0xF in the condition field.
(md_assemble): Add support for OT_csuffixF.
(NCE): Replace macro with...
(NCE_tag, NCE, NCEF): New macros.
(nCE): Replace macro with...
(nCE_tag, nCE, nCEF): New macros.
(insns): Add support for VFP insns or VFP versions of insns msr, mrs,
vsqrt, vdiv, vnmul, vnmla, vnmls, vcmp, vcmpe, vpush, vpop, vcvtz,
vmul, vmla, vmls, vadd, vsub, vabs, vneg, vldm, vldmia, vldbdb, vstm,
vstmia, vstmdb, vldr, vstr, vcvt, vmov. Group shared VFP/Neon insns
together.
* gas/testsuite/gas/arm/itblock.s: New file. Helper macro for making
all-true IT blocks.
* gas/testsuite/gas/arm/neon-cond-bad-inc.s: New test. Make sure
unconditional Neon instructions are rejected...
* gas/testsuite/gas/arm/neon-cond-bad.s: In ARM mode, and...
* gas/testsuite/gas/arm/neon-cond-bad_t2.s: Accepted in Thumb mode
(with IT).
* gas/testsuite/gas/arm/neon-cond-bad.l: Expected error output in ARM
mode.
* gas/testsuite/gas/arm/neon-cond-bad.d: Control ARM mode test.
* gas/testsuite/gas/arm/neon-cond-bad_t2.d: Expected output in Thumb
mode.
* gas/testsuite/gas/arm/vfp-neon-syntax-inc.s: Test VFP Neon-style
syntax.
* gas/testsuite/gas/arm/vfp-neon-syntax.s: ...in ARM mode.
* gas/testsuite/gas/arm/vfp-neon-syntax_t2.s: ...and Thumb mode.
* gas/testsuite/gas/arm/vfp-neon-syntax.d: Expected output in ARM mode.
* gas/testsuite/gas/arm/vfp-neon-syntax_t2.d: Expected output in Thumb
mode.