[thirdparty/gcc.git] / gcc / config / arm / aout.h

/* Definitions of target machine for GNU compiler, for ARM with a.out
   Copyright (C) 1995-2021 Free Software Foundation, Inc.
   Contributed by Richard Earnshaw (rearnsha@armltd.co.uk).
   
   This file is part of GCC.

   GCC is free software; you can redistribute it and/or modify it
   under the terms of the GNU General Public License as published
   by the Free Software Foundation; either version 3, or (at your
   option) any later version.

   GCC is distributed in the hope that it will be useful, but WITHOUT
   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
   License for more details.

   Under Section 7 of GPL version 3, you are granted additional
   permissions described in the GCC Runtime Library Exception, version
   3.1, as published by the Free Software Foundation.

   You should have received a copy of the GNU General Public License and
   a copy of the GCC Runtime Library Exception along with this program;
   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
   <http://www.gnu.org/licenses/>.  */

#ifndef ASM_APP_ON
#define ASM_APP_ON  		""
#endif
#ifndef ASM_APP_OFF
#define ASM_APP_OFF  		""
#endif

/* Switch to the text or data segment.  */
#define TEXT_SECTION_ASM_OP  	"\t.text"
#define DATA_SECTION_ASM_OP  	"\t.data"
#define BSS_SECTION_ASM_OP   	"\t.bss"

/* Note: If USER_LABEL_PREFIX or LOCAL_LABEL_PREFIX are changed,
   make sure that this change is reflected in the function
   coff_arm_is_local_label_name() in bfd/coff-arm.c.  */
#ifndef REGISTER_PREFIX
#define REGISTER_PREFIX 	""
#endif

#ifndef USER_LABEL_PREFIX
#define USER_LABEL_PREFIX 	"_"
#endif

#ifndef LOCAL_LABEL_PREFIX
#define LOCAL_LABEL_PREFIX 	""
#endif

/* The assembler's names for the registers.  Note that the ?xx registers are
   there so that VFPv3/NEON registers D16-D31 have the same spacing as D0-D15
   (each of which is overlaid on two S registers), although there are no
   actual single-precision registers which correspond to D16-D31.  New register
   p0 is added which is used for MVE predicated cases.  */

#ifndef REGISTER_NAMES
#define REGISTER_NAMES						\
{								\
  "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",		\
  "r8", "r9", "r10", "fp", "ip", "sp", "lr", "pc",		\
  "s0",  "s1",  "s2",  "s3",  "s4",  "s5",  "s6",  "s7",	\
  "s8",  "s9",  "s10", "s11", "s12", "s13", "s14", "s15",	\
  "s16", "s17", "s18", "s19", "s20", "s21", "s22", "s23",	\
  "s24", "s25", "s26", "s27", "s28", "s29", "s30", "s31",	\
  "d16", "?16", "d17", "?17", "d18", "?18", "d19", "?19",	\
  "d20", "?20", "d21", "?21", "d22", "?22", "d23", "?23",	\
  "d24", "?24", "d25", "?25", "d26", "?26", "d27", "?27",	\
  "d28", "?28", "d29", "?29", "d30", "?30", "d31", "?31",	\
  "wr0",   "wr1",   "wr2",   "wr3",				\
  "wr4",   "wr5",   "wr6",   "wr7",				\
  "wr8",   "wr9",   "wr10",  "wr11",				\
  "wr12",  "wr13",  "wr14",  "wr15",				\
  "wcgr0", "wcgr1", "wcgr2", "wcgr3",				\
  "cc", "vfpcc", "sfp", "afp", "apsrq", "apsrge", "p0"		\
}
#endif

#ifndef ADDITIONAL_REGISTER_NAMES
#define ADDITIONAL_REGISTER_NAMES		\
{						\
  {"a1", 0},					\
  {"a2", 1},					\
  {"a3", 2},					\
  {"a4", 3},					\
  {"v1", 4},					\
  {"v2", 5},					\
  {"v3", 6},					\
  {"v4", 7},					\
  {"v5", 8},					\
  {"v6", 9},					\
  {"rfp", 9}, /* Historical.  */		\
  {"sb", 9}, /* Historical.  */			\
  {"v7", 10},					\
  {"sl", 10},	/* Historical.  */		\
  {"r11", 11},	/* fp */			\
  {"r12", 12},	/* ip */			\
  {"r13", 13},	/* sp */			\
  {"r14", 14},	/* lr */			\
  {"r15", 15}	/* pc */			\
}
#endif

#ifndef OVERLAPPING_REGISTER_NAMES
#define OVERLAPPING_REGISTER_NAMES		\
{						\
  {"d0",  FIRST_VFP_REGNUM + 0,  2},		\
  {"d1",  FIRST_VFP_REGNUM + 2,  2},		\
  {"d2",  FIRST_VFP_REGNUM + 4,  2},		\
  {"d3",  FIRST_VFP_REGNUM + 6,  2},		\
  {"d4",  FIRST_VFP_REGNUM + 8,  2},		\
  {"d5",  FIRST_VFP_REGNUM + 10, 2},		\
  {"d6",  FIRST_VFP_REGNUM + 12, 2},		\
  {"d7",  FIRST_VFP_REGNUM + 14, 2},		\
  {"d8",  FIRST_VFP_REGNUM + 16, 2},		\
  {"d9",  FIRST_VFP_REGNUM + 18, 2},		\
  {"d10", FIRST_VFP_REGNUM + 20, 2},		\
  {"d11", FIRST_VFP_REGNUM + 22, 2},		\
  {"d12", FIRST_VFP_REGNUM + 24, 2},		\
  {"d13", FIRST_VFP_REGNUM + 26, 2},		\
  {"d14", FIRST_VFP_REGNUM + 28, 2},		\
  {"d15", FIRST_VFP_REGNUM + 30, 2},		\
  {"q0",  FIRST_VFP_REGNUM + 0,  4},		\
  {"q1",  FIRST_VFP_REGNUM + 4,  4},		\
  {"q2",  FIRST_VFP_REGNUM + 8,  4},		\
  {"q3",  FIRST_VFP_REGNUM + 12, 4},		\
  {"q4",  FIRST_VFP_REGNUM + 16, 4},		\
  {"q5",  FIRST_VFP_REGNUM + 20, 4},		\
  {"q6",  FIRST_VFP_REGNUM + 24, 4},		\
  {"q7",  FIRST_VFP_REGNUM + 28, 4},		\
  {"q8",  FIRST_VFP_REGNUM + 32, 4},		\
  {"q9",  FIRST_VFP_REGNUM + 36, 4},		\
  {"q10", FIRST_VFP_REGNUM + 40, 4},		\
  {"q11", FIRST_VFP_REGNUM + 44, 4},		\
  {"q12", FIRST_VFP_REGNUM + 48, 4},		\
  {"q13", FIRST_VFP_REGNUM + 52, 4},		\
  {"q14", FIRST_VFP_REGNUM + 56, 4},		\
  {"q15", FIRST_VFP_REGNUM + 60, 4}		\
}
#endif

#ifndef NO_DOLLAR_IN_LABEL
#define NO_DOLLAR_IN_LABEL 1
#endif

/* Generate DBX debugging information.  riscix.h will undefine this because
   the native assembler does not support stabs.  */
#define DBX_DEBUGGING_INFO 1

/* Acorn dbx moans about continuation chars, so don't use any.  */
#ifndef DBX_CONTIN_LENGTH
#define DBX_CONTIN_LENGTH  0
#endif

/* Output a function label definition.  */
#ifndef ASM_DECLARE_FUNCTION_NAME
#define ASM_DECLARE_FUNCTION_NAME(STREAM, NAME, DECL)	\
  do							\
    {							\
      ARM_DECLARE_FUNCTION_NAME (STREAM, NAME, DECL);   \
      ASM_OUTPUT_LABEL (STREAM, NAME);			\
    }							\
  while (0)
#endif

/* Globalizing directive for a label.  */
#define GLOBAL_ASM_OP "\t.global\t"

/* Make an internal label into a string.  */
#ifndef ASM_GENERATE_INTERNAL_LABEL
#define ASM_GENERATE_INTERNAL_LABEL(STRING, PREFIX, NUM)  \
  sprintf (STRING, "*%s%s%u", LOCAL_LABEL_PREFIX, PREFIX, (unsigned int)(NUM))
#endif
     
/* Output an element of a dispatch table.  */
#define ASM_OUTPUT_ADDR_VEC_ELT(STREAM, VALUE)			\
  do								\
    {								\
      gcc_assert (!TARGET_THUMB2);				\
      asm_fprintf (STREAM, "\t.word\t%LL%d\n", VALUE);		\
    }								\
  while (0)
	  

/* Thumb-2 always uses addr_diff_elf so that the Table Branch instructions
   can be used.  For non-pic code where the offsets do not suitable for
   TBB/TBH the elements are output as absolute labels.  */
#define ASM_OUTPUT_ADDR_DIFF_ELT(STREAM, BODY, VALUE, REL)		\
  do									\
    {									\
      if (TARGET_ARM)							\
	asm_fprintf (STREAM, "\tb\t%LL%d\n", VALUE);			\
      else if (TARGET_THUMB1)						\
	{								\
	  if (flag_pic || optimize_size)				\
	    {								\
	      switch (GET_MODE(body))					\
		{							\
		case E_QImode:						\
		  asm_fprintf (STREAM, "\t.byte\t(%LL%d-%LL%d)/2\n",	\
			       VALUE, REL);				\
		  break;						\
		case E_HImode: /* TBH */					\
		  asm_fprintf (STREAM, "\t.2byte\t(%LL%d-%LL%d)/2\n",	\
			       VALUE, REL);				\
		  break;						\
		case E_SImode:						\
		  asm_fprintf (STREAM, "\t.word\t%LL%d-%LL%d\n",	\
			       VALUE, REL);				\
		  break;						\
		default:						\
		  gcc_unreachable();					\
		}							\
	    }								\
	  else								\
	    asm_fprintf (STREAM, "\t.word\t%LL%d+1\n", VALUE);		\
	}								\
      else /* Thumb-2 */						\
	{								\
	  switch (GET_MODE(body))					\
	    {								\
	    case E_QImode: /* TBB */					\
	      asm_fprintf (STREAM, "\t.byte\t(%LL%d-%LL%d)/2\n",	\
			   VALUE, REL);					\
	      break;							\
	    case E_HImode: /* TBH */					\
	      asm_fprintf (STREAM, "\t.2byte\t(%LL%d-%LL%d)/2\n",	\
			   VALUE, REL);					\
	      break;							\
	    case E_SImode:						\
	      if (flag_pic)						\
		asm_fprintf (STREAM, "\t.word\t%LL%d+1-%LL%d\n", VALUE, REL); \
	      else							\
		asm_fprintf (STREAM, "\t.word\t%LL%d+1\n", VALUE);	\
	      break;							\
	    default:							\
	      gcc_unreachable();					\
	    }								\
	}								\
    }									\
  while (0)


#undef  ASM_OUTPUT_ASCII
#define ASM_OUTPUT_ASCII(STREAM, PTR, LEN)  \
  output_ascii_pseudo_op (STREAM, (const unsigned char *) (PTR), LEN)

/* Output a gap.  In fact we fill it with nulls.  */
#undef  ASM_OUTPUT_SKIP
#define ASM_OUTPUT_SKIP(STREAM, NBYTES) 	\
  fprintf (STREAM, "\t.space\t%d\n", (int) (NBYTES))

/* Align output to a power of two.  Horrible /bin/as.  */
#ifndef ASM_OUTPUT_ALIGN  
#define ASM_OUTPUT_ALIGN(STREAM, POWER)			\
  do							\
    {							\
      register int amount = 1 << (POWER);		\
							\
      if (amount == 2)					\
	fprintf (STREAM, "\t.even\n");			\
      else if (amount != 1)				\
	fprintf (STREAM, "\t.align\t%d\n", amount - 4);	\
    }							\
  while (0)
#endif

/* Output a common block.  */
#ifndef ASM_OUTPUT_COMMON
#define ASM_OUTPUT_COMMON(STREAM, NAME, SIZE, ROUNDED)	\
  do							\
    {							\
      fprintf (STREAM, "\t.comm\t");			\
      assemble_name (STREAM, NAME);			\
      asm_fprintf (STREAM, ", %d\t%@ %d\n", 		\
	           (int)(ROUNDED), (int)(SIZE));	\
    }							\
  while (0)
#endif
     
/* Output a local common block.  /bin/as can't do this, so hack a
   `.space' into the bss segment.  Note that this is *bad* practice,
   which is guaranteed NOT to work since it doesn't define STATIC
   COMMON space but merely STATIC BSS space.  */
#ifndef ASM_OUTPUT_ALIGNED_LOCAL
#define ASM_OUTPUT_ALIGNED_LOCAL(STREAM, NAME, SIZE, ALIGN)		\
  do									\
    {									\
      switch_to_section (bss_section);					\
      ASM_OUTPUT_ALIGN (STREAM, floor_log2 (ALIGN / BITS_PER_UNIT));	\
      ASM_OUTPUT_LABEL (STREAM, NAME);					\
      fprintf (STREAM, "\t.space\t%d\n", (int)(SIZE));			\
    }									\
  while (0)
#endif
     
/* Output a zero-initialized block.  */
#ifndef ASM_OUTPUT_ALIGNED_BSS
#define ASM_OUTPUT_ALIGNED_BSS(STREAM, DECL, NAME, SIZE, ALIGN) \
  asm_output_aligned_bss (STREAM, DECL, NAME, SIZE, ALIGN)
#endif

#ifndef ASM_COMMENT_START
#define ASM_COMMENT_START 	"@"
#endif

/* This works for GAS and some other assemblers.  */
#define SET_ASM_OP		"\t.set\t"
Commit	Line	Data
9fb7806b	1	/* Definitions of target machine for GNU compiler, for ARM with a.out
99dee823	2	Copyright (C) 1995-2021 Free Software Foundation, Inc.
ae3e1bb4	3	Contributed by Richard Earnshaw (rearnsha@armltd.co.uk).
9fb7806b	4
4f448245	5	This file is part of GCC.
9fb7806b	6
4f448245 NC	7	GCC is free software; you can redistribute it and/or modify it
4f448245 NC	8	under the terms of the GNU General Public License as published
2f83c7d6	9	by the Free Software Foundation; either version 3, or (at your
4f448245	10	option) any later version.
9fb7806b	11
4f448245 NC	12	GCC is distributed in the hope that it will be useful, but WITHOUT
	13	ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
	14	or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
	15	License for more details.
9fb7806b	16
999db125 GJL	17	Under Section 7 of GPL version 3, you are granted additional
	18	permissions described in the GCC Runtime Library Exception, version
	19	3.1, as published by the Free Software Foundation.
	20
c7eca9fe GJL	21	You should have received a copy of the GNU General Public License and
	22	a copy of the GCC Runtime Library Exception along with this program;
	23	see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
2f83c7d6	24	<http://www.gnu.org/licenses/>. */
9fb7806b	25
d5b7b3ae RE	26	#ifndef ASM_APP_ON
	27	#define ASM_APP_ON ""
	28	#endif
	29	#ifndef ASM_APP_OFF
	30	#define ASM_APP_OFF ""
	31	#endif
9fb7806b RE	32
9fb7806b RE	33	/* Switch to the text or data segment. */
93de6f51 HPN	34	#define TEXT_SECTION_ASM_OP "\t.text"
	35	#define DATA_SECTION_ASM_OP "\t.data"
	36	#define BSS_SECTION_ASM_OP "\t.bss"
b355a481 NC	37
	38	/* Note: If USER_LABEL_PREFIX or LOCAL_LABEL_PREFIX are changed,
	39	make sure that this change is reflected in the function
4f448245	40	coff_arm_is_local_label_name() in bfd/coff-arm.c. */
b355a481 NC	41	#ifndef REGISTER_PREFIX
	42	#define REGISTER_PREFIX ""
	43	#endif
	44
	45	#ifndef USER_LABEL_PREFIX
	46	#define USER_LABEL_PREFIX "_"
	47	#endif
	48
	49	#ifndef LOCAL_LABEL_PREFIX
	50	#define LOCAL_LABEL_PREFIX ""
	51	#endif
9fb7806b	52
f1adb0a9 JB	53	/* The assembler's names for the registers. Note that the ?xx registers are
	54	there so that VFPv3/NEON registers D16-D31 have the same spacing as D0-D15
	55	(each of which is overlaid on two S registers), although there are no
63c8f7d6 SP	56	actual single-precision registers which correspond to D16-D31. New register
	57	p0 is added which is used for MVE predicated cases. */
	58
9fb7806b	59	#ifndef REGISTER_NAMES
0be8bd1a RE	60	#define REGISTER_NAMES \
	61	{ \
	62	"r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", \
	63	"r8", "r9", "r10", "fp", "ip", "sp", "lr", "pc", \
	64	"s0", "s1", "s2", "s3", "s4", "s5", "s6", "s7", \
	65	"s8", "s9", "s10", "s11", "s12", "s13", "s14", "s15", \
	66	"s16", "s17", "s18", "s19", "s20", "s21", "s22", "s23", \
	67	"s24", "s25", "s26", "s27", "s28", "s29", "s30", "s31", \
	68	"d16", "?16", "d17", "?17", "d18", "?18", "d19", "?19", \
	69	"d20", "?20", "d21", "?21", "d22", "?22", "d23", "?23", \
	70	"d24", "?24", "d25", "?25", "d26", "?26", "d27", "?27", \
	71	"d28", "?28", "d29", "?29", "d30", "?30", "d31", "?31", \
	72	"wr0", "wr1", "wr2", "wr3", \
	73	"wr4", "wr5", "wr6", "wr7", \
	74	"wr8", "wr9", "wr10", "wr11", \
	75	"wr12", "wr13", "wr14", "wr15", \
	76	"wcgr0", "wcgr1", "wcgr2", "wcgr3", \
63c8f7d6	77	"cc", "vfpcc", "sfp", "afp", "apsrq", "apsrge", "p0" \
9fb7806b RE	78	}
	79	#endif
	80
	81	#ifndef ADDITIONAL_REGISTER_NAMES
	82	#define ADDITIONAL_REGISTER_NAMES \
	83	{ \
	84	{"a1", 0}, \
	85	{"a2", 1}, \
	86	{"a3", 2}, \
	87	{"a4", 3}, \
	88	{"v1", 4}, \
	89	{"v2", 5}, \
	90	{"v3", 6}, \
	91	{"v4", 7}, \
	92	{"v5", 8}, \
	93	{"v6", 9}, \
0be8bd1a RE	94	{"rfp", 9}, /* Historical. */ \
0be8bd1a RE	95	{"sb", 9}, /* Historical. */ \
9fb7806b	96	{"v7", 10}, \
0be8bd1a	97	{"sl", 10}, /* Historical. */ \
9fb7806b RE	98	{"r11", 11}, /* fp */ \
	99	{"r12", 12}, /* ip */ \
	100	{"r13", 13}, /* sp */ \
	101	{"r14", 14}, /* lr */ \
0be8bd1a	102	{"r15", 15} /* pc */ \
0c6d290e RE	103	}
	104	#endif
	105
	106	#ifndef OVERLAPPING_REGISTER_NAMES
	107	#define OVERLAPPING_REGISTER_NAMES \
	108	{ \
0be8bd1a RE	109	{"d0", FIRST_VFP_REGNUM + 0, 2}, \
	110	{"d1", FIRST_VFP_REGNUM + 2, 2}, \
	111	{"d2", FIRST_VFP_REGNUM + 4, 2}, \
	112	{"d3", FIRST_VFP_REGNUM + 6, 2}, \
	113	{"d4", FIRST_VFP_REGNUM + 8, 2}, \
	114	{"d5", FIRST_VFP_REGNUM + 10, 2}, \
	115	{"d6", FIRST_VFP_REGNUM + 12, 2}, \
	116	{"d7", FIRST_VFP_REGNUM + 14, 2}, \
	117	{"d8", FIRST_VFP_REGNUM + 16, 2}, \
	118	{"d9", FIRST_VFP_REGNUM + 18, 2}, \
	119	{"d10", FIRST_VFP_REGNUM + 20, 2}, \
	120	{"d11", FIRST_VFP_REGNUM + 22, 2}, \
	121	{"d12", FIRST_VFP_REGNUM + 24, 2}, \
	122	{"d13", FIRST_VFP_REGNUM + 26, 2}, \
	123	{"d14", FIRST_VFP_REGNUM + 28, 2}, \
	124	{"d15", FIRST_VFP_REGNUM + 30, 2}, \
	125	{"q0", FIRST_VFP_REGNUM + 0, 4}, \
	126	{"q1", FIRST_VFP_REGNUM + 4, 4}, \
	127	{"q2", FIRST_VFP_REGNUM + 8, 4}, \
	128	{"q3", FIRST_VFP_REGNUM + 12, 4}, \
	129	{"q4", FIRST_VFP_REGNUM + 16, 4}, \
	130	{"q5", FIRST_VFP_REGNUM + 20, 4}, \
	131	{"q6", FIRST_VFP_REGNUM + 24, 4}, \
	132	{"q7", FIRST_VFP_REGNUM + 28, 4}, \
	133	{"q8", FIRST_VFP_REGNUM + 32, 4}, \
	134	{"q9", FIRST_VFP_REGNUM + 36, 4}, \
	135	{"q10", FIRST_VFP_REGNUM + 40, 4}, \
	136	{"q11", FIRST_VFP_REGNUM + 44, 4}, \
	137	{"q12", FIRST_VFP_REGNUM + 48, 4}, \
	138	{"q13", FIRST_VFP_REGNUM + 52, 4}, \
	139	{"q14", FIRST_VFP_REGNUM + 56, 4}, \
	140	{"q15", FIRST_VFP_REGNUM + 60, 4} \
9fb7806b RE	141	}
	142	#endif
	143
be393ecf	144	#ifndef NO_DOLLAR_IN_LABEL
6cfc7210	145	#define NO_DOLLAR_IN_LABEL 1
be393ecf	146	#endif
9fb7806b	147
9fb7806b	148	/* Generate DBX debugging information. riscix.h will undefine this because
4f448245	149	the native assembler does not support stabs. */
23532de9	150	#define DBX_DEBUGGING_INFO 1
9fb7806b RE	151
	152	/* Acorn dbx moans about continuation chars, so don't use any. */
	153	#ifndef DBX_CONTIN_LENGTH
	154	#define DBX_CONTIN_LENGTH 0
	155	#endif
	156
9fb7806b	157	/* Output a function label definition. */
b355a481	158	#ifndef ASM_DECLARE_FUNCTION_NAME
6cfc7210 NC	159	#define ASM_DECLARE_FUNCTION_NAME(STREAM, NAME, DECL) \
	160	do \
	161	{ \
	162	ARM_DECLARE_FUNCTION_NAME (STREAM, NAME, DECL); \
	163	ASM_OUTPUT_LABEL (STREAM, NAME); \
	164	} \
	165	while (0)
b355a481	166	#endif
9fb7806b	167
506a61b1 KG	168	/* Globalizing directive for a label. */
506a61b1 KG	169	#define GLOBAL_ASM_OP "\t.global\t"
9fb7806b	170
9fb7806b	171	/* Make an internal label into a string. */
b355a481	172	#ifndef ASM_GENERATE_INTERNAL_LABEL
9fb7806b	173	#define ASM_GENERATE_INTERNAL_LABEL(STRING, PREFIX, NUM) \
aec3cfba	174	sprintf (STRING, "*%s%s%u", LOCAL_LABEL_PREFIX, PREFIX, (unsigned int)(NUM))
b355a481 NC	175	#endif
b355a481 NC	176
9fb7806b	177	/* Output an element of a dispatch table. */
5b3e6663 PB	178	#define ASM_OUTPUT_ADDR_VEC_ELT(STREAM, VALUE) \
	179	do \
	180	{ \
	181	gcc_assert (!TARGET_THUMB2); \
	182	asm_fprintf (STREAM, "\t.word\t%LL%d\n", VALUE); \
	183	} \
	184	while (0)
	185
9fb7806b	186
5b3e6663 PB	187	/* Thumb-2 always uses addr_diff_elf so that the Table Branch instructions
	188	can be used. For non-pic code where the offsets do not suitable for
	189	TBB/TBH the elements are output as absolute labels. */
657d9449 RE	190	#define ASM_OUTPUT_ADDR_DIFF_ELT(STREAM, BODY, VALUE, REL) \
	191	do \
	192	{ \
	193	if (TARGET_ARM) \
	194	asm_fprintf (STREAM, "\tb\t%LL%d\n", VALUE); \
5b3e6663	195	else if (TARGET_THUMB1) \
907dd0c7 RE	196	{ \
	197	if (flag_pic \|\| optimize_size) \
	198	{ \
	199	switch (GET_MODE(body)) \
	200	{ \
4e10a5a7	201	case E_QImode: \
907dd0c7 RE	202	asm_fprintf (STREAM, "\t.byte\t(%LL%d-%LL%d)/2\n", \
	203	VALUE, REL); \
	204	break; \
4e10a5a7	205	case E_HImode: /* TBH */ \
907dd0c7 RE	206	asm_fprintf (STREAM, "\t.2byte\t(%LL%d-%LL%d)/2\n", \
	207	VALUE, REL); \
	208	break; \
4e10a5a7	209	case E_SImode: \
907dd0c7 RE	210	asm_fprintf (STREAM, "\t.word\t%LL%d-%LL%d\n", \
	211	VALUE, REL); \
	212	break; \
	213	default: \
	214	gcc_unreachable(); \
	215	} \
	216	} \
	217	else \
	218	asm_fprintf (STREAM, "\t.word\t%LL%d+1\n", VALUE); \
	219	} \
5b3e6663 PB	220	else /* Thumb-2 */ \
	221	{ \
	222	switch (GET_MODE(body)) \
	223	{ \
4e10a5a7	224	case E_QImode: /* TBB */ \
5b3e6663 PB	225	asm_fprintf (STREAM, "\t.byte\t(%LL%d-%LL%d)/2\n", \
	226	VALUE, REL); \
	227	break; \
4e10a5a7	228	case E_HImode: /* TBH */ \
5b3e6663 PB	229	asm_fprintf (STREAM, "\t.2byte\t(%LL%d-%LL%d)/2\n", \
	230	VALUE, REL); \
	231	break; \
4e10a5a7	232	case E_SImode: \
5b3e6663 PB	233	if (flag_pic) \
	234	asm_fprintf (STREAM, "\t.word\t%LL%d+1-%LL%d\n", VALUE, REL); \
	235	else \
	236	asm_fprintf (STREAM, "\t.word\t%LL%d+1\n", VALUE); \
	237	break; \
	238	default: \
	239	gcc_unreachable(); \
	240	} \
	241	} \
657d9449 RE	242	} \
	243	while (0)
	244
9fb7806b	245
be393ecf	246	#undef ASM_OUTPUT_ASCII
9fb7806b	247	#define ASM_OUTPUT_ASCII(STREAM, PTR, LEN) \
5a9335ef	248	output_ascii_pseudo_op (STREAM, (const unsigned char *) (PTR), LEN)
9fb7806b RE	249
9fb7806b RE	250	/* Output a gap. In fact we fill it with nulls. */
be393ecf	251	#undef ASM_OUTPUT_SKIP
b355a481	252	#define ASM_OUTPUT_SKIP(STREAM, NBYTES) \
5a9335ef	253	fprintf (STREAM, "\t.space\t%d\n", (int) (NBYTES))
9fb7806b RE	254
9fb7806b RE	255	/* Align output to a power of two. Horrible /bin/as. */
00275db1	256	#ifndef ASM_OUTPUT_ALIGN
6cfc7210 NC	257	#define ASM_OUTPUT_ALIGN(STREAM, POWER) \
	258	do \
	259	{ \
	260	register int amount = 1 << (POWER); \
	261	\
	262	if (amount == 2) \
	263	fprintf (STREAM, "\t.even\n"); \
	264	else if (amount != 1) \
	265	fprintf (STREAM, "\t.align\t%d\n", amount - 4); \
	266	} \
00275db1 PB	267	while (0)
00275db1 PB	268	#endif
9fb7806b	269
4f448245	270	/* Output a common block. */
b355a481	271	#ifndef ASM_OUTPUT_COMMON
6cfc7210 NC	272	#define ASM_OUTPUT_COMMON(STREAM, NAME, SIZE, ROUNDED) \
	273	do \
	274	{ \
	275	fprintf (STREAM, "\t.comm\t"); \
	276	assemble_name (STREAM, NAME); \
d5b7b3ae	277	asm_fprintf (STREAM, ", %d\t%@ %d\n", \
58e15542	278	(int)(ROUNDED), (int)(SIZE)); \
6cfc7210 NC	279	} \
6cfc7210 NC	280	while (0)
b355a481 NC	281	#endif
b355a481 NC	282
33f7f353	283	/* Output a local common block. /bin/as can't do this, so hack a
b355a481 NC	284	`.space' into the bss segment. Note that this is bad practice,
	285	which is guaranteed NOT to work since it doesn't define STATIC
	286	COMMON space but merely STATIC BSS space. */
	287	#ifndef ASM_OUTPUT_ALIGNED_LOCAL
6cfc7210 NC	288	#define ASM_OUTPUT_ALIGNED_LOCAL(STREAM, NAME, SIZE, ALIGN) \
	289	do \
	290	{ \
d6b5193b	291	switch_to_section (bss_section); \
6cfc7210 NC	292	ASM_OUTPUT_ALIGN (STREAM, floor_log2 (ALIGN / BITS_PER_UNIT)); \
6cfc7210 NC	293	ASM_OUTPUT_LABEL (STREAM, NAME); \
58e15542	294	fprintf (STREAM, "\t.space\t%d\n", (int)(SIZE)); \
6cfc7210 NC	295	} \
6cfc7210 NC	296	while (0)
b355a481 NC	297	#endif
b355a481 NC	298
c9d9bc85	299	/* Output a zero-initialized block. */
b355a481	300	#ifndef ASM_OUTPUT_ALIGNED_BSS
6cfc7210	301	#define ASM_OUTPUT_ALIGNED_BSS(STREAM, DECL, NAME, SIZE, ALIGN) \
b355a481 NC	302	asm_output_aligned_bss (STREAM, DECL, NAME, SIZE, ALIGN)
b355a481 NC	303	#endif
9fb7806b	304
9fb7806b	305	#ifndef ASM_COMMENT_START
b355a481	306	#define ASM_COMMENT_START "@"
9fb7806b RE	307	#endif
9fb7806b RE	308
ce29b9d0	309	/* This works for GAS and some other assemblers. */
93de6f51	310	#define SET_ASM_OP "\t.set\t"