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[thirdparty/gcc.git] / gcc / config / i386 / avx512vbmivlintrin.h
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a945c346 1/* Copyright (C) 2013-2024 Free Software Foundation, Inc.
3dcc8af5
IT		 2
3 This file is part of GCC.
4
5 GCC is free software; you can redistribute it and/or modify
6 it under the terms of the GNU General Public License as published by
7 the Free Software Foundation; either version 3, or (at your option)
8 any later version.
9
10 GCC is distributed in the hope that it will be useful,
11 but WITHOUT ANY WARRANTY; without even the implied warranty of
12 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 GNU General Public License for more details.
14
15 Under Section 7 of GPL version 3, you are granted additional
16 permissions described in the GCC Runtime Library Exception, version
17 3.1, as published by the Free Software Foundation.
18
19 You should have received a copy of the GNU General Public License and
20 a copy of the GCC Runtime Library Exception along with this program;
21 see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
22 <http://www.gnu.org/licenses/>. */
23
24#ifndef _IMMINTRIN_H_INCLUDED
25#error "Never use <avx512vbmivlintrin.h> directly; include <immintrin.h> instead."
26#endif
27
28#ifndef _AVX512VBMIVLINTRIN_H_INCLUDED
29#define _AVX512VBMIVLINTRIN_H_INCLUDED
30
fd514717 31#if !defined(__AVX512VL__) || !defined(__AVX512VBMI__) || defined (__EVEX512__)
3dcc8af5 32#pragma GCC push_options
fd514717 33#pragma GCC target("avx512vbmi,avx512vl,no-evex512")
3dcc8af5
IT		 34#define __DISABLE_AVX512VBMIVL__
35#endif /* __AVX512VBMIVL__ */
36
37extern __inline __m256i
38__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
39_mm256_mask_multishift_epi64_epi8 (__m256i __W, __mmask32 __M, __m256i __X, __m256i __Y)
40{
41 return (__m256i) __builtin_ia32_vpmultishiftqb256_mask ((__v32qi) __X,
42 (__v32qi) __Y,
43 (__v32qi) __W,
44 (__mmask32) __M);
45}
46
47extern __inline __m256i
48__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
49_mm256_maskz_multishift_epi64_epi8 (__mmask32 __M, __m256i __X, __m256i __Y)
50{
51 return (__m256i) __builtin_ia32_vpmultishiftqb256_mask ((__v32qi) __X,
52 (__v32qi) __Y,
53 (__v32qi)
fd79b414 54 _mm256_avx512_setzero_si256 (),
3dcc8af5
IT		 55 (__mmask32) __M);
56}
57
58extern __inline __m256i
59__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
60_mm256_multishift_epi64_epi8 (__m256i __X, __m256i __Y)
61{
62 return (__m256i) __builtin_ia32_vpmultishiftqb256_mask ((__v32qi) __X,
63 (__v32qi) __Y,
64 (__v32qi)
4bbabb2a 65 _mm256_avx512_undefined_si256 (),
3dcc8af5
IT		 66 (__mmask32) -1);
67}
68
69extern __inline __m128i
70__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
71_mm_mask_multishift_epi64_epi8 (__m128i __W, __mmask16 __M, __m128i __X, __m128i __Y)
72{
73 return (__m128i) __builtin_ia32_vpmultishiftqb128_mask ((__v16qi) __X,
74 (__v16qi) __Y,
75 (__v16qi) __W,
76 (__mmask16) __M);
77}
78
79extern __inline __m128i
80__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
81_mm_maskz_multishift_epi64_epi8 (__mmask16 __M, __m128i __X, __m128i __Y)
82{
83 return (__m128i) __builtin_ia32_vpmultishiftqb128_mask ((__v16qi) __X,
84 (__v16qi) __Y,
85 (__v16qi)
fd79b414 86 _mm_avx512_setzero_si128 (),
3dcc8af5
IT		 87 (__mmask16) __M);
88}
89
90extern __inline __m128i
91__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
92_mm_multishift_epi64_epi8 (__m128i __X, __m128i __Y)
93{
94 return (__m128i) __builtin_ia32_vpmultishiftqb128_mask ((__v16qi) __X,
95 (__v16qi) __Y,
96 (__v16qi)
4bbabb2a 97 _mm_avx512_undefined_si128 (),
3dcc8af5
IT		 98 (__mmask16) -1);
99}
100
101extern __inline __m256i
102__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
103_mm256_permutexvar_epi8 (__m256i __A, __m256i __B)
104{
105 return (__m256i) __builtin_ia32_permvarqi256_mask ((__v32qi) __B,
106 (__v32qi) __A,
107 (__v32qi)
4bbabb2a 108 _mm256_avx512_undefined_si256 (),
3dcc8af5
IT		 109 (__mmask32) -1);
110}
111
112extern __inline __m256i
113__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
114_mm256_maskz_permutexvar_epi8 (__mmask32 __M, __m256i __A,
115 __m256i __B)
116{
117 return (__m256i) __builtin_ia32_permvarqi256_mask ((__v32qi) __B,
118 (__v32qi) __A,
119 (__v32qi)
fd79b414 120 _mm256_avx512_setzero_si256 (),
3dcc8af5
IT		 121 (__mmask32) __M);
122}
123
124extern __inline __m256i
125__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
126_mm256_mask_permutexvar_epi8 (__m256i __W, __mmask32 __M, __m256i __A,
127 __m256i __B)
128{
129 return (__m256i) __builtin_ia32_permvarqi256_mask ((__v32qi) __B,
130 (__v32qi) __A,
131 (__v32qi) __W,
132 (__mmask32) __M);
133}
134
135extern __inline __m128i
136__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
137_mm_permutexvar_epi8 (__m128i __A, __m128i __B)
138{
139 return (__m128i) __builtin_ia32_permvarqi128_mask ((__v16qi) __B,
140 (__v16qi) __A,
141 (__v16qi)
4bbabb2a 142 _mm_avx512_undefined_si128 (),
3dcc8af5
IT		 143 (__mmask16) -1);
144}
145
146extern __inline __m128i
147__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
148_mm_maskz_permutexvar_epi8 (__mmask16 __M, __m128i __A, __m128i __B)
149{
150 return (__m128i) __builtin_ia32_permvarqi128_mask ((__v16qi) __B,
151 (__v16qi) __A,
152 (__v16qi)
fd79b414 153 _mm_avx512_setzero_si128 (),
3dcc8af5
IT		 154 (__mmask16) __M);
155}
156
157extern __inline __m128i
158__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
159_mm_mask_permutexvar_epi8 (__m128i __W, __mmask16 __M, __m128i __A,
160 __m128i __B)
161{
162 return (__m128i) __builtin_ia32_permvarqi128_mask ((__v16qi) __B,
163 (__v16qi) __A,
164 (__v16qi) __W,
165 (__mmask16) __M);
166}
167
168extern __inline __m256i
169__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
170_mm256_permutex2var_epi8 (__m256i __A, __m256i __I, __m256i __B)
171{
172 return (__m256i) __builtin_ia32_vpermt2varqi256_mask ((__v32qi) __I
173 /* idx */ ,
174 (__v32qi) __A,
175 (__v32qi) __B,
c42b0bdf 176 (__mmask32) -1);
3dcc8af5
IT		 177}
178
179extern __inline __m256i
180__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
181_mm256_mask_permutex2var_epi8 (__m256i __A, __mmask32 __U,
182 __m256i __I, __m256i __B)
183{
184 return (__m256i) __builtin_ia32_vpermt2varqi256_mask ((__v32qi) __I
185 /* idx */ ,
186 (__v32qi) __A,
187 (__v32qi) __B,
188 (__mmask32)
189 __U);
190}
191
192extern __inline __m256i
193__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
194_mm256_mask2_permutex2var_epi8 (__m256i __A, __m256i __I,
195 __mmask32 __U, __m256i __B)
196{
197 return (__m256i) __builtin_ia32_vpermi2varqi256_mask ((__v32qi) __A,
198 (__v32qi) __I
199 /* idx */ ,
200 (__v32qi) __B,
201 (__mmask32)
202 __U);
203}
204
205extern __inline __m256i
206__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
207_mm256_maskz_permutex2var_epi8 (__mmask32 __U, __m256i __A,
208 __m256i __I, __m256i __B)
209{
210 return (__m256i) __builtin_ia32_vpermt2varqi256_maskz ((__v32qi) __I
211 /* idx */ ,
212 (__v32qi) __A,
213 (__v32qi) __B,
214 (__mmask32)
215 __U);
216}
217
218extern __inline __m128i
219__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
220_mm_permutex2var_epi8 (__m128i __A, __m128i __I, __m128i __B)
221{
222 return (__m128i) __builtin_ia32_vpermt2varqi128_mask ((__v16qi) __I
223 /* idx */ ,
224 (__v16qi) __A,
225 (__v16qi) __B,
c42b0bdf 226 (__mmask16) -1);
3dcc8af5
IT		 227}
228
229extern __inline __m128i
230__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
231_mm_mask_permutex2var_epi8 (__m128i __A, __mmask16 __U, __m128i __I,
232 __m128i __B)
233{
234 return (__m128i) __builtin_ia32_vpermt2varqi128_mask ((__v16qi) __I
235 /* idx */ ,
236 (__v16qi) __A,
237 (__v16qi) __B,
238 (__mmask16)
239 __U);
240}
241
242extern __inline __m128i
243__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
244_mm_mask2_permutex2var_epi8 (__m128i __A, __m128i __I, __mmask16 __U,
245 __m128i __B)
246{
247 return (__m128i) __builtin_ia32_vpermi2varqi128_mask ((__v16qi) __A,
248 (__v16qi) __I
249 /* idx */ ,
250 (__v16qi) __B,
251 (__mmask16)
252 __U);
253}
254
255extern __inline __m128i
256__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
257_mm_maskz_permutex2var_epi8 (__mmask16 __U, __m128i __A, __m128i __I,
258 __m128i __B)
259{
260 return (__m128i) __builtin_ia32_vpermt2varqi128_maskz ((__v16qi) __I
261 /* idx */ ,
262 (__v16qi) __A,
263 (__v16qi) __B,
264 (__mmask16)
265 __U);
266}
267
268#ifdef __DISABLE_AVX512VBMIVL__
269#undef __DISABLE_AVX512VBMIVL__
270#pragma GCC pop_options
271#endif /* __DISABLE_AVX512VBMIVL__ */
272
273#endif /* _AVX512VBMIVLINTRIN_H_INCLUDED */
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