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7905f799 | 1 | ;; Predicate definitions for IA-64. |
99dee823 | 2 | ;; Copyright (C) 2004-2021 Free Software Foundation, Inc. |
7905f799 RH |
3 | ;; |
4 | ;; This file is part of GCC. | |
5 | ;; | |
6 | ;; GCC is free software; you can redistribute it and/or modify | |
7 | ;; it under the terms of the GNU General Public License as published by | |
2f83c7d6 | 8 | ;; the Free Software Foundation; either version 3, or (at your option) |
7905f799 RH |
9 | ;; any later version. |
10 | ;; | |
11 | ;; GCC is distributed in the hope that it will be useful, | |
12 | ;; but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | ;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | ;; GNU General Public License for more details. | |
15 | ;; | |
16 | ;; You should have received a copy of the GNU General Public License | |
2f83c7d6 NC |
17 | ;; along with GCC; see the file COPYING3. If not see |
18 | ;; <http://www.gnu.org/licenses/>. | |
7905f799 RH |
19 | |
20 | ;; True if OP is a valid operand for the MEM of a CALL insn. | |
21 | (define_predicate "call_operand" | |
22 | (ior (match_code "symbol_ref") | |
23 | (match_operand 0 "register_operand"))) | |
24 | ||
25 | ;; True if OP refers to any kind of symbol. | |
26 | ;; For roughly the same reasons that pmode_register_operand exists, this | |
27 | ;; predicate ignores its mode argument. | |
28 | (define_special_predicate "symbolic_operand" | |
29 | (match_code "symbol_ref,const,label_ref")) | |
30 | ||
31 | ;; True if OP is a SYMBOL_REF which refers to a function. | |
32 | (define_predicate "function_operand" | |
33 | (and (match_code "symbol_ref") | |
34 | (match_test "SYMBOL_REF_FUNCTION_P (op)"))) | |
35 | ||
7905f799 RH |
36 | ;; True if OP refers to a symbol in the sdata section. |
37 | (define_predicate "sdata_symbolic_operand" | |
38 | (match_code "symbol_ref,const") | |
39 | { | |
b0c2dee9 RH |
40 | HOST_WIDE_INT offset = 0, size = 0; |
41 | ||
7905f799 RH |
42 | switch (GET_CODE (op)) |
43 | { | |
44 | case CONST: | |
45 | op = XEXP (op, 0); | |
46 | if (GET_CODE (op) != PLUS | |
b0c2dee9 RH |
47 | || GET_CODE (XEXP (op, 0)) != SYMBOL_REF |
48 | || GET_CODE (XEXP (op, 1)) != CONST_INT) | |
7905f799 | 49 | return false; |
b0c2dee9 | 50 | offset = INTVAL (XEXP (op, 1)); |
7905f799 RH |
51 | op = XEXP (op, 0); |
52 | /* FALLTHRU */ | |
53 | ||
54 | case SYMBOL_REF: | |
55 | if (CONSTANT_POOL_ADDRESS_P (op)) | |
b0c2dee9 RH |
56 | { |
57 | size = GET_MODE_SIZE (get_pool_mode (op)); | |
58 | if (size > ia64_section_threshold) | |
59 | return false; | |
60 | } | |
7905f799 | 61 | else |
b0c2dee9 RH |
62 | { |
63 | tree t; | |
64 | ||
65 | if (!SYMBOL_REF_LOCAL_P (op) || !SYMBOL_REF_SMALL_P (op)) | |
66 | return false; | |
67 | ||
68 | /* Note that in addition to DECLs, we can get various forms | |
69 | of constants here. */ | |
70 | t = SYMBOL_REF_DECL (op); | |
71 | if (DECL_P (t)) | |
b0ddb385 L |
72 | { |
73 | /* Common symbol isn't placed in small data section. */ | |
74 | if (DECL_COMMON (t)) | |
75 | return false; | |
76 | t = DECL_SIZE_UNIT (t); | |
77 | } | |
b0c2dee9 RH |
78 | else |
79 | t = TYPE_SIZE_UNIT (TREE_TYPE (t)); | |
9541ffee | 80 | if (t && tree_fits_shwi_p (t)) |
b0c2dee9 | 81 | { |
9439e9a1 | 82 | size = tree_to_shwi (t); |
b0c2dee9 RH |
83 | if (size < 0) |
84 | size = 0; | |
85 | } | |
86 | } | |
87 | ||
88 | /* Deny the stupid user trick of addressing outside the object. Such | |
89 | things quickly result in GPREL22 relocation overflows. Of course, | |
90 | they're also highly undefined. From a pure pedant's point of view | |
91 | they deserve a slap on the wrist (such as provided by a relocation | |
92 | overflow), but that just leads to bugzilla noise. */ | |
93 | return (offset >= 0 && offset <= size); | |
7905f799 RH |
94 | |
95 | default: | |
e820471b | 96 | gcc_unreachable (); |
7905f799 RH |
97 | } |
98 | }) | |
99 | ||
face88a1 ST |
100 | ;; True if OP refers to a local symbol [+any offset]. |
101 | ;; To be encoded as: | |
102 | ;; movl % = @gprel(symbol+offset) | |
103 | ;; add % = %, gp | |
104 | (define_predicate "local_symbolic_operand64" | |
105 | (match_code "symbol_ref,const") | |
106 | { | |
107 | switch (GET_CODE (op)) | |
108 | { | |
109 | case CONST: | |
110 | op = XEXP (op, 0); | |
111 | if (GET_CODE (op) != PLUS | |
112 | || GET_CODE (XEXP (op, 0)) != SYMBOL_REF | |
113 | || GET_CODE (XEXP (op, 1)) != CONST_INT) | |
114 | return false; | |
115 | op = XEXP (op, 0); | |
116 | /* FALLTHRU */ | |
117 | ||
118 | case SYMBOL_REF: | |
119 | return SYMBOL_REF_LOCAL_P (op); | |
120 | ||
121 | default: | |
122 | gcc_unreachable (); | |
123 | } | |
124 | }) | |
125 | ||
5e6c8b64 RH |
126 | ;; True if OP refers to a symbol in the small address area. |
127 | (define_predicate "small_addr_symbolic_operand" | |
128 | (match_code "symbol_ref,const") | |
129 | { | |
130 | switch (GET_CODE (op)) | |
131 | { | |
132 | case CONST: | |
133 | op = XEXP (op, 0); | |
134 | if (GET_CODE (op) != PLUS | |
135 | || GET_CODE (XEXP (op, 0)) != SYMBOL_REF | |
136 | || GET_CODE (XEXP (op, 1)) != CONST_INT) | |
137 | return false; | |
138 | op = XEXP (op, 0); | |
139 | /* FALLTHRU */ | |
140 | ||
141 | case SYMBOL_REF: | |
142 | return SYMBOL_REF_SMALL_ADDR_P (op); | |
143 | ||
144 | default: | |
145 | gcc_unreachable (); | |
146 | } | |
147 | }) | |
148 | ||
149 | ;; True if OP refers to a symbol with which we may use any offset. | |
150 | (define_predicate "any_offset_symbol_operand" | |
151 | (match_code "symbol_ref") | |
152 | { | |
153 | if (TARGET_NO_PIC || TARGET_AUTO_PIC) | |
154 | return true; | |
155 | if (SYMBOL_REF_SMALL_ADDR_P (op)) | |
156 | return true; | |
157 | if (SYMBOL_REF_FUNCTION_P (op)) | |
158 | return false; | |
159 | if (sdata_symbolic_operand (op, mode)) | |
160 | return true; | |
161 | return false; | |
162 | }) | |
163 | ||
164 | ;; True if OP refers to a symbol with which we may use 14-bit aligned offsets. | |
165 | ;; False if OP refers to a symbol with which we may not use any offset at any | |
166 | ;; time. | |
167 | (define_predicate "aligned_offset_symbol_operand" | |
168 | (and (match_code "symbol_ref") | |
169 | (match_test "! SYMBOL_REF_FUNCTION_P (op)"))) | |
170 | ||
171 | ;; True if OP refers to a symbol, and is appropriate for a GOT load. | |
172 | (define_predicate "got_symbolic_operand" | |
173 | (match_operand 0 "symbolic_operand" "") | |
174 | { | |
175 | HOST_WIDE_INT addend = 0; | |
176 | ||
177 | switch (GET_CODE (op)) | |
178 | { | |
179 | case LABEL_REF: | |
180 | return true; | |
181 | ||
182 | case CONST: | |
183 | /* Accept only (plus (symbol_ref) (const_int)). */ | |
184 | op = XEXP (op, 0); | |
185 | if (GET_CODE (op) != PLUS | |
186 | || GET_CODE (XEXP (op, 0)) != SYMBOL_REF | |
187 | || GET_CODE (XEXP (op, 1)) != CONST_INT) | |
188 | return false; | |
189 | ||
190 | addend = INTVAL (XEXP (op, 1)); | |
191 | op = XEXP (op, 0); | |
192 | /* FALLTHRU */ | |
193 | ||
194 | case SYMBOL_REF: | |
195 | /* These symbols shouldn't be used with got loads. */ | |
196 | if (SYMBOL_REF_SMALL_ADDR_P (op)) | |
197 | return false; | |
198 | if (SYMBOL_REF_TLS_MODEL (op) != 0) | |
199 | return false; | |
200 | ||
201 | if (any_offset_symbol_operand (op, mode)) | |
202 | return true; | |
203 | ||
204 | /* The low 14 bits of the constant have been forced to zero | |
205 | so that we do not use up so many GOT entries. Prevent cse | |
206 | from undoing this. */ | |
207 | if (aligned_offset_symbol_operand (op, mode)) | |
208 | return (addend & 0x3fff) == 0; | |
209 | ||
210 | return addend == 0; | |
211 | ||
212 | default: | |
213 | gcc_unreachable (); | |
214 | } | |
215 | }) | |
216 | ||
217 | ;; Return true if OP is a valid thread local storage symbolic operand. | |
218 | (define_predicate "tls_symbolic_operand" | |
219 | (match_code "symbol_ref,const") | |
220 | { | |
221 | switch (GET_CODE (op)) | |
222 | { | |
223 | case SYMBOL_REF: | |
224 | return SYMBOL_REF_TLS_MODEL (op) != 0; | |
225 | ||
226 | case CONST: | |
227 | op = XEXP (op, 0); | |
228 | if (GET_CODE (op) != PLUS | |
229 | || GET_CODE (XEXP (op, 0)) != SYMBOL_REF | |
230 | || GET_CODE (XEXP (op, 1)) != CONST_INT) | |
231 | return false; | |
232 | ||
233 | /* We only allow certain offsets for certain tls models. */ | |
234 | switch (SYMBOL_REF_TLS_MODEL (XEXP (op, 0))) | |
235 | { | |
236 | case TLS_MODEL_GLOBAL_DYNAMIC: | |
237 | case TLS_MODEL_LOCAL_DYNAMIC: | |
238 | return false; | |
239 | ||
240 | case TLS_MODEL_INITIAL_EXEC: | |
241 | return (INTVAL (XEXP (op, 1)) & 0x3fff) == 0; | |
242 | ||
243 | case TLS_MODEL_LOCAL_EXEC: | |
244 | return true; | |
245 | ||
246 | default: | |
247 | return false; | |
248 | } | |
249 | ||
250 | default: | |
251 | gcc_unreachable (); | |
252 | } | |
253 | }) | |
254 | ||
255 | ;; Return true if OP is a local-dynamic thread local storage symbolic operand. | |
256 | (define_predicate "ld_tls_symbolic_operand" | |
257 | (and (match_code "symbol_ref") | |
258 | (match_test "SYMBOL_REF_TLS_MODEL (op) == TLS_MODEL_LOCAL_DYNAMIC"))) | |
259 | ||
260 | ;; Return true if OP is an initial-exec thread local storage symbolic operand. | |
261 | (define_predicate "ie_tls_symbolic_operand" | |
262 | (match_code "symbol_ref,const") | |
263 | { | |
264 | switch (GET_CODE (op)) | |
265 | { | |
266 | case CONST: | |
267 | op = XEXP (op, 0); | |
268 | if (GET_CODE (op) != PLUS | |
269 | || GET_CODE (XEXP (op, 0)) != SYMBOL_REF | |
270 | || GET_CODE (XEXP (op, 1)) != CONST_INT | |
271 | || (INTVAL (XEXP (op, 1)) & 0x3fff) != 0) | |
272 | return false; | |
273 | op = XEXP (op, 0); | |
274 | /* FALLTHRU */ | |
275 | ||
276 | case SYMBOL_REF: | |
277 | return SYMBOL_REF_TLS_MODEL (op) == TLS_MODEL_INITIAL_EXEC; | |
278 | ||
279 | default: | |
280 | gcc_unreachable (); | |
281 | } | |
282 | }) | |
283 | ||
284 | ;; Return true if OP is a local-exec thread local storage symbolic operand. | |
285 | (define_predicate "le_tls_symbolic_operand" | |
286 | (match_code "symbol_ref,const") | |
287 | { | |
288 | switch (GET_CODE (op)) | |
289 | { | |
290 | case CONST: | |
291 | op = XEXP (op, 0); | |
292 | if (GET_CODE (op) != PLUS | |
293 | || GET_CODE (XEXP (op, 0)) != SYMBOL_REF | |
294 | || GET_CODE (XEXP (op, 1)) != CONST_INT) | |
295 | return false; | |
296 | op = XEXP (op, 0); | |
297 | /* FALLTHRU */ | |
298 | ||
299 | case SYMBOL_REF: | |
300 | return SYMBOL_REF_TLS_MODEL (op) == TLS_MODEL_LOCAL_EXEC; | |
301 | ||
302 | default: | |
303 | gcc_unreachable (); | |
304 | } | |
305 | }) | |
306 | ||
7905f799 RH |
307 | ;; Like nonimmediate_operand, but don't allow MEMs that try to use a |
308 | ;; POST_MODIFY with a REG as displacement. | |
309 | (define_predicate "destination_operand" | |
310 | (and (match_operand 0 "nonimmediate_operand") | |
311 | (match_test "GET_CODE (op) != MEM | |
312 | || GET_CODE (XEXP (op, 0)) != POST_MODIFY | |
313 | || GET_CODE (XEXP (XEXP (XEXP (op, 0), 1), 1)) != REG"))) | |
314 | ||
cd17b213 SE |
315 | ;; Like destination_operand, but don't allow any post-increments. |
316 | (define_predicate "not_postinc_destination_operand" | |
317 | (and (match_operand 0 "nonimmediate_operand") | |
318 | (match_test "GET_CODE (op) != MEM | |
319 | || GET_RTX_CLASS (GET_CODE (XEXP (op, 0))) != RTX_AUTOINC"))) | |
320 | ||
7905f799 RH |
321 | ;; Like memory_operand, but don't allow post-increments. |
322 | (define_predicate "not_postinc_memory_operand" | |
323 | (and (match_operand 0 "memory_operand") | |
324 | (match_test "GET_RTX_CLASS (GET_CODE (XEXP (op, 0))) != RTX_AUTOINC"))) | |
325 | ||
5e6c8b64 | 326 | ;; True if OP is a general operand, with some restrictions on symbols. |
7905f799 | 327 | (define_predicate "move_operand" |
5e6c8b64 RH |
328 | (match_operand 0 "general_operand") |
329 | { | |
330 | switch (GET_CODE (op)) | |
331 | { | |
332 | case CONST: | |
333 | { | |
334 | HOST_WIDE_INT addend; | |
335 | ||
336 | /* Accept only (plus (symbol_ref) (const_int)). */ | |
337 | op = XEXP (op, 0); | |
338 | if (GET_CODE (op) != PLUS | |
339 | || GET_CODE (XEXP (op, 0)) != SYMBOL_REF | |
340 | || GET_CODE (XEXP (op, 1)) != CONST_INT) | |
341 | return false; | |
342 | ||
343 | addend = INTVAL (XEXP (op, 1)); | |
344 | op = XEXP (op, 0); | |
345 | ||
346 | /* After reload, we want to allow any offset whatsoever. This | |
347 | allows reload the opportunity to avoid spilling addresses to | |
348 | the stack, and instead simply substitute in the value from a | |
349 | REG_EQUIV. We'll split this up again when splitting the insn. */ | |
350 | if (reload_in_progress || reload_completed) | |
351 | return true; | |
352 | ||
353 | /* Some symbol types we allow to use with any offset. */ | |
354 | if (any_offset_symbol_operand (op, mode)) | |
355 | return true; | |
356 | ||
357 | /* Some symbol types we allow offsets with the low 14 bits of the | |
358 | constant forced to zero so that we do not use up so many GOT | |
359 | entries. We want to prevent cse from undoing this. */ | |
360 | if (aligned_offset_symbol_operand (op, mode)) | |
361 | return (addend & 0x3fff) == 0; | |
362 | ||
363 | /* The remaining symbol types may never be used with an offset. */ | |
364 | return false; | |
365 | } | |
366 | ||
367 | default: | |
368 | return true; | |
369 | } | |
370 | }) | |
7905f799 | 371 | |
cd17b213 SE |
372 | ;; Like move_operand but don't allow post-increments. |
373 | (define_predicate "not_postinc_move_operand" | |
374 | (and (match_operand 0 "move_operand") | |
375 | (match_test "GET_CODE (op) != MEM | |
376 | || GET_RTX_CLASS (GET_CODE (XEXP (op, 0))) != RTX_AUTOINC"))) | |
377 | ||
7905f799 RH |
378 | ;; True if OP is a register operand that is (or could be) a GR reg. |
379 | (define_predicate "gr_register_operand" | |
380 | (match_operand 0 "register_operand") | |
381 | { | |
382 | unsigned int regno; | |
383 | if (GET_CODE (op) == SUBREG) | |
384 | op = SUBREG_REG (op); | |
385 | ||
386 | regno = REGNO (op); | |
387 | return (regno >= FIRST_PSEUDO_REGISTER || GENERAL_REGNO_P (regno)); | |
388 | }) | |
389 | ||
390 | ;; True if OP is a register operand that is (or could be) an FR reg. | |
391 | (define_predicate "fr_register_operand" | |
392 | (match_operand 0 "register_operand") | |
393 | { | |
394 | unsigned int regno; | |
395 | if (GET_CODE (op) == SUBREG) | |
396 | op = SUBREG_REG (op); | |
397 | ||
398 | regno = REGNO (op); | |
399 | return (regno >= FIRST_PSEUDO_REGISTER || FR_REGNO_P (regno)); | |
400 | }) | |
401 | ||
402 | ;; True if OP is a register operand that is (or could be) a GR/FR reg. | |
403 | (define_predicate "grfr_register_operand" | |
404 | (match_operand 0 "register_operand") | |
405 | { | |
406 | unsigned int regno; | |
407 | if (GET_CODE (op) == SUBREG) | |
408 | op = SUBREG_REG (op); | |
409 | ||
410 | regno = REGNO (op); | |
411 | return (regno >= FIRST_PSEUDO_REGISTER | |
412 | || GENERAL_REGNO_P (regno) | |
413 | || FR_REGNO_P (regno)); | |
414 | }) | |
415 | ||
416 | ;; True if OP is a nonimmediate operand that is (or could be) a GR reg. | |
417 | (define_predicate "gr_nonimmediate_operand" | |
418 | (match_operand 0 "nonimmediate_operand") | |
419 | { | |
420 | unsigned int regno; | |
421 | ||
422 | if (GET_CODE (op) == MEM) | |
423 | return true; | |
424 | if (GET_CODE (op) == SUBREG) | |
425 | op = SUBREG_REG (op); | |
426 | ||
427 | regno = REGNO (op); | |
428 | return (regno >= FIRST_PSEUDO_REGISTER || GENERAL_REGNO_P (regno)); | |
429 | }) | |
430 | ||
431 | ;; True if OP is a nonimmediate operand that is (or could be) a FR reg. | |
432 | (define_predicate "fr_nonimmediate_operand" | |
433 | (match_operand 0 "nonimmediate_operand") | |
434 | { | |
435 | unsigned int regno; | |
436 | ||
437 | if (GET_CODE (op) == MEM) | |
438 | return true; | |
439 | if (GET_CODE (op) == SUBREG) | |
440 | op = SUBREG_REG (op); | |
441 | ||
442 | regno = REGNO (op); | |
443 | return (regno >= FIRST_PSEUDO_REGISTER || FR_REGNO_P (regno)); | |
444 | }) | |
445 | ||
446 | ;; True if OP is a nonimmediate operand that is (or could be) a GR/FR reg. | |
447 | (define_predicate "grfr_nonimmediate_operand" | |
448 | (match_operand 0 "nonimmediate_operand") | |
449 | { | |
450 | unsigned int regno; | |
451 | ||
452 | if (GET_CODE (op) == MEM) | |
453 | return true; | |
454 | if (GET_CODE (op) == SUBREG) | |
455 | op = SUBREG_REG (op); | |
456 | ||
457 | regno = REGNO (op); | |
458 | return (regno >= FIRST_PSEUDO_REGISTER | |
459 | || GENERAL_REGNO_P (regno) | |
460 | || FR_REGNO_P (regno)); | |
461 | }) | |
462 | ||
463 | ;; True if OP is a GR register operand, or zero. | |
464 | (define_predicate "gr_reg_or_0_operand" | |
465 | (ior (match_operand 0 "gr_register_operand") | |
f61134e8 RH |
466 | (and (match_code "const_int,const_double,const_vector") |
467 | (match_test "op == CONST0_RTX (GET_MODE (op))")))) | |
7905f799 | 468 | |
27a9b99d | 469 | ;; True if OP is a GR register operand, or a 5-bit immediate operand. |
7905f799 RH |
470 | (define_predicate "gr_reg_or_5bit_operand" |
471 | (ior (match_operand 0 "gr_register_operand") | |
472 | (and (match_code "const_int") | |
473 | (match_test "INTVAL (op) >= 0 && INTVAL (op) < 32")))) | |
474 | ||
27a9b99d | 475 | ;; True if OP is a GR register operand, or a 6-bit immediate operand. |
7905f799 RH |
476 | (define_predicate "gr_reg_or_6bit_operand" |
477 | (ior (match_operand 0 "gr_register_operand") | |
478 | (and (match_code "const_int") | |
13f70342 | 479 | (match_test "satisfies_constraint_M (op)")))) |
7905f799 | 480 | |
27a9b99d | 481 | ;; True if OP is a GR register operand, or an 8-bit immediate operand. |
7905f799 RH |
482 | (define_predicate "gr_reg_or_8bit_operand" |
483 | (ior (match_operand 0 "gr_register_operand") | |
484 | (and (match_code "const_int") | |
13f70342 | 485 | (match_test "satisfies_constraint_K (op)")))) |
7905f799 | 486 | |
27a9b99d | 487 | ;; True if OP is a GR/FR register operand, or an 8-bit immediate operand. |
7905f799 RH |
488 | (define_predicate "grfr_reg_or_8bit_operand" |
489 | (ior (match_operand 0 "grfr_register_operand") | |
490 | (and (match_code "const_int") | |
13f70342 | 491 | (match_test "satisfies_constraint_K (op)")))) |
7905f799 | 492 | |
27a9b99d | 493 | ;; True if OP is a register operand, or an 8-bit adjusted immediate operand. |
7905f799 RH |
494 | (define_predicate "gr_reg_or_8bit_adjusted_operand" |
495 | (ior (match_operand 0 "gr_register_operand") | |
496 | (and (match_code "const_int") | |
13f70342 | 497 | (match_test "satisfies_constraint_L (op)")))) |
7905f799 | 498 | |
27a9b99d KH |
499 | ;; True if OP is a register operand, or is valid for both an 8-bit |
500 | ;; immediate and an 8-bit adjusted immediate operand. This is necessary | |
7905f799 RH |
501 | ;; because when we emit a compare, we don't know what the condition will be, |
502 | ;; so we need the union of the immediates accepted by GT and LT. | |
503 | (define_predicate "gr_reg_or_8bit_and_adjusted_operand" | |
504 | (ior (match_operand 0 "gr_register_operand") | |
505 | (and (match_code "const_int") | |
13f70342 RH |
506 | (match_test "satisfies_constraint_K (op) |
507 | && satisfies_constraint_L (op)")))) | |
7905f799 | 508 | |
27a9b99d | 509 | ;; True if OP is a register operand, or a 14-bit immediate operand. |
7905f799 RH |
510 | (define_predicate "gr_reg_or_14bit_operand" |
511 | (ior (match_operand 0 "gr_register_operand") | |
512 | (and (match_code "const_int") | |
13f70342 | 513 | (match_test "satisfies_constraint_I (op)")))) |
7905f799 | 514 | |
27a9b99d | 515 | ;; True if OP is a register operand, or a 22-bit immediate operand. |
7905f799 RH |
516 | (define_predicate "gr_reg_or_22bit_operand" |
517 | (ior (match_operand 0 "gr_register_operand") | |
518 | (and (match_code "const_int") | |
13f70342 | 519 | (match_test "satisfies_constraint_J (op)")))) |
7905f799 | 520 | |
27a9b99d | 521 | ;; True if OP is a 7-bit immediate operand. |
7905f799 RH |
522 | (define_predicate "dshift_count_operand" |
523 | (and (match_code "const_int") | |
524 | (match_test "INTVAL (op) >= 0 && INTVAL (op) < 128"))) | |
525 | ||
27a9b99d | 526 | ;; True if OP is a 6-bit immediate operand. |
7905f799 RH |
527 | (define_predicate "shift_count_operand" |
528 | (and (match_code "const_int") | |
13f70342 | 529 | (match_test "satisfies_constraint_M (op)"))) |
7905f799 | 530 | |
27a9b99d | 531 | ;; True if OP-1 is a 6-bit immediate operand, used in extr instruction. |
5d48891e SE |
532 | (define_predicate "extr_len_operand" |
533 | (and (match_code "const_int") | |
13f70342 | 534 | (match_test "satisfies_constraint_M (GEN_INT (INTVAL (op) - 1))"))) |
5d48891e | 535 | |
27a9b99d | 536 | ;; True if OP is a 5-bit immediate operand. |
7905f799 RH |
537 | (define_predicate "shift_32bit_count_operand" |
538 | (and (match_code "const_int") | |
539 | (match_test "INTVAL (op) >= 0 && INTVAL (op) < 32"))) | |
540 | ||
541 | ;; True if OP is one of the immediate values 2, 4, 8, or 16. | |
542 | (define_predicate "shladd_operand" | |
543 | (and (match_code "const_int") | |
544 | (match_test "INTVAL (op) == 2 || INTVAL (op) == 4 || | |
545 | INTVAL (op) == 8 || INTVAL (op) == 16"))) | |
546 | ||
d3f6e07b JB |
547 | ;; True if OP is one of the immediate values 1, 2, 3, or 4. |
548 | (define_predicate "shladd_log2_operand" | |
549 | (and (match_code "const_int") | |
550 | (match_test "INTVAL (op) >= 1 && INTVAL (op) <= 4"))) | |
551 | ||
7905f799 RH |
552 | ;; True if OP is one of the immediate values -16, -8, -4, -1, 1, 4, 8, 16. |
553 | (define_predicate "fetchadd_operand" | |
554 | (and (match_code "const_int") | |
555 | (match_test "INTVAL (op) == -16 || INTVAL (op) == -8 || | |
556 | INTVAL (op) == -4 || INTVAL (op) == -1 || | |
557 | INTVAL (op) == 1 || INTVAL (op) == 4 || | |
558 | INTVAL (op) == 8 || INTVAL (op) == 16"))) | |
559 | ||
604e3ff3 RH |
560 | ;; True if OP is one of the immediate values 0, 7, 15, 16 |
561 | (define_predicate "pmpyshr_operand" | |
562 | (and (match_code "const_int") | |
563 | (match_test "INTVAL (op) == 0 || INTVAL (op) == 7 | |
564 | || INTVAL (op) == 15 || INTVAL (op) == 16"))) | |
565 | ||
f61134e8 RH |
566 | ;; True if OP is 0..3. |
567 | (define_predicate "const_int_2bit_operand" | |
568 | (and (match_code "const_int") | |
569 | (match_test "INTVAL (op) >= 0 && INTVAL (op) <= 3"))) | |
7905f799 RH |
570 | |
571 | ;; True if OP is a floating-point constant zero, one, or a register. | |
572 | (define_predicate "fr_reg_or_fp01_operand" | |
573 | (ior (match_operand 0 "fr_register_operand") | |
574 | (and (match_code "const_double") | |
13f70342 | 575 | (match_test "satisfies_constraint_G (op)")))) |
7905f799 RH |
576 | |
577 | ;; Like fr_reg_or_fp01_operand, but don't allow any SUBREGs. | |
578 | (define_predicate "xfreg_or_fp01_operand" | |
579 | (and (match_operand 0 "fr_reg_or_fp01_operand") | |
580 | (not (match_code "subreg")))) | |
581 | ||
33974673 SE |
582 | ;; Like fr_reg_or_fp01_operand, but don't allow 0 if flag_signed_zero is set. |
583 | ;; Using f0 as the second arg to fadd or fsub, or as the third arg to fma or | |
584 | ;; fms can cause a zero result to have the wrong sign. | |
585 | (define_predicate "fr_reg_or_signed_fp01_operand" | |
586 | (ior (match_operand 0 "fr_register_operand") | |
587 | (and (match_code "const_double") | |
588 | (match_test "satisfies_constraint_Z (op)")))) | |
589 | ||
590 | ;; Like fr_reg_or_signed_fp01_operand, but don't allow any SUBREGs. | |
591 | (define_predicate "xfreg_or_signed_fp01_operand" | |
592 | (and (match_operand 0 "fr_reg_or_signed_fp01_operand") | |
593 | (not (match_code "subreg")))) | |
594 | ||
f61134e8 RH |
595 | ;; True if OP is a constant zero, or a register. |
596 | (define_predicate "fr_reg_or_0_operand" | |
597 | (ior (match_operand 0 "fr_register_operand") | |
598 | (and (match_code "const_double,const_vector") | |
599 | (match_test "op == CONST0_RTX (GET_MODE (op))")))) | |
600 | ||
f90b7a5a | 601 | ;; Return 1 if OP is a valid comparison operator for "cbranch" instructions. |
8fc53a5f EB |
602 | ;; If we're assuming that FP operations cannot generate user-visible traps, |
603 | ;; then we can use the FP unordered-signaling instructions to implement the | |
604 | ;; FP unordered-quiet comparison predicates. | |
f90b7a5a | 605 | (define_predicate "ia64_cbranch_operator" |
8fc53a5f EB |
606 | (if_then_else (match_test "flag_trapping_math") |
607 | (ior (match_operand 0 "ordered_comparison_operator") | |
608 | (match_code "ordered,unordered")) | |
609 | (and (match_operand 0 "comparison_operator") | |
610 | (not (match_code "uneq,ltgt"))))) | |
f90b7a5a | 611 | |
7905f799 RH |
612 | ;; True if this is a comparison operator, which accepts a normal 8-bit |
613 | ;; signed immediate operand. | |
614 | (define_predicate "normal_comparison_operator" | |
615 | (match_code "eq,ne,gt,le,gtu,leu")) | |
616 | ||
617 | ;; True if this is a comparison operator, which accepts an adjusted 8-bit | |
618 | ;; signed immediate operand. | |
619 | (define_predicate "adjusted_comparison_operator" | |
620 | (match_code "lt,ge,ltu,geu")) | |
621 | ||
622 | ;; True if this is a signed inequality operator. | |
623 | (define_predicate "signed_inequality_operator" | |
624 | (match_code "ge,gt,le,lt")) | |
625 | ||
626 | ;; True if this operator is valid for predication. | |
627 | (define_predicate "predicate_operator" | |
628 | (match_code "eq,ne")) | |
629 | ||
630 | ;; True if this operator can be used in a conditional operation. | |
631 | (define_predicate "condop_operator" | |
632 | (match_code "plus,minus,ior,xor,and")) | |
633 | ||
634 | ;; These three are hardware registers that can only be addressed in | |
635 | ;; DImode. It's not strictly necessary to test mode == DImode here, | |
636 | ;; but it makes decent insurance against someone writing a | |
637 | ;; match_operand wrong. | |
638 | ||
639 | ;; True if this is the ar.lc register. | |
640 | (define_predicate "ar_lc_reg_operand" | |
641 | (and (match_code "reg") | |
642 | (match_test "mode == DImode && REGNO (op) == AR_LC_REGNUM"))) | |
643 | ||
644 | ;; True if this is the ar.ccv register. | |
645 | (define_predicate "ar_ccv_reg_operand" | |
646 | (and (match_code "reg") | |
647 | (match_test "mode == DImode && REGNO (op) == AR_CCV_REGNUM"))) | |
648 | ||
649 | ;; True if this is the ar.pfs register. | |
650 | (define_predicate "ar_pfs_reg_operand" | |
651 | (and (match_code "reg") | |
652 | (match_test "mode == DImode && REGNO (op) == AR_PFS_REGNUM"))) | |
653 | ||
654 | ;; True if OP is valid as a base register in a reg + offset address. | |
655 | ;; ??? Should I copy the flag_omit_frame_pointer and cse_not_expected | |
656 | ;; checks from pa.c basereg_operand as well? Seems to be OK without them | |
657 | ;; in test runs. | |
658 | (define_predicate "basereg_operand" | |
659 | (match_operand 0 "register_operand") | |
660 | { | |
f6d65153 | 661 | return REG_P (op) && REG_POINTER (op); |
7905f799 RH |
662 | }) |
663 | ||
55eaaa5b RH |
664 | ;; True if this is the right-most vector element; for mux1 @brcst. |
665 | (define_predicate "mux1_brcst_element" | |
666 | (and (match_code "const_int") | |
667 | (match_test "INTVAL (op) == (TARGET_BIG_ENDIAN ? 7 : 0)"))) |