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66617831 RS |
1 | ; Options for the HP PA-RISC port of the compiler. |
2 | ||
7adcbafe | 3 | ; Copyright (C) 2005-2022 Free Software Foundation, Inc. |
66617831 RS |
4 | ; |
5 | ; This file is part of GCC. | |
6 | ; | |
7 | ; GCC is free software; you can redistribute it and/or modify it under | |
8 | ; the terms of the GNU General Public License as published by the Free | |
2f83c7d6 | 9 | ; Software Foundation; either version 3, or (at your option) any later |
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10 | ; version. |
11 | ; | |
12 | ; GCC is distributed in the hope that it will be useful, but WITHOUT ANY | |
13 | ; WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
14 | ; FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License | |
15 | ; for more details. | |
16 | ; | |
17 | ; You should have received a copy of the GNU General Public License | |
2f83c7d6 NC |
18 | ; along with GCC; see the file COPYING3. If not see |
19 | ; <http://www.gnu.org/licenses/>. | |
66617831 | 20 | |
1bb721dc JM |
21 | HeaderInclude |
22 | config/pa/pa-opts.h | |
23 | ||
24 | ; Which cpu we are scheduling for. | |
25 | Variable | |
26 | enum processor_type pa_cpu = TARGET_SCHED_DEFAULT | |
27 | ||
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28 | march=1.0 |
29 | Target RejectNegative | |
a7b2e184 | 30 | Generate PA1.0 code. |
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31 | |
32 | march=1.1 | |
33 | Target RejectNegative | |
a7b2e184 | 34 | Generate PA1.1 code. |
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35 | |
36 | march=2.0 | |
37 | Target RejectNegative | |
a7b2e184 | 38 | Generate PA2.0 code (requires binutils 2.10 or later). |
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39 | |
40 | mbig-switch | |
33e67557 SB |
41 | Target Ignore |
42 | Does nothing. Preserved for backward compatibility. | |
66617831 | 43 | |
84c9e5ff | 44 | mcaller-copies |
eece52b5 | 45 | Target Mask(CALLER_COPIES) |
84c9e5ff JDA |
46 | Caller copies function arguments passed by hidden reference. |
47 | ||
6a9c4224 | 48 | mcoherent-ldcw |
eece52b5 | 49 | Target Var(TARGET_COHERENT_LDCW) Init(1) |
6a9c4224 JDA |
50 | Use ldcw/ldcd coherent cache-control hint. |
51 | ||
66617831 | 52 | mdisable-fpregs |
3f861a5c JDA |
53 | Target Mask(SOFT_FLOAT) |
54 | Disable FP regs. Equivalent to -msoft-float. | |
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55 | |
56 | mdisable-indexing | |
eece52b5 | 57 | Target Mask(DISABLE_INDEXING) |
a7b2e184 | 58 | Disable indexed addressing. |
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59 | |
60 | mfast-indirect-calls | |
eece52b5 | 61 | Target Mask(FAST_INDIRECT_CALLS) |
a7b2e184 | 62 | Generate fast indirect calls. |
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63 | |
64 | mfixed-range= | |
1bb721dc | 65 | Target RejectNegative Joined Var(pa_deferred_options) Defer |
a7b2e184 | 66 | Specify range of registers to make fixed. |
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67 | |
68 | mgas | |
eece52b5 | 69 | Target Mask(GAS) |
a7b2e184 | 70 | Assume code will be assembled by GAS. |
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71 | |
72 | mjump-in-delay | |
f4000c0b JDA |
73 | Target Ignore |
74 | Does nothing. Preserved for backward compatibility. | |
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75 | |
76 | ;; Not used by gcc | |
77 | mlinker-opt | |
78 | Target RejectNegative | |
a7b2e184 | 79 | Enable linker optimizations. |
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80 | |
81 | mlong-calls | |
eece52b5 | 82 | Target Mask(LONG_CALLS) |
a7b2e184 | 83 | Always generate long calls. |
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84 | |
85 | mlong-load-store | |
eece52b5 | 86 | Target Mask(LONG_LOAD_STORE) |
a7b2e184 | 87 | Emit long load/store sequences. |
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88 | |
89 | mnosnake | |
90 | Target RejectNegative | |
a7b2e184 | 91 | Generate PA1.0 code. |
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92 | |
93 | mno-space-regs | |
eece52b5 | 94 | Target RejectNegative Mask(NO_SPACE_REGS) |
a7b2e184 | 95 | Disable space regs. |
66617831 | 96 | |
6a9c4224 | 97 | mordered |
eece52b5 | 98 | Target Var(TARGET_ORDERED) Init(0) |
6a9c4224 JDA |
99 | Assume memory references are ordered and barriers are not needed. |
100 | ||
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101 | mpa-risc-1-0 |
102 | Target RejectNegative | |
a7b2e184 | 103 | Generate PA1.0 code. |
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104 | |
105 | mpa-risc-1-1 | |
106 | Target RejectNegative Mask(PA_11) | |
a7b2e184 | 107 | Generate PA1.1 code. |
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108 | |
109 | mpa-risc-2-0 | |
110 | Target RejectNegative Mask(PA_20) | |
a7b2e184 | 111 | Generate PA2.0 code (requires binutils 2.10 or later). |
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112 | |
113 | mportable-runtime | |
eece52b5 | 114 | Target Mask(PORTABLE_RUNTIME) |
a7b2e184 | 115 | Use portable calling conventions. |
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116 | |
117 | mschedule= | |
1bb721dc | 118 | Target RejectNegative Joined Enum(pa_schedule) Var(pa_cpu) |
a7b2e184 | 119 | Specify CPU for scheduling purposes. Valid arguments are 700, 7100, 7100LC, 7200, 7300, and 8000. |
66617831 | 120 | |
1bb721dc JM |
121 | Enum |
122 | Name(pa_schedule) Type(enum processor_type) | |
123 | ||
124 | EnumValue | |
125 | Enum(pa_schedule) String(8000) Value(PROCESSOR_8000) | |
126 | ||
127 | EnumValue | |
128 | Enum(pa_schedule) String(7100) Value(PROCESSOR_7100) | |
129 | ||
130 | EnumValue | |
131 | Enum(pa_schedule) String(700) Value(PROCESSOR_700) | |
132 | ||
133 | EnumValue | |
134 | Enum(pa_schedule) String(7100LC) Value(PROCESSOR_7100LC) | |
135 | ||
136 | EnumValue | |
137 | Enum(pa_schedule) String(7200) Value(PROCESSOR_7200) | |
138 | ||
139 | EnumValue | |
140 | Enum(pa_schedule) String(7300) Value(PROCESSOR_7300) | |
141 | ||
66617831 | 142 | msoft-float |
eece52b5 | 143 | Target Mask(SOFT_FLOAT) |
a7b2e184 | 144 | Use software floating point. |
66617831 | 145 | |
3f861a5c JDA |
146 | msoft-mult |
147 | Target Mask(SOFT_MULT) | |
148 | Use software integer multiplication. | |
149 | ||
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150 | msnake |
151 | Target RejectNegative | |
a7b2e184 | 152 | Generate PA1.1 code. |
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153 | |
154 | mspace-regs | |
eece52b5 | 155 | Target RejectNegative InverseMask(NO_SPACE_REGS) |
a7b2e184 | 156 | Do not disable space regs. |