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8d2af3a2 | 1 | ;; Constraint definitions for TI PRU. |
8d9254fc | 2 | ;; Copyright (C) 2014-2020 Free Software Foundation, Inc. |
8d2af3a2 DD |
3 | ;; Contributed by Dimitar Dimitrov <dimitar@dinux.eu> |
4 | ;; | |
5 | ;; This file is part of GCC. | |
6 | ;; | |
7 | ;; GCC is free software; you can redistribute it and/or modify | |
8 | ;; it under the terms of the GNU General Public License as published by | |
9 | ;; the Free Software Foundation; either version 3, or (at your option) | |
10 | ;; any later version. | |
11 | ;; | |
12 | ;; GCC is distributed in the hope that it will be useful, | |
13 | ;; but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | ;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | ;; GNU General Public License for more details. | |
16 | ;; | |
17 | ;; You should have received a copy of the GNU General Public License | |
18 | ;; along with GCC; see the file COPYING3. If not see | |
19 | ;; <http://www.gnu.org/licenses/>. | |
20 | ||
21 | ;; We use the following constraint letters for constants: | |
22 | ;; | |
23 | ;; I: 0 to 255. | |
24 | ;; J: 0 to 65535. | |
25 | ;; L: 0 to 31 (for shift counts). | |
26 | ;; T: Text segment label. Needed to know when to select %pmem relocation. | |
27 | ;; Z: Constant integer zero. | |
28 | ;; | |
29 | ;; We use the following built-in register classes: | |
30 | ;; | |
31 | ;; r: General purpose register (r0..r31). | |
32 | ;; m: Memory operand. | |
33 | ;; | |
34 | ;; The following constraints are intended for internal use only: | |
35 | ;; Rmd0, Rms0, Rms1: Registers for MUL instruction operands. | |
36 | ;; Rsib: Jump address register suitable for sibling calls. | |
37 | ;; M: -255 to 0 (for converting ADD to SUB with suitable UBYTE OP2). | |
38 | ;; N: -32768 to 32767 (16-bit signed integer). | |
39 | ;; O: -128 to 127 (8-bit signed integer). | |
40 | ;; P: 1 | |
41 | ||
42 | ;; Register constraints. | |
43 | ||
44 | (define_register_constraint "Rsib" "SIB_REGS" | |
45 | "@internal | |
46 | A register suitable for an indirect sibcall.") | |
47 | ||
48 | (define_register_constraint "Rmd0" "MULDST_REGS" | |
49 | "@internal | |
50 | The multiply destination register.") | |
51 | ||
52 | (define_register_constraint "Rms0" "MULSRC0_REGS" | |
53 | "@internal | |
54 | The multiply source 0 register.") | |
55 | ||
56 | (define_register_constraint "Rms1" "MULSRC1_REGS" | |
57 | "@internal | |
58 | The multiply source 1 register.") | |
59 | ||
60 | ;; Integer constraints. | |
61 | ||
62 | (define_constraint "I" | |
63 | "An unsigned 8-bit constant." | |
64 | (and (match_code "const_int") | |
65 | (match_test "UBYTE_INT (ival)"))) | |
66 | ||
67 | (define_constraint "J" | |
68 | "An unsigned 16-bit constant." | |
69 | (and (match_code "const_int") | |
70 | (match_test "UHWORD_INT (ival)"))) | |
71 | ||
72 | (define_constraint "L" | |
73 | "An unsigned 5-bit constant (for shift counts)." | |
74 | (and (match_code "const_int") | |
75 | (match_test "ival >= 0 && ival <= 31"))) | |
76 | ||
77 | (define_constraint "M" | |
78 | "@internal | |
79 | A constant in the range [-255, 0]." | |
80 | (and (match_code "const_int") | |
81 | (match_test "UBYTE_INT (-ival)"))) | |
82 | ||
83 | (define_constraint "N" | |
84 | "@internal | |
85 | A constant in the range [-32768, 32767]." | |
86 | (and (match_code "const_int") | |
87 | (match_test "SHWORD_INT (ival)"))) | |
88 | ||
89 | (define_constraint "O" | |
90 | "@internal | |
91 | A constant in the range [-128, 127]." | |
92 | (and (match_code "const_int") | |
93 | (match_test "SBYTE_INT (ival)"))) | |
94 | ||
95 | (define_constraint "P" | |
96 | "@internal | |
97 | A constant 1." | |
98 | (and (match_code "const_int") | |
99 | (match_test "ival == 1"))) | |
100 | ||
101 | (define_constraint "T" | |
102 | "A text segment (program memory) constant label." | |
103 | (match_test "text_segment_operand (op, VOIDmode)")) | |
104 | ||
105 | (define_constraint "Z" | |
106 | "An integer constant zero." | |
107 | (and (match_code "const_int") | |
108 | (match_test "ival == 0"))) |