[thirdparty/gcc.git] / gcc / config / rs6000 / htm.md

;; Hardware Transactional Memory (HTM) patterns.
;; Copyright (C) 2013-2022 Free Software Foundation, Inc.
;; Contributed by Peter Bergner <bergner@vnet.ibm.com>.

;; This file is part of GCC.

;; GCC is free software; you can redistribute it and/or modify it
;; under the terms of the GNU General Public License as published
;; by the Free Software Foundation; either version 3, or (at your
;; option) any later version.

;; GCC is distributed in the hope that it will be useful, but WITHOUT
;; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
;; or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
;; License for more details.

;; You should have received a copy of the GNU General Public License
;; along with GCC; see the file COPYING3.  If not see
;; <http://www.gnu.org/licenses/>.

(define_constants
  [(TFHAR_SPR		128)
   (TFIAR_SPR		129)
   (TEXASR_SPR		130)
   (TEXASRU_SPR		131)
   (MAX_HTM_OPERANDS	4)
  ])

;;
;; UNSPEC usage
;;

(define_c_enum "unspec"
  [UNSPEC_HTM_FENCE
  ])

;;
;; UNSPEC_VOLATILE usage
;;

(define_c_enum "unspecv"
  [UNSPECV_HTM_TABORT
   UNSPECV_HTM_TABORTXC
   UNSPECV_HTM_TABORTXCI
   UNSPECV_HTM_TBEGIN
   UNSPECV_HTM_TCHECK
   UNSPECV_HTM_TEND
   UNSPECV_HTM_TRECHKPT
   UNSPECV_HTM_TRECLAIM
   UNSPECV_HTM_TSR
   UNSPECV_HTM_TTEST
   UNSPECV_HTM_MFSPR
   UNSPECV_HTM_MTSPR
  ])

(define_expand "tabort"
  [(parallel
     [(set (match_operand:CC 1 "cc_reg_operand" "=x")
	   (unspec_volatile:CC [(match_operand:SI 0 "base_reg_operand" "b")]
			       UNSPECV_HTM_TABORT))
      (set (match_dup 2) (unspec:BLK [(match_dup 2)] UNSPEC_HTM_FENCE))])]
  "TARGET_HTM"
{
  operands[2] = gen_rtx_MEM (BLKmode, gen_rtx_SCRATCH (Pmode));
  MEM_VOLATILE_P (operands[2]) = 1;
})

(define_insn "*tabort"
  [(set (match_operand:CC 1 "cc_reg_operand" "=x")
	(unspec_volatile:CC [(match_operand:SI 0 "base_reg_operand" "b")]
			    UNSPECV_HTM_TABORT))
   (set (match_operand:BLK 2) (unspec:BLK [(match_dup 2)] UNSPEC_HTM_FENCE))]
  "TARGET_HTM"
  "tabort. %0"
  [(set_attr "type" "htmsimple")])

(define_expand "tabort<wd>c"
  [(parallel
     [(set (match_operand:CC 3 "cc_reg_operand" "=x")
	   (unspec_volatile:CC [(match_operand 0 "u5bit_cint_operand" "n")
				(match_operand:GPR 1 "gpc_reg_operand" "r")
				(match_operand:GPR 2 "gpc_reg_operand" "r")]
			       UNSPECV_HTM_TABORTXC))
      (set (match_dup 4) (unspec:BLK [(match_dup 4)] UNSPEC_HTM_FENCE))])]
  "TARGET_HTM"
{
  operands[4] = gen_rtx_MEM (BLKmode, gen_rtx_SCRATCH (Pmode));
  MEM_VOLATILE_P (operands[4]) = 1;
})

(define_insn "*tabort<wd>c"
  [(set (match_operand:CC 3 "cc_reg_operand" "=x")
	(unspec_volatile:CC [(match_operand 0 "u5bit_cint_operand" "n")
			     (match_operand:GPR 1 "gpc_reg_operand" "r")
			     (match_operand:GPR 2 "gpc_reg_operand" "r")]
			    UNSPECV_HTM_TABORTXC))
   (set (match_operand:BLK 4) (unspec:BLK [(match_dup 4)] UNSPEC_HTM_FENCE))]
  "TARGET_HTM"
  "tabort<wd>c. %0,%1,%2"
  [(set_attr "type" "htmsimple")])

(define_expand "tabort<wd>ci"
  [(parallel
     [(set (match_operand:CC 3 "cc_reg_operand" "=x")
	   (unspec_volatile:CC [(match_operand 0 "u5bit_cint_operand" "n")
				(match_operand:GPR 1 "gpc_reg_operand" "r")
				(match_operand 2 "s5bit_cint_operand" "n")]
			       UNSPECV_HTM_TABORTXCI))
      (set (match_dup 4) (unspec:BLK [(match_dup 4)] UNSPEC_HTM_FENCE))])]
  "TARGET_HTM"
{
  operands[4] = gen_rtx_MEM (BLKmode, gen_rtx_SCRATCH (Pmode));
  MEM_VOLATILE_P (operands[4]) = 1;
})

(define_insn "*tabort<wd>ci"
  [(set (match_operand:CC 3 "cc_reg_operand" "=x")
	(unspec_volatile:CC [(match_operand 0 "u5bit_cint_operand" "n")
			     (match_operand:GPR 1 "gpc_reg_operand" "r")
			     (match_operand 2 "s5bit_cint_operand" "n")]
			    UNSPECV_HTM_TABORTXCI))
   (set (match_operand:BLK 4) (unspec:BLK [(match_dup 4)] UNSPEC_HTM_FENCE))]
  "TARGET_HTM"
  "tabort<wd>ci. %0,%1,%2"
  [(set_attr "type" "htmsimple")])

(define_expand "tbegin"
  [(parallel
     [(set (match_operand:CC 1 "cc_reg_operand" "=x")
	   (unspec_volatile:CC [(match_operand 0 "const_0_to_1_operand" "n")]
			       UNSPECV_HTM_TBEGIN))
      (set (match_dup 2) (unspec:BLK [(match_dup 2)] UNSPEC_HTM_FENCE))])]
  "TARGET_HTM"
{
  operands[2] = gen_rtx_MEM (BLKmode, gen_rtx_SCRATCH (Pmode));
  MEM_VOLATILE_P (operands[2]) = 1;
})

(define_insn "*tbegin"
  [(set (match_operand:CC 1 "cc_reg_operand" "=x")
	(unspec_volatile:CC [(match_operand 0 "const_0_to_1_operand" "n")]
			    UNSPECV_HTM_TBEGIN))
   (set (match_operand:BLK 2) (unspec:BLK [(match_dup 2)] UNSPEC_HTM_FENCE))]
  "TARGET_HTM"
  "tbegin. %0"
  [(set_attr "type" "htm")])

(define_expand "tcheck"
  [(parallel
     [(set (match_operand:CC 0 "cc_reg_operand" "=y")
	   (unspec_volatile:CC [(const_int 0)] UNSPECV_HTM_TCHECK))
      (set (match_dup 1) (unspec:BLK [(match_dup 1)] UNSPEC_HTM_FENCE))])]
  "TARGET_HTM"
{
  operands[1] = gen_rtx_MEM (BLKmode, gen_rtx_SCRATCH (Pmode));
  MEM_VOLATILE_P (operands[1]) = 1;
})

(define_insn "*tcheck"
  [(set (match_operand:CC 0 "cc_reg_operand" "=y")
	(unspec_volatile:CC [(const_int 0)] UNSPECV_HTM_TCHECK))
   (set (match_operand:BLK 1) (unspec:BLK [(match_dup 1)] UNSPEC_HTM_FENCE))]
  "TARGET_HTM"
  "tcheck %0"
  [(set_attr "type" "htm")])

(define_expand "tend"
  [(parallel
     [(set (match_operand:CC 1 "cc_reg_operand" "=x")
	   (unspec_volatile:CC [(match_operand 0 "const_0_to_1_operand" "n")]
			       UNSPECV_HTM_TEND))
      (set (match_dup 2) (unspec:BLK [(match_dup 2)] UNSPEC_HTM_FENCE))])]
  "TARGET_HTM"
{
  operands[2] = gen_rtx_MEM (BLKmode, gen_rtx_SCRATCH (Pmode));
  MEM_VOLATILE_P (operands[2]) = 1;
})

(define_insn "*tend"
  [(set (match_operand:CC 1 "cc_reg_operand" "=x")
	(unspec_volatile:CC [(match_operand 0 "const_0_to_1_operand" "n")]
			    UNSPECV_HTM_TEND))
   (set (match_operand:BLK 2) (unspec:BLK [(match_dup 2)] UNSPEC_HTM_FENCE))]
  "TARGET_HTM"
  "tend. %0"
  [(set_attr "type" "htm")])

(define_expand "trechkpt"
  [(parallel
     [(set (match_operand:CC 0 "cc_reg_operand" "=x")
	   (unspec_volatile:CC [(const_int 0)] UNSPECV_HTM_TRECHKPT))
      (set (match_dup 1) (unspec:BLK [(match_dup 1)] UNSPEC_HTM_FENCE))])]
  "TARGET_HTM"
{
  operands[1] = gen_rtx_MEM (BLKmode, gen_rtx_SCRATCH (Pmode));
  MEM_VOLATILE_P (operands[1]) = 1;
})

(define_insn "*trechkpt"
  [(set (match_operand:CC 0 "cc_reg_operand" "=x")
	(unspec_volatile:CC [(const_int 0)] UNSPECV_HTM_TRECHKPT))
   (set (match_operand:BLK 1) (unspec:BLK [(match_dup 1)] UNSPEC_HTM_FENCE))]
  "TARGET_HTM"
  "trechkpt."
  [(set_attr "type" "htmsimple")])

(define_expand "treclaim"
  [(parallel
     [(set (match_operand:CC 1 "cc_reg_operand" "=x")
	   (unspec_volatile:CC [(match_operand:SI 0 "gpc_reg_operand" "r")]
			       UNSPECV_HTM_TRECLAIM))
      (set (match_dup 2) (unspec:BLK [(match_dup 2)] UNSPEC_HTM_FENCE))])]
  "TARGET_HTM"
{
  operands[2] = gen_rtx_MEM (BLKmode, gen_rtx_SCRATCH (Pmode));
  MEM_VOLATILE_P (operands[2]) = 1;
})

(define_insn "*treclaim"
  [(set (match_operand:CC 1 "cc_reg_operand" "=x")
	(unspec_volatile:CC [(match_operand:SI 0 "gpc_reg_operand" "r")]
			    UNSPECV_HTM_TRECLAIM))
   (set (match_operand:BLK 2) (unspec:BLK [(match_dup 2)] UNSPEC_HTM_FENCE))]
  "TARGET_HTM"
  "treclaim. %0"
  [(set_attr "type" "htmsimple")])

(define_expand "tsr"
  [(parallel
     [(set (match_operand:CC 1 "cc_reg_operand" "=x")
	   (unspec_volatile:CC [(match_operand 0 "const_0_to_1_operand" "n")]
			       UNSPECV_HTM_TSR))
      (set (match_dup 2) (unspec:BLK [(match_dup 2)] UNSPEC_HTM_FENCE))])]
  "TARGET_HTM"
{
  operands[2] = gen_rtx_MEM (BLKmode, gen_rtx_SCRATCH (Pmode));
  MEM_VOLATILE_P (operands[2]) = 1;
})

(define_insn "*tsr"
  [(set (match_operand:CC 1 "cc_reg_operand" "=x")
	(unspec_volatile:CC [(match_operand 0 "const_0_to_1_operand" "n")]
			    UNSPECV_HTM_TSR))
   (set (match_operand:BLK 2) (unspec:BLK [(match_dup 2)] UNSPEC_HTM_FENCE))]
  "TARGET_HTM"
  "tsr. %0"
  [(set_attr "type" "htmsimple")])

(define_expand "ttest"
  [(parallel
     [(set (match_operand:CC 0 "cc_reg_operand" "=x")
	   (unspec_volatile:CC [(const_int 0)] UNSPECV_HTM_TTEST))
      (set (match_dup 1) (unspec:BLK [(match_dup 1)] UNSPEC_HTM_FENCE))])]
  "TARGET_HTM"
{
  operands[1] = gen_rtx_MEM (BLKmode, gen_rtx_SCRATCH (Pmode));
  MEM_VOLATILE_P (operands[1]) = 1;
})

(define_insn "*ttest"
  [(set (match_operand:CC 0 "cc_reg_operand" "=x")
	(unspec_volatile:CC [(const_int 0)] UNSPECV_HTM_TTEST))
   (set (match_operand:BLK 1) (unspec:BLK [(match_dup 1)] UNSPEC_HTM_FENCE))]
  "TARGET_HTM"
  "tabortwci. 0,1,0"
  [(set_attr "type" "htmsimple")])

(define_insn "htm_mfspr_<mode>"
  [(set (match_operand:GPR 0 "gpc_reg_operand" "=r")
        (unspec_volatile:GPR [(match_operand 1 "u10bit_cint_operand" "n")]
			     UNSPECV_HTM_MFSPR))]
  "TARGET_HTM"
  "mfspr %0,%1";
  [(set_attr "type" "htm")])

(define_insn "htm_mtspr_<mode>"
  [(unspec_volatile [(match_operand:GPR 0 "gpc_reg_operand" "r")
		     (match_operand 1 "u10bit_cint_operand" "n")]
		    UNSPECV_HTM_MTSPR)]
  "TARGET_HTM"
  "mtspr %1,%0";
  [(set_attr "type" "htm")])
Commit	Line	Data
0258b6e4	1	;; Hardware Transactional Memory (HTM) patterns.
7adcbafe	2	;; Copyright (C) 2013-2022 Free Software Foundation, Inc.
0258b6e4 PB	3	;; Contributed by Peter Bergner <bergner@vnet.ibm.com>.
	4
	5	;; This file is part of GCC.
	6
	7	;; GCC is free software; you can redistribute it and/or modify it
	8	;; under the terms of the GNU General Public License as published
	9	;; by the Free Software Foundation; either version 3, or (at your
	10	;; option) any later version.
	11
	12	;; GCC is distributed in the hope that it will be useful, but WITHOUT
	13	;; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
	14	;; or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
	15	;; License for more details.
	16
	17	;; You should have received a copy of the GNU General Public License
	18	;; along with GCC; see the file COPYING3. If not see
	19	;; <http://www.gnu.org/licenses/>.
	20
	21	(define_constants
	22	[(TFHAR_SPR 128)
	23	(TFIAR_SPR 129)
	24	(TEXASR_SPR 130)
	25	(TEXASRU_SPR 131)
	26	(MAX_HTM_OPERANDS 4)
	27	])
	28
4c1f41e1 PB	29	;;
	30	;; UNSPEC usage
	31	;;
	32
	33	(define_c_enum "unspec"
	34	[UNSPEC_HTM_FENCE
	35	])
	36
0258b6e4 PB	37	;;
	38	;; UNSPEC_VOLATILE usage
	39	;;
	40
	41	(define_c_enum "unspecv"
	42	[UNSPECV_HTM_TABORT
01f61a78 PB	43	UNSPECV_HTM_TABORTXC
01f61a78 PB	44	UNSPECV_HTM_TABORTXCI
0258b6e4 PB	45	UNSPECV_HTM_TBEGIN
	46	UNSPECV_HTM_TCHECK
	47	UNSPECV_HTM_TEND
	48	UNSPECV_HTM_TRECHKPT
	49	UNSPECV_HTM_TRECLAIM
	50	UNSPECV_HTM_TSR
01f61a78	51	UNSPECV_HTM_TTEST
0258b6e4 PB	52	UNSPECV_HTM_MFSPR
	53	UNSPECV_HTM_MTSPR
	54	])
	55
4c1f41e1 PB	56	(define_expand "tabort"
	57	[(parallel
	58	[(set (match_operand:CC 1 "cc_reg_operand" "=x")
	59	(unspec_volatile:CC [(match_operand:SI 0 "base_reg_operand" "b")]
	60	UNSPECV_HTM_TABORT))
	61	(set (match_dup 2) (unspec:BLK [(match_dup 2)] UNSPEC_HTM_FENCE))])]
	62	"TARGET_HTM"
	63	{
	64	operands[2] = gen_rtx_MEM (BLKmode, gen_rtx_SCRATCH (Pmode));
	65	MEM_VOLATILE_P (operands[2]) = 1;
	66	})
0258b6e4	67
4c1f41e1	68	(define_insn "*tabort"
0258b6e4	69	[(set (match_operand:CC 1 "cc_reg_operand" "=x")
ab977fd8	70	(unspec_volatile:CC [(match_operand:SI 0 "base_reg_operand" "b")]
4c1f41e1 PB	71	UNSPECV_HTM_TABORT))
4c1f41e1 PB	72	(set (match_operand:BLK 2) (unspec:BLK [(match_dup 2)] UNSPEC_HTM_FENCE))]
0258b6e4 PB	73	"TARGET_HTM"
0258b6e4 PB	74	"tabort. %0"
b24a46be	75	[(set_attr "type" "htmsimple")])
0258b6e4	76
4c1f41e1 PB	77	(define_expand "tabort<wd>c"
	78	[(parallel
	79	[(set (match_operand:CC 3 "cc_reg_operand" "=x")
	80	(unspec_volatile:CC [(match_operand 0 "u5bit_cint_operand" "n")
	81	(match_operand:GPR 1 "gpc_reg_operand" "r")
	82	(match_operand:GPR 2 "gpc_reg_operand" "r")]
	83	UNSPECV_HTM_TABORTXC))
	84	(set (match_dup 4) (unspec:BLK [(match_dup 4)] UNSPEC_HTM_FENCE))])]
	85	"TARGET_HTM"
	86	{
	87	operands[4] = gen_rtx_MEM (BLKmode, gen_rtx_SCRATCH (Pmode));
	88	MEM_VOLATILE_P (operands[4]) = 1;
	89	})
	90
	91	(define_insn "*tabort<wd>c"
0258b6e4 PB	92	[(set (match_operand:CC 3 "cc_reg_operand" "=x")
0258b6e4 PB	93	(unspec_volatile:CC [(match_operand 0 "u5bit_cint_operand" "n")
01f61a78 PB	94	(match_operand:GPR 1 "gpc_reg_operand" "r")
01f61a78 PB	95	(match_operand:GPR 2 "gpc_reg_operand" "r")]
4c1f41e1 PB	96	UNSPECV_HTM_TABORTXC))
4c1f41e1 PB	97	(set (match_operand:BLK 4) (unspec:BLK [(match_dup 4)] UNSPEC_HTM_FENCE))]
0258b6e4	98	"TARGET_HTM"
01f61a78	99	"tabort<wd>c. %0,%1,%2"
b24a46be	100	[(set_attr "type" "htmsimple")])
0258b6e4	101
4c1f41e1 PB	102	(define_expand "tabort<wd>ci"
	103	[(parallel
	104	[(set (match_operand:CC 3 "cc_reg_operand" "=x")
	105	(unspec_volatile:CC [(match_operand 0 "u5bit_cint_operand" "n")
	106	(match_operand:GPR 1 "gpc_reg_operand" "r")
	107	(match_operand 2 "s5bit_cint_operand" "n")]
	108	UNSPECV_HTM_TABORTXCI))
	109	(set (match_dup 4) (unspec:BLK [(match_dup 4)] UNSPEC_HTM_FENCE))])]
	110	"TARGET_HTM"
	111	{
	112	operands[4] = gen_rtx_MEM (BLKmode, gen_rtx_SCRATCH (Pmode));
	113	MEM_VOLATILE_P (operands[4]) = 1;
	114	})
	115
	116	(define_insn "*tabort<wd>ci"
0258b6e4 PB	117	[(set (match_operand:CC 3 "cc_reg_operand" "=x")
0258b6e4 PB	118	(unspec_volatile:CC [(match_operand 0 "u5bit_cint_operand" "n")
01f61a78	119	(match_operand:GPR 1 "gpc_reg_operand" "r")
0258b6e4	120	(match_operand 2 "s5bit_cint_operand" "n")]
4c1f41e1 PB	121	UNSPECV_HTM_TABORTXCI))
4c1f41e1 PB	122	(set (match_operand:BLK 4) (unspec:BLK [(match_dup 4)] UNSPEC_HTM_FENCE))]
0258b6e4	123	"TARGET_HTM"
01f61a78	124	"tabort<wd>ci. %0,%1,%2"
b24a46be	125	[(set_attr "type" "htmsimple")])
0258b6e4	126
4c1f41e1 PB	127	(define_expand "tbegin"
	128	[(parallel
	129	[(set (match_operand:CC 1 "cc_reg_operand" "=x")
	130	(unspec_volatile:CC [(match_operand 0 "const_0_to_1_operand" "n")]
	131	UNSPECV_HTM_TBEGIN))
	132	(set (match_dup 2) (unspec:BLK [(match_dup 2)] UNSPEC_HTM_FENCE))])]
	133	"TARGET_HTM"
	134	{
	135	operands[2] = gen_rtx_MEM (BLKmode, gen_rtx_SCRATCH (Pmode));
	136	MEM_VOLATILE_P (operands[2]) = 1;
	137	})
	138
	139	(define_insn "*tbegin"
0258b6e4 PB	140	[(set (match_operand:CC 1 "cc_reg_operand" "=x")
0258b6e4 PB	141	(unspec_volatile:CC [(match_operand 0 "const_0_to_1_operand" "n")]
4c1f41e1 PB	142	UNSPECV_HTM_TBEGIN))
4c1f41e1 PB	143	(set (match_operand:BLK 2) (unspec:BLK [(match_dup 2)] UNSPEC_HTM_FENCE))]
0258b6e4 PB	144	"TARGET_HTM"
0258b6e4 PB	145	"tbegin. %0"
b24a46be	146	[(set_attr "type" "htm")])
0258b6e4	147
4c1f41e1 PB	148	(define_expand "tcheck"
	149	[(parallel
	150	[(set (match_operand:CC 0 "cc_reg_operand" "=y")
	151	(unspec_volatile:CC [(const_int 0)] UNSPECV_HTM_TCHECK))
	152	(set (match_dup 1) (unspec:BLK [(match_dup 1)] UNSPEC_HTM_FENCE))])]
	153	"TARGET_HTM"
	154	{
	155	operands[1] = gen_rtx_MEM (BLKmode, gen_rtx_SCRATCH (Pmode));
	156	MEM_VOLATILE_P (operands[1]) = 1;
	157	})
	158
	159	(define_insn "*tcheck"
01f61a78	160	[(set (match_operand:CC 0 "cc_reg_operand" "=y")
4c1f41e1 PB	161	(unspec_volatile:CC [(const_int 0)] UNSPECV_HTM_TCHECK))
4c1f41e1 PB	162	(set (match_operand:BLK 1) (unspec:BLK [(match_dup 1)] UNSPEC_HTM_FENCE))]
0258b6e4	163	"TARGET_HTM"
313123e7	164	"tcheck %0"
b24a46be	165	[(set_attr "type" "htm")])
0258b6e4	166
4c1f41e1 PB	167	(define_expand "tend"
	168	[(parallel
	169	[(set (match_operand:CC 1 "cc_reg_operand" "=x")
	170	(unspec_volatile:CC [(match_operand 0 "const_0_to_1_operand" "n")]
	171	UNSPECV_HTM_TEND))
	172	(set (match_dup 2) (unspec:BLK [(match_dup 2)] UNSPEC_HTM_FENCE))])]
	173	"TARGET_HTM"
	174	{
	175	operands[2] = gen_rtx_MEM (BLKmode, gen_rtx_SCRATCH (Pmode));
	176	MEM_VOLATILE_P (operands[2]) = 1;
	177	})
	178
	179	(define_insn "*tend"
0258b6e4 PB	180	[(set (match_operand:CC 1 "cc_reg_operand" "=x")
0258b6e4 PB	181	(unspec_volatile:CC [(match_operand 0 "const_0_to_1_operand" "n")]
4c1f41e1 PB	182	UNSPECV_HTM_TEND))
4c1f41e1 PB	183	(set (match_operand:BLK 2) (unspec:BLK [(match_dup 2)] UNSPEC_HTM_FENCE))]
0258b6e4 PB	184	"TARGET_HTM"
0258b6e4 PB	185	"tend. %0"
b24a46be	186	[(set_attr "type" "htm")])
0258b6e4	187
4c1f41e1 PB	188	(define_expand "trechkpt"
	189	[(parallel
	190	[(set (match_operand:CC 0 "cc_reg_operand" "=x")
	191	(unspec_volatile:CC [(const_int 0)] UNSPECV_HTM_TRECHKPT))
	192	(set (match_dup 1) (unspec:BLK [(match_dup 1)] UNSPEC_HTM_FENCE))])]
	193	"TARGET_HTM"
	194	{
	195	operands[1] = gen_rtx_MEM (BLKmode, gen_rtx_SCRATCH (Pmode));
	196	MEM_VOLATILE_P (operands[1]) = 1;
	197	})
	198
	199	(define_insn "*trechkpt"
0258b6e4	200	[(set (match_operand:CC 0 "cc_reg_operand" "=x")
4c1f41e1 PB	201	(unspec_volatile:CC [(const_int 0)] UNSPECV_HTM_TRECHKPT))
4c1f41e1 PB	202	(set (match_operand:BLK 1) (unspec:BLK [(match_dup 1)] UNSPEC_HTM_FENCE))]
0258b6e4 PB	203	"TARGET_HTM"
0258b6e4 PB	204	"trechkpt."
b24a46be	205	[(set_attr "type" "htmsimple")])
0258b6e4	206
4c1f41e1 PB	207	(define_expand "treclaim"
	208	[(parallel
	209	[(set (match_operand:CC 1 "cc_reg_operand" "=x")
	210	(unspec_volatile:CC [(match_operand:SI 0 "gpc_reg_operand" "r")]
	211	UNSPECV_HTM_TRECLAIM))
	212	(set (match_dup 2) (unspec:BLK [(match_dup 2)] UNSPEC_HTM_FENCE))])]
	213	"TARGET_HTM"
	214	{
	215	operands[2] = gen_rtx_MEM (BLKmode, gen_rtx_SCRATCH (Pmode));
	216	MEM_VOLATILE_P (operands[2]) = 1;
	217	})
	218
	219	(define_insn "*treclaim"
0258b6e4 PB	220	[(set (match_operand:CC 1 "cc_reg_operand" "=x")
0258b6e4 PB	221	(unspec_volatile:CC [(match_operand:SI 0 "gpc_reg_operand" "r")]
4c1f41e1 PB	222	UNSPECV_HTM_TRECLAIM))
4c1f41e1 PB	223	(set (match_operand:BLK 2) (unspec:BLK [(match_dup 2)] UNSPEC_HTM_FENCE))]
0258b6e4 PB	224	"TARGET_HTM"
0258b6e4 PB	225	"treclaim. %0"
b24a46be	226	[(set_attr "type" "htmsimple")])
0258b6e4	227
4c1f41e1 PB	228	(define_expand "tsr"
	229	[(parallel
	230	[(set (match_operand:CC 1 "cc_reg_operand" "=x")
	231	(unspec_volatile:CC [(match_operand 0 "const_0_to_1_operand" "n")]
	232	UNSPECV_HTM_TSR))
	233	(set (match_dup 2) (unspec:BLK [(match_dup 2)] UNSPEC_HTM_FENCE))])]
	234	"TARGET_HTM"
	235	{
	236	operands[2] = gen_rtx_MEM (BLKmode, gen_rtx_SCRATCH (Pmode));
	237	MEM_VOLATILE_P (operands[2]) = 1;
	238	})
	239
	240	(define_insn "*tsr"
0258b6e4 PB	241	[(set (match_operand:CC 1 "cc_reg_operand" "=x")
0258b6e4 PB	242	(unspec_volatile:CC [(match_operand 0 "const_0_to_1_operand" "n")]
4c1f41e1 PB	243	UNSPECV_HTM_TSR))
4c1f41e1 PB	244	(set (match_operand:BLK 2) (unspec:BLK [(match_dup 2)] UNSPEC_HTM_FENCE))]
0258b6e4 PB	245	"TARGET_HTM"
0258b6e4 PB	246	"tsr. %0"
b24a46be	247	[(set_attr "type" "htmsimple")])
0258b6e4	248
4c1f41e1 PB	249	(define_expand "ttest"
	250	[(parallel
	251	[(set (match_operand:CC 0 "cc_reg_operand" "=x")
	252	(unspec_volatile:CC [(const_int 0)] UNSPECV_HTM_TTEST))
	253	(set (match_dup 1) (unspec:BLK [(match_dup 1)] UNSPEC_HTM_FENCE))])]
	254	"TARGET_HTM"
	255	{
	256	operands[1] = gen_rtx_MEM (BLKmode, gen_rtx_SCRATCH (Pmode));
	257	MEM_VOLATILE_P (operands[1]) = 1;
	258	})
	259
	260	(define_insn "*ttest"
01f61a78	261	[(set (match_operand:CC 0 "cc_reg_operand" "=x")
4c1f41e1 PB	262	(unspec_volatile:CC [(const_int 0)] UNSPECV_HTM_TTEST))
4c1f41e1 PB	263	(set (match_operand:BLK 1) (unspec:BLK [(match_dup 1)] UNSPEC_HTM_FENCE))]
01f61a78 PB	264	"TARGET_HTM"
01f61a78 PB	265	"tabortwci. 0,1,0"
b24a46be	266	[(set_attr "type" "htmsimple")])
01f61a78	267
0258b6e4	268	(define_insn "htm_mfspr_<mode>"
01f61a78	269	[(set (match_operand:GPR 0 "gpc_reg_operand" "=r")
b56be669	270	(unspec_volatile:GPR [(match_operand 1 "u10bit_cint_operand" "n")]
01f61a78	271	UNSPECV_HTM_MFSPR))]
0258b6e4 PB	272	"TARGET_HTM"
0258b6e4 PB	273	"mfspr %0,%1";
b24a46be	274	[(set_attr "type" "htm")])
0258b6e4 PB	275
0258b6e4 PB	276	(define_insn "htm_mtspr_<mode>"
b56be669 SB	277	[(unspec_volatile [(match_operand:GPR 0 "gpc_reg_operand" "r")
	278	(match_operand 1 "u10bit_cint_operand" "n")]
	279	UNSPECV_HTM_MTSPR)]
0258b6e4 PB	280	"TARGET_HTM"
0258b6e4 PB	281	"mtspr %1,%0";
b24a46be	282	[(set_attr "type" "htm")])