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1acf0246 BS |
1 | /* Subroutines used to generate function calls and handle built-in |
2 | instructions on IBM RS/6000. | |
a945c346 | 3 | Copyright (C) 1991-2024 Free Software Foundation, Inc. |
1acf0246 BS |
4 | |
5 | This file is part of GCC. | |
6 | ||
7 | GCC is free software; you can redistribute it and/or modify it | |
8 | under the terms of the GNU General Public License as published | |
9 | by the Free Software Foundation; either version 3, or (at your | |
10 | option) any later version. | |
11 | ||
12 | GCC is distributed in the hope that it will be useful, but WITHOUT | |
13 | ANY WARRANTY; without even the implied warranty of MERCHANTABILITY | |
14 | or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public | |
15 | License for more details. | |
16 | ||
17 | You should have received a copy of the GNU General Public License | |
18 | along with GCC; see the file COPYING3. If not see | |
19 | <http://www.gnu.org/licenses/>. */ | |
20 | ||
21 | #define IN_TARGET_CODE 1 | |
22 | ||
23 | #include "config.h" | |
24 | #include "system.h" | |
25 | #include "coretypes.h" | |
26 | #include "backend.h" | |
27 | #include "rtl.h" | |
28 | #include "tree.h" | |
29 | #include "memmodel.h" | |
30 | #include "gimple.h" | |
31 | #include "cfghooks.h" | |
32 | #include "cfgloop.h" | |
33 | #include "df.h" | |
34 | #include "tm_p.h" | |
35 | #include "stringpool.h" | |
36 | #include "expmed.h" | |
37 | #include "optabs.h" | |
38 | #include "regs.h" | |
39 | #include "ira.h" | |
40 | #include "recog.h" | |
41 | #include "cgraph.h" | |
42 | #include "diagnostic-core.h" | |
43 | #include "insn-attr.h" | |
44 | #include "flags.h" | |
45 | #include "alias.h" | |
46 | #include "fold-const.h" | |
47 | #include "attribs.h" | |
48 | #include "stor-layout.h" | |
49 | #include "calls.h" | |
50 | #include "print-tree.h" | |
51 | #include "varasm.h" | |
52 | #include "explow.h" | |
53 | #include "expr.h" | |
54 | #include "output.h" | |
55 | #include "common/common-target.h" | |
56 | #include "langhooks.h" | |
57 | #include "gimplify.h" | |
1acf0246 | 58 | #include "gimple-iterator.h" |
ba206889 | 59 | #include "gimple-fold.h" |
9885183c DE |
60 | #include "ssa.h" |
61 | #include "tree-ssa-propagate.h" | |
1acf0246 BS |
62 | #include "builtins.h" |
63 | #include "tree-vector-builder.h" | |
1acf0246 | 64 | #include "ppc-auxv.h" |
1acf0246 | 65 | #include "targhooks.h" |
691eeb65 | 66 | #include "opts.h" |
1acf0246 BS |
67 | |
68 | #include "rs6000-internal.h" | |
69 | ||
1acf0246 BS |
70 | #ifndef TARGET_PROFILE_KERNEL |
71 | #define TARGET_PROFILE_KERNEL 0 | |
72 | #endif | |
73 | ||
c3550462 BS |
74 | #ifdef HAVE_AS_GNU_ATTRIBUTE |
75 | # ifndef HAVE_LD_PPC_GNU_ATTR_LONG_DOUBLE | |
76 | # define HAVE_LD_PPC_GNU_ATTR_LONG_DOUBLE 0 | |
77 | # endif | |
78 | #endif | |
79 | ||
48df9391 IS |
80 | #ifndef TARGET_NO_PROTOTYPE |
81 | #define TARGET_NO_PROTOTYPE 0 | |
82 | #endif | |
83 | ||
1acf0246 BS |
84 | /* Nonzero if we can use a floating-point register to pass this arg. */ |
85 | #define USE_FP_FOR_ARG_P(CUM,MODE) \ | |
86 | (SCALAR_FLOAT_MODE_NOT_VECTOR_P (MODE) \ | |
87 | && (CUM)->fregno <= FP_ARG_MAX_REG \ | |
88 | && TARGET_HARD_FLOAT) | |
89 | ||
90 | /* Nonzero if we can use an AltiVec register to pass this arg. */ | |
91 | #define USE_ALTIVEC_FOR_ARG_P(CUM,MODE,NAMED) \ | |
92 | (ALTIVEC_OR_VSX_VECTOR_MODE (MODE) \ | |
93 | && (CUM)->vregno <= ALTIVEC_ARG_MAX_REG \ | |
94 | && TARGET_ALTIVEC_ABI \ | |
95 | && (NAMED)) | |
96 | ||
97 | /* Walk down the type tree of TYPE counting consecutive base elements. | |
98 | If *MODEP is VOIDmode, then set it to the first valid floating point | |
99 | or vector type. If a non-floating point or vector type is found, or | |
100 | if a floating point or vector type that doesn't match a non-VOIDmode | |
101 | *MODEP is found, then return -1, otherwise return the count in the | |
16e3d6b8 BS |
102 | sub-tree. |
103 | ||
104 | There have been some ABI snafus along the way with C++. Modify | |
105 | EMPTY_BASE_SEEN to a nonzero value iff a C++ empty base class makes | |
106 | an appearance; separate flag bits indicate whether or not such a | |
107 | field is marked "no unique address". Modify ZERO_WIDTH_BF_SEEN | |
108 | to 1 iff a C++ zero-length bitfield makes an appearance, but | |
109 | in this case otherwise treat this as still being a homogeneous | |
110 | aggregate. */ | |
1acf0246 BS |
111 | |
112 | static int | |
a39ed81b | 113 | rs6000_aggregate_candidate (const_tree type, machine_mode *modep, |
16e3d6b8 | 114 | int *empty_base_seen, int *zero_width_bf_seen) |
1acf0246 BS |
115 | { |
116 | machine_mode mode; | |
117 | HOST_WIDE_INT size; | |
118 | ||
119 | switch (TREE_CODE (type)) | |
120 | { | |
121 | case REAL_TYPE: | |
122 | mode = TYPE_MODE (type); | |
123 | if (!SCALAR_FLOAT_MODE_P (mode)) | |
124 | return -1; | |
125 | ||
126 | if (*modep == VOIDmode) | |
127 | *modep = mode; | |
128 | ||
129 | if (*modep == mode) | |
130 | return 1; | |
131 | ||
132 | break; | |
133 | ||
134 | case COMPLEX_TYPE: | |
135 | mode = TYPE_MODE (TREE_TYPE (type)); | |
136 | if (!SCALAR_FLOAT_MODE_P (mode)) | |
137 | return -1; | |
138 | ||
139 | if (*modep == VOIDmode) | |
140 | *modep = mode; | |
141 | ||
142 | if (*modep == mode) | |
143 | return 2; | |
144 | ||
145 | break; | |
146 | ||
147 | case VECTOR_TYPE: | |
148 | if (!TARGET_ALTIVEC_ABI || !TARGET_ALTIVEC) | |
149 | return -1; | |
150 | ||
151 | /* Use V4SImode as representative of all 128-bit vector types. */ | |
152 | size = int_size_in_bytes (type); | |
153 | switch (size) | |
154 | { | |
155 | case 16: | |
156 | mode = V4SImode; | |
157 | break; | |
158 | default: | |
159 | return -1; | |
160 | } | |
161 | ||
162 | if (*modep == VOIDmode) | |
163 | *modep = mode; | |
164 | ||
165 | /* Vector modes are considered to be opaque: two vectors are | |
166 | equivalent for the purposes of being homogeneous aggregates | |
167 | if they are the same size. */ | |
168 | if (*modep == mode) | |
169 | return 1; | |
170 | ||
171 | break; | |
172 | ||
173 | case ARRAY_TYPE: | |
174 | { | |
175 | int count; | |
176 | tree index = TYPE_DOMAIN (type); | |
177 | ||
178 | /* Can't handle incomplete types nor sizes that are not | |
179 | fixed. */ | |
180 | if (!COMPLETE_TYPE_P (type) | |
181 | || TREE_CODE (TYPE_SIZE (type)) != INTEGER_CST) | |
182 | return -1; | |
183 | ||
a39ed81b | 184 | count = rs6000_aggregate_candidate (TREE_TYPE (type), modep, |
16e3d6b8 BS |
185 | empty_base_seen, |
186 | zero_width_bf_seen); | |
1acf0246 BS |
187 | if (count == -1 |
188 | || !index | |
189 | || !TYPE_MAX_VALUE (index) | |
190 | || !tree_fits_uhwi_p (TYPE_MAX_VALUE (index)) | |
191 | || !TYPE_MIN_VALUE (index) | |
192 | || !tree_fits_uhwi_p (TYPE_MIN_VALUE (index)) | |
193 | || count < 0) | |
194 | return -1; | |
195 | ||
196 | count *= (1 + tree_to_uhwi (TYPE_MAX_VALUE (index)) | |
197 | - tree_to_uhwi (TYPE_MIN_VALUE (index))); | |
198 | ||
199 | /* There must be no padding. */ | |
200 | if (wi::to_wide (TYPE_SIZE (type)) | |
201 | != count * GET_MODE_BITSIZE (*modep)) | |
202 | return -1; | |
203 | ||
204 | return count; | |
205 | } | |
206 | ||
207 | case RECORD_TYPE: | |
208 | { | |
209 | int count = 0; | |
210 | int sub_count; | |
211 | tree field; | |
212 | ||
213 | /* Can't handle incomplete types nor sizes that are not | |
214 | fixed. */ | |
215 | if (!COMPLETE_TYPE_P (type) | |
216 | || TREE_CODE (TYPE_SIZE (type)) != INTEGER_CST) | |
217 | return -1; | |
218 | ||
219 | for (field = TYPE_FIELDS (type); field; field = TREE_CHAIN (field)) | |
220 | { | |
221 | if (TREE_CODE (field) != FIELD_DECL) | |
222 | continue; | |
223 | ||
16e3d6b8 BS |
224 | if (DECL_FIELD_CXX_ZERO_WIDTH_BIT_FIELD (field)) |
225 | { | |
226 | /* GCC 11 and earlier generated incorrect code in a rare | |
227 | corner case for C++. When a RECORD_TYPE looks like a | |
228 | homogeneous aggregate, except that it also contains | |
229 | one or more zero-width bit fields, these earlier | |
230 | compilers would incorrectly pass the fields in FPRs | |
231 | or VSRs. This occurred because the front end wrongly | |
232 | removed these bitfields from the RECORD_TYPE. In | |
233 | GCC 12 and later, the front end flaw was corrected. | |
234 | We want to diagnose this case. To do this, we pretend | |
235 | that we don't see the zero-width bit fields (hence | |
236 | the continue statement here), but pass back a flag | |
237 | indicating what happened. The caller then diagnoses | |
238 | the issue and rejects the RECORD_TYPE as a homogeneous | |
239 | aggregate. */ | |
240 | *zero_width_bf_seen = 1; | |
241 | continue; | |
242 | } | |
243 | ||
575ac27f | 244 | if (DECL_FIELD_ABI_IGNORED (field)) |
a39ed81b | 245 | { |
575ac27f JJ |
246 | if (lookup_attribute ("no_unique_address", |
247 | DECL_ATTRIBUTES (field))) | |
248 | *empty_base_seen |= 2; | |
249 | else | |
250 | *empty_base_seen |= 1; | |
a39ed81b JJ |
251 | continue; |
252 | } | |
253 | ||
254 | sub_count = rs6000_aggregate_candidate (TREE_TYPE (field), modep, | |
16e3d6b8 BS |
255 | empty_base_seen, |
256 | zero_width_bf_seen); | |
1acf0246 BS |
257 | if (sub_count < 0) |
258 | return -1; | |
259 | count += sub_count; | |
260 | } | |
261 | ||
262 | /* There must be no padding. */ | |
263 | if (wi::to_wide (TYPE_SIZE (type)) | |
264 | != count * GET_MODE_BITSIZE (*modep)) | |
265 | return -1; | |
266 | ||
267 | return count; | |
268 | } | |
269 | ||
270 | case UNION_TYPE: | |
271 | case QUAL_UNION_TYPE: | |
272 | { | |
273 | /* These aren't very interesting except in a degenerate case. */ | |
274 | int count = 0; | |
275 | int sub_count; | |
276 | tree field; | |
277 | ||
278 | /* Can't handle incomplete types nor sizes that are not | |
279 | fixed. */ | |
280 | if (!COMPLETE_TYPE_P (type) | |
281 | || TREE_CODE (TYPE_SIZE (type)) != INTEGER_CST) | |
282 | return -1; | |
283 | ||
284 | for (field = TYPE_FIELDS (type); field; field = TREE_CHAIN (field)) | |
285 | { | |
286 | if (TREE_CODE (field) != FIELD_DECL) | |
287 | continue; | |
288 | ||
a39ed81b | 289 | sub_count = rs6000_aggregate_candidate (TREE_TYPE (field), modep, |
16e3d6b8 BS |
290 | empty_base_seen, |
291 | zero_width_bf_seen); | |
1acf0246 BS |
292 | if (sub_count < 0) |
293 | return -1; | |
294 | count = count > sub_count ? count : sub_count; | |
295 | } | |
296 | ||
297 | /* There must be no padding. */ | |
298 | if (wi::to_wide (TYPE_SIZE (type)) | |
299 | != count * GET_MODE_BITSIZE (*modep)) | |
300 | return -1; | |
301 | ||
302 | return count; | |
303 | } | |
304 | ||
305 | default: | |
306 | break; | |
307 | } | |
308 | ||
309 | return -1; | |
310 | } | |
311 | ||
312 | /* If an argument, whose type is described by TYPE and MODE, is a homogeneous | |
313 | float or vector aggregate that shall be passed in FP/vector registers | |
314 | according to the ELFv2 ABI, return the homogeneous element mode in | |
315 | *ELT_MODE and the number of elements in *N_ELTS, and return TRUE. | |
316 | ||
317 | Otherwise, set *ELT_MODE to MODE and *N_ELTS to 1, and return FALSE. */ | |
318 | ||
319 | bool | |
320 | rs6000_discover_homogeneous_aggregate (machine_mode mode, const_tree type, | |
321 | machine_mode *elt_mode, | |
322 | int *n_elts) | |
323 | { | |
324 | /* Note that we do not accept complex types at the top level as | |
325 | homogeneous aggregates; these types are handled via the | |
326 | targetm.calls.split_complex_arg mechanism. Complex types | |
327 | can be elements of homogeneous aggregates, however. */ | |
328 | if (TARGET_HARD_FLOAT && DEFAULT_ABI == ABI_ELFv2 && type | |
329 | && AGGREGATE_TYPE_P (type)) | |
330 | { | |
331 | machine_mode field_mode = VOIDmode; | |
575ac27f | 332 | int empty_base_seen = 0; |
16e3d6b8 | 333 | int zero_width_bf_seen = 0; |
a39ed81b | 334 | int field_count = rs6000_aggregate_candidate (type, &field_mode, |
16e3d6b8 BS |
335 | &empty_base_seen, |
336 | &zero_width_bf_seen); | |
1acf0246 BS |
337 | |
338 | if (field_count > 0) | |
339 | { | |
340 | int reg_size = ALTIVEC_OR_VSX_VECTOR_MODE (field_mode) ? 16 : 8; | |
341 | int field_size = ROUND_UP (GET_MODE_SIZE (field_mode), reg_size); | |
342 | ||
343 | /* The ELFv2 ABI allows homogeneous aggregates to occupy | |
344 | up to AGGR_ARG_NUM_REG registers. */ | |
345 | if (field_count * field_size <= AGGR_ARG_NUM_REG * reg_size) | |
346 | { | |
347 | if (elt_mode) | |
348 | *elt_mode = field_mode; | |
349 | if (n_elts) | |
350 | *n_elts = field_count; | |
575ac27f | 351 | if (empty_base_seen && warn_psabi) |
a39ed81b | 352 | { |
239cfd92 JJ |
353 | static unsigned last_reported_type_uid; |
354 | unsigned uid = TYPE_UID (TYPE_MAIN_VARIANT (type)); | |
355 | if (uid != last_reported_type_uid) | |
a39ed81b | 356 | { |
e33a1eae JJ |
357 | const char *url |
358 | = CHANGES_ROOT_URL "gcc-10/changes.html#empty_base"; | |
575ac27f JJ |
359 | if (empty_base_seen & 1) |
360 | inform (input_location, | |
361 | "parameter passing for argument of type %qT " | |
362 | "when C++17 is enabled changed to match C++14 " | |
691eeb65 | 363 | "%{in GCC 10.1%}", type, url); |
575ac27f JJ |
364 | else |
365 | inform (input_location, | |
366 | "parameter passing for argument of type %qT " | |
367 | "with %<[[no_unique_address]]%> members " | |
691eeb65 | 368 | "changed %{in GCC 10.1%}", type, url); |
239cfd92 | 369 | last_reported_type_uid = uid; |
a39ed81b JJ |
370 | } |
371 | } | |
16e3d6b8 BS |
372 | if (zero_width_bf_seen && warn_psabi) |
373 | { | |
374 | static unsigned last_reported_type_uid; | |
375 | unsigned uid = TYPE_UID (TYPE_MAIN_VARIANT (type)); | |
376 | if (uid != last_reported_type_uid) | |
377 | { | |
378 | inform (input_location, | |
379 | "ELFv2 parameter passing for an argument " | |
380 | "containing zero-width bit fields but that is " | |
381 | "otherwise a homogeneous aggregate was " | |
382 | "corrected in GCC 12"); | |
383 | last_reported_type_uid = uid; | |
384 | } | |
385 | if (elt_mode) | |
386 | *elt_mode = mode; | |
387 | if (n_elts) | |
388 | *n_elts = 1; | |
389 | return false; | |
390 | } | |
1acf0246 BS |
391 | return true; |
392 | } | |
393 | } | |
394 | } | |
395 | ||
396 | if (elt_mode) | |
397 | *elt_mode = mode; | |
398 | if (n_elts) | |
399 | *n_elts = 1; | |
400 | return false; | |
401 | } | |
402 | ||
403 | /* Return a nonzero value to say to return the function value in | |
404 | memory, just as large structures are always returned. TYPE will be | |
405 | the data type of the value, and FNTYPE will be the type of the | |
406 | function doing the returning, or @code{NULL} for libcalls. | |
407 | ||
408 | The AIX ABI for the RS/6000 specifies that all structures are | |
409 | returned in memory. The Darwin ABI does the same. | |
410 | ||
411 | For the Darwin 64 Bit ABI, a function result can be returned in | |
412 | registers or in memory, depending on the size of the return data | |
413 | type. If it is returned in registers, the value occupies the same | |
414 | registers as it would if it were the first and only function | |
415 | argument. Otherwise, the function places its result in memory at | |
416 | the location pointed to by GPR3. | |
417 | ||
418 | The SVR4 ABI specifies that structures <= 8 bytes are returned in r3/r4, | |
419 | but a draft put them in memory, and GCC used to implement the draft | |
420 | instead of the final standard. Therefore, aix_struct_return | |
421 | controls this instead of DEFAULT_ABI; V.4 targets needing backward | |
422 | compatibility can change DRAFT_V4_STRUCT_RET to override the | |
423 | default, and -m switches get the final word. See | |
424 | rs6000_option_override_internal for more details. | |
425 | ||
426 | The PPC32 SVR4 ABI uses IEEE double extended for long double, if 128-bit | |
427 | long double support is enabled. These values are returned in memory. | |
428 | ||
429 | int_size_in_bytes returns -1 for variable size objects, which go in | |
430 | memory always. The cast to unsigned makes -1 > 8. */ | |
431 | ||
432 | bool | |
433 | rs6000_return_in_memory (const_tree type, const_tree fntype ATTRIBUTE_UNUSED) | |
434 | { | |
f8f8909a AS |
435 | /* We do not allow MMA types being used as return values. Only report |
436 | the invalid return value usage the first time we encounter it. */ | |
437 | if (cfun | |
438 | && !cfun->machine->mma_return_type_error | |
439 | && TREE_TYPE (cfun->decl) == fntype | |
440 | && (TYPE_MODE (type) == OOmode || TYPE_MODE (type) == XOmode)) | |
441 | { | |
442 | /* Record we have now handled function CFUN, so the next time we | |
443 | are called, we do not re-report the same error. */ | |
444 | cfun->machine->mma_return_type_error = true; | |
445 | if (TYPE_CANONICAL (type) != NULL_TREE) | |
446 | type = TYPE_CANONICAL (type); | |
447 | error ("invalid use of MMA type %qs as a function return value", | |
448 | IDENTIFIER_POINTER (DECL_NAME (TYPE_NAME (type)))); | |
449 | } | |
450 | ||
1acf0246 BS |
451 | /* For the Darwin64 ABI, test if we can fit the return value in regs. */ |
452 | if (TARGET_MACHO | |
453 | && rs6000_darwin64_abi | |
454 | && TREE_CODE (type) == RECORD_TYPE | |
455 | && int_size_in_bytes (type) > 0) | |
456 | { | |
457 | CUMULATIVE_ARGS valcum; | |
458 | rtx valret; | |
459 | ||
460 | valcum.words = 0; | |
461 | valcum.fregno = FP_ARG_MIN_REG; | |
462 | valcum.vregno = ALTIVEC_ARG_MIN_REG; | |
463 | /* Do a trial code generation as if this were going to be passed | |
464 | as an argument; if any part goes in memory, we return NULL. */ | |
465 | valret = rs6000_darwin64_record_arg (&valcum, type, true, true); | |
466 | if (valret) | |
467 | return false; | |
468 | /* Otherwise fall through to more conventional ABI rules. */ | |
469 | } | |
470 | ||
471 | /* The ELFv2 ABI returns homogeneous VFP aggregates in registers */ | |
472 | if (rs6000_discover_homogeneous_aggregate (TYPE_MODE (type), type, | |
473 | NULL, NULL)) | |
474 | return false; | |
475 | ||
476 | /* The ELFv2 ABI returns aggregates up to 16B in registers */ | |
477 | if (DEFAULT_ABI == ABI_ELFv2 && AGGREGATE_TYPE_P (type) | |
478 | && (unsigned HOST_WIDE_INT) int_size_in_bytes (type) <= 16) | |
479 | return false; | |
480 | ||
481 | if (AGGREGATE_TYPE_P (type) | |
482 | && (aix_struct_return | |
483 | || (unsigned HOST_WIDE_INT) int_size_in_bytes (type) > 8)) | |
484 | return true; | |
485 | ||
486 | /* Allow -maltivec -mabi=no-altivec without warning. Altivec vector | |
487 | modes only exist for GCC vector types if -maltivec. */ | |
488 | if (TARGET_32BIT && !TARGET_ALTIVEC_ABI | |
489 | && ALTIVEC_VECTOR_MODE (TYPE_MODE (type))) | |
490 | return false; | |
491 | ||
492 | /* Return synthetic vectors in memory. */ | |
493 | if (TREE_CODE (type) == VECTOR_TYPE | |
494 | && int_size_in_bytes (type) > (TARGET_ALTIVEC_ABI ? 16 : 8)) | |
495 | { | |
496 | static bool warned_for_return_big_vectors = false; | |
497 | if (!warned_for_return_big_vectors) | |
498 | { | |
499 | warning (OPT_Wpsabi, "GCC vector returned by reference: " | |
500 | "non-standard ABI extension with no compatibility " | |
501 | "guarantee"); | |
502 | warned_for_return_big_vectors = true; | |
503 | } | |
504 | return true; | |
505 | } | |
506 | ||
507 | if (DEFAULT_ABI == ABI_V4 && TARGET_IEEEQUAD | |
508 | && FLOAT128_IEEE_P (TYPE_MODE (type))) | |
509 | return true; | |
510 | ||
511 | return false; | |
512 | } | |
513 | ||
514 | /* Specify whether values returned in registers should be at the most | |
515 | significant end of a register. We want aggregates returned by | |
516 | value to match the way aggregates are passed to functions. */ | |
517 | ||
518 | bool | |
519 | rs6000_return_in_msb (const_tree valtype) | |
520 | { | |
521 | return (DEFAULT_ABI == ABI_ELFv2 | |
522 | && BYTES_BIG_ENDIAN | |
523 | && AGGREGATE_TYPE_P (valtype) | |
524 | && (rs6000_function_arg_padding (TYPE_MODE (valtype), valtype) | |
525 | == PAD_UPWARD)); | |
526 | } | |
527 | ||
528 | #ifdef HAVE_AS_GNU_ATTRIBUTE | |
529 | /* Return TRUE if a call to function FNDECL may be one that | |
530 | potentially affects the function calling ABI of the object file. */ | |
531 | ||
532 | static bool | |
533 | call_ABI_of_interest (tree fndecl) | |
534 | { | |
535 | if (rs6000_gnu_attr && symtab->state == EXPANSION) | |
536 | { | |
537 | struct cgraph_node *c_node; | |
538 | ||
539 | /* Libcalls are always interesting. */ | |
540 | if (fndecl == NULL_TREE) | |
541 | return true; | |
542 | ||
543 | /* Any call to an external function is interesting. */ | |
544 | if (DECL_EXTERNAL (fndecl)) | |
545 | return true; | |
546 | ||
547 | /* Interesting functions that we are emitting in this object file. */ | |
548 | c_node = cgraph_node::get (fndecl); | |
549 | c_node = c_node->ultimate_alias_target (); | |
550 | return !c_node->only_called_directly_p (); | |
551 | } | |
552 | return false; | |
553 | } | |
554 | #endif | |
555 | ||
556 | /* Initialize a variable CUM of type CUMULATIVE_ARGS | |
557 | for a call to a function whose data type is FNTYPE. | |
558 | For a library call, FNTYPE is 0 and RETURN_MODE the return value mode. | |
559 | ||
560 | For incoming args we set the number of arguments in the prototype large | |
561 | so we never return a PARALLEL. */ | |
562 | ||
563 | void | |
564 | init_cumulative_args (CUMULATIVE_ARGS *cum, tree fntype, | |
565 | rtx libname ATTRIBUTE_UNUSED, int incoming, | |
566 | int libcall, int n_named_args, | |
567 | tree fndecl, | |
568 | machine_mode return_mode ATTRIBUTE_UNUSED) | |
569 | { | |
570 | static CUMULATIVE_ARGS zero_cumulative; | |
571 | ||
572 | *cum = zero_cumulative; | |
573 | cum->words = 0; | |
574 | cum->fregno = FP_ARG_MIN_REG; | |
575 | cum->vregno = ALTIVEC_ARG_MIN_REG; | |
576 | cum->prototype = (fntype && prototype_p (fntype)); | |
577 | cum->call_cookie = ((DEFAULT_ABI == ABI_V4 && libcall) | |
578 | ? CALL_LIBCALL : CALL_NORMAL); | |
579 | cum->sysv_gregno = GP_ARG_MIN_REG; | |
580 | cum->stdarg = stdarg_p (fntype); | |
581 | cum->libcall = libcall; | |
582 | ||
583 | cum->nargs_prototype = 0; | |
584 | if (incoming || cum->prototype) | |
585 | cum->nargs_prototype = n_named_args; | |
586 | ||
587 | /* Check for a longcall attribute. */ | |
588 | if ((!fntype && rs6000_default_long_calls) | |
589 | || (fntype | |
590 | && lookup_attribute ("longcall", TYPE_ATTRIBUTES (fntype)) | |
591 | && !lookup_attribute ("shortcall", TYPE_ATTRIBUTES (fntype)))) | |
592 | cum->call_cookie |= CALL_LONG; | |
593 | else if (DEFAULT_ABI != ABI_DARWIN) | |
594 | { | |
595 | bool is_local = (fndecl | |
596 | && !DECL_EXTERNAL (fndecl) | |
597 | && !DECL_WEAK (fndecl) | |
598 | && (*targetm.binds_local_p) (fndecl)); | |
599 | if (is_local) | |
600 | ; | |
601 | else if (flag_plt) | |
602 | { | |
603 | if (fntype | |
604 | && lookup_attribute ("noplt", TYPE_ATTRIBUTES (fntype))) | |
605 | cum->call_cookie |= CALL_LONG; | |
606 | } | |
607 | else | |
608 | { | |
609 | if (!(fntype | |
610 | && lookup_attribute ("plt", TYPE_ATTRIBUTES (fntype)))) | |
611 | cum->call_cookie |= CALL_LONG; | |
612 | } | |
613 | } | |
614 | ||
615 | if (TARGET_DEBUG_ARG) | |
616 | { | |
617 | fprintf (stderr, "\ninit_cumulative_args:"); | |
618 | if (fntype) | |
619 | { | |
620 | tree ret_type = TREE_TYPE (fntype); | |
621 | fprintf (stderr, " ret code = %s,", | |
622 | get_tree_code_name (TREE_CODE (ret_type))); | |
623 | } | |
624 | ||
625 | if (cum->call_cookie & CALL_LONG) | |
626 | fprintf (stderr, " longcall,"); | |
627 | ||
628 | fprintf (stderr, " proto = %d, nargs = %d\n", | |
629 | cum->prototype, cum->nargs_prototype); | |
630 | } | |
631 | ||
632 | #ifdef HAVE_AS_GNU_ATTRIBUTE | |
633 | if (TARGET_ELF && (TARGET_64BIT || DEFAULT_ABI == ABI_V4)) | |
634 | { | |
635 | cum->escapes = call_ABI_of_interest (fndecl); | |
636 | if (cum->escapes) | |
637 | { | |
638 | tree return_type; | |
639 | ||
640 | if (fntype) | |
641 | { | |
642 | return_type = TREE_TYPE (fntype); | |
643 | return_mode = TYPE_MODE (return_type); | |
644 | } | |
645 | else | |
646 | return_type = lang_hooks.types.type_for_mode (return_mode, 0); | |
647 | ||
648 | if (return_type != NULL) | |
649 | { | |
650 | if (TREE_CODE (return_type) == RECORD_TYPE | |
651 | && TYPE_TRANSPARENT_AGGR (return_type)) | |
652 | { | |
653 | return_type = TREE_TYPE (first_field (return_type)); | |
654 | return_mode = TYPE_MODE (return_type); | |
655 | } | |
656 | if (AGGREGATE_TYPE_P (return_type) | |
657 | && ((unsigned HOST_WIDE_INT) int_size_in_bytes (return_type) | |
658 | <= 8)) | |
659 | rs6000_returns_struct = true; | |
660 | } | |
661 | if (SCALAR_FLOAT_MODE_P (return_mode)) | |
662 | { | |
663 | rs6000_passes_float = true; | |
664 | if ((HAVE_LD_PPC_GNU_ATTR_LONG_DOUBLE || TARGET_64BIT) | |
665 | && (FLOAT128_IBM_P (return_mode) | |
666 | || FLOAT128_IEEE_P (return_mode) | |
667 | || (return_type != NULL | |
668 | && (TYPE_MAIN_VARIANT (return_type) | |
669 | == long_double_type_node)))) | |
670 | rs6000_passes_long_double = true; | |
1acf0246 BS |
671 | } |
672 | if (ALTIVEC_OR_VSX_VECTOR_MODE (return_mode)) | |
673 | rs6000_passes_vector = true; | |
674 | } | |
675 | } | |
676 | #endif | |
677 | ||
678 | if (fntype | |
679 | && !TARGET_ALTIVEC | |
680 | && TARGET_ALTIVEC_ABI | |
681 | && ALTIVEC_VECTOR_MODE (TYPE_MODE (TREE_TYPE (fntype)))) | |
682 | { | |
683 | error ("cannot return value in vector register because" | |
684 | " altivec instructions are disabled, use %qs" | |
685 | " to enable them", "-maltivec"); | |
686 | } | |
687 | } | |
688 | \f | |
689 | ||
690 | /* On rs6000, function arguments are promoted, as are function return | |
691 | values. */ | |
692 | ||
693 | machine_mode | |
694 | rs6000_promote_function_mode (const_tree type ATTRIBUTE_UNUSED, | |
695 | machine_mode mode, | |
696 | int *punsignedp ATTRIBUTE_UNUSED, | |
f8f8909a | 697 | const_tree, int for_return ATTRIBUTE_UNUSED) |
1acf0246 | 698 | { |
a3f6bd78 HG |
699 | if (GET_MODE_CLASS (mode) == MODE_INT |
700 | && GET_MODE_SIZE (mode) < (TARGET_32BIT ? 4 : 8)) | |
701 | mode = TARGET_32BIT ? SImode : DImode; | |
1acf0246 BS |
702 | |
703 | return mode; | |
704 | } | |
705 | ||
706 | /* Return true if TYPE must be passed on the stack and not in registers. */ | |
707 | ||
708 | bool | |
0ffef200 | 709 | rs6000_must_pass_in_stack (const function_arg_info &arg) |
1acf0246 BS |
710 | { |
711 | if (DEFAULT_ABI == ABI_AIX || DEFAULT_ABI == ABI_ELFv2 || TARGET_64BIT) | |
0ffef200 | 712 | return must_pass_in_stack_var_size (arg); |
1acf0246 | 713 | else |
0ffef200 | 714 | return must_pass_in_stack_var_size_or_pad (arg); |
1acf0246 BS |
715 | } |
716 | ||
717 | static inline bool | |
718 | is_complex_IBM_long_double (machine_mode mode) | |
719 | { | |
720 | return mode == ICmode || (mode == TCmode && FLOAT128_IBM_P (TCmode)); | |
721 | } | |
722 | ||
723 | /* Whether ABI_V4 passes MODE args to a function in floating point | |
724 | registers. */ | |
725 | ||
726 | static bool | |
727 | abi_v4_pass_in_fpr (machine_mode mode, bool named) | |
728 | { | |
729 | if (!TARGET_HARD_FLOAT) | |
730 | return false; | |
731 | if (mode == DFmode) | |
732 | return true; | |
733 | if (mode == SFmode && named) | |
734 | return true; | |
735 | /* ABI_V4 passes complex IBM long double in 8 gprs. | |
736 | Stupid, but we can't change the ABI now. */ | |
737 | if (is_complex_IBM_long_double (mode)) | |
738 | return false; | |
739 | if (FLOAT128_2REG_P (mode)) | |
740 | return true; | |
741 | if (DECIMAL_FLOAT_MODE_P (mode)) | |
742 | return true; | |
743 | return false; | |
744 | } | |
745 | ||
746 | /* Implement TARGET_FUNCTION_ARG_PADDING. | |
747 | ||
748 | For the AIX ABI structs are always stored left shifted in their | |
749 | argument slot. */ | |
750 | ||
751 | pad_direction | |
752 | rs6000_function_arg_padding (machine_mode mode, const_tree type) | |
753 | { | |
754 | #ifndef AGGREGATE_PADDING_FIXED | |
755 | #define AGGREGATE_PADDING_FIXED 0 | |
756 | #endif | |
757 | #ifndef AGGREGATES_PAD_UPWARD_ALWAYS | |
758 | #define AGGREGATES_PAD_UPWARD_ALWAYS 0 | |
759 | #endif | |
760 | ||
761 | if (!AGGREGATE_PADDING_FIXED) | |
762 | { | |
763 | /* GCC used to pass structures of the same size as integer types as | |
764 | if they were in fact integers, ignoring TARGET_FUNCTION_ARG_PADDING. | |
765 | i.e. Structures of size 1 or 2 (or 4 when TARGET_64BIT) were | |
766 | passed padded downward, except that -mstrict-align further | |
767 | muddied the water in that multi-component structures of 2 and 4 | |
768 | bytes in size were passed padded upward. | |
769 | ||
770 | The following arranges for best compatibility with previous | |
771 | versions of gcc, but removes the -mstrict-align dependency. */ | |
772 | if (BYTES_BIG_ENDIAN) | |
773 | { | |
774 | HOST_WIDE_INT size = 0; | |
775 | ||
776 | if (mode == BLKmode) | |
777 | { | |
778 | if (type && TREE_CODE (TYPE_SIZE (type)) == INTEGER_CST) | |
779 | size = int_size_in_bytes (type); | |
780 | } | |
781 | else | |
782 | size = GET_MODE_SIZE (mode); | |
783 | ||
784 | if (size == 1 || size == 2 || size == 4) | |
785 | return PAD_DOWNWARD; | |
786 | } | |
787 | return PAD_UPWARD; | |
788 | } | |
789 | ||
790 | if (AGGREGATES_PAD_UPWARD_ALWAYS) | |
791 | { | |
792 | if (type != 0 && AGGREGATE_TYPE_P (type)) | |
793 | return PAD_UPWARD; | |
794 | } | |
795 | ||
796 | /* Fall back to the default. */ | |
797 | return default_function_arg_padding (mode, type); | |
798 | } | |
799 | ||
800 | /* If defined, a C expression that gives the alignment boundary, in bits, | |
801 | of an argument with the specified mode and type. If it is not defined, | |
802 | PARM_BOUNDARY is used for all arguments. | |
803 | ||
804 | V.4 wants long longs and doubles to be double word aligned. Just | |
805 | testing the mode size is a boneheaded way to do this as it means | |
806 | that other types such as complex int are also double word aligned. | |
807 | However, we're stuck with this because changing the ABI might break | |
808 | existing library interfaces. | |
809 | ||
810 | Quadword align Altivec/VSX vectors. | |
811 | Quadword align large synthetic vector types. */ | |
812 | ||
813 | unsigned int | |
814 | rs6000_function_arg_boundary (machine_mode mode, const_tree type) | |
815 | { | |
816 | machine_mode elt_mode; | |
817 | int n_elts; | |
818 | ||
819 | rs6000_discover_homogeneous_aggregate (mode, type, &elt_mode, &n_elts); | |
820 | ||
821 | if (DEFAULT_ABI == ABI_V4 | |
822 | && (GET_MODE_SIZE (mode) == 8 | |
823 | || (TARGET_HARD_FLOAT | |
824 | && !is_complex_IBM_long_double (mode) | |
825 | && FLOAT128_2REG_P (mode)))) | |
826 | return 64; | |
827 | else if (FLOAT128_VECTOR_P (mode)) | |
828 | return 128; | |
9907413a | 829 | else if (type && VECTOR_TYPE_P (type) |
1acf0246 BS |
830 | && int_size_in_bytes (type) >= 8 |
831 | && int_size_in_bytes (type) < 16) | |
832 | return 64; | |
833 | else if (ALTIVEC_OR_VSX_VECTOR_MODE (elt_mode) | |
9907413a | 834 | || (type && VECTOR_TYPE_P (type) |
1acf0246 BS |
835 | && int_size_in_bytes (type) >= 16)) |
836 | return 128; | |
837 | ||
838 | /* Aggregate types that need > 8 byte alignment are quadword-aligned | |
839 | in the parameter area in the ELFv2 ABI, and in the AIX ABI unless | |
840 | -mcompat-align-parm is used. */ | |
841 | if (((DEFAULT_ABI == ABI_AIX && !rs6000_compat_align_parm) | |
842 | || DEFAULT_ABI == ABI_ELFv2) | |
843 | && type && TYPE_ALIGN (type) > 64) | |
844 | { | |
845 | /* "Aggregate" means any AGGREGATE_TYPE except for single-element | |
846 | or homogeneous float/vector aggregates here. We already handled | |
847 | vector aggregates above, but still need to check for float here. */ | |
79cf0004 BS |
848 | if (AGGREGATE_TYPE_P (type) |
849 | && !SCALAR_FLOAT_MODE_P (elt_mode)) | |
1acf0246 BS |
850 | return 128; |
851 | } | |
852 | ||
853 | /* Similar for the Darwin64 ABI. Note that for historical reasons we | |
854 | implement the "aggregate type" check as a BLKmode check here; this | |
855 | means certain aggregate types are in fact not aligned. */ | |
856 | if (TARGET_MACHO && rs6000_darwin64_abi | |
857 | && mode == BLKmode | |
858 | && type && TYPE_ALIGN (type) > 64) | |
859 | return 128; | |
860 | ||
861 | return PARM_BOUNDARY; | |
862 | } | |
863 | ||
864 | /* The offset in words to the start of the parameter save area. */ | |
865 | ||
866 | static unsigned int | |
867 | rs6000_parm_offset (void) | |
868 | { | |
869 | return (DEFAULT_ABI == ABI_V4 ? 2 | |
870 | : DEFAULT_ABI == ABI_ELFv2 ? 4 | |
871 | : 6); | |
872 | } | |
873 | ||
874 | /* For a function parm of MODE and TYPE, return the starting word in | |
875 | the parameter area. NWORDS of the parameter area are already used. */ | |
876 | ||
877 | static unsigned int | |
878 | rs6000_parm_start (machine_mode mode, const_tree type, | |
879 | unsigned int nwords) | |
880 | { | |
881 | unsigned int align; | |
882 | ||
883 | align = rs6000_function_arg_boundary (mode, type) / PARM_BOUNDARY - 1; | |
884 | return nwords + (-(rs6000_parm_offset () + nwords) & align); | |
885 | } | |
886 | ||
887 | /* Compute the size (in words) of a function argument. */ | |
888 | ||
889 | static unsigned long | |
890 | rs6000_arg_size (machine_mode mode, const_tree type) | |
891 | { | |
892 | unsigned long size; | |
893 | ||
894 | if (mode != BLKmode) | |
895 | size = GET_MODE_SIZE (mode); | |
896 | else | |
897 | size = int_size_in_bytes (type); | |
898 | ||
899 | if (TARGET_32BIT) | |
900 | return (size + 3) >> 2; | |
901 | else | |
902 | return (size + 7) >> 3; | |
903 | } | |
904 | \f | |
905 | /* Use this to flush pending int fields. */ | |
906 | ||
907 | static void | |
908 | rs6000_darwin64_record_arg_advance_flush (CUMULATIVE_ARGS *cum, | |
909 | HOST_WIDE_INT bitpos, int final) | |
910 | { | |
911 | unsigned int startbit, endbit; | |
912 | int intregs, intoffset; | |
913 | ||
914 | /* Handle the situations where a float is taking up the first half | |
915 | of the GPR, and the other half is empty (typically due to | |
916 | alignment restrictions). We can detect this by a 8-byte-aligned | |
917 | int field, or by seeing that this is the final flush for this | |
918 | argument. Count the word and continue on. */ | |
919 | if (cum->floats_in_gpr == 1 | |
920 | && (cum->intoffset % 64 == 0 | |
921 | || (cum->intoffset == -1 && final))) | |
922 | { | |
923 | cum->words++; | |
924 | cum->floats_in_gpr = 0; | |
925 | } | |
926 | ||
927 | if (cum->intoffset == -1) | |
928 | return; | |
929 | ||
930 | intoffset = cum->intoffset; | |
931 | cum->intoffset = -1; | |
932 | cum->floats_in_gpr = 0; | |
933 | ||
934 | if (intoffset % BITS_PER_WORD != 0) | |
935 | { | |
936 | unsigned int bits = BITS_PER_WORD - intoffset % BITS_PER_WORD; | |
937 | if (!int_mode_for_size (bits, 0).exists ()) | |
938 | { | |
939 | /* We couldn't find an appropriate mode, which happens, | |
940 | e.g., in packed structs when there are 3 bytes to load. | |
941 | Back intoffset back to the beginning of the word in this | |
942 | case. */ | |
943 | intoffset = ROUND_DOWN (intoffset, BITS_PER_WORD); | |
944 | } | |
945 | } | |
946 | ||
947 | startbit = ROUND_DOWN (intoffset, BITS_PER_WORD); | |
948 | endbit = ROUND_UP (bitpos, BITS_PER_WORD); | |
949 | intregs = (endbit - startbit) / BITS_PER_WORD; | |
950 | cum->words += intregs; | |
951 | /* words should be unsigned. */ | |
952 | if ((unsigned)cum->words < (endbit/BITS_PER_WORD)) | |
953 | { | |
954 | int pad = (endbit/BITS_PER_WORD) - cum->words; | |
955 | cum->words += pad; | |
956 | } | |
957 | } | |
958 | ||
959 | /* The darwin64 ABI calls for us to recurse down through structs, | |
960 | looking for elements passed in registers. Unfortunately, we have | |
961 | to track int register count here also because of misalignments | |
962 | in powerpc alignment mode. */ | |
963 | ||
964 | static void | |
965 | rs6000_darwin64_record_arg_advance_recurse (CUMULATIVE_ARGS *cum, | |
966 | const_tree type, | |
967 | HOST_WIDE_INT startbitpos) | |
968 | { | |
969 | tree f; | |
970 | ||
971 | for (f = TYPE_FIELDS (type); f ; f = DECL_CHAIN (f)) | |
972 | if (TREE_CODE (f) == FIELD_DECL) | |
973 | { | |
974 | HOST_WIDE_INT bitpos = startbitpos; | |
975 | tree ftype = TREE_TYPE (f); | |
976 | machine_mode mode; | |
977 | if (ftype == error_mark_node) | |
978 | continue; | |
979 | mode = TYPE_MODE (ftype); | |
980 | ||
981 | if (DECL_SIZE (f) != 0 | |
982 | && tree_fits_uhwi_p (bit_position (f))) | |
983 | bitpos += int_bit_position (f); | |
984 | ||
985 | /* ??? FIXME: else assume zero offset. */ | |
986 | ||
987 | if (TREE_CODE (ftype) == RECORD_TYPE) | |
988 | rs6000_darwin64_record_arg_advance_recurse (cum, ftype, bitpos); | |
989 | else if (USE_FP_FOR_ARG_P (cum, mode)) | |
990 | { | |
991 | unsigned n_fpregs = (GET_MODE_SIZE (mode) + 7) >> 3; | |
992 | rs6000_darwin64_record_arg_advance_flush (cum, bitpos, 0); | |
993 | cum->fregno += n_fpregs; | |
994 | /* Single-precision floats present a special problem for | |
995 | us, because they are smaller than an 8-byte GPR, and so | |
996 | the structure-packing rules combined with the standard | |
997 | varargs behavior mean that we want to pack float/float | |
998 | and float/int combinations into a single register's | |
999 | space. This is complicated by the arg advance flushing, | |
1000 | which works on arbitrarily large groups of int-type | |
1001 | fields. */ | |
1002 | if (mode == SFmode) | |
1003 | { | |
1004 | if (cum->floats_in_gpr == 1) | |
1005 | { | |
1006 | /* Two floats in a word; count the word and reset | |
1007 | the float count. */ | |
1008 | cum->words++; | |
1009 | cum->floats_in_gpr = 0; | |
1010 | } | |
1011 | else if (bitpos % 64 == 0) | |
1012 | { | |
1013 | /* A float at the beginning of an 8-byte word; | |
1014 | count it and put off adjusting cum->words until | |
1015 | we see if a arg advance flush is going to do it | |
1016 | for us. */ | |
1017 | cum->floats_in_gpr++; | |
1018 | } | |
1019 | else | |
1020 | { | |
1021 | /* The float is at the end of a word, preceded | |
1022 | by integer fields, so the arg advance flush | |
1023 | just above has already set cum->words and | |
1024 | everything is taken care of. */ | |
1025 | } | |
1026 | } | |
1027 | else | |
1028 | cum->words += n_fpregs; | |
1029 | } | |
1030 | else if (USE_ALTIVEC_FOR_ARG_P (cum, mode, 1)) | |
1031 | { | |
1032 | rs6000_darwin64_record_arg_advance_flush (cum, bitpos, 0); | |
1033 | cum->vregno++; | |
1034 | cum->words += 2; | |
1035 | } | |
1036 | else if (cum->intoffset == -1) | |
1037 | cum->intoffset = bitpos; | |
1038 | } | |
1039 | } | |
1040 | ||
1041 | /* Check for an item that needs to be considered specially under the darwin 64 | |
1042 | bit ABI. These are record types where the mode is BLK or the structure is | |
1043 | 8 bytes in size. */ | |
1044 | int | |
1045 | rs6000_darwin64_struct_check_p (machine_mode mode, const_tree type) | |
1046 | { | |
1047 | return rs6000_darwin64_abi | |
1048 | && ((mode == BLKmode | |
1049 | && TREE_CODE (type) == RECORD_TYPE | |
1050 | && int_size_in_bytes (type) > 0) | |
1051 | || (type && TREE_CODE (type) == RECORD_TYPE | |
1052 | && int_size_in_bytes (type) == 8)) ? 1 : 0; | |
1053 | } | |
1054 | ||
1055 | /* Update the data in CUM to advance over an argument | |
1056 | of mode MODE and data type TYPE. | |
1057 | (TYPE is null for libcalls where that information may not be available.) | |
1058 | ||
1059 | Note that for args passed by reference, function_arg will be called | |
1060 | with MODE and TYPE set to that of the pointer to the arg, not the arg | |
1061 | itself. */ | |
1062 | ||
1063 | static void | |
1064 | rs6000_function_arg_advance_1 (CUMULATIVE_ARGS *cum, machine_mode mode, | |
1065 | const_tree type, bool named, int depth) | |
1066 | { | |
1067 | machine_mode elt_mode; | |
1068 | int n_elts; | |
1069 | ||
1070 | rs6000_discover_homogeneous_aggregate (mode, type, &elt_mode, &n_elts); | |
1071 | ||
1072 | /* Only tick off an argument if we're not recursing. */ | |
1073 | if (depth == 0) | |
1074 | cum->nargs_prototype--; | |
1075 | ||
1076 | #ifdef HAVE_AS_GNU_ATTRIBUTE | |
1077 | if (TARGET_ELF && (TARGET_64BIT || DEFAULT_ABI == ABI_V4) | |
1078 | && cum->escapes) | |
1079 | { | |
1080 | if (SCALAR_FLOAT_MODE_P (mode)) | |
1081 | { | |
1082 | rs6000_passes_float = true; | |
1083 | if ((HAVE_LD_PPC_GNU_ATTR_LONG_DOUBLE || TARGET_64BIT) | |
1084 | && (FLOAT128_IBM_P (mode) | |
1085 | || FLOAT128_IEEE_P (mode) | |
1086 | || (type != NULL | |
1087 | && TYPE_MAIN_VARIANT (type) == long_double_type_node))) | |
1088 | rs6000_passes_long_double = true; | |
1acf0246 BS |
1089 | } |
1090 | if (named && ALTIVEC_OR_VSX_VECTOR_MODE (mode)) | |
1091 | rs6000_passes_vector = true; | |
1092 | } | |
1093 | #endif | |
1094 | ||
1095 | if (TARGET_ALTIVEC_ABI | |
1096 | && (ALTIVEC_OR_VSX_VECTOR_MODE (elt_mode) | |
9907413a | 1097 | || (type && VECTOR_TYPE_P (type) |
1acf0246 BS |
1098 | && int_size_in_bytes (type) == 16))) |
1099 | { | |
1100 | bool stack = false; | |
1101 | ||
1102 | if (USE_ALTIVEC_FOR_ARG_P (cum, elt_mode, named)) | |
1103 | { | |
1104 | cum->vregno += n_elts; | |
1105 | ||
2ee68bee PH |
1106 | /* If we are not splitting Complex IEEE128 args then account for the |
1107 | fact that they are passed in 2 VSX regs. */ | |
1108 | if (!targetm.calls.split_complex_arg && type | |
1109 | && TREE_CODE (type) == COMPLEX_TYPE && elt_mode == KCmode) | |
1110 | cum->vregno++; | |
1111 | ||
1acf0246 BS |
1112 | if (!TARGET_ALTIVEC) |
1113 | error ("cannot pass argument in vector register because" | |
1114 | " altivec instructions are disabled, use %qs" | |
1115 | " to enable them", "-maltivec"); | |
1116 | ||
1117 | /* PowerPC64 Linux and AIX allocate GPRs for a vector argument | |
1118 | even if it is going to be passed in a vector register. | |
1119 | Darwin does the same for variable-argument functions. */ | |
1120 | if (((DEFAULT_ABI == ABI_AIX || DEFAULT_ABI == ABI_ELFv2) | |
1121 | && TARGET_64BIT) | |
1122 | || (cum->stdarg && DEFAULT_ABI != ABI_V4)) | |
1123 | stack = true; | |
1124 | } | |
1125 | else | |
1126 | stack = true; | |
1127 | ||
1128 | if (stack) | |
1129 | { | |
1130 | int align; | |
1131 | ||
1132 | /* Vector parameters must be 16-byte aligned. In 32-bit | |
1133 | mode this means we need to take into account the offset | |
1134 | to the parameter save area. In 64-bit mode, they just | |
1135 | have to start on an even word, since the parameter save | |
1136 | area is 16-byte aligned. */ | |
1137 | if (TARGET_32BIT) | |
1138 | align = -(rs6000_parm_offset () + cum->words) & 3; | |
1139 | else | |
1140 | align = cum->words & 1; | |
1141 | cum->words += align + rs6000_arg_size (mode, type); | |
1142 | ||
1143 | if (TARGET_DEBUG_ARG) | |
1144 | { | |
1145 | fprintf (stderr, "function_adv: words = %2d, align=%d, ", | |
1146 | cum->words, align); | |
1147 | fprintf (stderr, "nargs = %4d, proto = %d, mode = %4s\n", | |
1148 | cum->nargs_prototype, cum->prototype, | |
1149 | GET_MODE_NAME (mode)); | |
1150 | } | |
1151 | } | |
1152 | } | |
1153 | else if (TARGET_MACHO && rs6000_darwin64_struct_check_p (mode, type)) | |
1154 | { | |
1155 | int size = int_size_in_bytes (type); | |
1156 | /* Variable sized types have size == -1 and are | |
1157 | treated as if consisting entirely of ints. | |
1158 | Pad to 16 byte boundary if needed. */ | |
1159 | if (TYPE_ALIGN (type) >= 2 * BITS_PER_WORD | |
1160 | && (cum->words % 2) != 0) | |
1161 | cum->words++; | |
1162 | /* For varargs, we can just go up by the size of the struct. */ | |
1163 | if (!named) | |
1164 | cum->words += (size + 7) / 8; | |
1165 | else | |
1166 | { | |
1167 | /* It is tempting to say int register count just goes up by | |
1168 | sizeof(type)/8, but this is wrong in a case such as | |
1169 | { int; double; int; } [powerpc alignment]. We have to | |
1170 | grovel through the fields for these too. */ | |
1171 | cum->intoffset = 0; | |
1172 | cum->floats_in_gpr = 0; | |
1173 | rs6000_darwin64_record_arg_advance_recurse (cum, type, 0); | |
1174 | rs6000_darwin64_record_arg_advance_flush (cum, | |
1175 | size * BITS_PER_UNIT, 1); | |
1176 | } | |
1177 | if (TARGET_DEBUG_ARG) | |
1178 | { | |
1179 | fprintf (stderr, "function_adv: words = %2d, align=%d, size=%d", | |
1180 | cum->words, TYPE_ALIGN (type), size); | |
1181 | fprintf (stderr, | |
1182 | "nargs = %4d, proto = %d, mode = %4s (darwin64 abi)\n", | |
1183 | cum->nargs_prototype, cum->prototype, | |
1184 | GET_MODE_NAME (mode)); | |
1185 | } | |
1186 | } | |
1187 | else if (DEFAULT_ABI == ABI_V4) | |
1188 | { | |
1189 | if (abi_v4_pass_in_fpr (mode, named)) | |
1190 | { | |
1191 | /* _Decimal128 must use an even/odd register pair. This assumes | |
1192 | that the register number is odd when fregno is odd. */ | |
1193 | if (mode == TDmode && (cum->fregno % 2) == 1) | |
1194 | cum->fregno++; | |
1195 | ||
1196 | if (cum->fregno + (FLOAT128_2REG_P (mode) ? 1 : 0) | |
1197 | <= FP_ARG_V4_MAX_REG) | |
1198 | cum->fregno += (GET_MODE_SIZE (mode) + 7) >> 3; | |
1199 | else | |
1200 | { | |
1201 | cum->fregno = FP_ARG_V4_MAX_REG + 1; | |
1202 | if (mode == DFmode || FLOAT128_IBM_P (mode) | |
1203 | || mode == DDmode || mode == TDmode) | |
1204 | cum->words += cum->words & 1; | |
1205 | cum->words += rs6000_arg_size (mode, type); | |
1206 | } | |
1207 | } | |
1208 | else | |
1209 | { | |
1210 | int n_words = rs6000_arg_size (mode, type); | |
1211 | int gregno = cum->sysv_gregno; | |
1212 | ||
1213 | /* Long long is put in (r3,r4), (r5,r6), (r7,r8) or (r9,r10). | |
1214 | As does any other 2 word item such as complex int due to a | |
1215 | historical mistake. */ | |
1216 | if (n_words == 2) | |
1217 | gregno += (1 - gregno) & 1; | |
1218 | ||
1219 | /* Multi-reg args are not split between registers and stack. */ | |
1220 | if (gregno + n_words - 1 > GP_ARG_MAX_REG) | |
1221 | { | |
1222 | /* Long long is aligned on the stack. So are other 2 word | |
1223 | items such as complex int due to a historical mistake. */ | |
1224 | if (n_words == 2) | |
1225 | cum->words += cum->words & 1; | |
1226 | cum->words += n_words; | |
1227 | } | |
1228 | ||
1229 | /* Note: continuing to accumulate gregno past when we've started | |
1230 | spilling to the stack indicates the fact that we've started | |
1231 | spilling to the stack to expand_builtin_saveregs. */ | |
1232 | cum->sysv_gregno = gregno + n_words; | |
1233 | } | |
1234 | ||
1235 | if (TARGET_DEBUG_ARG) | |
1236 | { | |
1237 | fprintf (stderr, "function_adv: words = %2d, fregno = %2d, ", | |
1238 | cum->words, cum->fregno); | |
1239 | fprintf (stderr, "gregno = %2d, nargs = %4d, proto = %d, ", | |
1240 | cum->sysv_gregno, cum->nargs_prototype, cum->prototype); | |
1241 | fprintf (stderr, "mode = %4s, named = %d\n", | |
1242 | GET_MODE_NAME (mode), named); | |
1243 | } | |
1244 | } | |
1245 | else | |
1246 | { | |
1247 | int n_words = rs6000_arg_size (mode, type); | |
1248 | int start_words = cum->words; | |
1249 | int align_words = rs6000_parm_start (mode, type, start_words); | |
1250 | ||
1251 | cum->words = align_words + n_words; | |
1252 | ||
1253 | if (SCALAR_FLOAT_MODE_P (elt_mode) && TARGET_HARD_FLOAT) | |
1254 | { | |
1255 | /* _Decimal128 must be passed in an even/odd float register pair. | |
1256 | This assumes that the register number is odd when fregno is | |
1257 | odd. */ | |
1258 | if (elt_mode == TDmode && (cum->fregno % 2) == 1) | |
1259 | cum->fregno++; | |
1260 | cum->fregno += n_elts * ((GET_MODE_SIZE (elt_mode) + 7) >> 3); | |
1261 | } | |
1262 | ||
1263 | if (TARGET_DEBUG_ARG) | |
1264 | { | |
1265 | fprintf (stderr, "function_adv: words = %2d, fregno = %2d, ", | |
1266 | cum->words, cum->fregno); | |
1267 | fprintf (stderr, "nargs = %4d, proto = %d, mode = %4s, ", | |
1268 | cum->nargs_prototype, cum->prototype, GET_MODE_NAME (mode)); | |
1269 | fprintf (stderr, "named = %d, align = %d, depth = %d\n", | |
1270 | named, align_words - start_words, depth); | |
1271 | } | |
1272 | } | |
1273 | } | |
1274 | ||
1275 | void | |
6930c98c RS |
1276 | rs6000_function_arg_advance (cumulative_args_t cum, |
1277 | const function_arg_info &arg) | |
1acf0246 | 1278 | { |
6930c98c RS |
1279 | rs6000_function_arg_advance_1 (get_cumulative_args (cum), |
1280 | arg.mode, arg.type, arg.named, 0); | |
1acf0246 BS |
1281 | } |
1282 | ||
1283 | /* A subroutine of rs6000_darwin64_record_arg. Assign the bits of the | |
1284 | structure between cum->intoffset and bitpos to integer registers. */ | |
1285 | ||
1286 | static void | |
1287 | rs6000_darwin64_record_arg_flush (CUMULATIVE_ARGS *cum, | |
1288 | HOST_WIDE_INT bitpos, rtx rvec[], int *k) | |
1289 | { | |
1290 | machine_mode mode; | |
1291 | unsigned int regno; | |
1292 | unsigned int startbit, endbit; | |
1293 | int this_regno, intregs, intoffset; | |
1294 | rtx reg; | |
1295 | ||
1296 | if (cum->intoffset == -1) | |
1297 | return; | |
1298 | ||
1299 | intoffset = cum->intoffset; | |
1300 | cum->intoffset = -1; | |
1301 | ||
1302 | /* If this is the trailing part of a word, try to only load that | |
1303 | much into the register. Otherwise load the whole register. Note | |
1304 | that in the latter case we may pick up unwanted bits. It's not a | |
1305 | problem at the moment but may wish to revisit. */ | |
1306 | ||
1307 | if (intoffset % BITS_PER_WORD != 0) | |
1308 | { | |
1309 | unsigned int bits = BITS_PER_WORD - intoffset % BITS_PER_WORD; | |
1310 | if (!int_mode_for_size (bits, 0).exists (&mode)) | |
1311 | { | |
1312 | /* We couldn't find an appropriate mode, which happens, | |
1313 | e.g., in packed structs when there are 3 bytes to load. | |
1314 | Back intoffset back to the beginning of the word in this | |
1315 | case. */ | |
1316 | intoffset = ROUND_DOWN (intoffset, BITS_PER_WORD); | |
1317 | mode = word_mode; | |
1318 | } | |
1319 | } | |
1320 | else | |
1321 | mode = word_mode; | |
1322 | ||
1323 | startbit = ROUND_DOWN (intoffset, BITS_PER_WORD); | |
1324 | endbit = ROUND_UP (bitpos, BITS_PER_WORD); | |
1325 | intregs = (endbit - startbit) / BITS_PER_WORD; | |
1326 | this_regno = cum->words + intoffset / BITS_PER_WORD; | |
1327 | ||
1328 | if (intregs > 0 && intregs > GP_ARG_NUM_REG - this_regno) | |
1329 | cum->use_stack = 1; | |
1330 | ||
1331 | intregs = MIN (intregs, GP_ARG_NUM_REG - this_regno); | |
1332 | if (intregs <= 0) | |
1333 | return; | |
1334 | ||
1335 | intoffset /= BITS_PER_UNIT; | |
1336 | do | |
1337 | { | |
1338 | regno = GP_ARG_MIN_REG + this_regno; | |
1339 | reg = gen_rtx_REG (mode, regno); | |
1340 | rvec[(*k)++] = | |
1341 | gen_rtx_EXPR_LIST (VOIDmode, reg, GEN_INT (intoffset)); | |
1342 | ||
1343 | this_regno += 1; | |
1344 | intoffset = (intoffset | (UNITS_PER_WORD-1)) + 1; | |
1345 | mode = word_mode; | |
1346 | intregs -= 1; | |
1347 | } | |
1348 | while (intregs > 0); | |
1349 | } | |
1350 | ||
1351 | /* Recursive workhorse for the following. */ | |
1352 | ||
1353 | static void | |
1354 | rs6000_darwin64_record_arg_recurse (CUMULATIVE_ARGS *cum, const_tree type, | |
1355 | HOST_WIDE_INT startbitpos, rtx rvec[], | |
1356 | int *k) | |
1357 | { | |
1358 | tree f; | |
1359 | ||
1360 | for (f = TYPE_FIELDS (type); f ; f = DECL_CHAIN (f)) | |
1361 | if (TREE_CODE (f) == FIELD_DECL) | |
1362 | { | |
1363 | HOST_WIDE_INT bitpos = startbitpos; | |
1364 | tree ftype = TREE_TYPE (f); | |
1365 | machine_mode mode; | |
1366 | if (ftype == error_mark_node) | |
1367 | continue; | |
1368 | mode = TYPE_MODE (ftype); | |
1369 | ||
1370 | if (DECL_SIZE (f) != 0 | |
1371 | && tree_fits_uhwi_p (bit_position (f))) | |
1372 | bitpos += int_bit_position (f); | |
1373 | ||
1374 | /* ??? FIXME: else assume zero offset. */ | |
1375 | ||
1376 | if (TREE_CODE (ftype) == RECORD_TYPE) | |
1377 | rs6000_darwin64_record_arg_recurse (cum, ftype, bitpos, rvec, k); | |
1378 | else if (cum->named && USE_FP_FOR_ARG_P (cum, mode)) | |
1379 | { | |
1380 | unsigned n_fpreg = (GET_MODE_SIZE (mode) + 7) >> 3; | |
1381 | #if 0 | |
1382 | switch (mode) | |
1383 | { | |
1384 | case E_SCmode: mode = SFmode; break; | |
1385 | case E_DCmode: mode = DFmode; break; | |
1386 | case E_TCmode: mode = TFmode; break; | |
1387 | default: break; | |
1388 | } | |
1389 | #endif | |
1390 | rs6000_darwin64_record_arg_flush (cum, bitpos, rvec, k); | |
1391 | if (cum->fregno + n_fpreg > FP_ARG_MAX_REG + 1) | |
1392 | { | |
1393 | gcc_assert (cum->fregno == FP_ARG_MAX_REG | |
1394 | && (mode == TFmode || mode == TDmode)); | |
1395 | /* Long double or _Decimal128 split over regs and memory. */ | |
1396 | mode = DECIMAL_FLOAT_MODE_P (mode) ? DDmode : DFmode; | |
1397 | cum->use_stack=1; | |
1398 | } | |
1399 | rvec[(*k)++] | |
1400 | = gen_rtx_EXPR_LIST (VOIDmode, | |
1401 | gen_rtx_REG (mode, cum->fregno++), | |
1402 | GEN_INT (bitpos / BITS_PER_UNIT)); | |
1403 | if (FLOAT128_2REG_P (mode)) | |
1404 | cum->fregno++; | |
1405 | } | |
1406 | else if (cum->named && USE_ALTIVEC_FOR_ARG_P (cum, mode, 1)) | |
1407 | { | |
1408 | rs6000_darwin64_record_arg_flush (cum, bitpos, rvec, k); | |
1409 | rvec[(*k)++] | |
1410 | = gen_rtx_EXPR_LIST (VOIDmode, | |
1411 | gen_rtx_REG (mode, cum->vregno++), | |
1412 | GEN_INT (bitpos / BITS_PER_UNIT)); | |
1413 | } | |
1414 | else if (cum->intoffset == -1) | |
1415 | cum->intoffset = bitpos; | |
1416 | } | |
1417 | } | |
1418 | ||
1419 | /* For the darwin64 ABI, we want to construct a PARALLEL consisting of | |
1420 | the register(s) to be used for each field and subfield of a struct | |
1421 | being passed by value, along with the offset of where the | |
1422 | register's value may be found in the block. FP fields go in FP | |
1423 | register, vector fields go in vector registers, and everything | |
1424 | else goes in int registers, packed as in memory. | |
1425 | ||
1426 | This code is also used for function return values. RETVAL indicates | |
1427 | whether this is the case. | |
1428 | ||
1429 | Much of this is taken from the SPARC V9 port, which has a similar | |
1430 | calling convention. */ | |
1431 | ||
1432 | rtx | |
1433 | rs6000_darwin64_record_arg (CUMULATIVE_ARGS *orig_cum, const_tree type, | |
1434 | bool named, bool retval) | |
1435 | { | |
1436 | rtx rvec[FIRST_PSEUDO_REGISTER]; | |
1437 | int k = 1, kbase = 1; | |
1438 | HOST_WIDE_INT typesize = int_size_in_bytes (type); | |
1439 | /* This is a copy; modifications are not visible to our caller. */ | |
1440 | CUMULATIVE_ARGS copy_cum = *orig_cum; | |
1441 | CUMULATIVE_ARGS *cum = ©_cum; | |
1442 | ||
1443 | /* Pad to 16 byte boundary if needed. */ | |
1444 | if (!retval && TYPE_ALIGN (type) >= 2 * BITS_PER_WORD | |
1445 | && (cum->words % 2) != 0) | |
1446 | cum->words++; | |
1447 | ||
1448 | cum->intoffset = 0; | |
1449 | cum->use_stack = 0; | |
1450 | cum->named = named; | |
1451 | ||
1452 | /* Put entries into rvec[] for individual FP and vector fields, and | |
1453 | for the chunks of memory that go in int regs. Note we start at | |
1454 | element 1; 0 is reserved for an indication of using memory, and | |
1455 | may or may not be filled in below. */ | |
1456 | rs6000_darwin64_record_arg_recurse (cum, type, /* startbit pos= */ 0, rvec, &k); | |
1457 | rs6000_darwin64_record_arg_flush (cum, typesize * BITS_PER_UNIT, rvec, &k); | |
1458 | ||
1459 | /* If any part of the struct went on the stack put all of it there. | |
1460 | This hack is because the generic code for | |
1461 | FUNCTION_ARG_PARTIAL_NREGS cannot handle cases where the register | |
1462 | parts of the struct are not at the beginning. */ | |
1463 | if (cum->use_stack) | |
1464 | { | |
1465 | if (retval) | |
1466 | return NULL_RTX; /* doesn't go in registers at all */ | |
1467 | kbase = 0; | |
1468 | rvec[0] = gen_rtx_EXPR_LIST (VOIDmode, NULL_RTX, const0_rtx); | |
1469 | } | |
1470 | if (k > 1 || cum->use_stack) | |
1471 | return gen_rtx_PARALLEL (BLKmode, gen_rtvec_v (k - kbase, &rvec[kbase])); | |
1472 | else | |
1473 | return NULL_RTX; | |
1474 | } | |
1475 | ||
1476 | /* Determine where to place an argument in 64-bit mode with 32-bit ABI. */ | |
1477 | ||
1478 | static rtx | |
1479 | rs6000_mixed_function_arg (machine_mode mode, const_tree type, | |
1480 | int align_words) | |
1481 | { | |
1482 | int n_units; | |
1483 | int i, k; | |
1484 | rtx rvec[GP_ARG_NUM_REG + 1]; | |
1485 | ||
1486 | if (align_words >= GP_ARG_NUM_REG) | |
1487 | return NULL_RTX; | |
1488 | ||
1489 | n_units = rs6000_arg_size (mode, type); | |
1490 | ||
1491 | /* Optimize the simple case where the arg fits in one gpr, except in | |
1492 | the case of BLKmode due to assign_parms assuming that registers are | |
1493 | BITS_PER_WORD wide. */ | |
1494 | if (n_units == 0 | |
1495 | || (n_units == 1 && mode != BLKmode)) | |
1496 | return gen_rtx_REG (mode, GP_ARG_MIN_REG + align_words); | |
1497 | ||
1498 | k = 0; | |
1499 | if (align_words + n_units > GP_ARG_NUM_REG) | |
1500 | /* Not all of the arg fits in gprs. Say that it goes in memory too, | |
1501 | using a magic NULL_RTX component. | |
1502 | This is not strictly correct. Only some of the arg belongs in | |
1503 | memory, not all of it. However, the normal scheme using | |
1504 | function_arg_partial_nregs can result in unusual subregs, eg. | |
1505 | (subreg:SI (reg:DF) 4), which are not handled well. The code to | |
1506 | store the whole arg to memory is often more efficient than code | |
1507 | to store pieces, and we know that space is available in the right | |
1508 | place for the whole arg. */ | |
1509 | rvec[k++] = gen_rtx_EXPR_LIST (VOIDmode, NULL_RTX, const0_rtx); | |
1510 | ||
1511 | i = 0; | |
1512 | do | |
1513 | { | |
1514 | rtx r = gen_rtx_REG (SImode, GP_ARG_MIN_REG + align_words); | |
1515 | rtx off = GEN_INT (i++ * 4); | |
1516 | rvec[k++] = gen_rtx_EXPR_LIST (VOIDmode, r, off); | |
1517 | } | |
1518 | while (++align_words < GP_ARG_NUM_REG && --n_units != 0); | |
1519 | ||
1520 | return gen_rtx_PARALLEL (mode, gen_rtvec_v (k, rvec)); | |
1521 | } | |
1522 | ||
1523 | /* We have an argument of MODE and TYPE that goes into FPRs or VRs, | |
1524 | but must also be copied into the parameter save area starting at | |
1525 | offset ALIGN_WORDS. Fill in RVEC with the elements corresponding | |
1526 | to the GPRs and/or memory. Return the number of elements used. */ | |
1527 | ||
1528 | static int | |
1529 | rs6000_psave_function_arg (machine_mode mode, const_tree type, | |
1530 | int align_words, rtx *rvec) | |
1531 | { | |
1532 | int k = 0; | |
1533 | ||
1534 | if (align_words < GP_ARG_NUM_REG) | |
1535 | { | |
1536 | int n_words = rs6000_arg_size (mode, type); | |
1537 | ||
1538 | if (align_words + n_words > GP_ARG_NUM_REG | |
1539 | || mode == BLKmode | |
1540 | || (TARGET_32BIT && TARGET_POWERPC64)) | |
1541 | { | |
1542 | /* If this is partially on the stack, then we only | |
1543 | include the portion actually in registers here. */ | |
1544 | machine_mode rmode = TARGET_32BIT ? SImode : DImode; | |
1545 | int i = 0; | |
1546 | ||
1547 | if (align_words + n_words > GP_ARG_NUM_REG) | |
1548 | { | |
1549 | /* Not all of the arg fits in gprs. Say that it goes in memory | |
1550 | too, using a magic NULL_RTX component. Also see comment in | |
1551 | rs6000_mixed_function_arg for why the normal | |
1552 | function_arg_partial_nregs scheme doesn't work in this case. */ | |
1553 | rvec[k++] = gen_rtx_EXPR_LIST (VOIDmode, NULL_RTX, const0_rtx); | |
1554 | } | |
1555 | ||
1556 | do | |
1557 | { | |
1558 | rtx r = gen_rtx_REG (rmode, GP_ARG_MIN_REG + align_words); | |
1559 | rtx off = GEN_INT (i++ * GET_MODE_SIZE (rmode)); | |
1560 | rvec[k++] = gen_rtx_EXPR_LIST (VOIDmode, r, off); | |
1561 | } | |
1562 | while (++align_words < GP_ARG_NUM_REG && --n_words != 0); | |
1563 | } | |
1564 | else | |
1565 | { | |
1566 | /* The whole arg fits in gprs. */ | |
1567 | rtx r = gen_rtx_REG (mode, GP_ARG_MIN_REG + align_words); | |
1568 | rvec[k++] = gen_rtx_EXPR_LIST (VOIDmode, r, const0_rtx); | |
1569 | } | |
1570 | } | |
1571 | else | |
1572 | { | |
1573 | /* It's entirely in memory. */ | |
1574 | rvec[k++] = gen_rtx_EXPR_LIST (VOIDmode, NULL_RTX, const0_rtx); | |
1575 | } | |
1576 | ||
1577 | return k; | |
1578 | } | |
1579 | ||
1580 | /* RVEC is a vector of K components of an argument of mode MODE. | |
1581 | Construct the final function_arg return value from it. */ | |
1582 | ||
1583 | static rtx | |
1584 | rs6000_finish_function_arg (machine_mode mode, rtx *rvec, int k) | |
1585 | { | |
1586 | gcc_assert (k >= 1); | |
1587 | ||
1588 | /* Avoid returning a PARALLEL in the trivial cases. */ | |
1589 | if (k == 1) | |
1590 | { | |
1591 | if (XEXP (rvec[0], 0) == NULL_RTX) | |
1592 | return NULL_RTX; | |
1593 | ||
1594 | if (GET_MODE (XEXP (rvec[0], 0)) == mode) | |
1595 | return XEXP (rvec[0], 0); | |
1596 | } | |
1597 | ||
1598 | return gen_rtx_PARALLEL (mode, gen_rtvec_v (k, rvec)); | |
1599 | } | |
1600 | ||
1601 | /* Determine where to put an argument to a function. | |
1602 | Value is zero to push the argument on the stack, | |
1603 | or a hard register in which to store the argument. | |
1604 | ||
1acf0246 BS |
1605 | CUM is a variable of type CUMULATIVE_ARGS which gives info about |
1606 | the preceding args and about the function being called. It is | |
1607 | not modified in this routine. | |
6783fdb7 | 1608 | ARG is a description of the argument. |
1acf0246 BS |
1609 | |
1610 | On RS/6000 the first eight words of non-FP are normally in registers | |
1611 | and the rest are pushed. Under AIX, the first 13 FP args are in registers. | |
1612 | Under V.4, the first 8 FP args are in registers. | |
1613 | ||
1614 | If this is floating-point and no prototype is specified, we use | |
1615 | both an FP and integer register (or possibly FP reg and stack). Library | |
1616 | functions (when CALL_LIBCALL is set) always have the proper types for args, | |
1617 | so we can pass the FP value just in one register. emit_library_function | |
1618 | doesn't support PARALLEL anyway. | |
1619 | ||
1620 | Note that for args passed by reference, function_arg will be called | |
6783fdb7 | 1621 | with ARG describing the pointer to the arg, not the arg itself. */ |
1acf0246 BS |
1622 | |
1623 | rtx | |
6783fdb7 | 1624 | rs6000_function_arg (cumulative_args_t cum_v, const function_arg_info &arg) |
1acf0246 BS |
1625 | { |
1626 | CUMULATIVE_ARGS *cum = get_cumulative_args (cum_v); | |
6783fdb7 RS |
1627 | tree type = arg.type; |
1628 | machine_mode mode = arg.mode; | |
1629 | bool named = arg.named; | |
1acf0246 BS |
1630 | enum rs6000_abi abi = DEFAULT_ABI; |
1631 | machine_mode elt_mode; | |
1632 | int n_elts; | |
1633 | ||
0ad7e730 | 1634 | /* We do not allow MMA types being used as function arguments. */ |
f8f8909a | 1635 | if (mode == OOmode || mode == XOmode) |
0ad7e730 PB |
1636 | { |
1637 | if (TYPE_CANONICAL (type) != NULL_TREE) | |
1638 | type = TYPE_CANONICAL (type); | |
1639 | error ("invalid use of MMA operand of type %qs as a function parameter", | |
1640 | IDENTIFIER_POINTER (DECL_NAME (TYPE_NAME (type)))); | |
1641 | return NULL_RTX; | |
1642 | } | |
1643 | ||
1acf0246 BS |
1644 | /* Return a marker to indicate whether CR1 needs to set or clear the |
1645 | bit that V.4 uses to say fp args were passed in registers. | |
1646 | Assume that we don't need the marker for software floating point, | |
1647 | or compiler generated library calls. */ | |
6783fdb7 | 1648 | if (arg.end_marker_p ()) |
1acf0246 BS |
1649 | { |
1650 | if (abi == ABI_V4 | |
1651 | && (cum->call_cookie & CALL_LIBCALL) == 0 | |
1652 | && (cum->stdarg | |
1653 | || (cum->nargs_prototype < 0 | |
1654 | && (cum->prototype || TARGET_NO_PROTOTYPE))) | |
1655 | && TARGET_HARD_FLOAT) | |
1656 | return GEN_INT (cum->call_cookie | |
1657 | | ((cum->fregno == FP_ARG_MIN_REG) | |
1658 | ? CALL_V4_SET_FP_ARGS | |
1659 | : CALL_V4_CLEAR_FP_ARGS)); | |
1660 | ||
1661 | return GEN_INT (cum->call_cookie & ~CALL_LIBCALL); | |
1662 | } | |
1663 | ||
1664 | rs6000_discover_homogeneous_aggregate (mode, type, &elt_mode, &n_elts); | |
1665 | ||
1666 | if (TARGET_MACHO && rs6000_darwin64_struct_check_p (mode, type)) | |
1667 | { | |
1668 | rtx rslt = rs6000_darwin64_record_arg (cum, type, named, /*retval= */false); | |
1669 | if (rslt != NULL_RTX) | |
1670 | return rslt; | |
1671 | /* Else fall through to usual handling. */ | |
1672 | } | |
1673 | ||
1674 | if (USE_ALTIVEC_FOR_ARG_P (cum, elt_mode, named)) | |
1675 | { | |
1676 | rtx rvec[GP_ARG_NUM_REG + AGGR_ARG_NUM_REG + 1]; | |
1677 | rtx r, off; | |
1678 | int i, k = 0; | |
1679 | ||
1680 | /* Do we also need to pass this argument in the parameter save area? | |
1681 | Library support functions for IEEE 128-bit are assumed to not need the | |
1682 | value passed both in GPRs and in vector registers. */ | |
1683 | if (TARGET_64BIT && !cum->prototype | |
1684 | && (!cum->libcall || !FLOAT128_VECTOR_P (elt_mode))) | |
1685 | { | |
1686 | int align_words = ROUND_UP (cum->words, 2); | |
1687 | k = rs6000_psave_function_arg (mode, type, align_words, rvec); | |
1688 | } | |
1689 | ||
1690 | /* Describe where this argument goes in the vector registers. */ | |
1691 | for (i = 0; i < n_elts && cum->vregno + i <= ALTIVEC_ARG_MAX_REG; i++) | |
1692 | { | |
1693 | r = gen_rtx_REG (elt_mode, cum->vregno + i); | |
1694 | off = GEN_INT (i * GET_MODE_SIZE (elt_mode)); | |
1695 | rvec[k++] = gen_rtx_EXPR_LIST (VOIDmode, r, off); | |
1696 | } | |
1697 | ||
1698 | return rs6000_finish_function_arg (mode, rvec, k); | |
1699 | } | |
1700 | else if (TARGET_ALTIVEC_ABI | |
1701 | && (ALTIVEC_OR_VSX_VECTOR_MODE (mode) | |
9907413a | 1702 | || (type && VECTOR_TYPE_P (type) |
1acf0246 BS |
1703 | && int_size_in_bytes (type) == 16))) |
1704 | { | |
1705 | if (named || abi == ABI_V4) | |
1706 | return NULL_RTX; | |
1707 | else | |
1708 | { | |
1709 | /* Vector parameters to varargs functions under AIX or Darwin | |
1710 | get passed in memory and possibly also in GPRs. */ | |
1711 | int align, align_words, n_words; | |
1712 | machine_mode part_mode; | |
1713 | ||
1714 | /* Vector parameters must be 16-byte aligned. In 32-bit | |
1715 | mode this means we need to take into account the offset | |
1716 | to the parameter save area. In 64-bit mode, they just | |
1717 | have to start on an even word, since the parameter save | |
1718 | area is 16-byte aligned. */ | |
1719 | if (TARGET_32BIT) | |
1720 | align = -(rs6000_parm_offset () + cum->words) & 3; | |
1721 | else | |
1722 | align = cum->words & 1; | |
1723 | align_words = cum->words + align; | |
1724 | ||
1725 | /* Out of registers? Memory, then. */ | |
1726 | if (align_words >= GP_ARG_NUM_REG) | |
1727 | return NULL_RTX; | |
1728 | ||
1729 | if (TARGET_32BIT && TARGET_POWERPC64) | |
1730 | return rs6000_mixed_function_arg (mode, type, align_words); | |
1731 | ||
1732 | /* The vector value goes in GPRs. Only the part of the | |
1733 | value in GPRs is reported here. */ | |
1734 | part_mode = mode; | |
1735 | n_words = rs6000_arg_size (mode, type); | |
1736 | if (align_words + n_words > GP_ARG_NUM_REG) | |
1737 | /* Fortunately, there are only two possibilities, the value | |
1738 | is either wholly in GPRs or half in GPRs and half not. */ | |
1739 | part_mode = DImode; | |
1740 | ||
1741 | return gen_rtx_REG (part_mode, GP_ARG_MIN_REG + align_words); | |
1742 | } | |
1743 | } | |
1744 | ||
1745 | else if (abi == ABI_V4) | |
1746 | { | |
1747 | if (abi_v4_pass_in_fpr (mode, named)) | |
1748 | { | |
1749 | /* _Decimal128 must use an even/odd register pair. This assumes | |
1750 | that the register number is odd when fregno is odd. */ | |
1751 | if (mode == TDmode && (cum->fregno % 2) == 1) | |
1752 | cum->fregno++; | |
1753 | ||
1754 | if (cum->fregno + (FLOAT128_2REG_P (mode) ? 1 : 0) | |
1755 | <= FP_ARG_V4_MAX_REG) | |
1756 | return gen_rtx_REG (mode, cum->fregno); | |
1757 | else | |
1758 | return NULL_RTX; | |
1759 | } | |
1760 | else | |
1761 | { | |
1762 | int n_words = rs6000_arg_size (mode, type); | |
1763 | int gregno = cum->sysv_gregno; | |
1764 | ||
1765 | /* Long long is put in (r3,r4), (r5,r6), (r7,r8) or (r9,r10). | |
1766 | As does any other 2 word item such as complex int due to a | |
1767 | historical mistake. */ | |
1768 | if (n_words == 2) | |
1769 | gregno += (1 - gregno) & 1; | |
1770 | ||
1771 | /* Multi-reg args are not split between registers and stack. */ | |
1772 | if (gregno + n_words - 1 > GP_ARG_MAX_REG) | |
1773 | return NULL_RTX; | |
1774 | ||
1775 | if (TARGET_32BIT && TARGET_POWERPC64) | |
1776 | return rs6000_mixed_function_arg (mode, type, | |
1777 | gregno - GP_ARG_MIN_REG); | |
1778 | return gen_rtx_REG (mode, gregno); | |
1779 | } | |
1780 | } | |
1781 | else | |
1782 | { | |
1783 | int align_words = rs6000_parm_start (mode, type, cum->words); | |
1784 | ||
1785 | /* _Decimal128 must be passed in an even/odd float register pair. | |
1786 | This assumes that the register number is odd when fregno is odd. */ | |
1787 | if (elt_mode == TDmode && (cum->fregno % 2) == 1) | |
1788 | cum->fregno++; | |
1789 | ||
1790 | if (USE_FP_FOR_ARG_P (cum, elt_mode) | |
1791 | && !(TARGET_AIX && !TARGET_ELF | |
1792 | && type != NULL && AGGREGATE_TYPE_P (type))) | |
1793 | { | |
1794 | rtx rvec[GP_ARG_NUM_REG + AGGR_ARG_NUM_REG + 1]; | |
1795 | rtx r, off; | |
1796 | int i, k = 0; | |
1797 | unsigned long n_fpreg = (GET_MODE_SIZE (elt_mode) + 7) >> 3; | |
1798 | int fpr_words; | |
1799 | ||
1800 | /* Do we also need to pass this argument in the parameter | |
1801 | save area? */ | |
1802 | if (type && (cum->nargs_prototype <= 0 | |
1803 | || ((DEFAULT_ABI == ABI_AIX || DEFAULT_ABI == ABI_ELFv2) | |
1804 | && TARGET_XL_COMPAT | |
1805 | && align_words >= GP_ARG_NUM_REG))) | |
1806 | k = rs6000_psave_function_arg (mode, type, align_words, rvec); | |
1807 | ||
1808 | /* Describe where this argument goes in the fprs. */ | |
1809 | for (i = 0; i < n_elts | |
1810 | && cum->fregno + i * n_fpreg <= FP_ARG_MAX_REG; i++) | |
1811 | { | |
1812 | /* Check if the argument is split over registers and memory. | |
1813 | This can only ever happen for long double or _Decimal128; | |
1814 | complex types are handled via split_complex_arg. */ | |
1815 | machine_mode fmode = elt_mode; | |
1816 | if (cum->fregno + (i + 1) * n_fpreg > FP_ARG_MAX_REG + 1) | |
1817 | { | |
1818 | gcc_assert (FLOAT128_2REG_P (fmode)); | |
1819 | fmode = DECIMAL_FLOAT_MODE_P (fmode) ? DDmode : DFmode; | |
1820 | } | |
1821 | ||
1822 | r = gen_rtx_REG (fmode, cum->fregno + i * n_fpreg); | |
1823 | off = GEN_INT (i * GET_MODE_SIZE (elt_mode)); | |
1824 | rvec[k++] = gen_rtx_EXPR_LIST (VOIDmode, r, off); | |
1825 | } | |
1826 | ||
1827 | /* If there were not enough FPRs to hold the argument, the rest | |
1828 | usually goes into memory. However, if the current position | |
1829 | is still within the register parameter area, a portion may | |
1830 | actually have to go into GPRs. | |
1831 | ||
1832 | Note that it may happen that the portion of the argument | |
1833 | passed in the first "half" of the first GPR was already | |
1834 | passed in the last FPR as well. | |
1835 | ||
1836 | For unnamed arguments, we already set up GPRs to cover the | |
1837 | whole argument in rs6000_psave_function_arg, so there is | |
1838 | nothing further to do at this point. */ | |
1839 | fpr_words = (i * GET_MODE_SIZE (elt_mode)) / (TARGET_32BIT ? 4 : 8); | |
1840 | if (i < n_elts && align_words + fpr_words < GP_ARG_NUM_REG | |
1841 | && cum->nargs_prototype > 0) | |
1842 | { | |
1acf0246 BS |
1843 | machine_mode rmode = TARGET_32BIT ? SImode : DImode; |
1844 | int n_words = rs6000_arg_size (mode, type); | |
1845 | ||
1846 | align_words += fpr_words; | |
1847 | n_words -= fpr_words; | |
1848 | ||
1849 | do | |
1850 | { | |
1851 | r = gen_rtx_REG (rmode, GP_ARG_MIN_REG + align_words); | |
1852 | off = GEN_INT (fpr_words++ * GET_MODE_SIZE (rmode)); | |
1853 | rvec[k++] = gen_rtx_EXPR_LIST (VOIDmode, r, off); | |
1854 | } | |
1855 | while (++align_words < GP_ARG_NUM_REG && --n_words != 0); | |
1acf0246 BS |
1856 | } |
1857 | ||
1858 | return rs6000_finish_function_arg (mode, rvec, k); | |
1859 | } | |
1860 | else if (align_words < GP_ARG_NUM_REG) | |
1861 | { | |
1862 | if (TARGET_32BIT && TARGET_POWERPC64) | |
1863 | return rs6000_mixed_function_arg (mode, type, align_words); | |
1864 | ||
1865 | return gen_rtx_REG (mode, GP_ARG_MIN_REG + align_words); | |
1866 | } | |
1867 | else | |
1868 | return NULL_RTX; | |
1869 | } | |
1870 | } | |
1871 | \f | |
1872 | /* For an arg passed partly in registers and partly in memory, this is | |
1873 | the number of bytes passed in registers. For args passed entirely in | |
1874 | registers or entirely in memory, zero. When an arg is described by a | |
1875 | PARALLEL, perhaps using more than one register type, this function | |
1876 | returns the number of bytes used by the first element of the PARALLEL. */ | |
1877 | ||
1878 | int | |
a7c81bc1 RS |
1879 | rs6000_arg_partial_bytes (cumulative_args_t cum_v, |
1880 | const function_arg_info &arg) | |
1acf0246 BS |
1881 | { |
1882 | CUMULATIVE_ARGS *cum = get_cumulative_args (cum_v); | |
1883 | bool passed_in_gprs = true; | |
1884 | int ret = 0; | |
1885 | int align_words; | |
1886 | machine_mode elt_mode; | |
1887 | int n_elts; | |
1888 | ||
a7c81bc1 RS |
1889 | rs6000_discover_homogeneous_aggregate (arg.mode, arg.type, |
1890 | &elt_mode, &n_elts); | |
1acf0246 BS |
1891 | |
1892 | if (DEFAULT_ABI == ABI_V4) | |
1893 | return 0; | |
1894 | ||
a7c81bc1 | 1895 | if (USE_ALTIVEC_FOR_ARG_P (cum, elt_mode, arg.named)) |
1acf0246 BS |
1896 | { |
1897 | /* If we are passing this arg in the fixed parameter save area (gprs or | |
1898 | memory) as well as VRs, we do not use the partial bytes mechanism; | |
1899 | instead, rs6000_function_arg will return a PARALLEL including a memory | |
1900 | element as necessary. Library support functions for IEEE 128-bit are | |
1901 | assumed to not need the value passed both in GPRs and in vector | |
1902 | registers. */ | |
1903 | if (TARGET_64BIT && !cum->prototype | |
1904 | && (!cum->libcall || !FLOAT128_VECTOR_P (elt_mode))) | |
1905 | return 0; | |
1906 | ||
1907 | /* Otherwise, we pass in VRs only. Check for partial copies. */ | |
1908 | passed_in_gprs = false; | |
1909 | if (cum->vregno + n_elts > ALTIVEC_ARG_MAX_REG + 1) | |
1910 | ret = (ALTIVEC_ARG_MAX_REG + 1 - cum->vregno) * 16; | |
1911 | } | |
1912 | ||
1913 | /* In this complicated case we just disable the partial_nregs code. */ | |
a7c81bc1 | 1914 | if (TARGET_MACHO && rs6000_darwin64_struct_check_p (arg.mode, arg.type)) |
1acf0246 BS |
1915 | return 0; |
1916 | ||
a7c81bc1 | 1917 | align_words = rs6000_parm_start (arg.mode, arg.type, cum->words); |
1acf0246 BS |
1918 | |
1919 | if (USE_FP_FOR_ARG_P (cum, elt_mode) | |
a7c81bc1 | 1920 | && !(TARGET_AIX && !TARGET_ELF && arg.aggregate_type_p ())) |
1acf0246 BS |
1921 | { |
1922 | unsigned long n_fpreg = (GET_MODE_SIZE (elt_mode) + 7) >> 3; | |
1923 | ||
1924 | /* If we are passing this arg in the fixed parameter save area | |
1925 | (gprs or memory) as well as FPRs, we do not use the partial | |
1926 | bytes mechanism; instead, rs6000_function_arg will return a | |
1927 | PARALLEL including a memory element as necessary. */ | |
a7c81bc1 | 1928 | if (arg.type |
1acf0246 BS |
1929 | && (cum->nargs_prototype <= 0 |
1930 | || ((DEFAULT_ABI == ABI_AIX || DEFAULT_ABI == ABI_ELFv2) | |
1931 | && TARGET_XL_COMPAT | |
1932 | && align_words >= GP_ARG_NUM_REG))) | |
1933 | return 0; | |
1934 | ||
1935 | /* Otherwise, we pass in FPRs only. Check for partial copies. */ | |
1936 | passed_in_gprs = false; | |
1937 | if (cum->fregno + n_elts * n_fpreg > FP_ARG_MAX_REG + 1) | |
1938 | { | |
1939 | /* Compute number of bytes / words passed in FPRs. If there | |
1940 | is still space available in the register parameter area | |
1941 | *after* that amount, a part of the argument will be passed | |
1942 | in GPRs. In that case, the total amount passed in any | |
1943 | registers is equal to the amount that would have been passed | |
1944 | in GPRs if everything were passed there, so we fall back to | |
1945 | the GPR code below to compute the appropriate value. */ | |
1946 | int fpr = ((FP_ARG_MAX_REG + 1 - cum->fregno) | |
1947 | * MIN (8, GET_MODE_SIZE (elt_mode))); | |
1948 | int fpr_words = fpr / (TARGET_32BIT ? 4 : 8); | |
1949 | ||
1950 | if (align_words + fpr_words < GP_ARG_NUM_REG) | |
1951 | passed_in_gprs = true; | |
1952 | else | |
1953 | ret = fpr; | |
1954 | } | |
1955 | } | |
1956 | ||
1957 | if (passed_in_gprs | |
1958 | && align_words < GP_ARG_NUM_REG | |
a7c81bc1 | 1959 | && GP_ARG_NUM_REG < align_words + rs6000_arg_size (arg.mode, arg.type)) |
1acf0246 BS |
1960 | ret = (GP_ARG_NUM_REG - align_words) * (TARGET_32BIT ? 4 : 8); |
1961 | ||
1962 | if (ret != 0 && TARGET_DEBUG_ARG) | |
1963 | fprintf (stderr, "rs6000_arg_partial_bytes: %d\n", ret); | |
1964 | ||
1965 | return ret; | |
1966 | } | |
1967 | \f | |
1968 | /* A C expression that indicates when an argument must be passed by | |
1969 | reference. If nonzero for an argument, a copy of that argument is | |
1970 | made in memory and a pointer to the argument is passed instead of | |
1971 | the argument itself. The pointer is passed in whatever way is | |
1972 | appropriate for passing a pointer to that type. | |
1973 | ||
1974 | Under V.4, aggregates and long double are passed by reference. | |
1975 | ||
1976 | As an extension to all 32-bit ABIs, AltiVec vectors are passed by | |
1977 | reference unless the AltiVec vector extension ABI is in force. | |
1978 | ||
1979 | As an extension to all ABIs, variable sized types are passed by | |
1980 | reference. */ | |
1981 | ||
1982 | bool | |
52090e4d | 1983 | rs6000_pass_by_reference (cumulative_args_t, const function_arg_info &arg) |
1acf0246 | 1984 | { |
52090e4d | 1985 | if (!arg.type) |
1acf0246 BS |
1986 | return 0; |
1987 | ||
1988 | if (DEFAULT_ABI == ABI_V4 && TARGET_IEEEQUAD | |
52090e4d | 1989 | && FLOAT128_IEEE_P (TYPE_MODE (arg.type))) |
1acf0246 BS |
1990 | { |
1991 | if (TARGET_DEBUG_ARG) | |
1992 | fprintf (stderr, "function_arg_pass_by_reference: V4 IEEE 128-bit\n"); | |
1993 | return 1; | |
1994 | } | |
1995 | ||
52090e4d | 1996 | if (DEFAULT_ABI == ABI_V4 && AGGREGATE_TYPE_P (arg.type)) |
1acf0246 BS |
1997 | { |
1998 | if (TARGET_DEBUG_ARG) | |
1999 | fprintf (stderr, "function_arg_pass_by_reference: V4 aggregate\n"); | |
2000 | return 1; | |
2001 | } | |
2002 | ||
52090e4d | 2003 | if (int_size_in_bytes (arg.type) < 0) |
1acf0246 BS |
2004 | { |
2005 | if (TARGET_DEBUG_ARG) | |
2006 | fprintf (stderr, "function_arg_pass_by_reference: variable size\n"); | |
2007 | return 1; | |
2008 | } | |
2009 | ||
2010 | /* Allow -maltivec -mabi=no-altivec without warning. Altivec vector | |
2011 | modes only exist for GCC vector types if -maltivec. */ | |
52090e4d | 2012 | if (TARGET_32BIT && !TARGET_ALTIVEC_ABI && ALTIVEC_VECTOR_MODE (arg.mode)) |
1acf0246 BS |
2013 | { |
2014 | if (TARGET_DEBUG_ARG) | |
2015 | fprintf (stderr, "function_arg_pass_by_reference: AltiVec\n"); | |
2016 | return 1; | |
2017 | } | |
2018 | ||
2019 | /* Pass synthetic vectors in memory. */ | |
9907413a | 2020 | if (VECTOR_TYPE_P (arg.type) |
52090e4d | 2021 | && int_size_in_bytes (arg.type) > (TARGET_ALTIVEC_ABI ? 16 : 8)) |
1acf0246 BS |
2022 | { |
2023 | static bool warned_for_pass_big_vectors = false; | |
2024 | if (TARGET_DEBUG_ARG) | |
2025 | fprintf (stderr, "function_arg_pass_by_reference: synthetic vector\n"); | |
2026 | if (!warned_for_pass_big_vectors) | |
2027 | { | |
2028 | warning (OPT_Wpsabi, "GCC vector passed by reference: " | |
2029 | "non-standard ABI extension with no compatibility " | |
2030 | "guarantee"); | |
2031 | warned_for_pass_big_vectors = true; | |
2032 | } | |
2033 | return 1; | |
2034 | } | |
2035 | ||
2036 | return 0; | |
2037 | } | |
2038 | ||
2039 | /* Process parameter of type TYPE after ARGS_SO_FAR parameters were | |
2040 | already processes. Return true if the parameter must be passed | |
2041 | (fully or partially) on the stack. */ | |
2042 | ||
2043 | static bool | |
2044 | rs6000_parm_needs_stack (cumulative_args_t args_so_far, tree type) | |
2045 | { | |
1acf0246 BS |
2046 | int unsignedp; |
2047 | rtx entry_parm; | |
2048 | ||
2049 | /* Catch errors. */ | |
2050 | if (type == NULL || type == error_mark_node) | |
2051 | return true; | |
2052 | ||
2053 | /* Handle types with no storage requirement. */ | |
2054 | if (TYPE_MODE (type) == VOIDmode) | |
2055 | return false; | |
2056 | ||
2057 | /* Handle complex types. */ | |
2058 | if (TREE_CODE (type) == COMPLEX_TYPE) | |
2059 | return (rs6000_parm_needs_stack (args_so_far, TREE_TYPE (type)) | |
2060 | || rs6000_parm_needs_stack (args_so_far, TREE_TYPE (type))); | |
2061 | ||
2062 | /* Handle transparent aggregates. */ | |
2063 | if ((TREE_CODE (type) == UNION_TYPE || TREE_CODE (type) == RECORD_TYPE) | |
2064 | && TYPE_TRANSPARENT_AGGR (type)) | |
2065 | type = TREE_TYPE (first_field (type)); | |
2066 | ||
2067 | /* See if this arg was passed by invisible reference. */ | |
b12cdd6e RS |
2068 | function_arg_info arg (type, /*named=*/true); |
2069 | apply_pass_by_reference_rules (get_cumulative_args (args_so_far), arg); | |
1acf0246 BS |
2070 | |
2071 | /* Find mode as it is passed by the ABI. */ | |
2072 | unsignedp = TYPE_UNSIGNED (type); | |
b12cdd6e | 2073 | arg.mode = promote_mode (arg.type, arg.mode, &unsignedp); |
1acf0246 BS |
2074 | |
2075 | /* If we must pass in stack, we need a stack. */ | |
0ffef200 | 2076 | if (rs6000_must_pass_in_stack (arg)) |
1acf0246 BS |
2077 | return true; |
2078 | ||
2079 | /* If there is no incoming register, we need a stack. */ | |
6783fdb7 | 2080 | entry_parm = rs6000_function_arg (args_so_far, arg); |
1acf0246 BS |
2081 | if (entry_parm == NULL) |
2082 | return true; | |
2083 | ||
2084 | /* Likewise if we need to pass both in registers and on the stack. */ | |
2085 | if (GET_CODE (entry_parm) == PARALLEL | |
2086 | && XEXP (XVECEXP (entry_parm, 0, 0), 0) == NULL_RTX) | |
2087 | return true; | |
2088 | ||
2089 | /* Also true if we're partially in registers and partially not. */ | |
a7c81bc1 | 2090 | if (rs6000_arg_partial_bytes (args_so_far, arg) != 0) |
1acf0246 BS |
2091 | return true; |
2092 | ||
2093 | /* Update info on where next arg arrives in registers. */ | |
6930c98c | 2094 | rs6000_function_arg_advance (args_so_far, arg); |
1acf0246 BS |
2095 | return false; |
2096 | } | |
2097 | ||
2098 | /* Return true if FUN has no prototype, has a variable argument | |
2099 | list, or passes any parameter in memory. */ | |
2100 | ||
2101 | static bool | |
2102 | rs6000_function_parms_need_stack (tree fun, bool incoming) | |
2103 | { | |
2104 | tree fntype, result; | |
2105 | CUMULATIVE_ARGS args_so_far_v; | |
2106 | cumulative_args_t args_so_far; | |
2107 | ||
2108 | if (!fun) | |
2109 | /* Must be a libcall, all of which only use reg parms. */ | |
2110 | return false; | |
2111 | ||
2112 | fntype = fun; | |
2113 | if (!TYPE_P (fun)) | |
2114 | fntype = TREE_TYPE (fun); | |
2115 | ||
2116 | /* Varargs functions need the parameter save area. */ | |
2117 | if ((!incoming && !prototype_p (fntype)) || stdarg_p (fntype)) | |
2118 | return true; | |
2119 | ||
2120 | INIT_CUMULATIVE_INCOMING_ARGS (args_so_far_v, fntype, NULL_RTX); | |
2121 | args_so_far = pack_cumulative_args (&args_so_far_v); | |
2122 | ||
2123 | /* When incoming, we will have been passed the function decl. | |
2124 | It is necessary to use the decl to handle K&R style functions, | |
2125 | where TYPE_ARG_TYPES may not be available. */ | |
2126 | if (incoming) | |
2127 | { | |
2128 | gcc_assert (DECL_P (fun)); | |
2129 | result = DECL_RESULT (fun); | |
2130 | } | |
2131 | else | |
2132 | result = TREE_TYPE (fntype); | |
2133 | ||
2134 | if (result && aggregate_value_p (result, fntype)) | |
2135 | { | |
2136 | if (!TYPE_P (result)) | |
2137 | result = TREE_TYPE (result); | |
2138 | result = build_pointer_type (result); | |
2139 | rs6000_parm_needs_stack (args_so_far, result); | |
2140 | } | |
2141 | ||
2142 | if (incoming) | |
2143 | { | |
2144 | tree parm; | |
2145 | ||
2146 | for (parm = DECL_ARGUMENTS (fun); | |
2147 | parm && parm != void_list_node; | |
2148 | parm = TREE_CHAIN (parm)) | |
2149 | if (rs6000_parm_needs_stack (args_so_far, TREE_TYPE (parm))) | |
2150 | return true; | |
2151 | } | |
2152 | else | |
2153 | { | |
2154 | function_args_iterator args_iter; | |
2155 | tree arg_type; | |
2156 | ||
2157 | FOREACH_FUNCTION_ARGS (fntype, arg_type, args_iter) | |
2158 | if (rs6000_parm_needs_stack (args_so_far, arg_type)) | |
2159 | return true; | |
2160 | } | |
2161 | ||
2162 | return false; | |
2163 | } | |
2164 | ||
2165 | /* Return the size of the REG_PARM_STACK_SPACE are for FUN. This is | |
2166 | usually a constant depending on the ABI. However, in the ELFv2 ABI | |
2167 | the register parameter area is optional when calling a function that | |
2168 | has a prototype is scope, has no variable argument list, and passes | |
2169 | all parameters in registers. */ | |
2170 | ||
2171 | int | |
2172 | rs6000_reg_parm_stack_space (tree fun, bool incoming) | |
2173 | { | |
2174 | int reg_parm_stack_space; | |
2175 | ||
2176 | switch (DEFAULT_ABI) | |
2177 | { | |
2178 | default: | |
2179 | reg_parm_stack_space = 0; | |
2180 | break; | |
2181 | ||
2182 | case ABI_AIX: | |
2183 | case ABI_DARWIN: | |
2184 | reg_parm_stack_space = TARGET_64BIT ? 64 : 32; | |
2185 | break; | |
2186 | ||
2187 | case ABI_ELFv2: | |
2188 | /* ??? Recomputing this every time is a bit expensive. Is there | |
2189 | a place to cache this information? */ | |
2190 | if (rs6000_function_parms_need_stack (fun, incoming)) | |
2191 | reg_parm_stack_space = TARGET_64BIT ? 64 : 32; | |
2192 | else | |
2193 | reg_parm_stack_space = 0; | |
2194 | break; | |
2195 | } | |
2196 | ||
2197 | return reg_parm_stack_space; | |
2198 | } | |
2199 | ||
2200 | static void | |
2201 | rs6000_move_block_from_reg (int regno, rtx x, int nregs) | |
2202 | { | |
2203 | int i; | |
2204 | machine_mode reg_mode = TARGET_32BIT ? SImode : DImode; | |
2205 | ||
2206 | if (nregs == 0) | |
2207 | return; | |
2208 | ||
2209 | for (i = 0; i < nregs; i++) | |
2210 | { | |
2211 | rtx tem = adjust_address_nv (x, reg_mode, i * GET_MODE_SIZE (reg_mode)); | |
2212 | if (reload_completed) | |
2213 | { | |
2214 | if (! strict_memory_address_p (reg_mode, XEXP (tem, 0))) | |
2215 | tem = NULL_RTX; | |
2216 | else | |
2217 | tem = simplify_gen_subreg (reg_mode, x, BLKmode, | |
2218 | i * GET_MODE_SIZE (reg_mode)); | |
2219 | } | |
2220 | else | |
2221 | tem = replace_equiv_address (tem, XEXP (tem, 0)); | |
2222 | ||
2223 | gcc_assert (tem); | |
2224 | ||
2225 | emit_move_insn (tem, gen_rtx_REG (reg_mode, regno + i)); | |
2226 | } | |
2227 | } | |
2228 | \f | |
2229 | /* Perform any needed actions needed for a function that is receiving a | |
2230 | variable number of arguments. | |
2231 | ||
2232 | CUM is as above. | |
2233 | ||
e7056ca4 | 2234 | ARG is the last named argument. |
1acf0246 BS |
2235 | |
2236 | PRETEND_SIZE is a variable that should be set to the amount of stack | |
2237 | that must be pushed by the prolog to pretend that our caller pushed | |
2238 | it. | |
2239 | ||
2240 | Normally, this macro will push all remaining incoming registers on the | |
2241 | stack and set PRETEND_SIZE to the length of the registers pushed. */ | |
2242 | ||
2243 | void | |
e7056ca4 RS |
2244 | setup_incoming_varargs (cumulative_args_t cum, |
2245 | const function_arg_info &arg, | |
2246 | int *pretend_size ATTRIBUTE_UNUSED, int no_rtl) | |
1acf0246 BS |
2247 | { |
2248 | CUMULATIVE_ARGS next_cum; | |
2249 | int reg_size = TARGET_32BIT ? 4 : 8; | |
2250 | rtx save_area = NULL_RTX, mem; | |
2251 | int first_reg_offset; | |
2252 | alias_set_type set; | |
2253 | ||
2254 | /* Skip the last named argument. */ | |
2255 | next_cum = *get_cumulative_args (cum); | |
4fe34cdc JM |
2256 | if (!TYPE_NO_NAMED_ARGS_STDARG_P (TREE_TYPE (current_function_decl))) |
2257 | rs6000_function_arg_advance_1 (&next_cum, arg.mode, arg.type, arg.named, | |
2258 | 0); | |
1acf0246 BS |
2259 | |
2260 | if (DEFAULT_ABI == ABI_V4) | |
2261 | { | |
2262 | first_reg_offset = next_cum.sysv_gregno - GP_ARG_MIN_REG; | |
2263 | ||
2264 | if (! no_rtl) | |
2265 | { | |
2266 | int gpr_reg_num = 0, gpr_size = 0, fpr_size = 0; | |
2267 | HOST_WIDE_INT offset = 0; | |
2268 | ||
2269 | /* Try to optimize the size of the varargs save area. | |
2270 | The ABI requires that ap.reg_save_area is doubleword | |
2271 | aligned, but we don't need to allocate space for all | |
2272 | the bytes, only those to which we actually will save | |
2273 | anything. */ | |
2274 | if (cfun->va_list_gpr_size && first_reg_offset < GP_ARG_NUM_REG) | |
2275 | gpr_reg_num = GP_ARG_NUM_REG - first_reg_offset; | |
2276 | if (TARGET_HARD_FLOAT | |
2277 | && next_cum.fregno <= FP_ARG_V4_MAX_REG | |
2278 | && cfun->va_list_fpr_size) | |
2279 | { | |
2280 | if (gpr_reg_num) | |
2281 | fpr_size = (next_cum.fregno - FP_ARG_MIN_REG) | |
2282 | * UNITS_PER_FP_WORD; | |
2283 | if (cfun->va_list_fpr_size | |
2284 | < FP_ARG_V4_MAX_REG + 1 - next_cum.fregno) | |
2285 | fpr_size += cfun->va_list_fpr_size * UNITS_PER_FP_WORD; | |
2286 | else | |
2287 | fpr_size += (FP_ARG_V4_MAX_REG + 1 - next_cum.fregno) | |
2288 | * UNITS_PER_FP_WORD; | |
2289 | } | |
2290 | if (gpr_reg_num) | |
2291 | { | |
2292 | offset = -((first_reg_offset * reg_size) & ~7); | |
2293 | if (!fpr_size && gpr_reg_num > cfun->va_list_gpr_size) | |
2294 | { | |
2295 | gpr_reg_num = cfun->va_list_gpr_size; | |
2296 | if (reg_size == 4 && (first_reg_offset & 1)) | |
2297 | gpr_reg_num++; | |
2298 | } | |
2299 | gpr_size = (gpr_reg_num * reg_size + 7) & ~7; | |
2300 | } | |
2301 | else if (fpr_size) | |
2302 | offset = - (int) (next_cum.fregno - FP_ARG_MIN_REG) | |
2303 | * UNITS_PER_FP_WORD | |
2304 | - (int) (GP_ARG_NUM_REG * reg_size); | |
2305 | ||
2306 | if (gpr_size + fpr_size) | |
2307 | { | |
2308 | rtx reg_save_area | |
2309 | = assign_stack_local (BLKmode, gpr_size + fpr_size, 64); | |
2310 | gcc_assert (MEM_P (reg_save_area)); | |
2311 | reg_save_area = XEXP (reg_save_area, 0); | |
2312 | if (GET_CODE (reg_save_area) == PLUS) | |
2313 | { | |
2314 | gcc_assert (XEXP (reg_save_area, 0) | |
2315 | == virtual_stack_vars_rtx); | |
2316 | gcc_assert (CONST_INT_P (XEXP (reg_save_area, 1))); | |
2317 | offset += INTVAL (XEXP (reg_save_area, 1)); | |
2318 | } | |
2319 | else | |
2320 | gcc_assert (reg_save_area == virtual_stack_vars_rtx); | |
2321 | } | |
2322 | ||
2323 | cfun->machine->varargs_save_offset = offset; | |
2324 | save_area = plus_constant (Pmode, virtual_stack_vars_rtx, offset); | |
2325 | } | |
2326 | } | |
2327 | else | |
2328 | { | |
2329 | first_reg_offset = next_cum.words; | |
2330 | save_area = crtl->args.internal_arg_pointer; | |
2331 | ||
4fe34cdc JM |
2332 | if (!TYPE_NO_NAMED_ARGS_STDARG_P (TREE_TYPE (current_function_decl)) |
2333 | && targetm.calls.must_pass_in_stack (arg)) | |
e7056ca4 | 2334 | first_reg_offset += rs6000_arg_size (TYPE_MODE (arg.type), arg.type); |
1acf0246 BS |
2335 | } |
2336 | ||
2337 | set = get_varargs_alias_set (); | |
2338 | if (! no_rtl && first_reg_offset < GP_ARG_NUM_REG | |
2339 | && cfun->va_list_gpr_size) | |
2340 | { | |
2341 | int n_gpr, nregs = GP_ARG_NUM_REG - first_reg_offset; | |
2342 | ||
2343 | if (va_list_gpr_counter_field) | |
2344 | /* V4 va_list_gpr_size counts number of registers needed. */ | |
2345 | n_gpr = cfun->va_list_gpr_size; | |
2346 | else | |
2347 | /* char * va_list instead counts number of bytes needed. */ | |
2348 | n_gpr = (cfun->va_list_gpr_size + reg_size - 1) / reg_size; | |
2349 | ||
2350 | if (nregs > n_gpr) | |
2351 | nregs = n_gpr; | |
2352 | ||
2353 | mem = gen_rtx_MEM (BLKmode, | |
2354 | plus_constant (Pmode, save_area, | |
2355 | first_reg_offset * reg_size)); | |
2356 | MEM_NOTRAP_P (mem) = 1; | |
2357 | set_mem_alias_set (mem, set); | |
2358 | set_mem_align (mem, BITS_PER_WORD); | |
2359 | ||
2360 | rs6000_move_block_from_reg (GP_ARG_MIN_REG + first_reg_offset, mem, | |
2361 | nregs); | |
2362 | } | |
2363 | ||
2364 | /* Save FP registers if needed. */ | |
2365 | if (DEFAULT_ABI == ABI_V4 | |
2366 | && TARGET_HARD_FLOAT | |
2367 | && ! no_rtl | |
2368 | && next_cum.fregno <= FP_ARG_V4_MAX_REG | |
2369 | && cfun->va_list_fpr_size) | |
2370 | { | |
2371 | int fregno = next_cum.fregno, nregs; | |
2372 | rtx cr1 = gen_rtx_REG (CCmode, CR1_REGNO); | |
2373 | rtx lab = gen_label_rtx (); | |
2374 | int off = (GP_ARG_NUM_REG * reg_size) + ((fregno - FP_ARG_MIN_REG) | |
2375 | * UNITS_PER_FP_WORD); | |
2376 | ||
2377 | emit_jump_insn | |
2378 | (gen_rtx_SET (pc_rtx, | |
2379 | gen_rtx_IF_THEN_ELSE (VOIDmode, | |
2380 | gen_rtx_NE (VOIDmode, cr1, | |
2381 | const0_rtx), | |
2382 | gen_rtx_LABEL_REF (VOIDmode, lab), | |
2383 | pc_rtx))); | |
2384 | ||
2385 | for (nregs = 0; | |
2386 | fregno <= FP_ARG_V4_MAX_REG && nregs < cfun->va_list_fpr_size; | |
2387 | fregno++, off += UNITS_PER_FP_WORD, nregs++) | |
2388 | { | |
2389 | mem = gen_rtx_MEM (TARGET_HARD_FLOAT ? DFmode : SFmode, | |
2390 | plus_constant (Pmode, save_area, off)); | |
2391 | MEM_NOTRAP_P (mem) = 1; | |
2392 | set_mem_alias_set (mem, set); | |
2393 | set_mem_align (mem, GET_MODE_ALIGNMENT ( | |
2394 | TARGET_HARD_FLOAT ? DFmode : SFmode)); | |
2395 | emit_move_insn (mem, gen_rtx_REG ( | |
2396 | TARGET_HARD_FLOAT ? DFmode : SFmode, fregno)); | |
2397 | } | |
2398 | ||
2399 | emit_label (lab); | |
2400 | } | |
2401 | } | |
2402 | ||
2403 | /* Create the va_list data type. */ | |
2404 | ||
2405 | tree | |
2406 | rs6000_build_builtin_va_list (void) | |
2407 | { | |
2408 | tree f_gpr, f_fpr, f_res, f_ovf, f_sav, record, type_decl; | |
2409 | ||
2410 | /* For AIX, prefer 'char *' because that's what the system | |
2411 | header files like. */ | |
2412 | if (DEFAULT_ABI != ABI_V4) | |
2413 | return build_pointer_type (char_type_node); | |
2414 | ||
2415 | record = (*lang_hooks.types.make_type) (RECORD_TYPE); | |
2416 | type_decl = build_decl (BUILTINS_LOCATION, TYPE_DECL, | |
2417 | get_identifier ("__va_list_tag"), record); | |
2418 | ||
2419 | f_gpr = build_decl (BUILTINS_LOCATION, FIELD_DECL, get_identifier ("gpr"), | |
2420 | unsigned_char_type_node); | |
2421 | f_fpr = build_decl (BUILTINS_LOCATION, FIELD_DECL, get_identifier ("fpr"), | |
2422 | unsigned_char_type_node); | |
2423 | /* Give the two bytes of padding a name, so that -Wpadded won't warn on | |
2424 | every user file. */ | |
2425 | f_res = build_decl (BUILTINS_LOCATION, FIELD_DECL, | |
2426 | get_identifier ("reserved"), short_unsigned_type_node); | |
2427 | f_ovf = build_decl (BUILTINS_LOCATION, FIELD_DECL, | |
2428 | get_identifier ("overflow_arg_area"), | |
2429 | ptr_type_node); | |
2430 | f_sav = build_decl (BUILTINS_LOCATION, FIELD_DECL, | |
2431 | get_identifier ("reg_save_area"), | |
2432 | ptr_type_node); | |
2433 | ||
2434 | va_list_gpr_counter_field = f_gpr; | |
2435 | va_list_fpr_counter_field = f_fpr; | |
2436 | ||
2437 | DECL_FIELD_CONTEXT (f_gpr) = record; | |
2438 | DECL_FIELD_CONTEXT (f_fpr) = record; | |
2439 | DECL_FIELD_CONTEXT (f_res) = record; | |
2440 | DECL_FIELD_CONTEXT (f_ovf) = record; | |
2441 | DECL_FIELD_CONTEXT (f_sav) = record; | |
2442 | ||
2443 | TYPE_STUB_DECL (record) = type_decl; | |
2444 | TYPE_NAME (record) = type_decl; | |
2445 | TYPE_FIELDS (record) = f_gpr; | |
2446 | DECL_CHAIN (f_gpr) = f_fpr; | |
2447 | DECL_CHAIN (f_fpr) = f_res; | |
2448 | DECL_CHAIN (f_res) = f_ovf; | |
2449 | DECL_CHAIN (f_ovf) = f_sav; | |
2450 | ||
2451 | layout_type (record); | |
2452 | ||
2453 | /* The correct type is an array type of one element. */ | |
2454 | return build_array_type (record, build_index_type (size_zero_node)); | |
2455 | } | |
2456 | ||
2457 | /* Implement va_start. */ | |
2458 | ||
2459 | void | |
2460 | rs6000_va_start (tree valist, rtx nextarg) | |
2461 | { | |
2462 | HOST_WIDE_INT words, n_gpr, n_fpr; | |
2463 | tree f_gpr, f_fpr, f_res, f_ovf, f_sav; | |
2464 | tree gpr, fpr, ovf, sav, t; | |
2465 | ||
2466 | /* Only SVR4 needs something special. */ | |
2467 | if (DEFAULT_ABI != ABI_V4) | |
2468 | { | |
2469 | std_expand_builtin_va_start (valist, nextarg); | |
2470 | return; | |
2471 | } | |
2472 | ||
2473 | f_gpr = TYPE_FIELDS (TREE_TYPE (va_list_type_node)); | |
2474 | f_fpr = DECL_CHAIN (f_gpr); | |
2475 | f_res = DECL_CHAIN (f_fpr); | |
2476 | f_ovf = DECL_CHAIN (f_res); | |
2477 | f_sav = DECL_CHAIN (f_ovf); | |
2478 | ||
2479 | valist = build_simple_mem_ref (valist); | |
2480 | gpr = build3 (COMPONENT_REF, TREE_TYPE (f_gpr), valist, f_gpr, NULL_TREE); | |
2481 | fpr = build3 (COMPONENT_REF, TREE_TYPE (f_fpr), unshare_expr (valist), | |
2482 | f_fpr, NULL_TREE); | |
2483 | ovf = build3 (COMPONENT_REF, TREE_TYPE (f_ovf), unshare_expr (valist), | |
2484 | f_ovf, NULL_TREE); | |
2485 | sav = build3 (COMPONENT_REF, TREE_TYPE (f_sav), unshare_expr (valist), | |
2486 | f_sav, NULL_TREE); | |
2487 | ||
2488 | /* Count number of gp and fp argument registers used. */ | |
2489 | words = crtl->args.info.words; | |
2490 | n_gpr = MIN (crtl->args.info.sysv_gregno - GP_ARG_MIN_REG, | |
2491 | GP_ARG_NUM_REG); | |
2492 | n_fpr = MIN (crtl->args.info.fregno - FP_ARG_MIN_REG, | |
2493 | FP_ARG_NUM_REG); | |
2494 | ||
2495 | if (TARGET_DEBUG_ARG) | |
2496 | fprintf (stderr, "va_start: words = " HOST_WIDE_INT_PRINT_DEC", n_gpr = " | |
2497 | HOST_WIDE_INT_PRINT_DEC", n_fpr = " HOST_WIDE_INT_PRINT_DEC"\n", | |
2498 | words, n_gpr, n_fpr); | |
2499 | ||
2500 | if (cfun->va_list_gpr_size) | |
2501 | { | |
2502 | t = build2 (MODIFY_EXPR, TREE_TYPE (gpr), gpr, | |
2503 | build_int_cst (NULL_TREE, n_gpr)); | |
2504 | TREE_SIDE_EFFECTS (t) = 1; | |
2505 | expand_expr (t, const0_rtx, VOIDmode, EXPAND_NORMAL); | |
2506 | } | |
2507 | ||
2508 | if (cfun->va_list_fpr_size) | |
2509 | { | |
2510 | t = build2 (MODIFY_EXPR, TREE_TYPE (fpr), fpr, | |
2511 | build_int_cst (NULL_TREE, n_fpr)); | |
2512 | TREE_SIDE_EFFECTS (t) = 1; | |
2513 | expand_expr (t, const0_rtx, VOIDmode, EXPAND_NORMAL); | |
2514 | ||
2515 | #ifdef HAVE_AS_GNU_ATTRIBUTE | |
2516 | if (call_ABI_of_interest (cfun->decl)) | |
2517 | rs6000_passes_float = true; | |
2518 | #endif | |
2519 | } | |
2520 | ||
2521 | /* Find the overflow area. */ | |
2522 | t = make_tree (TREE_TYPE (ovf), crtl->args.internal_arg_pointer); | |
2523 | if (words != 0) | |
2524 | t = fold_build_pointer_plus_hwi (t, words * MIN_UNITS_PER_WORD); | |
2525 | t = build2 (MODIFY_EXPR, TREE_TYPE (ovf), ovf, t); | |
2526 | TREE_SIDE_EFFECTS (t) = 1; | |
2527 | expand_expr (t, const0_rtx, VOIDmode, EXPAND_NORMAL); | |
2528 | ||
2529 | /* If there were no va_arg invocations, don't set up the register | |
2530 | save area. */ | |
2531 | if (!cfun->va_list_gpr_size | |
2532 | && !cfun->va_list_fpr_size | |
2533 | && n_gpr < GP_ARG_NUM_REG | |
2534 | && n_fpr < FP_ARG_V4_MAX_REG) | |
2535 | return; | |
2536 | ||
2537 | /* Find the register save area. */ | |
2538 | t = make_tree (TREE_TYPE (sav), virtual_stack_vars_rtx); | |
2539 | if (cfun->machine->varargs_save_offset) | |
2540 | t = fold_build_pointer_plus_hwi (t, cfun->machine->varargs_save_offset); | |
2541 | t = build2 (MODIFY_EXPR, TREE_TYPE (sav), sav, t); | |
2542 | TREE_SIDE_EFFECTS (t) = 1; | |
2543 | expand_expr (t, const0_rtx, VOIDmode, EXPAND_NORMAL); | |
2544 | } | |
2545 | ||
2546 | /* Implement va_arg. */ | |
2547 | ||
2548 | tree | |
2549 | rs6000_gimplify_va_arg (tree valist, tree type, gimple_seq *pre_p, | |
2550 | gimple_seq *post_p) | |
2551 | { | |
2552 | tree f_gpr, f_fpr, f_res, f_ovf, f_sav; | |
2553 | tree gpr, fpr, ovf, sav, reg, t, u; | |
2554 | int size, rsize, n_reg, sav_ofs, sav_scale; | |
2555 | tree lab_false, lab_over, addr; | |
2556 | int align; | |
2557 | tree ptrtype = build_pointer_type_for_mode (type, ptr_mode, true); | |
2558 | int regalign = 0; | |
2559 | gimple *stmt; | |
2560 | ||
fde65a89 | 2561 | if (pass_va_arg_by_reference (type)) |
1acf0246 BS |
2562 | { |
2563 | t = rs6000_gimplify_va_arg (valist, ptrtype, pre_p, post_p); | |
2564 | return build_va_arg_indirect_ref (t); | |
2565 | } | |
2566 | ||
2567 | /* We need to deal with the fact that the darwin ppc64 ABI is defined by an | |
2568 | earlier version of gcc, with the property that it always applied alignment | |
2569 | adjustments to the va-args (even for zero-sized types). The cheapest way | |
2570 | to deal with this is to replicate the effect of the part of | |
2571 | std_gimplify_va_arg_expr that carries out the align adjust, for the case | |
2572 | of relevance. | |
2573 | We don't need to check for pass-by-reference because of the test above. | |
2574 | We can return a simplifed answer, since we know there's no offset to add. */ | |
2575 | ||
2576 | if (((TARGET_MACHO | |
2577 | && rs6000_darwin64_abi) | |
2578 | || DEFAULT_ABI == ABI_ELFv2 | |
2579 | || (DEFAULT_ABI == ABI_AIX && !rs6000_compat_align_parm)) | |
2580 | && integer_zerop (TYPE_SIZE (type))) | |
2581 | { | |
2582 | unsigned HOST_WIDE_INT align, boundary; | |
2583 | tree valist_tmp = get_initialized_tmp_var (valist, pre_p, NULL); | |
2584 | align = PARM_BOUNDARY / BITS_PER_UNIT; | |
2585 | boundary = rs6000_function_arg_boundary (TYPE_MODE (type), type); | |
2586 | if (boundary > MAX_SUPPORTED_STACK_ALIGNMENT) | |
2587 | boundary = MAX_SUPPORTED_STACK_ALIGNMENT; | |
2588 | boundary /= BITS_PER_UNIT; | |
2589 | if (boundary > align) | |
2590 | { | |
2591 | tree t ; | |
2592 | /* This updates arg ptr by the amount that would be necessary | |
2593 | to align the zero-sized (but not zero-alignment) item. */ | |
2594 | t = build2 (MODIFY_EXPR, TREE_TYPE (valist), valist_tmp, | |
2595 | fold_build_pointer_plus_hwi (valist_tmp, boundary - 1)); | |
2596 | gimplify_and_add (t, pre_p); | |
2597 | ||
2598 | t = fold_convert (sizetype, valist_tmp); | |
2599 | t = build2 (MODIFY_EXPR, TREE_TYPE (valist), valist_tmp, | |
2600 | fold_convert (TREE_TYPE (valist), | |
2601 | fold_build2 (BIT_AND_EXPR, sizetype, t, | |
2602 | size_int (-boundary)))); | |
2603 | t = build2 (MODIFY_EXPR, TREE_TYPE (valist), valist, t); | |
2604 | gimplify_and_add (t, pre_p); | |
2605 | } | |
2606 | /* Since it is zero-sized there's no increment for the item itself. */ | |
2607 | valist_tmp = fold_convert (build_pointer_type (type), valist_tmp); | |
2608 | return build_va_arg_indirect_ref (valist_tmp); | |
2609 | } | |
2610 | ||
2611 | if (DEFAULT_ABI != ABI_V4) | |
2612 | { | |
2613 | if (targetm.calls.split_complex_arg && TREE_CODE (type) == COMPLEX_TYPE) | |
2614 | { | |
2615 | tree elem_type = TREE_TYPE (type); | |
2616 | machine_mode elem_mode = TYPE_MODE (elem_type); | |
2617 | int elem_size = GET_MODE_SIZE (elem_mode); | |
2618 | ||
2619 | if (elem_size < UNITS_PER_WORD) | |
2620 | { | |
2621 | tree real_part, imag_part; | |
2622 | gimple_seq post = NULL; | |
2623 | ||
2624 | real_part = rs6000_gimplify_va_arg (valist, elem_type, pre_p, | |
2625 | &post); | |
2626 | /* Copy the value into a temporary, lest the formal temporary | |
2627 | be reused out from under us. */ | |
2628 | real_part = get_initialized_tmp_var (real_part, pre_p, &post); | |
2629 | gimple_seq_add_seq (pre_p, post); | |
2630 | ||
2631 | imag_part = rs6000_gimplify_va_arg (valist, elem_type, pre_p, | |
2632 | post_p); | |
2633 | ||
2634 | return build2 (COMPLEX_EXPR, type, real_part, imag_part); | |
2635 | } | |
2636 | } | |
2637 | ||
2638 | return std_gimplify_va_arg_expr (valist, type, pre_p, post_p); | |
2639 | } | |
2640 | ||
2641 | f_gpr = TYPE_FIELDS (TREE_TYPE (va_list_type_node)); | |
2642 | f_fpr = DECL_CHAIN (f_gpr); | |
2643 | f_res = DECL_CHAIN (f_fpr); | |
2644 | f_ovf = DECL_CHAIN (f_res); | |
2645 | f_sav = DECL_CHAIN (f_ovf); | |
2646 | ||
2647 | gpr = build3 (COMPONENT_REF, TREE_TYPE (f_gpr), valist, f_gpr, NULL_TREE); | |
2648 | fpr = build3 (COMPONENT_REF, TREE_TYPE (f_fpr), unshare_expr (valist), | |
2649 | f_fpr, NULL_TREE); | |
2650 | ovf = build3 (COMPONENT_REF, TREE_TYPE (f_ovf), unshare_expr (valist), | |
2651 | f_ovf, NULL_TREE); | |
2652 | sav = build3 (COMPONENT_REF, TREE_TYPE (f_sav), unshare_expr (valist), | |
2653 | f_sav, NULL_TREE); | |
2654 | ||
2655 | size = int_size_in_bytes (type); | |
2656 | rsize = (size + 3) / 4; | |
2657 | int pad = 4 * rsize - size; | |
2658 | align = 1; | |
2659 | ||
2660 | machine_mode mode = TYPE_MODE (type); | |
2661 | if (abi_v4_pass_in_fpr (mode, false)) | |
2662 | { | |
2663 | /* FP args go in FP registers, if present. */ | |
2664 | reg = fpr; | |
2665 | n_reg = (size + 7) / 8; | |
2666 | sav_ofs = (TARGET_HARD_FLOAT ? 8 : 4) * 4; | |
2667 | sav_scale = (TARGET_HARD_FLOAT ? 8 : 4); | |
2668 | if (mode != SFmode && mode != SDmode) | |
2669 | align = 8; | |
2670 | } | |
2671 | else | |
2672 | { | |
2673 | /* Otherwise into GP registers. */ | |
2674 | reg = gpr; | |
2675 | n_reg = rsize; | |
2676 | sav_ofs = 0; | |
2677 | sav_scale = 4; | |
2678 | if (n_reg == 2) | |
2679 | align = 8; | |
2680 | } | |
2681 | ||
2682 | /* Pull the value out of the saved registers.... */ | |
2683 | ||
2684 | lab_over = NULL; | |
2685 | addr = create_tmp_var (ptr_type_node, "addr"); | |
2686 | ||
2687 | /* AltiVec vectors never go in registers when -mabi=altivec. */ | |
2688 | if (TARGET_ALTIVEC_ABI && ALTIVEC_VECTOR_MODE (mode)) | |
2689 | align = 16; | |
2690 | else | |
2691 | { | |
2692 | lab_false = create_artificial_label (input_location); | |
2693 | lab_over = create_artificial_label (input_location); | |
2694 | ||
2695 | /* Long long is aligned in the registers. As are any other 2 gpr | |
2696 | item such as complex int due to a historical mistake. */ | |
2697 | u = reg; | |
2698 | if (n_reg == 2 && reg == gpr) | |
2699 | { | |
2700 | regalign = 1; | |
2701 | u = build2 (BIT_AND_EXPR, TREE_TYPE (reg), unshare_expr (reg), | |
2702 | build_int_cst (TREE_TYPE (reg), n_reg - 1)); | |
2703 | u = build2 (POSTINCREMENT_EXPR, TREE_TYPE (reg), | |
2704 | unshare_expr (reg), u); | |
2705 | } | |
2706 | /* _Decimal128 is passed in even/odd fpr pairs; the stored | |
2707 | reg number is 0 for f1, so we want to make it odd. */ | |
2708 | else if (reg == fpr && mode == TDmode) | |
2709 | { | |
2710 | t = build2 (BIT_IOR_EXPR, TREE_TYPE (reg), unshare_expr (reg), | |
2711 | build_int_cst (TREE_TYPE (reg), 1)); | |
2712 | u = build2 (MODIFY_EXPR, void_type_node, unshare_expr (reg), t); | |
2713 | } | |
2714 | ||
2715 | t = fold_convert (TREE_TYPE (reg), size_int (8 - n_reg + 1)); | |
2716 | t = build2 (GE_EXPR, boolean_type_node, u, t); | |
2717 | u = build1 (GOTO_EXPR, void_type_node, lab_false); | |
2718 | t = build3 (COND_EXPR, void_type_node, t, u, NULL_TREE); | |
2719 | gimplify_and_add (t, pre_p); | |
2720 | ||
2721 | t = sav; | |
2722 | if (sav_ofs) | |
2723 | t = fold_build_pointer_plus_hwi (sav, sav_ofs); | |
2724 | ||
2725 | u = build2 (POSTINCREMENT_EXPR, TREE_TYPE (reg), unshare_expr (reg), | |
2726 | build_int_cst (TREE_TYPE (reg), n_reg)); | |
2727 | u = fold_convert (sizetype, u); | |
2728 | u = build2 (MULT_EXPR, sizetype, u, size_int (sav_scale)); | |
2729 | t = fold_build_pointer_plus (t, u); | |
2730 | ||
2731 | /* _Decimal32 varargs are located in the second word of the 64-bit | |
2732 | FP register for 32-bit binaries. */ | |
2733 | if (TARGET_32BIT && TARGET_HARD_FLOAT && mode == SDmode) | |
2734 | t = fold_build_pointer_plus_hwi (t, size); | |
2735 | ||
2736 | /* Args are passed right-aligned. */ | |
2737 | if (BYTES_BIG_ENDIAN) | |
2738 | t = fold_build_pointer_plus_hwi (t, pad); | |
2739 | ||
2740 | gimplify_assign (addr, t, pre_p); | |
2741 | ||
2742 | gimple_seq_add_stmt (pre_p, gimple_build_goto (lab_over)); | |
2743 | ||
2744 | stmt = gimple_build_label (lab_false); | |
2745 | gimple_seq_add_stmt (pre_p, stmt); | |
2746 | ||
2747 | if ((n_reg == 2 && !regalign) || n_reg > 2) | |
2748 | { | |
2749 | /* Ensure that we don't find any more args in regs. | |
2750 | Alignment has taken care of for special cases. */ | |
2751 | gimplify_assign (reg, build_int_cst (TREE_TYPE (reg), 8), pre_p); | |
2752 | } | |
2753 | } | |
2754 | ||
2755 | /* ... otherwise out of the overflow area. */ | |
2756 | ||
2757 | /* Care for on-stack alignment if needed. */ | |
2758 | t = ovf; | |
2759 | if (align != 1) | |
2760 | { | |
2761 | t = fold_build_pointer_plus_hwi (t, align - 1); | |
2762 | t = build2 (BIT_AND_EXPR, TREE_TYPE (t), t, | |
2763 | build_int_cst (TREE_TYPE (t), -align)); | |
2764 | } | |
2765 | ||
2766 | /* Args are passed right-aligned. */ | |
2767 | if (BYTES_BIG_ENDIAN) | |
2768 | t = fold_build_pointer_plus_hwi (t, pad); | |
2769 | ||
2770 | gimplify_expr (&t, pre_p, NULL, is_gimple_val, fb_rvalue); | |
2771 | ||
2772 | gimplify_assign (unshare_expr (addr), t, pre_p); | |
2773 | ||
2774 | t = fold_build_pointer_plus_hwi (t, size); | |
2775 | gimplify_assign (unshare_expr (ovf), t, pre_p); | |
2776 | ||
2777 | if (lab_over) | |
2778 | { | |
2779 | stmt = gimple_build_label (lab_over); | |
2780 | gimple_seq_add_stmt (pre_p, stmt); | |
2781 | } | |
2782 | ||
2783 | if (STRICT_ALIGNMENT | |
2784 | && (TYPE_ALIGN (type) | |
2785 | > (unsigned) BITS_PER_UNIT * (align < 4 ? 4 : align))) | |
2786 | { | |
2787 | /* The value (of type complex double, for example) may not be | |
2788 | aligned in memory in the saved registers, so copy via a | |
2789 | temporary. (This is the same code as used for SPARC.) */ | |
2790 | tree tmp = create_tmp_var (type, "va_arg_tmp"); | |
2791 | tree dest_addr = build_fold_addr_expr (tmp); | |
2792 | ||
2793 | tree copy = build_call_expr (builtin_decl_implicit (BUILT_IN_MEMCPY), | |
2794 | 3, dest_addr, addr, size_int (rsize * 4)); | |
2795 | TREE_ADDRESSABLE (tmp) = 1; | |
2796 | ||
2797 | gimplify_and_add (copy, pre_p); | |
2798 | addr = dest_addr; | |
2799 | } | |
2800 | ||
2801 | addr = fold_convert (ptrtype, addr); | |
2802 | return build_va_arg_indirect_ref (addr); | |
2803 | } | |
2804 | ||
125f294e HG |
2805 | /* Return the permutation index for the swapping on the given vector mode. |
2806 | Note that the permutation index is correspondingly generated by endianness, | |
2807 | it should be used by direct vector permutation. */ | |
2808 | ||
2cf62ef5 BS |
2809 | rtx |
2810 | swap_endian_selector_for_mode (machine_mode mode) | |
1acf0246 | 2811 | { |
2cf62ef5 BS |
2812 | unsigned int swap1[16] = {15,14,13,12,11,10,9,8,7,6,5,4,3,2,1,0}; |
2813 | unsigned int swap2[16] = {7,6,5,4,3,2,1,0,15,14,13,12,11,10,9,8}; | |
2814 | unsigned int swap4[16] = {3,2,1,0,7,6,5,4,11,10,9,8,15,14,13,12}; | |
2815 | unsigned int swap8[16] = {1,0,3,2,5,4,7,6,9,8,11,10,13,12,15,14}; | |
1acf0246 | 2816 | |
2cf62ef5 BS |
2817 | unsigned int *swaparray, i; |
2818 | rtx perm[16]; | |
1acf0246 | 2819 | |
2cf62ef5 | 2820 | switch (mode) |
1acf0246 | 2821 | { |
2cf62ef5 BS |
2822 | case E_V1TImode: |
2823 | swaparray = swap1; | |
2824 | break; | |
2825 | case E_V2DFmode: | |
2826 | case E_V2DImode: | |
2827 | swaparray = swap2; | |
2828 | break; | |
2829 | case E_V4SFmode: | |
2830 | case E_V4SImode: | |
2831 | swaparray = swap4; | |
2832 | break; | |
2833 | case E_V8HImode: | |
2834 | swaparray = swap8; | |
2835 | break; | |
2836 | default: | |
2837 | gcc_unreachable (); | |
1acf0246 BS |
2838 | } |
2839 | ||
2cf62ef5 | 2840 | for (i = 0; i < 16; ++i) |
9d68cba5 HG |
2841 | if (BYTES_BIG_ENDIAN) |
2842 | perm[i] = GEN_INT (swaparray[i]); | |
2843 | else | |
2844 | /* Generates the reversed perm for little endian. */ | |
2845 | perm[i] = GEN_INT (~swaparray[i] & 0x0000001f); | |
1acf0246 | 2846 | |
2cf62ef5 BS |
2847 | return force_reg (V16QImode, gen_rtx_CONST_VECTOR (V16QImode, |
2848 | gen_rtvec_v (16, perm))); | |
2849 | } | |
1acf0246 | 2850 | |
1acf0246 BS |
2851 | /* Return the internal arg pointer used for function incoming |
2852 | arguments. When -fsplit-stack, the arg pointer is r12 so we need | |
2853 | to copy it to a pseudo in order for it to be preserved over calls | |
2854 | and suchlike. We'd really like to use a pseudo here for the | |
2855 | internal arg pointer but data-flow analysis is not prepared to | |
2856 | accept pseudos as live at the beginning of a function. */ | |
2857 | ||
2858 | rtx | |
2859 | rs6000_internal_arg_pointer (void) | |
2860 | { | |
2861 | if (flag_split_stack | |
2862 | && (lookup_attribute ("no_split_stack", DECL_ATTRIBUTES (cfun->decl)) | |
2863 | == NULL)) | |
2864 | ||
2865 | { | |
2866 | if (cfun->machine->split_stack_arg_pointer == NULL_RTX) | |
2867 | { | |
2868 | rtx pat; | |
2869 | ||
2870 | cfun->machine->split_stack_arg_pointer = gen_reg_rtx (Pmode); | |
2871 | REG_POINTER (cfun->machine->split_stack_arg_pointer) = 1; | |
2872 | ||
2873 | /* Put the pseudo initialization right after the note at the | |
2874 | beginning of the function. */ | |
2875 | pat = gen_rtx_SET (cfun->machine->split_stack_arg_pointer, | |
2876 | gen_rtx_REG (Pmode, 12)); | |
2877 | push_topmost_sequence (); | |
2878 | emit_insn_after (pat, get_insns ()); | |
2879 | pop_topmost_sequence (); | |
2880 | } | |
2881 | rtx ret = plus_constant (Pmode, cfun->machine->split_stack_arg_pointer, | |
2882 | FIRST_PARM_OFFSET (current_function_decl)); | |
2883 | return copy_to_reg (ret); | |
2884 | } | |
2885 | return virtual_incoming_args_rtx; | |
2886 | } | |
2887 | ||
2888 | \f | |
2889 | /* A C compound statement that outputs the assembler code for a thunk | |
2890 | function, used to implement C++ virtual function calls with | |
2891 | multiple inheritance. The thunk acts as a wrapper around a virtual | |
2892 | function, adjusting the implicit object parameter before handing | |
2893 | control off to the real function. | |
2894 | ||
2895 | First, emit code to add the integer DELTA to the location that | |
2896 | contains the incoming first argument. Assume that this argument | |
2897 | contains a pointer, and is the one used to pass the `this' pointer | |
2898 | in C++. This is the incoming argument *before* the function | |
2899 | prologue, e.g. `%o0' on a sparc. The addition must preserve the | |
2900 | values of all other incoming arguments. | |
2901 | ||
2902 | After the addition, emit code to jump to FUNCTION, which is a | |
2903 | `FUNCTION_DECL'. This is a direct pure jump, not a call, and does | |
2904 | not touch the return address. Hence returning from FUNCTION will | |
2905 | return to whoever called the current `thunk'. | |
2906 | ||
2907 | The effect must be as if FUNCTION had been called directly with the | |
2908 | adjusted first argument. This macro is responsible for emitting | |
2909 | all of the code for a thunk function; output_function_prologue() | |
2910 | and output_function_epilogue() are not invoked. | |
2911 | ||
2912 | The THUNK_FNDECL is redundant. (DELTA and FUNCTION have already | |
2913 | been extracted from it.) It might possibly be useful on some | |
2914 | targets, but probably not. | |
2915 | ||
2916 | If you do not define this macro, the target-independent code in the | |
2917 | C++ frontend will generate a less efficient heavyweight thunk that | |
2918 | calls FUNCTION instead of jumping to it. The generic approach does | |
2919 | not support varargs. */ | |
2920 | ||
2921 | void | |
2922 | rs6000_output_mi_thunk (FILE *file, tree thunk_fndecl ATTRIBUTE_UNUSED, | |
2923 | HOST_WIDE_INT delta, HOST_WIDE_INT vcall_offset, | |
2924 | tree function) | |
2925 | { | |
8b5b814d | 2926 | const char *fnname = get_fnname_from_decl (thunk_fndecl); |
1acf0246 BS |
2927 | rtx this_rtx, funexp; |
2928 | rtx_insn *insn; | |
2929 | ||
2930 | reload_completed = 1; | |
2931 | epilogue_completed = 1; | |
2932 | ||
2933 | /* Mark the end of the (empty) prologue. */ | |
2934 | emit_note (NOTE_INSN_PROLOGUE_END); | |
2935 | ||
2936 | /* Find the "this" pointer. If the function returns a structure, | |
2937 | the structure return pointer is in r3. */ | |
2938 | if (aggregate_value_p (TREE_TYPE (TREE_TYPE (function)), function)) | |
2939 | this_rtx = gen_rtx_REG (Pmode, 4); | |
2940 | else | |
2941 | this_rtx = gen_rtx_REG (Pmode, 3); | |
2942 | ||
2943 | /* Apply the constant offset, if required. */ | |
2944 | if (delta) | |
2945 | emit_insn (gen_add3_insn (this_rtx, this_rtx, GEN_INT (delta))); | |
2946 | ||
2947 | /* Apply the offset from the vtable, if required. */ | |
2948 | if (vcall_offset) | |
2949 | { | |
2950 | rtx vcall_offset_rtx = GEN_INT (vcall_offset); | |
2951 | rtx tmp = gen_rtx_REG (Pmode, 12); | |
2952 | ||
2953 | emit_move_insn (tmp, gen_rtx_MEM (Pmode, this_rtx)); | |
2954 | if (((unsigned HOST_WIDE_INT) vcall_offset) + 0x8000 >= 0x10000) | |
2955 | { | |
2956 | emit_insn (gen_add3_insn (tmp, tmp, vcall_offset_rtx)); | |
2957 | emit_move_insn (tmp, gen_rtx_MEM (Pmode, tmp)); | |
2958 | } | |
2959 | else | |
2960 | { | |
2961 | rtx loc = gen_rtx_PLUS (Pmode, tmp, vcall_offset_rtx); | |
2962 | ||
2963 | emit_move_insn (tmp, gen_rtx_MEM (Pmode, loc)); | |
2964 | } | |
2965 | emit_insn (gen_add3_insn (this_rtx, this_rtx, tmp)); | |
2966 | } | |
2967 | ||
2968 | /* Generate a tail call to the target function. */ | |
2969 | if (!TREE_USED (function)) | |
2970 | { | |
2971 | assemble_external (function); | |
2972 | TREE_USED (function) = 1; | |
2973 | } | |
2974 | funexp = XEXP (DECL_RTL (function), 0); | |
2975 | funexp = gen_rtx_MEM (FUNCTION_MODE, funexp); | |
2976 | ||
aef57966 | 2977 | insn = emit_call_insn (gen_sibcall (funexp, const0_rtx, const0_rtx)); |
1acf0246 BS |
2978 | SIBLING_CALL_P (insn) = 1; |
2979 | emit_barrier (); | |
2980 | ||
2981 | /* Run just enough of rest_of_compilation to get the insns emitted. | |
2982 | There's not really enough bulk here to make other passes such as | |
2983 | instruction scheduling worth while. */ | |
2984 | insn = get_insns (); | |
2985 | shorten_branches (insn); | |
2986 | assemble_start_function (thunk_fndecl, fnname); | |
2987 | final_start_function (insn, file, 1); | |
2988 | final (insn, file, 1); | |
2989 | final_end_function (); | |
2990 | assemble_end_function (thunk_fndecl, fnname); | |
2991 | ||
2992 | reload_completed = 0; | |
2993 | epilogue_completed = 0; | |
2994 | } |