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3cf2715d | 1 | /* Convert RTL to assembler code and output it, for GNU compiler. |
cbe34bb5 | 2 | Copyright (C) 1987-2017 Free Software Foundation, Inc. |
3cf2715d | 3 | |
1322177d | 4 | This file is part of GCC. |
3cf2715d | 5 | |
1322177d LB |
6 | GCC is free software; you can redistribute it and/or modify it under |
7 | the terms of the GNU General Public License as published by the Free | |
9dcd6f09 | 8 | Software Foundation; either version 3, or (at your option) any later |
1322177d | 9 | version. |
3cf2715d | 10 | |
1322177d LB |
11 | GCC is distributed in the hope that it will be useful, but WITHOUT ANY |
12 | WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
13 | FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License | |
14 | for more details. | |
3cf2715d DE |
15 | |
16 | You should have received a copy of the GNU General Public License | |
9dcd6f09 NC |
17 | along with GCC; see the file COPYING3. If not see |
18 | <http://www.gnu.org/licenses/>. */ | |
3cf2715d | 19 | |
3cf2715d DE |
20 | /* This is the final pass of the compiler. |
21 | It looks at the rtl code for a function and outputs assembler code. | |
22 | ||
23 | Call `final_start_function' to output the assembler code for function entry, | |
24 | `final' to output assembler code for some RTL code, | |
25 | `final_end_function' to output assembler code for function exit. | |
26 | If a function is compiled in several pieces, each piece is | |
27 | output separately with `final'. | |
28 | ||
29 | Some optimizations are also done at this level. | |
30 | Move instructions that were made unnecessary by good register allocation | |
31 | are detected and omitted from the output. (Though most of these | |
32 | are removed by the last jump pass.) | |
33 | ||
34 | Instructions to set the condition codes are omitted when it can be | |
35 | seen that the condition codes already had the desired values. | |
36 | ||
37 | In some cases it is sufficient if the inherited condition codes | |
38 | have related values, but this may require the following insn | |
39 | (the one that tests the condition codes) to be modified. | |
40 | ||
41 | The code for the function prologue and epilogue are generated | |
08c148a8 NB |
42 | directly in assembler by the target functions function_prologue and |
43 | function_epilogue. Those instructions never exist as rtl. */ | |
3cf2715d DE |
44 | |
45 | #include "config.h" | |
01736018 | 46 | #define INCLUDE_ALGORITHM /* reverse */ |
670ee920 | 47 | #include "system.h" |
4977bab6 | 48 | #include "coretypes.h" |
c7131fb2 | 49 | #include "backend.h" |
957060b5 | 50 | #include "target.h" |
3cf2715d | 51 | #include "rtl.h" |
957060b5 AM |
52 | #include "tree.h" |
53 | #include "cfghooks.h" | |
c7131fb2 | 54 | #include "df.h" |
4d0cdd0c | 55 | #include "memmodel.h" |
6baf1cc8 | 56 | #include "tm_p.h" |
3cf2715d | 57 | #include "insn-config.h" |
957060b5 AM |
58 | #include "regs.h" |
59 | #include "emit-rtl.h" | |
3cf2715d | 60 | #include "recog.h" |
957060b5 | 61 | #include "cgraph.h" |
957060b5 | 62 | #include "tree-pretty-print.h" /* for dump_function_header */ |
957060b5 AM |
63 | #include "varasm.h" |
64 | #include "insn-attr.h" | |
3cf2715d DE |
65 | #include "conditions.h" |
66 | #include "flags.h" | |
3cf2715d | 67 | #include "output.h" |
3d195391 | 68 | #include "except.h" |
0cbd9993 MLI |
69 | #include "rtl-error.h" |
70 | #include "toplev.h" /* exact_log2, floor_log2 */ | |
d6f4ec51 | 71 | #include "reload.h" |
ab87f8c8 | 72 | #include "intl.h" |
60393bbc | 73 | #include "cfgrtl.h" |
a5a42b92 | 74 | #include "debug.h" |
ef330312 | 75 | #include "tree-pass.h" |
442b4905 | 76 | #include "tree-ssa.h" |
edbed3d3 JH |
77 | #include "cfgloop.h" |
78 | #include "params.h" | |
314e6352 ML |
79 | #include "stringpool.h" |
80 | #include "attribs.h" | |
ef1b3fda | 81 | #include "asan.h" |
effb8a26 | 82 | #include "rtl-iter.h" |
013a8899 | 83 | #include "print-rtl.h" |
3cf2715d | 84 | |
440aabf8 | 85 | #ifdef XCOFF_DEBUGGING_INFO |
957060b5 | 86 | #include "xcoffout.h" /* Needed for external data declarations. */ |
440aabf8 NB |
87 | #endif |
88 | ||
76ead72b | 89 | #include "dwarf2out.h" |
76ead72b | 90 | |
6a08f7b3 DP |
91 | #ifdef DBX_DEBUGGING_INFO |
92 | #include "dbxout.h" | |
93 | #endif | |
94 | ||
906668bb BS |
95 | /* Most ports that aren't using cc0 don't need to define CC_STATUS_INIT. |
96 | So define a null default for it to save conditionalization later. */ | |
3cf2715d DE |
97 | #ifndef CC_STATUS_INIT |
98 | #define CC_STATUS_INIT | |
99 | #endif | |
100 | ||
3cf2715d DE |
101 | /* Is the given character a logical line separator for the assembler? */ |
102 | #ifndef IS_ASM_LOGICAL_LINE_SEPARATOR | |
980d8882 | 103 | #define IS_ASM_LOGICAL_LINE_SEPARATOR(C, STR) ((C) == ';') |
3cf2715d DE |
104 | #endif |
105 | ||
75197b37 BS |
106 | #ifndef JUMP_TABLES_IN_TEXT_SECTION |
107 | #define JUMP_TABLES_IN_TEXT_SECTION 0 | |
108 | #endif | |
109 | ||
589fe865 | 110 | /* Bitflags used by final_scan_insn. */ |
70aacc97 JJ |
111 | #define SEEN_NOTE 1 |
112 | #define SEEN_EMITTED 2 | |
589fe865 | 113 | |
3cf2715d | 114 | /* Last insn processed by final_scan_insn. */ |
fa7af581 DM |
115 | static rtx_insn *debug_insn; |
116 | rtx_insn *current_output_insn; | |
3cf2715d DE |
117 | |
118 | /* Line number of last NOTE. */ | |
119 | static int last_linenum; | |
120 | ||
497b7c47 JJ |
121 | /* Column number of last NOTE. */ |
122 | static int last_columnnum; | |
123 | ||
6c52e687 CC |
124 | /* Last discriminator written to assembly. */ |
125 | static int last_discriminator; | |
126 | ||
127 | /* Discriminator of current block. */ | |
128 | static int discriminator; | |
129 | ||
eac40081 RK |
130 | /* Highest line number in current block. */ |
131 | static int high_block_linenum; | |
132 | ||
133 | /* Likewise for function. */ | |
134 | static int high_function_linenum; | |
135 | ||
3cf2715d | 136 | /* Filename of last NOTE. */ |
3cce094d | 137 | static const char *last_filename; |
3cf2715d | 138 | |
497b7c47 | 139 | /* Override filename, line and column number. */ |
d752cfdb JJ |
140 | static const char *override_filename; |
141 | static int override_linenum; | |
497b7c47 | 142 | static int override_columnnum; |
d752cfdb | 143 | |
b8176fe4 EB |
144 | /* Whether to force emission of a line note before the next insn. */ |
145 | static bool force_source_line = false; | |
b0efb46b | 146 | |
5f2f0edd | 147 | extern const int length_unit_log; /* This is defined in insn-attrtab.c. */ |
fc470718 | 148 | |
3cf2715d | 149 | /* Nonzero while outputting an `asm' with operands. |
535a42b1 | 150 | This means that inconsistencies are the user's fault, so don't die. |
3cf2715d | 151 | The precise value is the insn being output, to pass to error_for_asm. */ |
1c22488e | 152 | const rtx_insn *this_is_asm_operands; |
3cf2715d DE |
153 | |
154 | /* Number of operands of this insn, for an `asm' with operands. */ | |
22bf4422 | 155 | static unsigned int insn_noperands; |
3cf2715d DE |
156 | |
157 | /* Compare optimization flag. */ | |
158 | ||
159 | static rtx last_ignored_compare = 0; | |
160 | ||
3cf2715d DE |
161 | /* Assign a unique number to each insn that is output. |
162 | This can be used to generate unique local labels. */ | |
163 | ||
164 | static int insn_counter = 0; | |
165 | ||
3cf2715d DE |
166 | /* This variable contains machine-dependent flags (defined in tm.h) |
167 | set and examined by output routines | |
168 | that describe how to interpret the condition codes properly. */ | |
169 | ||
170 | CC_STATUS cc_status; | |
171 | ||
172 | /* During output of an insn, this contains a copy of cc_status | |
173 | from before the insn. */ | |
174 | ||
175 | CC_STATUS cc_prev_status; | |
3cf2715d | 176 | |
18c038b9 | 177 | /* Number of unmatched NOTE_INSN_BLOCK_BEG notes we have seen. */ |
3cf2715d DE |
178 | |
179 | static int block_depth; | |
180 | ||
181 | /* Nonzero if have enabled APP processing of our assembler output. */ | |
182 | ||
183 | static int app_on; | |
184 | ||
185 | /* If we are outputting an insn sequence, this contains the sequence rtx. | |
186 | Zero otherwise. */ | |
187 | ||
b32d5189 | 188 | rtx_sequence *final_sequence; |
3cf2715d DE |
189 | |
190 | #ifdef ASSEMBLER_DIALECT | |
191 | ||
192 | /* Number of the assembler dialect to use, starting at 0. */ | |
193 | static int dialect_number; | |
194 | #endif | |
195 | ||
afe48e06 RH |
196 | /* Nonnull if the insn currently being emitted was a COND_EXEC pattern. */ |
197 | rtx current_insn_predicate; | |
afe48e06 | 198 | |
6ca5d1f6 JJ |
199 | /* True if printing into -fdump-final-insns= dump. */ |
200 | bool final_insns_dump_p; | |
201 | ||
ddd84654 JJ |
202 | /* True if profile_function should be called, but hasn't been called yet. */ |
203 | static bool need_profile_function; | |
204 | ||
6cf9ac28 | 205 | static int asm_insn_count (rtx); |
6cf9ac28 AJ |
206 | static void profile_function (FILE *); |
207 | static void profile_after_prologue (FILE *); | |
fa7af581 | 208 | static bool notice_source_line (rtx_insn *, bool *); |
6fb5fa3c | 209 | static rtx walk_alter_subreg (rtx *, bool *); |
6cf9ac28 | 210 | static void output_asm_name (void); |
fa7af581 | 211 | static void output_alternate_entry_point (FILE *, rtx_insn *); |
6cf9ac28 AJ |
212 | static tree get_mem_expr_from_op (rtx, int *); |
213 | static void output_asm_operand_names (rtx *, int *, int); | |
e9a25f70 | 214 | #ifdef LEAF_REGISTERS |
fa7af581 | 215 | static void leaf_renumber_regs (rtx_insn *); |
e9a25f70 | 216 | #endif |
f1e52ed6 | 217 | #if HAVE_cc0 |
6cf9ac28 | 218 | static int alter_cond (rtx); |
e9a25f70 | 219 | #endif |
6cf9ac28 | 220 | static int align_fuzz (rtx, rtx, int, unsigned); |
27c07cc5 | 221 | static void collect_fn_hard_reg_usage (void); |
fa7af581 | 222 | static tree get_call_fndecl (rtx_insn *); |
3cf2715d DE |
223 | \f |
224 | /* Initialize data in final at the beginning of a compilation. */ | |
225 | ||
226 | void | |
6cf9ac28 | 227 | init_final (const char *filename ATTRIBUTE_UNUSED) |
3cf2715d | 228 | { |
3cf2715d | 229 | app_on = 0; |
3cf2715d DE |
230 | final_sequence = 0; |
231 | ||
232 | #ifdef ASSEMBLER_DIALECT | |
233 | dialect_number = ASSEMBLER_DIALECT; | |
234 | #endif | |
235 | } | |
236 | ||
08c148a8 | 237 | /* Default target function prologue and epilogue assembler output. |
b9f22704 | 238 | |
08c148a8 NB |
239 | If not overridden for epilogue code, then the function body itself |
240 | contains return instructions wherever needed. */ | |
241 | void | |
42776416 | 242 | default_function_pro_epilogue (FILE *) |
08c148a8 NB |
243 | { |
244 | } | |
245 | ||
14d11d40 IS |
246 | void |
247 | default_function_switched_text_sections (FILE *file ATTRIBUTE_UNUSED, | |
248 | tree decl ATTRIBUTE_UNUSED, | |
249 | bool new_is_cold ATTRIBUTE_UNUSED) | |
250 | { | |
251 | } | |
252 | ||
b4c25db2 NB |
253 | /* Default target hook that outputs nothing to a stream. */ |
254 | void | |
6cf9ac28 | 255 | no_asm_to_stream (FILE *file ATTRIBUTE_UNUSED) |
b4c25db2 NB |
256 | { |
257 | } | |
258 | ||
3cf2715d DE |
259 | /* Enable APP processing of subsequent output. |
260 | Used before the output from an `asm' statement. */ | |
261 | ||
262 | void | |
6cf9ac28 | 263 | app_enable (void) |
3cf2715d DE |
264 | { |
265 | if (! app_on) | |
266 | { | |
51723711 | 267 | fputs (ASM_APP_ON, asm_out_file); |
3cf2715d DE |
268 | app_on = 1; |
269 | } | |
270 | } | |
271 | ||
272 | /* Disable APP processing of subsequent output. | |
273 | Called from varasm.c before most kinds of output. */ | |
274 | ||
275 | void | |
6cf9ac28 | 276 | app_disable (void) |
3cf2715d DE |
277 | { |
278 | if (app_on) | |
279 | { | |
51723711 | 280 | fputs (ASM_APP_OFF, asm_out_file); |
3cf2715d DE |
281 | app_on = 0; |
282 | } | |
283 | } | |
284 | \f | |
f5d927c0 | 285 | /* Return the number of slots filled in the current |
3cf2715d DE |
286 | delayed branch sequence (we don't count the insn needing the |
287 | delay slot). Zero if not in a delayed branch sequence. */ | |
288 | ||
3cf2715d | 289 | int |
6cf9ac28 | 290 | dbr_sequence_length (void) |
3cf2715d DE |
291 | { |
292 | if (final_sequence != 0) | |
293 | return XVECLEN (final_sequence, 0) - 1; | |
294 | else | |
295 | return 0; | |
296 | } | |
3cf2715d DE |
297 | \f |
298 | /* The next two pages contain routines used to compute the length of an insn | |
299 | and to shorten branches. */ | |
300 | ||
301 | /* Arrays for insn lengths, and addresses. The latter is referenced by | |
302 | `insn_current_length'. */ | |
303 | ||
addd7df6 | 304 | static int *insn_lengths; |
9d98a694 | 305 | |
9771b263 | 306 | vec<int> insn_addresses_; |
3cf2715d | 307 | |
ea3cbda5 R |
308 | /* Max uid for which the above arrays are valid. */ |
309 | static int insn_lengths_max_uid; | |
310 | ||
3cf2715d DE |
311 | /* Address of insn being processed. Used by `insn_current_length'. */ |
312 | int insn_current_address; | |
313 | ||
fc470718 R |
314 | /* Address of insn being processed in previous iteration. */ |
315 | int insn_last_address; | |
316 | ||
d6a7951f | 317 | /* known invariant alignment of insn being processed. */ |
fc470718 R |
318 | int insn_current_align; |
319 | ||
95707627 R |
320 | /* After shorten_branches, for any insn, uid_align[INSN_UID (insn)] |
321 | gives the next following alignment insn that increases the known | |
322 | alignment, or NULL_RTX if there is no such insn. | |
323 | For any alignment obtained this way, we can again index uid_align with | |
324 | its uid to obtain the next following align that in turn increases the | |
325 | alignment, till we reach NULL_RTX; the sequence obtained this way | |
326 | for each insn we'll call the alignment chain of this insn in the following | |
327 | comments. */ | |
328 | ||
f5d927c0 KH |
329 | struct label_alignment |
330 | { | |
9e423e6d JW |
331 | short alignment; |
332 | short max_skip; | |
333 | }; | |
334 | ||
335 | static rtx *uid_align; | |
336 | static int *uid_shuid; | |
337 | static struct label_alignment *label_align; | |
95707627 | 338 | |
3cf2715d DE |
339 | /* Indicate that branch shortening hasn't yet been done. */ |
340 | ||
341 | void | |
6cf9ac28 | 342 | init_insn_lengths (void) |
3cf2715d | 343 | { |
95707627 R |
344 | if (uid_shuid) |
345 | { | |
346 | free (uid_shuid); | |
347 | uid_shuid = 0; | |
348 | } | |
349 | if (insn_lengths) | |
350 | { | |
351 | free (insn_lengths); | |
352 | insn_lengths = 0; | |
ea3cbda5 | 353 | insn_lengths_max_uid = 0; |
95707627 | 354 | } |
d327457f JR |
355 | if (HAVE_ATTR_length) |
356 | INSN_ADDRESSES_FREE (); | |
95707627 R |
357 | if (uid_align) |
358 | { | |
359 | free (uid_align); | |
360 | uid_align = 0; | |
361 | } | |
3cf2715d DE |
362 | } |
363 | ||
364 | /* Obtain the current length of an insn. If branch shortening has been done, | |
6fc0bb99 | 365 | get its actual length. Otherwise, use FALLBACK_FN to calculate the |
070a7956 | 366 | length. */ |
4df199d1 | 367 | static int |
84034c69 | 368 | get_attr_length_1 (rtx_insn *insn, int (*fallback_fn) (rtx_insn *)) |
3cf2715d | 369 | { |
3cf2715d DE |
370 | rtx body; |
371 | int i; | |
372 | int length = 0; | |
373 | ||
d327457f JR |
374 | if (!HAVE_ATTR_length) |
375 | return 0; | |
376 | ||
ea3cbda5 | 377 | if (insn_lengths_max_uid > INSN_UID (insn)) |
3cf2715d DE |
378 | return insn_lengths[INSN_UID (insn)]; |
379 | else | |
380 | switch (GET_CODE (insn)) | |
381 | { | |
382 | case NOTE: | |
383 | case BARRIER: | |
384 | case CODE_LABEL: | |
b5b8b0ac | 385 | case DEBUG_INSN: |
3cf2715d DE |
386 | return 0; |
387 | ||
388 | case CALL_INSN: | |
3cf2715d | 389 | case JUMP_INSN: |
39718607 | 390 | length = fallback_fn (insn); |
3cf2715d DE |
391 | break; |
392 | ||
393 | case INSN: | |
394 | body = PATTERN (insn); | |
395 | if (GET_CODE (body) == USE || GET_CODE (body) == CLOBBER) | |
396 | return 0; | |
397 | ||
398 | else if (GET_CODE (body) == ASM_INPUT || asm_noperands (body) >= 0) | |
070a7956 | 399 | length = asm_insn_count (body) * fallback_fn (insn); |
e429a50b DM |
400 | else if (rtx_sequence *seq = dyn_cast <rtx_sequence *> (body)) |
401 | for (i = 0; i < seq->len (); i++) | |
402 | length += get_attr_length_1 (seq->insn (i), fallback_fn); | |
3cf2715d | 403 | else |
070a7956 | 404 | length = fallback_fn (insn); |
e9a25f70 JL |
405 | break; |
406 | ||
407 | default: | |
408 | break; | |
3cf2715d DE |
409 | } |
410 | ||
411 | #ifdef ADJUST_INSN_LENGTH | |
412 | ADJUST_INSN_LENGTH (insn, length); | |
413 | #endif | |
414 | return length; | |
3cf2715d | 415 | } |
070a7956 R |
416 | |
417 | /* Obtain the current length of an insn. If branch shortening has been done, | |
418 | get its actual length. Otherwise, get its maximum length. */ | |
419 | int | |
84034c69 | 420 | get_attr_length (rtx_insn *insn) |
070a7956 R |
421 | { |
422 | return get_attr_length_1 (insn, insn_default_length); | |
423 | } | |
424 | ||
425 | /* Obtain the current length of an insn. If branch shortening has been done, | |
426 | get its actual length. Otherwise, get its minimum length. */ | |
427 | int | |
84034c69 | 428 | get_attr_min_length (rtx_insn *insn) |
070a7956 R |
429 | { |
430 | return get_attr_length_1 (insn, insn_min_length); | |
431 | } | |
3cf2715d | 432 | \f |
fc470718 R |
433 | /* Code to handle alignment inside shorten_branches. */ |
434 | ||
435 | /* Here is an explanation how the algorithm in align_fuzz can give | |
436 | proper results: | |
437 | ||
438 | Call a sequence of instructions beginning with alignment point X | |
439 | and continuing until the next alignment point `block X'. When `X' | |
f5d927c0 | 440 | is used in an expression, it means the alignment value of the |
fc470718 | 441 | alignment point. |
f5d927c0 | 442 | |
fc470718 R |
443 | Call the distance between the start of the first insn of block X, and |
444 | the end of the last insn of block X `IX', for the `inner size of X'. | |
445 | This is clearly the sum of the instruction lengths. | |
f5d927c0 | 446 | |
fc470718 R |
447 | Likewise with the next alignment-delimited block following X, which we |
448 | shall call block Y. | |
f5d927c0 | 449 | |
fc470718 R |
450 | Call the distance between the start of the first insn of block X, and |
451 | the start of the first insn of block Y `OX', for the `outer size of X'. | |
f5d927c0 | 452 | |
fc470718 | 453 | The estimated padding is then OX - IX. |
f5d927c0 | 454 | |
fc470718 | 455 | OX can be safely estimated as |
f5d927c0 | 456 | |
fc470718 R |
457 | if (X >= Y) |
458 | OX = round_up(IX, Y) | |
459 | else | |
460 | OX = round_up(IX, X) + Y - X | |
f5d927c0 | 461 | |
fc470718 R |
462 | Clearly est(IX) >= real(IX), because that only depends on the |
463 | instruction lengths, and those being overestimated is a given. | |
f5d927c0 | 464 | |
fc470718 R |
465 | Clearly round_up(foo, Z) >= round_up(bar, Z) if foo >= bar, so |
466 | we needn't worry about that when thinking about OX. | |
f5d927c0 | 467 | |
fc470718 R |
468 | When X >= Y, the alignment provided by Y adds no uncertainty factor |
469 | for branch ranges starting before X, so we can just round what we have. | |
470 | But when X < Y, we don't know anything about the, so to speak, | |
471 | `middle bits', so we have to assume the worst when aligning up from an | |
472 | address mod X to one mod Y, which is Y - X. */ | |
473 | ||
474 | #ifndef LABEL_ALIGN | |
efa3896a | 475 | #define LABEL_ALIGN(LABEL) align_labels_log |
fc470718 R |
476 | #endif |
477 | ||
478 | #ifndef LOOP_ALIGN | |
efa3896a | 479 | #define LOOP_ALIGN(LABEL) align_loops_log |
fc470718 R |
480 | #endif |
481 | ||
482 | #ifndef LABEL_ALIGN_AFTER_BARRIER | |
340f7e7c | 483 | #define LABEL_ALIGN_AFTER_BARRIER(LABEL) 0 |
fc470718 R |
484 | #endif |
485 | ||
247a370b JH |
486 | #ifndef JUMP_ALIGN |
487 | #define JUMP_ALIGN(LABEL) align_jumps_log | |
488 | #endif | |
489 | ||
ad0c4c36 | 490 | int |
9158a0d8 | 491 | default_label_align_after_barrier_max_skip (rtx_insn *insn ATTRIBUTE_UNUSED) |
ad0c4c36 DD |
492 | { |
493 | return 0; | |
494 | } | |
495 | ||
496 | int | |
9158a0d8 | 497 | default_loop_align_max_skip (rtx_insn *insn ATTRIBUTE_UNUSED) |
ad0c4c36 DD |
498 | { |
499 | return align_loops_max_skip; | |
500 | } | |
501 | ||
502 | int | |
9158a0d8 | 503 | default_label_align_max_skip (rtx_insn *insn ATTRIBUTE_UNUSED) |
ad0c4c36 DD |
504 | { |
505 | return align_labels_max_skip; | |
506 | } | |
507 | ||
508 | int | |
9158a0d8 | 509 | default_jump_align_max_skip (rtx_insn *insn ATTRIBUTE_UNUSED) |
ad0c4c36 DD |
510 | { |
511 | return align_jumps_max_skip; | |
512 | } | |
9e423e6d | 513 | |
fc470718 | 514 | #ifndef ADDR_VEC_ALIGN |
ca3075bd | 515 | static int |
d305ca88 | 516 | final_addr_vec_align (rtx_jump_table_data *addr_vec) |
fc470718 | 517 | { |
d305ca88 | 518 | int align = GET_MODE_SIZE (addr_vec->get_data_mode ()); |
fc470718 R |
519 | |
520 | if (align > BIGGEST_ALIGNMENT / BITS_PER_UNIT) | |
521 | align = BIGGEST_ALIGNMENT / BITS_PER_UNIT; | |
2a841588 | 522 | return exact_log2 (align); |
fc470718 R |
523 | |
524 | } | |
f5d927c0 | 525 | |
fc470718 R |
526 | #define ADDR_VEC_ALIGN(ADDR_VEC) final_addr_vec_align (ADDR_VEC) |
527 | #endif | |
528 | ||
529 | #ifndef INSN_LENGTH_ALIGNMENT | |
530 | #define INSN_LENGTH_ALIGNMENT(INSN) length_unit_log | |
531 | #endif | |
532 | ||
fc470718 R |
533 | #define INSN_SHUID(INSN) (uid_shuid[INSN_UID (INSN)]) |
534 | ||
de7987a6 | 535 | static int min_labelno, max_labelno; |
fc470718 R |
536 | |
537 | #define LABEL_TO_ALIGNMENT(LABEL) \ | |
9e423e6d JW |
538 | (label_align[CODE_LABEL_NUMBER (LABEL) - min_labelno].alignment) |
539 | ||
540 | #define LABEL_TO_MAX_SKIP(LABEL) \ | |
541 | (label_align[CODE_LABEL_NUMBER (LABEL) - min_labelno].max_skip) | |
fc470718 R |
542 | |
543 | /* For the benefit of port specific code do this also as a function. */ | |
f5d927c0 | 544 | |
fc470718 | 545 | int |
6cf9ac28 | 546 | label_to_alignment (rtx label) |
fc470718 | 547 | { |
40a8f07a JJ |
548 | if (CODE_LABEL_NUMBER (label) <= max_labelno) |
549 | return LABEL_TO_ALIGNMENT (label); | |
550 | return 0; | |
551 | } | |
552 | ||
553 | int | |
554 | label_to_max_skip (rtx label) | |
555 | { | |
556 | if (CODE_LABEL_NUMBER (label) <= max_labelno) | |
557 | return LABEL_TO_MAX_SKIP (label); | |
558 | return 0; | |
fc470718 R |
559 | } |
560 | ||
fc470718 R |
561 | /* The differences in addresses |
562 | between a branch and its target might grow or shrink depending on | |
563 | the alignment the start insn of the range (the branch for a forward | |
564 | branch or the label for a backward branch) starts out on; if these | |
565 | differences are used naively, they can even oscillate infinitely. | |
566 | We therefore want to compute a 'worst case' address difference that | |
567 | is independent of the alignment the start insn of the range end | |
568 | up on, and that is at least as large as the actual difference. | |
569 | The function align_fuzz calculates the amount we have to add to the | |
570 | naively computed difference, by traversing the part of the alignment | |
571 | chain of the start insn of the range that is in front of the end insn | |
572 | of the range, and considering for each alignment the maximum amount | |
573 | that it might contribute to a size increase. | |
574 | ||
575 | For casesi tables, we also want to know worst case minimum amounts of | |
576 | address difference, in case a machine description wants to introduce | |
577 | some common offset that is added to all offsets in a table. | |
d6a7951f | 578 | For this purpose, align_fuzz with a growth argument of 0 computes the |
fc470718 R |
579 | appropriate adjustment. */ |
580 | ||
fc470718 R |
581 | /* Compute the maximum delta by which the difference of the addresses of |
582 | START and END might grow / shrink due to a different address for start | |
583 | which changes the size of alignment insns between START and END. | |
584 | KNOWN_ALIGN_LOG is the alignment known for START. | |
585 | GROWTH should be ~0 if the objective is to compute potential code size | |
586 | increase, and 0 if the objective is to compute potential shrink. | |
587 | The return value is undefined for any other value of GROWTH. */ | |
f5d927c0 | 588 | |
ca3075bd | 589 | static int |
6cf9ac28 | 590 | align_fuzz (rtx start, rtx end, int known_align_log, unsigned int growth) |
fc470718 R |
591 | { |
592 | int uid = INSN_UID (start); | |
593 | rtx align_label; | |
594 | int known_align = 1 << known_align_log; | |
595 | int end_shuid = INSN_SHUID (end); | |
596 | int fuzz = 0; | |
597 | ||
598 | for (align_label = uid_align[uid]; align_label; align_label = uid_align[uid]) | |
599 | { | |
600 | int align_addr, new_align; | |
601 | ||
602 | uid = INSN_UID (align_label); | |
9d98a694 | 603 | align_addr = INSN_ADDRESSES (uid) - insn_lengths[uid]; |
fc470718 R |
604 | if (uid_shuid[uid] > end_shuid) |
605 | break; | |
606 | known_align_log = LABEL_TO_ALIGNMENT (align_label); | |
607 | new_align = 1 << known_align_log; | |
608 | if (new_align < known_align) | |
609 | continue; | |
610 | fuzz += (-align_addr ^ growth) & (new_align - known_align); | |
611 | known_align = new_align; | |
612 | } | |
613 | return fuzz; | |
614 | } | |
615 | ||
616 | /* Compute a worst-case reference address of a branch so that it | |
617 | can be safely used in the presence of aligned labels. Since the | |
618 | size of the branch itself is unknown, the size of the branch is | |
619 | not included in the range. I.e. for a forward branch, the reference | |
620 | address is the end address of the branch as known from the previous | |
621 | branch shortening pass, minus a value to account for possible size | |
622 | increase due to alignment. For a backward branch, it is the start | |
623 | address of the branch as known from the current pass, plus a value | |
624 | to account for possible size increase due to alignment. | |
625 | NB.: Therefore, the maximum offset allowed for backward branches needs | |
626 | to exclude the branch size. */ | |
f5d927c0 | 627 | |
fc470718 | 628 | int |
8ba24b7b | 629 | insn_current_reference_address (rtx_insn *branch) |
fc470718 | 630 | { |
e67d1102 | 631 | rtx dest; |
5527bf14 RH |
632 | int seq_uid; |
633 | ||
634 | if (! INSN_ADDRESSES_SET_P ()) | |
635 | return 0; | |
636 | ||
e67d1102 | 637 | rtx_insn *seq = NEXT_INSN (PREV_INSN (branch)); |
5527bf14 | 638 | seq_uid = INSN_UID (seq); |
4b4bf941 | 639 | if (!JUMP_P (branch)) |
fc470718 R |
640 | /* This can happen for example on the PA; the objective is to know the |
641 | offset to address something in front of the start of the function. | |
642 | Thus, we can treat it like a backward branch. | |
643 | We assume here that FUNCTION_BOUNDARY / BITS_PER_UNIT is larger than | |
644 | any alignment we'd encounter, so we skip the call to align_fuzz. */ | |
645 | return insn_current_address; | |
646 | dest = JUMP_LABEL (branch); | |
5527bf14 | 647 | |
b9f22704 | 648 | /* BRANCH has no proper alignment chain set, so use SEQ. |
afc6898e BS |
649 | BRANCH also has no INSN_SHUID. */ |
650 | if (INSN_SHUID (seq) < INSN_SHUID (dest)) | |
fc470718 | 651 | { |
f5d927c0 | 652 | /* Forward branch. */ |
fc470718 | 653 | return (insn_last_address + insn_lengths[seq_uid] |
26024475 | 654 | - align_fuzz (seq, dest, length_unit_log, ~0)); |
fc470718 R |
655 | } |
656 | else | |
657 | { | |
f5d927c0 | 658 | /* Backward branch. */ |
fc470718 | 659 | return (insn_current_address |
923f7cf9 | 660 | + align_fuzz (dest, seq, length_unit_log, ~0)); |
fc470718 R |
661 | } |
662 | } | |
fc470718 | 663 | \f |
65727068 KH |
664 | /* Compute branch alignments based on frequency information in the |
665 | CFG. */ | |
666 | ||
e855c69d | 667 | unsigned int |
6cf9ac28 | 668 | compute_alignments (void) |
247a370b | 669 | { |
247a370b | 670 | int log, max_skip, max_log; |
e0082a72 | 671 | basic_block bb; |
edbed3d3 JH |
672 | int freq_max = 0; |
673 | int freq_threshold = 0; | |
247a370b JH |
674 | |
675 | if (label_align) | |
676 | { | |
677 | free (label_align); | |
678 | label_align = 0; | |
679 | } | |
680 | ||
681 | max_labelno = max_label_num (); | |
682 | min_labelno = get_first_label_num (); | |
5ed6ace5 | 683 | label_align = XCNEWVEC (struct label_alignment, max_labelno - min_labelno + 1); |
247a370b JH |
684 | |
685 | /* If not optimizing or optimizing for size, don't assign any alignments. */ | |
efd8f750 | 686 | if (! optimize || optimize_function_for_size_p (cfun)) |
c2924966 | 687 | return 0; |
247a370b | 688 | |
edbed3d3 JH |
689 | if (dump_file) |
690 | { | |
532aafad | 691 | dump_reg_info (dump_file); |
edbed3d3 JH |
692 | dump_flow_info (dump_file, TDF_DETAILS); |
693 | flow_loops_dump (dump_file, NULL, 1); | |
edbed3d3 | 694 | } |
58082ff6 | 695 | loop_optimizer_init (AVOID_CFG_MODIFICATIONS); |
11cd3bed | 696 | FOR_EACH_BB_FN (bb, cfun) |
edbed3d3 JH |
697 | if (bb->frequency > freq_max) |
698 | freq_max = bb->frequency; | |
699 | freq_threshold = freq_max / PARAM_VALUE (PARAM_ALIGN_THRESHOLD); | |
700 | ||
701 | if (dump_file) | |
c3284718 | 702 | fprintf (dump_file, "freq_max: %i\n",freq_max); |
11cd3bed | 703 | FOR_EACH_BB_FN (bb, cfun) |
247a370b | 704 | { |
fa7af581 | 705 | rtx_insn *label = BB_HEAD (bb); |
247a370b JH |
706 | int fallthru_frequency = 0, branch_frequency = 0, has_fallthru = 0; |
707 | edge e; | |
628f6a4e | 708 | edge_iterator ei; |
247a370b | 709 | |
4b4bf941 | 710 | if (!LABEL_P (label) |
8bcf15f6 | 711 | || optimize_bb_for_size_p (bb)) |
edbed3d3 JH |
712 | { |
713 | if (dump_file) | |
c3284718 RS |
714 | fprintf (dump_file, |
715 | "BB %4i freq %4i loop %2i loop_depth %2i skipped.\n", | |
716 | bb->index, bb->frequency, bb->loop_father->num, | |
717 | bb_loop_depth (bb)); | |
edbed3d3 JH |
718 | continue; |
719 | } | |
247a370b | 720 | max_log = LABEL_ALIGN (label); |
ad0c4c36 | 721 | max_skip = targetm.asm_out.label_align_max_skip (label); |
247a370b | 722 | |
628f6a4e | 723 | FOR_EACH_EDGE (e, ei, bb->preds) |
247a370b JH |
724 | { |
725 | if (e->flags & EDGE_FALLTHRU) | |
726 | has_fallthru = 1, fallthru_frequency += EDGE_FREQUENCY (e); | |
727 | else | |
728 | branch_frequency += EDGE_FREQUENCY (e); | |
729 | } | |
edbed3d3 JH |
730 | if (dump_file) |
731 | { | |
c3284718 RS |
732 | fprintf (dump_file, "BB %4i freq %4i loop %2i loop_depth" |
733 | " %2i fall %4i branch %4i", | |
734 | bb->index, bb->frequency, bb->loop_father->num, | |
735 | bb_loop_depth (bb), | |
736 | fallthru_frequency, branch_frequency); | |
edbed3d3 JH |
737 | if (!bb->loop_father->inner && bb->loop_father->num) |
738 | fprintf (dump_file, " inner_loop"); | |
739 | if (bb->loop_father->header == bb) | |
740 | fprintf (dump_file, " loop_header"); | |
741 | fprintf (dump_file, "\n"); | |
742 | } | |
247a370b | 743 | |
f63d1bf7 | 744 | /* There are two purposes to align block with no fallthru incoming edge: |
247a370b | 745 | 1) to avoid fetch stalls when branch destination is near cache boundary |
d6a7951f | 746 | 2) to improve cache efficiency in case the previous block is not executed |
247a370b JH |
747 | (so it does not need to be in the cache). |
748 | ||
749 | We to catch first case, we align frequently executed blocks. | |
750 | To catch the second, we align blocks that are executed more frequently | |
eaec9b3d | 751 | than the predecessor and the predecessor is likely to not be executed |
247a370b JH |
752 | when function is called. */ |
753 | ||
754 | if (!has_fallthru | |
edbed3d3 | 755 | && (branch_frequency > freq_threshold |
f6366fc7 ZD |
756 | || (bb->frequency > bb->prev_bb->frequency * 10 |
757 | && (bb->prev_bb->frequency | |
fefa31b5 | 758 | <= ENTRY_BLOCK_PTR_FOR_FN (cfun)->frequency / 2)))) |
247a370b JH |
759 | { |
760 | log = JUMP_ALIGN (label); | |
edbed3d3 | 761 | if (dump_file) |
c3284718 | 762 | fprintf (dump_file, " jump alignment added.\n"); |
247a370b JH |
763 | if (max_log < log) |
764 | { | |
765 | max_log = log; | |
ad0c4c36 | 766 | max_skip = targetm.asm_out.jump_align_max_skip (label); |
247a370b JH |
767 | } |
768 | } | |
769 | /* In case block is frequent and reached mostly by non-fallthru edge, | |
09da1532 | 770 | align it. It is most likely a first block of loop. */ |
247a370b | 771 | if (has_fallthru |
82b9c015 EB |
772 | && !(single_succ_p (bb) |
773 | && single_succ (bb) == EXIT_BLOCK_PTR_FOR_FN (cfun)) | |
efd8f750 | 774 | && optimize_bb_for_speed_p (bb) |
edbed3d3 JH |
775 | && branch_frequency + fallthru_frequency > freq_threshold |
776 | && (branch_frequency | |
777 | > fallthru_frequency * PARAM_VALUE (PARAM_ALIGN_LOOP_ITERATIONS))) | |
247a370b JH |
778 | { |
779 | log = LOOP_ALIGN (label); | |
edbed3d3 | 780 | if (dump_file) |
c3284718 | 781 | fprintf (dump_file, " internal loop alignment added.\n"); |
247a370b JH |
782 | if (max_log < log) |
783 | { | |
784 | max_log = log; | |
ad0c4c36 | 785 | max_skip = targetm.asm_out.loop_align_max_skip (label); |
247a370b JH |
786 | } |
787 | } | |
788 | LABEL_TO_ALIGNMENT (label) = max_log; | |
789 | LABEL_TO_MAX_SKIP (label) = max_skip; | |
790 | } | |
edbed3d3 | 791 | |
58082ff6 PH |
792 | loop_optimizer_finalize (); |
793 | free_dominance_info (CDI_DOMINATORS); | |
c2924966 | 794 | return 0; |
247a370b | 795 | } |
ef330312 | 796 | |
5cf6635b EB |
797 | /* Grow the LABEL_ALIGN array after new labels are created. */ |
798 | ||
799 | static void | |
800 | grow_label_align (void) | |
801 | { | |
802 | int old = max_labelno; | |
803 | int n_labels; | |
804 | int n_old_labels; | |
805 | ||
806 | max_labelno = max_label_num (); | |
807 | ||
808 | n_labels = max_labelno - min_labelno + 1; | |
809 | n_old_labels = old - min_labelno + 1; | |
810 | ||
811 | label_align = XRESIZEVEC (struct label_alignment, label_align, n_labels); | |
812 | ||
813 | /* Range of labels grows monotonically in the function. Failing here | |
814 | means that the initialization of array got lost. */ | |
815 | gcc_assert (n_old_labels <= n_labels); | |
816 | ||
817 | memset (label_align + n_old_labels, 0, | |
818 | (n_labels - n_old_labels) * sizeof (struct label_alignment)); | |
819 | } | |
820 | ||
821 | /* Update the already computed alignment information. LABEL_PAIRS is a vector | |
822 | made up of pairs of labels for which the alignment information of the first | |
823 | element will be copied from that of the second element. */ | |
824 | ||
825 | void | |
826 | update_alignments (vec<rtx> &label_pairs) | |
827 | { | |
828 | unsigned int i = 0; | |
33fd5699 | 829 | rtx iter, label = NULL_RTX; |
5cf6635b EB |
830 | |
831 | if (max_labelno != max_label_num ()) | |
832 | grow_label_align (); | |
833 | ||
834 | FOR_EACH_VEC_ELT (label_pairs, i, iter) | |
835 | if (i & 1) | |
836 | { | |
837 | LABEL_TO_ALIGNMENT (label) = LABEL_TO_ALIGNMENT (iter); | |
838 | LABEL_TO_MAX_SKIP (label) = LABEL_TO_MAX_SKIP (iter); | |
839 | } | |
840 | else | |
841 | label = iter; | |
842 | } | |
843 | ||
27a4cd48 DM |
844 | namespace { |
845 | ||
846 | const pass_data pass_data_compute_alignments = | |
ef330312 | 847 | { |
27a4cd48 DM |
848 | RTL_PASS, /* type */ |
849 | "alignments", /* name */ | |
850 | OPTGROUP_NONE, /* optinfo_flags */ | |
27a4cd48 DM |
851 | TV_NONE, /* tv_id */ |
852 | 0, /* properties_required */ | |
853 | 0, /* properties_provided */ | |
854 | 0, /* properties_destroyed */ | |
855 | 0, /* todo_flags_start */ | |
3bea341f | 856 | 0, /* todo_flags_finish */ |
ef330312 PB |
857 | }; |
858 | ||
27a4cd48 DM |
859 | class pass_compute_alignments : public rtl_opt_pass |
860 | { | |
861 | public: | |
c3284718 RS |
862 | pass_compute_alignments (gcc::context *ctxt) |
863 | : rtl_opt_pass (pass_data_compute_alignments, ctxt) | |
27a4cd48 DM |
864 | {} |
865 | ||
866 | /* opt_pass methods: */ | |
be55bfe6 | 867 | virtual unsigned int execute (function *) { return compute_alignments (); } |
27a4cd48 DM |
868 | |
869 | }; // class pass_compute_alignments | |
870 | ||
871 | } // anon namespace | |
872 | ||
873 | rtl_opt_pass * | |
874 | make_pass_compute_alignments (gcc::context *ctxt) | |
875 | { | |
876 | return new pass_compute_alignments (ctxt); | |
877 | } | |
878 | ||
247a370b | 879 | \f |
3cf2715d DE |
880 | /* Make a pass over all insns and compute their actual lengths by shortening |
881 | any branches of variable length if possible. */ | |
882 | ||
fc470718 R |
883 | /* shorten_branches might be called multiple times: for example, the SH |
884 | port splits out-of-range conditional branches in MACHINE_DEPENDENT_REORG. | |
885 | In order to do this, it needs proper length information, which it obtains | |
886 | by calling shorten_branches. This cannot be collapsed with | |
d6a7951f | 887 | shorten_branches itself into a single pass unless we also want to integrate |
fc470718 R |
888 | reorg.c, since the branch splitting exposes new instructions with delay |
889 | slots. */ | |
890 | ||
3cf2715d | 891 | void |
49922db8 | 892 | shorten_branches (rtx_insn *first) |
3cf2715d | 893 | { |
fa7af581 | 894 | rtx_insn *insn; |
fc470718 R |
895 | int max_uid; |
896 | int i; | |
fc470718 | 897 | int max_log; |
9e423e6d | 898 | int max_skip; |
fc470718 | 899 | #define MAX_CODE_ALIGN 16 |
fa7af581 | 900 | rtx_insn *seq; |
3cf2715d | 901 | int something_changed = 1; |
3cf2715d DE |
902 | char *varying_length; |
903 | rtx body; | |
904 | int uid; | |
fc470718 | 905 | rtx align_tab[MAX_CODE_ALIGN]; |
3cf2715d | 906 | |
3446405d JH |
907 | /* Compute maximum UID and allocate label_align / uid_shuid. */ |
908 | max_uid = get_max_uid (); | |
d9b6874b | 909 | |
471854f8 | 910 | /* Free uid_shuid before reallocating it. */ |
07a1f795 | 911 | free (uid_shuid); |
b0efb46b | 912 | |
5ed6ace5 | 913 | uid_shuid = XNEWVEC (int, max_uid); |
25e22dc0 | 914 | |
247a370b | 915 | if (max_labelno != max_label_num ()) |
5cf6635b | 916 | grow_label_align (); |
247a370b | 917 | |
fc470718 R |
918 | /* Initialize label_align and set up uid_shuid to be strictly |
919 | monotonically rising with insn order. */ | |
e2faec75 R |
920 | /* We use max_log here to keep track of the maximum alignment we want to |
921 | impose on the next CODE_LABEL (or the current one if we are processing | |
922 | the CODE_LABEL itself). */ | |
f5d927c0 | 923 | |
9e423e6d JW |
924 | max_log = 0; |
925 | max_skip = 0; | |
926 | ||
927 | for (insn = get_insns (), i = 1; insn; insn = NEXT_INSN (insn)) | |
fc470718 R |
928 | { |
929 | int log; | |
930 | ||
931 | INSN_SHUID (insn) = i++; | |
2c3c49de | 932 | if (INSN_P (insn)) |
80838531 | 933 | continue; |
b0efb46b | 934 | |
d305ca88 | 935 | if (rtx_code_label *label = dyn_cast <rtx_code_label *> (insn)) |
fc470718 | 936 | { |
247a370b | 937 | /* Merge in alignments computed by compute_alignments. */ |
d305ca88 | 938 | log = LABEL_TO_ALIGNMENT (label); |
247a370b JH |
939 | if (max_log < log) |
940 | { | |
941 | max_log = log; | |
d305ca88 | 942 | max_skip = LABEL_TO_MAX_SKIP (label); |
247a370b | 943 | } |
fc470718 | 944 | |
d305ca88 RS |
945 | rtx_jump_table_data *table = jump_table_for_label (label); |
946 | if (!table) | |
9e423e6d | 947 | { |
d305ca88 | 948 | log = LABEL_ALIGN (label); |
0676c393 MM |
949 | if (max_log < log) |
950 | { | |
951 | max_log = log; | |
d305ca88 | 952 | max_skip = targetm.asm_out.label_align_max_skip (label); |
0676c393 | 953 | } |
9e423e6d | 954 | } |
75197b37 BS |
955 | /* ADDR_VECs only take room if read-only data goes into the text |
956 | section. */ | |
0676c393 MM |
957 | if ((JUMP_TABLES_IN_TEXT_SECTION |
958 | || readonly_data_section == text_section) | |
d305ca88 | 959 | && table) |
0676c393 | 960 | { |
d305ca88 | 961 | log = ADDR_VEC_ALIGN (table); |
0676c393 MM |
962 | if (max_log < log) |
963 | { | |
964 | max_log = log; | |
d305ca88 | 965 | max_skip = targetm.asm_out.label_align_max_skip (label); |
0676c393 MM |
966 | } |
967 | } | |
d305ca88 RS |
968 | LABEL_TO_ALIGNMENT (label) = max_log; |
969 | LABEL_TO_MAX_SKIP (label) = max_skip; | |
fc470718 | 970 | max_log = 0; |
9e423e6d | 971 | max_skip = 0; |
fc470718 | 972 | } |
4b4bf941 | 973 | else if (BARRIER_P (insn)) |
fc470718 | 974 | { |
fa7af581 | 975 | rtx_insn *label; |
fc470718 | 976 | |
2c3c49de | 977 | for (label = insn; label && ! INSN_P (label); |
fc470718 | 978 | label = NEXT_INSN (label)) |
4b4bf941 | 979 | if (LABEL_P (label)) |
fc470718 R |
980 | { |
981 | log = LABEL_ALIGN_AFTER_BARRIER (insn); | |
982 | if (max_log < log) | |
9e423e6d JW |
983 | { |
984 | max_log = log; | |
ad0c4c36 | 985 | max_skip = targetm.asm_out.label_align_after_barrier_max_skip (label); |
9e423e6d | 986 | } |
fc470718 R |
987 | break; |
988 | } | |
989 | } | |
fc470718 | 990 | } |
d327457f JR |
991 | if (!HAVE_ATTR_length) |
992 | return; | |
fc470718 R |
993 | |
994 | /* Allocate the rest of the arrays. */ | |
5ed6ace5 | 995 | insn_lengths = XNEWVEC (int, max_uid); |
ea3cbda5 | 996 | insn_lengths_max_uid = max_uid; |
af035616 R |
997 | /* Syntax errors can lead to labels being outside of the main insn stream. |
998 | Initialize insn_addresses, so that we get reproducible results. */ | |
9d98a694 | 999 | INSN_ADDRESSES_ALLOC (max_uid); |
fc470718 | 1000 | |
5ed6ace5 | 1001 | varying_length = XCNEWVEC (char, max_uid); |
fc470718 R |
1002 | |
1003 | /* Initialize uid_align. We scan instructions | |
1004 | from end to start, and keep in align_tab[n] the last seen insn | |
1005 | that does an alignment of at least n+1, i.e. the successor | |
1006 | in the alignment chain for an insn that does / has a known | |
1007 | alignment of n. */ | |
5ed6ace5 | 1008 | uid_align = XCNEWVEC (rtx, max_uid); |
fc470718 | 1009 | |
f5d927c0 | 1010 | for (i = MAX_CODE_ALIGN; --i >= 0;) |
fc470718 R |
1011 | align_tab[i] = NULL_RTX; |
1012 | seq = get_last_insn (); | |
33f7f353 | 1013 | for (; seq; seq = PREV_INSN (seq)) |
fc470718 R |
1014 | { |
1015 | int uid = INSN_UID (seq); | |
1016 | int log; | |
4b4bf941 | 1017 | log = (LABEL_P (seq) ? LABEL_TO_ALIGNMENT (seq) : 0); |
fc470718 | 1018 | uid_align[uid] = align_tab[0]; |
fc470718 R |
1019 | if (log) |
1020 | { | |
1021 | /* Found an alignment label. */ | |
1022 | uid_align[uid] = align_tab[log]; | |
1023 | for (i = log - 1; i >= 0; i--) | |
1024 | align_tab[i] = seq; | |
1025 | } | |
33f7f353 | 1026 | } |
f6df08e6 JR |
1027 | |
1028 | /* When optimizing, we start assuming minimum length, and keep increasing | |
1029 | lengths as we find the need for this, till nothing changes. | |
1030 | When not optimizing, we start assuming maximum lengths, and | |
1031 | do a single pass to update the lengths. */ | |
1032 | bool increasing = optimize != 0; | |
1033 | ||
33f7f353 JR |
1034 | #ifdef CASE_VECTOR_SHORTEN_MODE |
1035 | if (optimize) | |
1036 | { | |
1037 | /* Look for ADDR_DIFF_VECs, and initialize their minimum and maximum | |
1038 | label fields. */ | |
1039 | ||
1040 | int min_shuid = INSN_SHUID (get_insns ()) - 1; | |
1041 | int max_shuid = INSN_SHUID (get_last_insn ()) + 1; | |
1042 | int rel; | |
1043 | ||
1044 | for (insn = first; insn != 0; insn = NEXT_INSN (insn)) | |
fc470718 | 1045 | { |
33f7f353 JR |
1046 | rtx min_lab = NULL_RTX, max_lab = NULL_RTX, pat; |
1047 | int len, i, min, max, insn_shuid; | |
1048 | int min_align; | |
1049 | addr_diff_vec_flags flags; | |
1050 | ||
34f0d87a | 1051 | if (! JUMP_TABLE_DATA_P (insn) |
33f7f353 JR |
1052 | || GET_CODE (PATTERN (insn)) != ADDR_DIFF_VEC) |
1053 | continue; | |
1054 | pat = PATTERN (insn); | |
1055 | len = XVECLEN (pat, 1); | |
0bccc606 | 1056 | gcc_assert (len > 0); |
33f7f353 JR |
1057 | min_align = MAX_CODE_ALIGN; |
1058 | for (min = max_shuid, max = min_shuid, i = len - 1; i >= 0; i--) | |
1059 | { | |
1060 | rtx lab = XEXP (XVECEXP (pat, 1, i), 0); | |
1061 | int shuid = INSN_SHUID (lab); | |
1062 | if (shuid < min) | |
1063 | { | |
1064 | min = shuid; | |
1065 | min_lab = lab; | |
1066 | } | |
1067 | if (shuid > max) | |
1068 | { | |
1069 | max = shuid; | |
1070 | max_lab = lab; | |
1071 | } | |
1072 | if (min_align > LABEL_TO_ALIGNMENT (lab)) | |
1073 | min_align = LABEL_TO_ALIGNMENT (lab); | |
1074 | } | |
4c33cb26 R |
1075 | XEXP (pat, 2) = gen_rtx_LABEL_REF (Pmode, min_lab); |
1076 | XEXP (pat, 3) = gen_rtx_LABEL_REF (Pmode, max_lab); | |
33f7f353 JR |
1077 | insn_shuid = INSN_SHUID (insn); |
1078 | rel = INSN_SHUID (XEXP (XEXP (pat, 0), 0)); | |
5921f276 | 1079 | memset (&flags, 0, sizeof (flags)); |
33f7f353 JR |
1080 | flags.min_align = min_align; |
1081 | flags.base_after_vec = rel > insn_shuid; | |
1082 | flags.min_after_vec = min > insn_shuid; | |
1083 | flags.max_after_vec = max > insn_shuid; | |
1084 | flags.min_after_base = min > rel; | |
1085 | flags.max_after_base = max > rel; | |
1086 | ADDR_DIFF_VEC_FLAGS (pat) = flags; | |
f6df08e6 JR |
1087 | |
1088 | if (increasing) | |
1089 | PUT_MODE (pat, CASE_VECTOR_SHORTEN_MODE (0, 0, pat)); | |
fc470718 R |
1090 | } |
1091 | } | |
33f7f353 | 1092 | #endif /* CASE_VECTOR_SHORTEN_MODE */ |
3cf2715d | 1093 | |
3cf2715d | 1094 | /* Compute initial lengths, addresses, and varying flags for each insn. */ |
84034c69 | 1095 | int (*length_fun) (rtx_insn *) = increasing ? insn_min_length : insn_default_length; |
f6df08e6 | 1096 | |
b816f339 | 1097 | for (insn_current_address = 0, insn = first; |
3cf2715d DE |
1098 | insn != 0; |
1099 | insn_current_address += insn_lengths[uid], insn = NEXT_INSN (insn)) | |
1100 | { | |
1101 | uid = INSN_UID (insn); | |
fc470718 | 1102 | |
3cf2715d | 1103 | insn_lengths[uid] = 0; |
fc470718 | 1104 | |
4b4bf941 | 1105 | if (LABEL_P (insn)) |
fc470718 R |
1106 | { |
1107 | int log = LABEL_TO_ALIGNMENT (insn); | |
1108 | if (log) | |
1109 | { | |
1110 | int align = 1 << log; | |
ecb06768 | 1111 | int new_address = (insn_current_address + align - 1) & -align; |
fc470718 | 1112 | insn_lengths[uid] = new_address - insn_current_address; |
fc470718 R |
1113 | } |
1114 | } | |
1115 | ||
5a09edba | 1116 | INSN_ADDRESSES (uid) = insn_current_address + insn_lengths[uid]; |
f5d927c0 | 1117 | |
4b4bf941 | 1118 | if (NOTE_P (insn) || BARRIER_P (insn) |
c3284718 | 1119 | || LABEL_P (insn) || DEBUG_INSN_P (insn)) |
3cf2715d | 1120 | continue; |
4654c0cf | 1121 | if (insn->deleted ()) |
04da53bd | 1122 | continue; |
3cf2715d DE |
1123 | |
1124 | body = PATTERN (insn); | |
d305ca88 | 1125 | if (rtx_jump_table_data *table = dyn_cast <rtx_jump_table_data *> (insn)) |
5a32a90c JR |
1126 | { |
1127 | /* This only takes room if read-only data goes into the text | |
1128 | section. */ | |
d6b5193b RS |
1129 | if (JUMP_TABLES_IN_TEXT_SECTION |
1130 | || readonly_data_section == text_section) | |
75197b37 BS |
1131 | insn_lengths[uid] = (XVECLEN (body, |
1132 | GET_CODE (body) == ADDR_DIFF_VEC) | |
d305ca88 | 1133 | * GET_MODE_SIZE (table->get_data_mode ())); |
5a32a90c | 1134 | /* Alignment is handled by ADDR_VEC_ALIGN. */ |
5a32a90c | 1135 | } |
a30caf5c | 1136 | else if (GET_CODE (body) == ASM_INPUT || asm_noperands (body) >= 0) |
3cf2715d | 1137 | insn_lengths[uid] = asm_insn_count (body) * insn_default_length (insn); |
e429a50b | 1138 | else if (rtx_sequence *body_seq = dyn_cast <rtx_sequence *> (body)) |
3cf2715d DE |
1139 | { |
1140 | int i; | |
1141 | int const_delay_slots; | |
e90bedf5 TS |
1142 | if (DELAY_SLOTS) |
1143 | const_delay_slots = const_num_delay_slots (body_seq->insn (0)); | |
1144 | else | |
1145 | const_delay_slots = 0; | |
1146 | ||
84034c69 | 1147 | int (*inner_length_fun) (rtx_insn *) |
f6df08e6 | 1148 | = const_delay_slots ? length_fun : insn_default_length; |
3cf2715d DE |
1149 | /* Inside a delay slot sequence, we do not do any branch shortening |
1150 | if the shortening could change the number of delay slots | |
0f41302f | 1151 | of the branch. */ |
e429a50b | 1152 | for (i = 0; i < body_seq->len (); i++) |
3cf2715d | 1153 | { |
e429a50b | 1154 | rtx_insn *inner_insn = body_seq->insn (i); |
3cf2715d DE |
1155 | int inner_uid = INSN_UID (inner_insn); |
1156 | int inner_length; | |
1157 | ||
5dd2902a | 1158 | if (GET_CODE (PATTERN (inner_insn)) == ASM_INPUT |
e429a50b | 1159 | || asm_noperands (PATTERN (inner_insn)) >= 0) |
3cf2715d DE |
1160 | inner_length = (asm_insn_count (PATTERN (inner_insn)) |
1161 | * insn_default_length (inner_insn)); | |
1162 | else | |
f6df08e6 | 1163 | inner_length = inner_length_fun (inner_insn); |
f5d927c0 | 1164 | |
3cf2715d DE |
1165 | insn_lengths[inner_uid] = inner_length; |
1166 | if (const_delay_slots) | |
1167 | { | |
1168 | if ((varying_length[inner_uid] | |
1169 | = insn_variable_length_p (inner_insn)) != 0) | |
1170 | varying_length[uid] = 1; | |
9d98a694 AO |
1171 | INSN_ADDRESSES (inner_uid) = (insn_current_address |
1172 | + insn_lengths[uid]); | |
3cf2715d DE |
1173 | } |
1174 | else | |
1175 | varying_length[inner_uid] = 0; | |
1176 | insn_lengths[uid] += inner_length; | |
1177 | } | |
1178 | } | |
1179 | else if (GET_CODE (body) != USE && GET_CODE (body) != CLOBBER) | |
1180 | { | |
f6df08e6 | 1181 | insn_lengths[uid] = length_fun (insn); |
3cf2715d DE |
1182 | varying_length[uid] = insn_variable_length_p (insn); |
1183 | } | |
1184 | ||
1185 | /* If needed, do any adjustment. */ | |
1186 | #ifdef ADJUST_INSN_LENGTH | |
1187 | ADJUST_INSN_LENGTH (insn, insn_lengths[uid]); | |
04b6000c | 1188 | if (insn_lengths[uid] < 0) |
c725bd79 | 1189 | fatal_insn ("negative insn length", insn); |
3cf2715d DE |
1190 | #endif |
1191 | } | |
1192 | ||
1193 | /* Now loop over all the insns finding varying length insns. For each, | |
1194 | get the current insn length. If it has changed, reflect the change. | |
1195 | When nothing changes for a full pass, we are done. */ | |
1196 | ||
1197 | while (something_changed) | |
1198 | { | |
1199 | something_changed = 0; | |
fc470718 | 1200 | insn_current_align = MAX_CODE_ALIGN - 1; |
b816f339 | 1201 | for (insn_current_address = 0, insn = first; |
3cf2715d DE |
1202 | insn != 0; |
1203 | insn = NEXT_INSN (insn)) | |
1204 | { | |
1205 | int new_length; | |
b729186a | 1206 | #ifdef ADJUST_INSN_LENGTH |
3cf2715d | 1207 | int tmp_length; |
b729186a | 1208 | #endif |
fc470718 | 1209 | int length_align; |
3cf2715d DE |
1210 | |
1211 | uid = INSN_UID (insn); | |
fc470718 | 1212 | |
d305ca88 | 1213 | if (rtx_code_label *label = dyn_cast <rtx_code_label *> (insn)) |
fc470718 | 1214 | { |
d305ca88 | 1215 | int log = LABEL_TO_ALIGNMENT (label); |
b0fe107e JM |
1216 | |
1217 | #ifdef CASE_VECTOR_SHORTEN_MODE | |
1218 | /* If the mode of a following jump table was changed, we | |
1219 | may need to update the alignment of this label. */ | |
d305ca88 RS |
1220 | |
1221 | if (JUMP_TABLES_IN_TEXT_SECTION | |
1222 | || readonly_data_section == text_section) | |
b0fe107e | 1223 | { |
d305ca88 RS |
1224 | rtx_jump_table_data *table = jump_table_for_label (label); |
1225 | if (table) | |
b0fe107e | 1226 | { |
d305ca88 RS |
1227 | int newlog = ADDR_VEC_ALIGN (table); |
1228 | if (newlog != log) | |
1229 | { | |
1230 | log = newlog; | |
1231 | LABEL_TO_ALIGNMENT (insn) = log; | |
1232 | something_changed = 1; | |
1233 | } | |
b0fe107e JM |
1234 | } |
1235 | } | |
1236 | #endif | |
1237 | ||
fc470718 R |
1238 | if (log > insn_current_align) |
1239 | { | |
1240 | int align = 1 << log; | |
ecb06768 | 1241 | int new_address= (insn_current_address + align - 1) & -align; |
fc470718 R |
1242 | insn_lengths[uid] = new_address - insn_current_address; |
1243 | insn_current_align = log; | |
1244 | insn_current_address = new_address; | |
1245 | } | |
1246 | else | |
1247 | insn_lengths[uid] = 0; | |
9d98a694 | 1248 | INSN_ADDRESSES (uid) = insn_current_address; |
fc470718 R |
1249 | continue; |
1250 | } | |
1251 | ||
1252 | length_align = INSN_LENGTH_ALIGNMENT (insn); | |
1253 | if (length_align < insn_current_align) | |
1254 | insn_current_align = length_align; | |
1255 | ||
9d98a694 AO |
1256 | insn_last_address = INSN_ADDRESSES (uid); |
1257 | INSN_ADDRESSES (uid) = insn_current_address; | |
fc470718 | 1258 | |
5e75ef4a | 1259 | #ifdef CASE_VECTOR_SHORTEN_MODE |
34f0d87a SB |
1260 | if (optimize |
1261 | && JUMP_TABLE_DATA_P (insn) | |
33f7f353 JR |
1262 | && GET_CODE (PATTERN (insn)) == ADDR_DIFF_VEC) |
1263 | { | |
d305ca88 | 1264 | rtx_jump_table_data *table = as_a <rtx_jump_table_data *> (insn); |
33f7f353 JR |
1265 | rtx body = PATTERN (insn); |
1266 | int old_length = insn_lengths[uid]; | |
b32d5189 DM |
1267 | rtx_insn *rel_lab = |
1268 | safe_as_a <rtx_insn *> (XEXP (XEXP (body, 0), 0)); | |
33f7f353 JR |
1269 | rtx min_lab = XEXP (XEXP (body, 2), 0); |
1270 | rtx max_lab = XEXP (XEXP (body, 3), 0); | |
9d98a694 AO |
1271 | int rel_addr = INSN_ADDRESSES (INSN_UID (rel_lab)); |
1272 | int min_addr = INSN_ADDRESSES (INSN_UID (min_lab)); | |
1273 | int max_addr = INSN_ADDRESSES (INSN_UID (max_lab)); | |
b32d5189 | 1274 | rtx_insn *prev; |
33f7f353 | 1275 | int rel_align = 0; |
950a3816 | 1276 | addr_diff_vec_flags flags; |
095a2d76 | 1277 | scalar_int_mode vec_mode; |
950a3816 KG |
1278 | |
1279 | /* Avoid automatic aggregate initialization. */ | |
1280 | flags = ADDR_DIFF_VEC_FLAGS (body); | |
33f7f353 JR |
1281 | |
1282 | /* Try to find a known alignment for rel_lab. */ | |
1283 | for (prev = rel_lab; | |
1284 | prev | |
1285 | && ! insn_lengths[INSN_UID (prev)] | |
1286 | && ! (varying_length[INSN_UID (prev)] & 1); | |
1287 | prev = PREV_INSN (prev)) | |
1288 | if (varying_length[INSN_UID (prev)] & 2) | |
1289 | { | |
1290 | rel_align = LABEL_TO_ALIGNMENT (prev); | |
1291 | break; | |
1292 | } | |
1293 | ||
1294 | /* See the comment on addr_diff_vec_flags in rtl.h for the | |
1295 | meaning of the flags values. base: REL_LAB vec: INSN */ | |
1296 | /* Anything after INSN has still addresses from the last | |
1297 | pass; adjust these so that they reflect our current | |
1298 | estimate for this pass. */ | |
1299 | if (flags.base_after_vec) | |
1300 | rel_addr += insn_current_address - insn_last_address; | |
1301 | if (flags.min_after_vec) | |
1302 | min_addr += insn_current_address - insn_last_address; | |
1303 | if (flags.max_after_vec) | |
1304 | max_addr += insn_current_address - insn_last_address; | |
1305 | /* We want to know the worst case, i.e. lowest possible value | |
1306 | for the offset of MIN_LAB. If MIN_LAB is after REL_LAB, | |
1307 | its offset is positive, and we have to be wary of code shrink; | |
1308 | otherwise, it is negative, and we have to be vary of code | |
1309 | size increase. */ | |
1310 | if (flags.min_after_base) | |
1311 | { | |
1312 | /* If INSN is between REL_LAB and MIN_LAB, the size | |
1313 | changes we are about to make can change the alignment | |
1314 | within the observed offset, therefore we have to break | |
1315 | it up into two parts that are independent. */ | |
1316 | if (! flags.base_after_vec && flags.min_after_vec) | |
1317 | { | |
1318 | min_addr -= align_fuzz (rel_lab, insn, rel_align, 0); | |
1319 | min_addr -= align_fuzz (insn, min_lab, 0, 0); | |
1320 | } | |
1321 | else | |
1322 | min_addr -= align_fuzz (rel_lab, min_lab, rel_align, 0); | |
1323 | } | |
1324 | else | |
1325 | { | |
1326 | if (flags.base_after_vec && ! flags.min_after_vec) | |
1327 | { | |
1328 | min_addr -= align_fuzz (min_lab, insn, 0, ~0); | |
1329 | min_addr -= align_fuzz (insn, rel_lab, 0, ~0); | |
1330 | } | |
1331 | else | |
1332 | min_addr -= align_fuzz (min_lab, rel_lab, 0, ~0); | |
1333 | } | |
1334 | /* Likewise, determine the highest lowest possible value | |
1335 | for the offset of MAX_LAB. */ | |
1336 | if (flags.max_after_base) | |
1337 | { | |
1338 | if (! flags.base_after_vec && flags.max_after_vec) | |
1339 | { | |
1340 | max_addr += align_fuzz (rel_lab, insn, rel_align, ~0); | |
1341 | max_addr += align_fuzz (insn, max_lab, 0, ~0); | |
1342 | } | |
1343 | else | |
1344 | max_addr += align_fuzz (rel_lab, max_lab, rel_align, ~0); | |
1345 | } | |
1346 | else | |
1347 | { | |
1348 | if (flags.base_after_vec && ! flags.max_after_vec) | |
1349 | { | |
1350 | max_addr += align_fuzz (max_lab, insn, 0, 0); | |
1351 | max_addr += align_fuzz (insn, rel_lab, 0, 0); | |
1352 | } | |
1353 | else | |
1354 | max_addr += align_fuzz (max_lab, rel_lab, 0, 0); | |
1355 | } | |
f6df08e6 JR |
1356 | vec_mode = CASE_VECTOR_SHORTEN_MODE (min_addr - rel_addr, |
1357 | max_addr - rel_addr, body); | |
1358 | if (!increasing | |
1359 | || (GET_MODE_SIZE (vec_mode) | |
d305ca88 | 1360 | >= GET_MODE_SIZE (table->get_data_mode ()))) |
f6df08e6 | 1361 | PUT_MODE (body, vec_mode); |
d6b5193b RS |
1362 | if (JUMP_TABLES_IN_TEXT_SECTION |
1363 | || readonly_data_section == text_section) | |
75197b37 BS |
1364 | { |
1365 | insn_lengths[uid] | |
d305ca88 RS |
1366 | = (XVECLEN (body, 1) |
1367 | * GET_MODE_SIZE (table->get_data_mode ())); | |
75197b37 BS |
1368 | insn_current_address += insn_lengths[uid]; |
1369 | if (insn_lengths[uid] != old_length) | |
1370 | something_changed = 1; | |
1371 | } | |
1372 | ||
33f7f353 | 1373 | continue; |
33f7f353 | 1374 | } |
5e75ef4a JL |
1375 | #endif /* CASE_VECTOR_SHORTEN_MODE */ |
1376 | ||
1377 | if (! (varying_length[uid])) | |
3cf2715d | 1378 | { |
4b4bf941 | 1379 | if (NONJUMP_INSN_P (insn) |
674fc07d GS |
1380 | && GET_CODE (PATTERN (insn)) == SEQUENCE) |
1381 | { | |
1382 | int i; | |
1383 | ||
1384 | body = PATTERN (insn); | |
1385 | for (i = 0; i < XVECLEN (body, 0); i++) | |
1386 | { | |
1387 | rtx inner_insn = XVECEXP (body, 0, i); | |
1388 | int inner_uid = INSN_UID (inner_insn); | |
1389 | ||
1390 | INSN_ADDRESSES (inner_uid) = insn_current_address; | |
1391 | ||
1392 | insn_current_address += insn_lengths[inner_uid]; | |
1393 | } | |
dd3f0101 | 1394 | } |
674fc07d GS |
1395 | else |
1396 | insn_current_address += insn_lengths[uid]; | |
1397 | ||
3cf2715d DE |
1398 | continue; |
1399 | } | |
674fc07d | 1400 | |
4b4bf941 | 1401 | if (NONJUMP_INSN_P (insn) && GET_CODE (PATTERN (insn)) == SEQUENCE) |
3cf2715d | 1402 | { |
84034c69 | 1403 | rtx_sequence *seqn = as_a <rtx_sequence *> (PATTERN (insn)); |
3cf2715d | 1404 | int i; |
f5d927c0 | 1405 | |
3cf2715d DE |
1406 | body = PATTERN (insn); |
1407 | new_length = 0; | |
84034c69 | 1408 | for (i = 0; i < seqn->len (); i++) |
3cf2715d | 1409 | { |
84034c69 | 1410 | rtx_insn *inner_insn = seqn->insn (i); |
3cf2715d DE |
1411 | int inner_uid = INSN_UID (inner_insn); |
1412 | int inner_length; | |
1413 | ||
9d98a694 | 1414 | INSN_ADDRESSES (inner_uid) = insn_current_address; |
3cf2715d DE |
1415 | |
1416 | /* insn_current_length returns 0 for insns with a | |
1417 | non-varying length. */ | |
1418 | if (! varying_length[inner_uid]) | |
1419 | inner_length = insn_lengths[inner_uid]; | |
1420 | else | |
1421 | inner_length = insn_current_length (inner_insn); | |
1422 | ||
1423 | if (inner_length != insn_lengths[inner_uid]) | |
1424 | { | |
f6df08e6 JR |
1425 | if (!increasing || inner_length > insn_lengths[inner_uid]) |
1426 | { | |
1427 | insn_lengths[inner_uid] = inner_length; | |
1428 | something_changed = 1; | |
1429 | } | |
1430 | else | |
1431 | inner_length = insn_lengths[inner_uid]; | |
3cf2715d | 1432 | } |
f6df08e6 | 1433 | insn_current_address += inner_length; |
3cf2715d DE |
1434 | new_length += inner_length; |
1435 | } | |
1436 | } | |
1437 | else | |
1438 | { | |
1439 | new_length = insn_current_length (insn); | |
1440 | insn_current_address += new_length; | |
1441 | } | |
1442 | ||
3cf2715d DE |
1443 | #ifdef ADJUST_INSN_LENGTH |
1444 | /* If needed, do any adjustment. */ | |
1445 | tmp_length = new_length; | |
1446 | ADJUST_INSN_LENGTH (insn, new_length); | |
1447 | insn_current_address += (new_length - tmp_length); | |
3cf2715d DE |
1448 | #endif |
1449 | ||
f6df08e6 JR |
1450 | if (new_length != insn_lengths[uid] |
1451 | && (!increasing || new_length > insn_lengths[uid])) | |
3cf2715d DE |
1452 | { |
1453 | insn_lengths[uid] = new_length; | |
1454 | something_changed = 1; | |
1455 | } | |
f6df08e6 JR |
1456 | else |
1457 | insn_current_address += insn_lengths[uid] - new_length; | |
3cf2715d | 1458 | } |
bb4aaf18 | 1459 | /* For a non-optimizing compile, do only a single pass. */ |
f6df08e6 | 1460 | if (!increasing) |
bb4aaf18 | 1461 | break; |
3cf2715d | 1462 | } |
8cac4d85 | 1463 | crtl->max_insn_address = insn_current_address; |
fc470718 | 1464 | free (varying_length); |
3cf2715d DE |
1465 | } |
1466 | ||
3cf2715d DE |
1467 | /* Given the body of an INSN known to be generated by an ASM statement, return |
1468 | the number of machine instructions likely to be generated for this insn. | |
1469 | This is used to compute its length. */ | |
1470 | ||
1471 | static int | |
6cf9ac28 | 1472 | asm_insn_count (rtx body) |
3cf2715d | 1473 | { |
48c54229 | 1474 | const char *templ; |
3cf2715d | 1475 | |
5d0930ea | 1476 | if (GET_CODE (body) == ASM_INPUT) |
48c54229 | 1477 | templ = XSTR (body, 0); |
5d0930ea | 1478 | else |
48c54229 | 1479 | templ = decode_asm_operands (body, NULL, NULL, NULL, NULL, NULL); |
5d0930ea | 1480 | |
2bd1d2c8 AP |
1481 | return asm_str_count (templ); |
1482 | } | |
2bd1d2c8 AP |
1483 | |
1484 | /* Return the number of machine instructions likely to be generated for the | |
1485 | inline-asm template. */ | |
1486 | int | |
1487 | asm_str_count (const char *templ) | |
1488 | { | |
1489 | int count = 1; | |
b8698a0f | 1490 | |
48c54229 | 1491 | if (!*templ) |
5bc4fa7c MS |
1492 | return 0; |
1493 | ||
48c54229 KG |
1494 | for (; *templ; templ++) |
1495 | if (IS_ASM_LOGICAL_LINE_SEPARATOR (*templ, templ) | |
1496 | || *templ == '\n') | |
3cf2715d DE |
1497 | count++; |
1498 | ||
1499 | return count; | |
1500 | } | |
3cf2715d | 1501 | \f |
c8aea42c PB |
1502 | /* ??? This is probably the wrong place for these. */ |
1503 | /* Structure recording the mapping from source file and directory | |
1504 | names at compile time to those to be embedded in debug | |
1505 | information. */ | |
50686850 | 1506 | struct debug_prefix_map |
c8aea42c PB |
1507 | { |
1508 | const char *old_prefix; | |
1509 | const char *new_prefix; | |
1510 | size_t old_len; | |
1511 | size_t new_len; | |
1512 | struct debug_prefix_map *next; | |
50686850 | 1513 | }; |
c8aea42c PB |
1514 | |
1515 | /* Linked list of such structures. */ | |
ffa66012 | 1516 | static debug_prefix_map *debug_prefix_maps; |
c8aea42c PB |
1517 | |
1518 | ||
1519 | /* Record a debug file prefix mapping. ARG is the argument to | |
1520 | -fdebug-prefix-map and must be of the form OLD=NEW. */ | |
1521 | ||
1522 | void | |
1523 | add_debug_prefix_map (const char *arg) | |
1524 | { | |
1525 | debug_prefix_map *map; | |
1526 | const char *p; | |
1527 | ||
1528 | p = strchr (arg, '='); | |
1529 | if (!p) | |
1530 | { | |
1531 | error ("invalid argument %qs to -fdebug-prefix-map", arg); | |
1532 | return; | |
1533 | } | |
1534 | map = XNEW (debug_prefix_map); | |
fe83055d | 1535 | map->old_prefix = xstrndup (arg, p - arg); |
c8aea42c PB |
1536 | map->old_len = p - arg; |
1537 | p++; | |
fe83055d | 1538 | map->new_prefix = xstrdup (p); |
c8aea42c PB |
1539 | map->new_len = strlen (p); |
1540 | map->next = debug_prefix_maps; | |
1541 | debug_prefix_maps = map; | |
1542 | } | |
1543 | ||
1544 | /* Perform user-specified mapping of debug filename prefixes. Return | |
1545 | the new name corresponding to FILENAME. */ | |
1546 | ||
1547 | const char * | |
1548 | remap_debug_filename (const char *filename) | |
1549 | { | |
1550 | debug_prefix_map *map; | |
1551 | char *s; | |
1552 | const char *name; | |
1553 | size_t name_len; | |
1554 | ||
1555 | for (map = debug_prefix_maps; map; map = map->next) | |
94369251 | 1556 | if (filename_ncmp (filename, map->old_prefix, map->old_len) == 0) |
c8aea42c PB |
1557 | break; |
1558 | if (!map) | |
1559 | return filename; | |
1560 | name = filename + map->old_len; | |
1561 | name_len = strlen (name) + 1; | |
1562 | s = (char *) alloca (name_len + map->new_len); | |
1563 | memcpy (s, map->new_prefix, map->new_len); | |
1564 | memcpy (s + map->new_len, name, name_len); | |
1565 | return ggc_strdup (s); | |
1566 | } | |
1567 | \f | |
725730f2 EB |
1568 | /* Return true if DWARF2 debug info can be emitted for DECL. */ |
1569 | ||
1570 | static bool | |
1571 | dwarf2_debug_info_emitted_p (tree decl) | |
1572 | { | |
1573 | if (write_symbols != DWARF2_DEBUG && write_symbols != VMS_AND_DWARF2_DEBUG) | |
1574 | return false; | |
1575 | ||
1576 | if (DECL_IGNORED_P (decl)) | |
1577 | return false; | |
1578 | ||
1579 | return true; | |
1580 | } | |
1581 | ||
78bde837 SB |
1582 | /* Return scope resulting from combination of S1 and S2. */ |
1583 | static tree | |
1584 | choose_inner_scope (tree s1, tree s2) | |
1585 | { | |
1586 | if (!s1) | |
1587 | return s2; | |
1588 | if (!s2) | |
1589 | return s1; | |
1590 | if (BLOCK_NUMBER (s1) > BLOCK_NUMBER (s2)) | |
1591 | return s1; | |
1592 | return s2; | |
1593 | } | |
1594 | ||
1595 | /* Emit lexical block notes needed to change scope from S1 to S2. */ | |
1596 | ||
1597 | static void | |
fa7af581 | 1598 | change_scope (rtx_insn *orig_insn, tree s1, tree s2) |
78bde837 | 1599 | { |
fa7af581 | 1600 | rtx_insn *insn = orig_insn; |
78bde837 SB |
1601 | tree com = NULL_TREE; |
1602 | tree ts1 = s1, ts2 = s2; | |
1603 | tree s; | |
1604 | ||
1605 | while (ts1 != ts2) | |
1606 | { | |
1607 | gcc_assert (ts1 && ts2); | |
1608 | if (BLOCK_NUMBER (ts1) > BLOCK_NUMBER (ts2)) | |
1609 | ts1 = BLOCK_SUPERCONTEXT (ts1); | |
1610 | else if (BLOCK_NUMBER (ts1) < BLOCK_NUMBER (ts2)) | |
1611 | ts2 = BLOCK_SUPERCONTEXT (ts2); | |
1612 | else | |
1613 | { | |
1614 | ts1 = BLOCK_SUPERCONTEXT (ts1); | |
1615 | ts2 = BLOCK_SUPERCONTEXT (ts2); | |
1616 | } | |
1617 | } | |
1618 | com = ts1; | |
1619 | ||
1620 | /* Close scopes. */ | |
1621 | s = s1; | |
1622 | while (s != com) | |
1623 | { | |
66e8df53 | 1624 | rtx_note *note = emit_note_before (NOTE_INSN_BLOCK_END, insn); |
78bde837 SB |
1625 | NOTE_BLOCK (note) = s; |
1626 | s = BLOCK_SUPERCONTEXT (s); | |
1627 | } | |
1628 | ||
1629 | /* Open scopes. */ | |
1630 | s = s2; | |
1631 | while (s != com) | |
1632 | { | |
1633 | insn = emit_note_before (NOTE_INSN_BLOCK_BEG, insn); | |
1634 | NOTE_BLOCK (insn) = s; | |
1635 | s = BLOCK_SUPERCONTEXT (s); | |
1636 | } | |
1637 | } | |
1638 | ||
1639 | /* Rebuild all the NOTE_INSN_BLOCK_BEG and NOTE_INSN_BLOCK_END notes based | |
1640 | on the scope tree and the newly reordered instructions. */ | |
1641 | ||
1642 | static void | |
1643 | reemit_insn_block_notes (void) | |
1644 | { | |
1645 | tree cur_block = DECL_INITIAL (cfun->decl); | |
66e8df53 DM |
1646 | rtx_insn *insn; |
1647 | rtx_note *note; | |
78bde837 SB |
1648 | |
1649 | insn = get_insns (); | |
97aba8e9 | 1650 | for (; insn; insn = NEXT_INSN (insn)) |
78bde837 SB |
1651 | { |
1652 | tree this_block; | |
1653 | ||
67598720 TJ |
1654 | /* Prevent lexical blocks from straddling section boundaries. */ |
1655 | if (NOTE_P (insn) && NOTE_KIND (insn) == NOTE_INSN_SWITCH_TEXT_SECTIONS) | |
1656 | { | |
1657 | for (tree s = cur_block; s != DECL_INITIAL (cfun->decl); | |
1658 | s = BLOCK_SUPERCONTEXT (s)) | |
1659 | { | |
66e8df53 | 1660 | rtx_note *note = emit_note_before (NOTE_INSN_BLOCK_END, insn); |
67598720 TJ |
1661 | NOTE_BLOCK (note) = s; |
1662 | note = emit_note_after (NOTE_INSN_BLOCK_BEG, insn); | |
1663 | NOTE_BLOCK (note) = s; | |
1664 | } | |
1665 | } | |
1666 | ||
1667 | if (!active_insn_p (insn)) | |
1668 | continue; | |
1669 | ||
78bde837 SB |
1670 | /* Avoid putting scope notes between jump table and its label. */ |
1671 | if (JUMP_TABLE_DATA_P (insn)) | |
1672 | continue; | |
1673 | ||
1674 | this_block = insn_scope (insn); | |
1675 | /* For sequences compute scope resulting from merging all scopes | |
1676 | of instructions nested inside. */ | |
e429a50b | 1677 | if (rtx_sequence *body = dyn_cast <rtx_sequence *> (PATTERN (insn))) |
78bde837 SB |
1678 | { |
1679 | int i; | |
78bde837 SB |
1680 | |
1681 | this_block = NULL; | |
e429a50b | 1682 | for (i = 0; i < body->len (); i++) |
78bde837 | 1683 | this_block = choose_inner_scope (this_block, |
e429a50b | 1684 | insn_scope (body->insn (i))); |
78bde837 SB |
1685 | } |
1686 | if (! this_block) | |
48866799 DC |
1687 | { |
1688 | if (INSN_LOCATION (insn) == UNKNOWN_LOCATION) | |
1689 | continue; | |
1690 | else | |
1691 | this_block = DECL_INITIAL (cfun->decl); | |
1692 | } | |
78bde837 SB |
1693 | |
1694 | if (this_block != cur_block) | |
1695 | { | |
1696 | change_scope (insn, cur_block, this_block); | |
1697 | cur_block = this_block; | |
1698 | } | |
1699 | } | |
1700 | ||
1701 | /* change_scope emits before the insn, not after. */ | |
1702 | note = emit_note (NOTE_INSN_DELETED); | |
1703 | change_scope (note, cur_block, DECL_INITIAL (cfun->decl)); | |
1704 | delete_insn (note); | |
1705 | ||
1706 | reorder_blocks (); | |
1707 | } | |
1708 | ||
4fbca4ba RS |
1709 | static const char *some_local_dynamic_name; |
1710 | ||
1711 | /* Locate some local-dynamic symbol still in use by this function | |
1712 | so that we can print its name in local-dynamic base patterns. | |
1713 | Return null if there are no local-dynamic references. */ | |
1714 | ||
1715 | const char * | |
1716 | get_some_local_dynamic_name () | |
1717 | { | |
1718 | subrtx_iterator::array_type array; | |
1719 | rtx_insn *insn; | |
1720 | ||
1721 | if (some_local_dynamic_name) | |
1722 | return some_local_dynamic_name; | |
1723 | ||
1724 | for (insn = get_insns (); insn ; insn = NEXT_INSN (insn)) | |
1725 | if (NONDEBUG_INSN_P (insn)) | |
1726 | FOR_EACH_SUBRTX (iter, array, PATTERN (insn), ALL) | |
1727 | { | |
1728 | const_rtx x = *iter; | |
1729 | if (GET_CODE (x) == SYMBOL_REF) | |
1730 | { | |
1731 | if (SYMBOL_REF_TLS_MODEL (x) == TLS_MODEL_LOCAL_DYNAMIC) | |
1732 | return some_local_dynamic_name = XSTR (x, 0); | |
1733 | if (CONSTANT_POOL_ADDRESS_P (x)) | |
1734 | iter.substitute (get_pool_constant (x)); | |
1735 | } | |
1736 | } | |
1737 | ||
1738 | return 0; | |
1739 | } | |
1740 | ||
3cf2715d DE |
1741 | /* Output assembler code for the start of a function, |
1742 | and initialize some of the variables in this file | |
1743 | for the new function. The label for the function and associated | |
1744 | assembler pseudo-ops have already been output in `assemble_start_function'. | |
1745 | ||
1746 | FIRST is the first insn of the rtl for the function being compiled. | |
1747 | FILE is the file to write assembler code to. | |
46625112 | 1748 | OPTIMIZE_P is nonzero if we should eliminate redundant |
3cf2715d DE |
1749 | test and compare insns. */ |
1750 | ||
1751 | void | |
f0cb8ae0 | 1752 | final_start_function (rtx_insn *first, FILE *file, |
46625112 | 1753 | int optimize_p ATTRIBUTE_UNUSED) |
3cf2715d DE |
1754 | { |
1755 | block_depth = 0; | |
1756 | ||
1757 | this_is_asm_operands = 0; | |
1758 | ||
ddd84654 JJ |
1759 | need_profile_function = false; |
1760 | ||
5368224f DC |
1761 | last_filename = LOCATION_FILE (prologue_location); |
1762 | last_linenum = LOCATION_LINE (prologue_location); | |
497b7c47 | 1763 | last_columnnum = LOCATION_COLUMN (prologue_location); |
6c52e687 | 1764 | last_discriminator = discriminator = 0; |
9ae130f8 | 1765 | |
653e276c | 1766 | high_block_linenum = high_function_linenum = last_linenum; |
eac40081 | 1767 | |
ef1b3fda KS |
1768 | if (flag_sanitize & SANITIZE_ADDRESS) |
1769 | asan_function_start (); | |
1770 | ||
725730f2 | 1771 | if (!DECL_IGNORED_P (current_function_decl)) |
497b7c47 | 1772 | debug_hooks->begin_prologue (last_linenum, last_columnnum, last_filename); |
d291dd49 | 1773 | |
725730f2 | 1774 | if (!dwarf2_debug_info_emitted_p (current_function_decl)) |
497b7c47 | 1775 | dwarf2out_begin_prologue (0, 0, NULL); |
3cf2715d DE |
1776 | |
1777 | #ifdef LEAF_REG_REMAP | |
416ff32e | 1778 | if (crtl->uses_only_leaf_regs) |
3cf2715d DE |
1779 | leaf_renumber_regs (first); |
1780 | #endif | |
1781 | ||
1782 | /* The Sun386i and perhaps other machines don't work right | |
1783 | if the profiling code comes after the prologue. */ | |
3c5273a9 | 1784 | if (targetm.profile_before_prologue () && crtl->profile) |
ddd84654 | 1785 | { |
e86a9946 RS |
1786 | if (targetm.asm_out.function_prologue == default_function_pro_epilogue |
1787 | && targetm.have_prologue ()) | |
ddd84654 | 1788 | { |
fa7af581 | 1789 | rtx_insn *insn; |
ddd84654 JJ |
1790 | for (insn = first; insn; insn = NEXT_INSN (insn)) |
1791 | if (!NOTE_P (insn)) | |
1792 | { | |
fa7af581 | 1793 | insn = NULL; |
ddd84654 JJ |
1794 | break; |
1795 | } | |
1796 | else if (NOTE_KIND (insn) == NOTE_INSN_BASIC_BLOCK | |
1797 | || NOTE_KIND (insn) == NOTE_INSN_FUNCTION_BEG) | |
1798 | break; | |
1799 | else if (NOTE_KIND (insn) == NOTE_INSN_DELETED | |
1800 | || NOTE_KIND (insn) == NOTE_INSN_VAR_LOCATION) | |
1801 | continue; | |
1802 | else | |
1803 | { | |
fa7af581 | 1804 | insn = NULL; |
ddd84654 JJ |
1805 | break; |
1806 | } | |
1807 | ||
1808 | if (insn) | |
1809 | need_profile_function = true; | |
1810 | else | |
1811 | profile_function (file); | |
1812 | } | |
1813 | else | |
1814 | profile_function (file); | |
1815 | } | |
3cf2715d | 1816 | |
18c038b9 MM |
1817 | /* If debugging, assign block numbers to all of the blocks in this |
1818 | function. */ | |
1819 | if (write_symbols) | |
1820 | { | |
0435312e | 1821 | reemit_insn_block_notes (); |
a20612aa | 1822 | number_blocks (current_function_decl); |
18c038b9 MM |
1823 | /* We never actually put out begin/end notes for the top-level |
1824 | block in the function. But, conceptually, that block is | |
1825 | always needed. */ | |
1826 | TREE_ASM_WRITTEN (DECL_INITIAL (current_function_decl)) = 1; | |
1827 | } | |
1828 | ||
a214518f SP |
1829 | if (warn_frame_larger_than |
1830 | && get_frame_size () > frame_larger_than_size) | |
1831 | { | |
1832 | /* Issue a warning */ | |
1833 | warning (OPT_Wframe_larger_than_, | |
1834 | "the frame size of %wd bytes is larger than %wd bytes", | |
1835 | get_frame_size (), frame_larger_than_size); | |
1836 | } | |
1837 | ||
3cf2715d | 1838 | /* First output the function prologue: code to set up the stack frame. */ |
42776416 | 1839 | targetm.asm_out.function_prologue (file); |
3cf2715d | 1840 | |
3cf2715d DE |
1841 | /* If the machine represents the prologue as RTL, the profiling code must |
1842 | be emitted when NOTE_INSN_PROLOGUE_END is scanned. */ | |
e86a9946 | 1843 | if (! targetm.have_prologue ()) |
3cf2715d | 1844 | profile_after_prologue (file); |
3cf2715d DE |
1845 | } |
1846 | ||
1847 | static void | |
6cf9ac28 | 1848 | profile_after_prologue (FILE *file ATTRIBUTE_UNUSED) |
3cf2715d | 1849 | { |
3c5273a9 | 1850 | if (!targetm.profile_before_prologue () && crtl->profile) |
3cf2715d | 1851 | profile_function (file); |
3cf2715d DE |
1852 | } |
1853 | ||
1854 | static void | |
6cf9ac28 | 1855 | profile_function (FILE *file ATTRIBUTE_UNUSED) |
3cf2715d | 1856 | { |
dcacfa04 | 1857 | #ifndef NO_PROFILE_COUNTERS |
9739c90c | 1858 | # define NO_PROFILE_COUNTERS 0 |
dcacfa04 | 1859 | #endif |
531ca746 RH |
1860 | #ifdef ASM_OUTPUT_REG_PUSH |
1861 | rtx sval = NULL, chain = NULL; | |
1862 | ||
1863 | if (cfun->returns_struct) | |
1864 | sval = targetm.calls.struct_value_rtx (TREE_TYPE (current_function_decl), | |
1865 | true); | |
1866 | if (cfun->static_chain_decl) | |
1867 | chain = targetm.calls.static_chain (current_function_decl, true); | |
b729186a | 1868 | #endif /* ASM_OUTPUT_REG_PUSH */ |
3cf2715d | 1869 | |
9739c90c JJ |
1870 | if (! NO_PROFILE_COUNTERS) |
1871 | { | |
1872 | int align = MIN (BIGGEST_ALIGNMENT, LONG_TYPE_SIZE); | |
d6b5193b | 1873 | switch_to_section (data_section); |
9739c90c | 1874 | ASM_OUTPUT_ALIGN (file, floor_log2 (align / BITS_PER_UNIT)); |
5fd9b178 | 1875 | targetm.asm_out.internal_label (file, "LP", current_function_funcdef_no); |
9739c90c JJ |
1876 | assemble_integer (const0_rtx, LONG_TYPE_SIZE / BITS_PER_UNIT, align, 1); |
1877 | } | |
3cf2715d | 1878 | |
d6b5193b | 1879 | switch_to_section (current_function_section ()); |
3cf2715d | 1880 | |
531ca746 RH |
1881 | #ifdef ASM_OUTPUT_REG_PUSH |
1882 | if (sval && REG_P (sval)) | |
1883 | ASM_OUTPUT_REG_PUSH (file, REGNO (sval)); | |
1884 | if (chain && REG_P (chain)) | |
1885 | ASM_OUTPUT_REG_PUSH (file, REGNO (chain)); | |
3cf2715d | 1886 | #endif |
3cf2715d | 1887 | |
df696a75 | 1888 | FUNCTION_PROFILER (file, current_function_funcdef_no); |
3cf2715d | 1889 | |
531ca746 RH |
1890 | #ifdef ASM_OUTPUT_REG_PUSH |
1891 | if (chain && REG_P (chain)) | |
1892 | ASM_OUTPUT_REG_POP (file, REGNO (chain)); | |
1893 | if (sval && REG_P (sval)) | |
1894 | ASM_OUTPUT_REG_POP (file, REGNO (sval)); | |
3cf2715d DE |
1895 | #endif |
1896 | } | |
1897 | ||
1898 | /* Output assembler code for the end of a function. | |
1899 | For clarity, args are same as those of `final_start_function' | |
1900 | even though not all of them are needed. */ | |
1901 | ||
1902 | void | |
6cf9ac28 | 1903 | final_end_function (void) |
3cf2715d | 1904 | { |
be1bb652 | 1905 | app_disable (); |
3cf2715d | 1906 | |
725730f2 EB |
1907 | if (!DECL_IGNORED_P (current_function_decl)) |
1908 | debug_hooks->end_function (high_function_linenum); | |
3cf2715d | 1909 | |
3cf2715d DE |
1910 | /* Finally, output the function epilogue: |
1911 | code to restore the stack frame and return to the caller. */ | |
42776416 | 1912 | targetm.asm_out.function_epilogue (asm_out_file); |
3cf2715d | 1913 | |
e2a12aca | 1914 | /* And debug output. */ |
725730f2 EB |
1915 | if (!DECL_IGNORED_P (current_function_decl)) |
1916 | debug_hooks->end_epilogue (last_linenum, last_filename); | |
3cf2715d | 1917 | |
725730f2 | 1918 | if (!dwarf2_debug_info_emitted_p (current_function_decl) |
7a0c8d71 | 1919 | && dwarf2out_do_frame ()) |
702ada3d | 1920 | dwarf2out_end_epilogue (last_linenum, last_filename); |
4fbca4ba RS |
1921 | |
1922 | some_local_dynamic_name = 0; | |
3cf2715d DE |
1923 | } |
1924 | \f | |
6a801cf2 XDL |
1925 | |
1926 | /* Dumper helper for basic block information. FILE is the assembly | |
1927 | output file, and INSN is the instruction being emitted. */ | |
1928 | ||
1929 | static void | |
fa7af581 | 1930 | dump_basic_block_info (FILE *file, rtx_insn *insn, basic_block *start_to_bb, |
6a801cf2 XDL |
1931 | basic_block *end_to_bb, int bb_map_size, int *bb_seqn) |
1932 | { | |
1933 | basic_block bb; | |
1934 | ||
1935 | if (!flag_debug_asm) | |
1936 | return; | |
1937 | ||
1938 | if (INSN_UID (insn) < bb_map_size | |
1939 | && (bb = start_to_bb[INSN_UID (insn)]) != NULL) | |
1940 | { | |
1941 | edge e; | |
1942 | edge_iterator ei; | |
1943 | ||
1c13f168 | 1944 | fprintf (file, "%s BLOCK %d", ASM_COMMENT_START, bb->index); |
6a801cf2 XDL |
1945 | if (bb->frequency) |
1946 | fprintf (file, " freq:%d", bb->frequency); | |
3995f3a2 JH |
1947 | if (bb->count.initialized_p ()) |
1948 | { | |
1949 | fprintf (file, ", count:"); | |
1950 | bb->count.dump (file); | |
1951 | } | |
6a801cf2 | 1952 | fprintf (file, " seq:%d", (*bb_seqn)++); |
1c13f168 | 1953 | fprintf (file, "\n%s PRED:", ASM_COMMENT_START); |
6a801cf2 XDL |
1954 | FOR_EACH_EDGE (e, ei, bb->preds) |
1955 | { | |
a315c44c | 1956 | dump_edge_info (file, e, TDF_DETAILS, 0); |
6a801cf2 XDL |
1957 | } |
1958 | fprintf (file, "\n"); | |
1959 | } | |
1960 | if (INSN_UID (insn) < bb_map_size | |
1961 | && (bb = end_to_bb[INSN_UID (insn)]) != NULL) | |
1962 | { | |
1963 | edge e; | |
1964 | edge_iterator ei; | |
1965 | ||
1c13f168 | 1966 | fprintf (asm_out_file, "%s SUCC:", ASM_COMMENT_START); |
6a801cf2 XDL |
1967 | FOR_EACH_EDGE (e, ei, bb->succs) |
1968 | { | |
a315c44c | 1969 | dump_edge_info (asm_out_file, e, TDF_DETAILS, 1); |
6a801cf2 XDL |
1970 | } |
1971 | fprintf (file, "\n"); | |
1972 | } | |
1973 | } | |
1974 | ||
3cf2715d | 1975 | /* Output assembler code for some insns: all or part of a function. |
c9d691e9 | 1976 | For description of args, see `final_start_function', above. */ |
3cf2715d DE |
1977 | |
1978 | void | |
a943bf7a | 1979 | final (rtx_insn *first, FILE *file, int optimize_p) |
3cf2715d | 1980 | { |
fa7af581 | 1981 | rtx_insn *insn, *next; |
589fe865 | 1982 | int seen = 0; |
3cf2715d | 1983 | |
6a801cf2 XDL |
1984 | /* Used for -dA dump. */ |
1985 | basic_block *start_to_bb = NULL; | |
1986 | basic_block *end_to_bb = NULL; | |
1987 | int bb_map_size = 0; | |
1988 | int bb_seqn = 0; | |
1989 | ||
3cf2715d | 1990 | last_ignored_compare = 0; |
3cf2715d | 1991 | |
618f4073 TS |
1992 | if (HAVE_cc0) |
1993 | for (insn = first; insn; insn = NEXT_INSN (insn)) | |
1994 | { | |
1995 | /* If CC tracking across branches is enabled, record the insn which | |
1996 | jumps to each branch only reached from one place. */ | |
1997 | if (optimize_p && JUMP_P (insn)) | |
1998 | { | |
1999 | rtx lab = JUMP_LABEL (insn); | |
2000 | if (lab && LABEL_P (lab) && LABEL_NUSES (lab) == 1) | |
2001 | { | |
2002 | LABEL_REFS (lab) = insn; | |
2003 | } | |
2004 | } | |
2005 | } | |
a8c3510c | 2006 | |
3cf2715d DE |
2007 | init_recog (); |
2008 | ||
2009 | CC_STATUS_INIT; | |
2010 | ||
6a801cf2 XDL |
2011 | if (flag_debug_asm) |
2012 | { | |
2013 | basic_block bb; | |
2014 | ||
2015 | bb_map_size = get_max_uid () + 1; | |
2016 | start_to_bb = XCNEWVEC (basic_block, bb_map_size); | |
2017 | end_to_bb = XCNEWVEC (basic_block, bb_map_size); | |
2018 | ||
292ffe86 CC |
2019 | /* There is no cfg for a thunk. */ |
2020 | if (!cfun->is_thunk) | |
4f42035e | 2021 | FOR_EACH_BB_REVERSE_FN (bb, cfun) |
292ffe86 CC |
2022 | { |
2023 | start_to_bb[INSN_UID (BB_HEAD (bb))] = bb; | |
2024 | end_to_bb[INSN_UID (BB_END (bb))] = bb; | |
2025 | } | |
6a801cf2 XDL |
2026 | } |
2027 | ||
3cf2715d | 2028 | /* Output the insns. */ |
9ff57809 | 2029 | for (insn = first; insn;) |
2f16edb1 | 2030 | { |
d327457f | 2031 | if (HAVE_ATTR_length) |
0ac76ad9 | 2032 | { |
d327457f JR |
2033 | if ((unsigned) INSN_UID (insn) >= INSN_ADDRESSES_SIZE ()) |
2034 | { | |
2035 | /* This can be triggered by bugs elsewhere in the compiler if | |
2036 | new insns are created after init_insn_lengths is called. */ | |
2037 | gcc_assert (NOTE_P (insn)); | |
2038 | insn_current_address = -1; | |
2039 | } | |
2040 | else | |
2041 | insn_current_address = INSN_ADDRESSES (INSN_UID (insn)); | |
0ac76ad9 | 2042 | } |
0ac76ad9 | 2043 | |
6a801cf2 XDL |
2044 | dump_basic_block_info (file, insn, start_to_bb, end_to_bb, |
2045 | bb_map_size, &bb_seqn); | |
46625112 | 2046 | insn = final_scan_insn (insn, file, optimize_p, 0, &seen); |
2f16edb1 | 2047 | } |
6a801cf2 XDL |
2048 | |
2049 | if (flag_debug_asm) | |
2050 | { | |
2051 | free (start_to_bb); | |
2052 | free (end_to_bb); | |
2053 | } | |
bc5612ed BS |
2054 | |
2055 | /* Remove CFI notes, to avoid compare-debug failures. */ | |
2056 | for (insn = first; insn; insn = next) | |
2057 | { | |
2058 | next = NEXT_INSN (insn); | |
2059 | if (NOTE_P (insn) | |
2060 | && (NOTE_KIND (insn) == NOTE_INSN_CFI | |
2061 | || NOTE_KIND (insn) == NOTE_INSN_CFI_LABEL)) | |
2062 | delete_insn (insn); | |
2063 | } | |
3cf2715d DE |
2064 | } |
2065 | \f | |
4bbf910e | 2066 | const char * |
6cf9ac28 | 2067 | get_insn_template (int code, rtx insn) |
4bbf910e | 2068 | { |
4bbf910e RH |
2069 | switch (insn_data[code].output_format) |
2070 | { | |
2071 | case INSN_OUTPUT_FORMAT_SINGLE: | |
3897f229 | 2072 | return insn_data[code].output.single; |
4bbf910e | 2073 | case INSN_OUTPUT_FORMAT_MULTI: |
3897f229 | 2074 | return insn_data[code].output.multi[which_alternative]; |
4bbf910e | 2075 | case INSN_OUTPUT_FORMAT_FUNCTION: |
0bccc606 | 2076 | gcc_assert (insn); |
95770ca3 DM |
2077 | return (*insn_data[code].output.function) (recog_data.operand, |
2078 | as_a <rtx_insn *> (insn)); | |
4bbf910e RH |
2079 | |
2080 | default: | |
0bccc606 | 2081 | gcc_unreachable (); |
4bbf910e RH |
2082 | } |
2083 | } | |
f5d927c0 | 2084 | |
0dc36574 ZW |
2085 | /* Emit the appropriate declaration for an alternate-entry-point |
2086 | symbol represented by INSN, to FILE. INSN is a CODE_LABEL with | |
2087 | LABEL_KIND != LABEL_NORMAL. | |
2088 | ||
2089 | The case fall-through in this function is intentional. */ | |
2090 | static void | |
fa7af581 | 2091 | output_alternate_entry_point (FILE *file, rtx_insn *insn) |
0dc36574 ZW |
2092 | { |
2093 | const char *name = LABEL_NAME (insn); | |
2094 | ||
2095 | switch (LABEL_KIND (insn)) | |
2096 | { | |
2097 | case LABEL_WEAK_ENTRY: | |
2098 | #ifdef ASM_WEAKEN_LABEL | |
2099 | ASM_WEAKEN_LABEL (file, name); | |
81fea426 | 2100 | gcc_fallthrough (); |
0dc36574 ZW |
2101 | #endif |
2102 | case LABEL_GLOBAL_ENTRY: | |
5fd9b178 | 2103 | targetm.asm_out.globalize_label (file, name); |
81fea426 | 2104 | gcc_fallthrough (); |
0dc36574 | 2105 | case LABEL_STATIC_ENTRY: |
905173eb ZW |
2106 | #ifdef ASM_OUTPUT_TYPE_DIRECTIVE |
2107 | ASM_OUTPUT_TYPE_DIRECTIVE (file, name, "function"); | |
2108 | #endif | |
0dc36574 ZW |
2109 | ASM_OUTPUT_LABEL (file, name); |
2110 | break; | |
2111 | ||
2112 | case LABEL_NORMAL: | |
2113 | default: | |
0bccc606 | 2114 | gcc_unreachable (); |
0dc36574 ZW |
2115 | } |
2116 | } | |
2117 | ||
f410e1b3 RAE |
2118 | /* Given a CALL_INSN, find and return the nested CALL. */ |
2119 | static rtx | |
fa7af581 | 2120 | call_from_call_insn (rtx_call_insn *insn) |
f410e1b3 RAE |
2121 | { |
2122 | rtx x; | |
2123 | gcc_assert (CALL_P (insn)); | |
2124 | x = PATTERN (insn); | |
2125 | ||
2126 | while (GET_CODE (x) != CALL) | |
2127 | { | |
2128 | switch (GET_CODE (x)) | |
2129 | { | |
2130 | default: | |
2131 | gcc_unreachable (); | |
b8c71e40 RAE |
2132 | case COND_EXEC: |
2133 | x = COND_EXEC_CODE (x); | |
2134 | break; | |
f410e1b3 RAE |
2135 | case PARALLEL: |
2136 | x = XVECEXP (x, 0, 0); | |
2137 | break; | |
2138 | case SET: | |
2139 | x = XEXP (x, 1); | |
2140 | break; | |
2141 | } | |
2142 | } | |
2143 | return x; | |
2144 | } | |
2145 | ||
82f72146 DM |
2146 | /* Print a comment into the asm showing FILENAME, LINENUM, and the |
2147 | corresponding source line, if available. */ | |
2148 | ||
2149 | static void | |
2150 | asm_show_source (const char *filename, int linenum) | |
2151 | { | |
2152 | if (!filename) | |
2153 | return; | |
2154 | ||
2155 | int line_size; | |
2156 | const char *line = location_get_source_line (filename, linenum, &line_size); | |
2157 | if (!line) | |
2158 | return; | |
2159 | ||
2160 | fprintf (asm_out_file, "%s %s:%i: ", ASM_COMMENT_START, filename, linenum); | |
2161 | /* "line" is not 0-terminated, so we must use line_size. */ | |
2162 | fwrite (line, 1, line_size, asm_out_file); | |
2163 | fputc ('\n', asm_out_file); | |
2164 | } | |
2165 | ||
3cf2715d DE |
2166 | /* The final scan for one insn, INSN. |
2167 | Args are same as in `final', except that INSN | |
2168 | is the insn being scanned. | |
2169 | Value returned is the next insn to be scanned. | |
2170 | ||
ff8cea7e EB |
2171 | NOPEEPHOLES is the flag to disallow peephole processing (currently |
2172 | used for within delayed branch sequence output). | |
3cf2715d | 2173 | |
589fe865 DJ |
2174 | SEEN is used to track the end of the prologue, for emitting |
2175 | debug information. We force the emission of a line note after | |
70aacc97 | 2176 | both NOTE_INSN_PROLOGUE_END and NOTE_INSN_FUNCTION_BEG. */ |
589fe865 | 2177 | |
fa7af581 | 2178 | rtx_insn * |
7fa55ff6 | 2179 | final_scan_insn (rtx_insn *insn, FILE *file, int optimize_p ATTRIBUTE_UNUSED, |
c9d691e9 | 2180 | int nopeepholes ATTRIBUTE_UNUSED, int *seen) |
3cf2715d | 2181 | { |
f1e52ed6 | 2182 | #if HAVE_cc0 |
90ca38bb MM |
2183 | rtx set; |
2184 | #endif | |
fa7af581 | 2185 | rtx_insn *next; |
d305ca88 | 2186 | rtx_jump_table_data *table; |
fa7af581 | 2187 | |
3cf2715d DE |
2188 | insn_counter++; |
2189 | ||
2190 | /* Ignore deleted insns. These can occur when we split insns (due to a | |
2191 | template of "#") while not optimizing. */ | |
4654c0cf | 2192 | if (insn->deleted ()) |
3cf2715d DE |
2193 | return NEXT_INSN (insn); |
2194 | ||
2195 | switch (GET_CODE (insn)) | |
2196 | { | |
2197 | case NOTE: | |
a38e7aa5 | 2198 | switch (NOTE_KIND (insn)) |
be1bb652 RH |
2199 | { |
2200 | case NOTE_INSN_DELETED: | |
d33606c3 | 2201 | case NOTE_INSN_UPDATE_SJLJ_CONTEXT: |
be1bb652 | 2202 | break; |
3cf2715d | 2203 | |
87c8b4be | 2204 | case NOTE_INSN_SWITCH_TEXT_SECTIONS: |
c543ca49 | 2205 | in_cold_section_p = !in_cold_section_p; |
f0a0390e | 2206 | |
a4b6974e UB |
2207 | if (dwarf2out_do_frame ()) |
2208 | dwarf2out_switch_text_section (); | |
f0a0390e | 2209 | else if (!DECL_IGNORED_P (current_function_decl)) |
725730f2 | 2210 | debug_hooks->switch_text_section (); |
a4b6974e | 2211 | |
c543ca49 | 2212 | switch_to_section (current_function_section ()); |
14d11d40 IS |
2213 | targetm.asm_out.function_switched_text_sections (asm_out_file, |
2214 | current_function_decl, | |
2215 | in_cold_section_p); | |
2ae367c1 ST |
2216 | /* Emit a label for the split cold section. Form label name by |
2217 | suffixing "cold" to the original function's name. */ | |
2218 | if (in_cold_section_p) | |
2219 | { | |
16d710b1 | 2220 | cold_function_name |
2ae367c1 | 2221 | = clone_function_name (current_function_decl, "cold"); |
11c3d071 CT |
2222 | #ifdef ASM_DECLARE_COLD_FUNCTION_NAME |
2223 | ASM_DECLARE_COLD_FUNCTION_NAME (asm_out_file, | |
2224 | IDENTIFIER_POINTER | |
2225 | (cold_function_name), | |
2226 | current_function_decl); | |
16d710b1 | 2227 | #else |
2ae367c1 ST |
2228 | ASM_OUTPUT_LABEL (asm_out_file, |
2229 | IDENTIFIER_POINTER (cold_function_name)); | |
16d710b1 | 2230 | #endif |
2ae367c1 | 2231 | } |
750054a2 | 2232 | break; |
b0efb46b | 2233 | |
be1bb652 | 2234 | case NOTE_INSN_BASIC_BLOCK: |
ddd84654 JJ |
2235 | if (need_profile_function) |
2236 | { | |
2237 | profile_function (asm_out_file); | |
2238 | need_profile_function = false; | |
2239 | } | |
2240 | ||
2784ed9c KT |
2241 | if (targetm.asm_out.unwind_emit) |
2242 | targetm.asm_out.unwind_emit (asm_out_file, insn); | |
951120ea | 2243 | |
6c52e687 CC |
2244 | discriminator = NOTE_BASIC_BLOCK (insn)->discriminator; |
2245 | ||
be1bb652 | 2246 | break; |
3cf2715d | 2247 | |
be1bb652 | 2248 | case NOTE_INSN_EH_REGION_BEG: |
52a11cbf RH |
2249 | ASM_OUTPUT_DEBUG_LABEL (asm_out_file, "LEHB", |
2250 | NOTE_EH_HANDLER (insn)); | |
3d195391 | 2251 | break; |
3d195391 | 2252 | |
be1bb652 | 2253 | case NOTE_INSN_EH_REGION_END: |
52a11cbf RH |
2254 | ASM_OUTPUT_DEBUG_LABEL (asm_out_file, "LEHE", |
2255 | NOTE_EH_HANDLER (insn)); | |
3d195391 | 2256 | break; |
3d195391 | 2257 | |
be1bb652 | 2258 | case NOTE_INSN_PROLOGUE_END: |
5fd9b178 | 2259 | targetm.asm_out.function_end_prologue (file); |
3cf2715d | 2260 | profile_after_prologue (file); |
589fe865 DJ |
2261 | |
2262 | if ((*seen & (SEEN_EMITTED | SEEN_NOTE)) == SEEN_NOTE) | |
2263 | { | |
2264 | *seen |= SEEN_EMITTED; | |
b8176fe4 | 2265 | force_source_line = true; |
589fe865 DJ |
2266 | } |
2267 | else | |
2268 | *seen |= SEEN_NOTE; | |
2269 | ||
3cf2715d | 2270 | break; |
3cf2715d | 2271 | |
be1bb652 | 2272 | case NOTE_INSN_EPILOGUE_BEG: |
bc45e4ba TG |
2273 | if (!DECL_IGNORED_P (current_function_decl)) |
2274 | (*debug_hooks->begin_epilogue) (last_linenum, last_filename); | |
5fd9b178 | 2275 | targetm.asm_out.function_begin_epilogue (file); |
be1bb652 | 2276 | break; |
3cf2715d | 2277 | |
bc5612ed BS |
2278 | case NOTE_INSN_CFI: |
2279 | dwarf2out_emit_cfi (NOTE_CFI (insn)); | |
2280 | break; | |
2281 | ||
2282 | case NOTE_INSN_CFI_LABEL: | |
2283 | ASM_OUTPUT_DEBUG_LABEL (asm_out_file, "LCFI", | |
2284 | NOTE_LABEL_NUMBER (insn)); | |
cd9c1ca8 RH |
2285 | break; |
2286 | ||
be1bb652 | 2287 | case NOTE_INSN_FUNCTION_BEG: |
ddd84654 JJ |
2288 | if (need_profile_function) |
2289 | { | |
2290 | profile_function (asm_out_file); | |
2291 | need_profile_function = false; | |
2292 | } | |
2293 | ||
653e276c | 2294 | app_disable (); |
725730f2 EB |
2295 | if (!DECL_IGNORED_P (current_function_decl)) |
2296 | debug_hooks->end_prologue (last_linenum, last_filename); | |
589fe865 DJ |
2297 | |
2298 | if ((*seen & (SEEN_EMITTED | SEEN_NOTE)) == SEEN_NOTE) | |
2299 | { | |
2300 | *seen |= SEEN_EMITTED; | |
b8176fe4 | 2301 | force_source_line = true; |
589fe865 DJ |
2302 | } |
2303 | else | |
2304 | *seen |= SEEN_NOTE; | |
2305 | ||
3cf2715d | 2306 | break; |
be1bb652 RH |
2307 | |
2308 | case NOTE_INSN_BLOCK_BEG: | |
2309 | if (debug_info_level == DINFO_LEVEL_NORMAL | |
3cf2715d | 2310 | || debug_info_level == DINFO_LEVEL_VERBOSE |
7a0c8d71 DR |
2311 | || write_symbols == DWARF2_DEBUG |
2312 | || write_symbols == VMS_AND_DWARF2_DEBUG | |
2313 | || write_symbols == VMS_DEBUG) | |
be1bb652 RH |
2314 | { |
2315 | int n = BLOCK_NUMBER (NOTE_BLOCK (insn)); | |
3cf2715d | 2316 | |
be1bb652 RH |
2317 | app_disable (); |
2318 | ++block_depth; | |
2319 | high_block_linenum = last_linenum; | |
eac40081 | 2320 | |
a5a42b92 | 2321 | /* Output debugging info about the symbol-block beginning. */ |
725730f2 EB |
2322 | if (!DECL_IGNORED_P (current_function_decl)) |
2323 | debug_hooks->begin_block (last_linenum, n); | |
3cf2715d | 2324 | |
be1bb652 RH |
2325 | /* Mark this block as output. */ |
2326 | TREE_ASM_WRITTEN (NOTE_BLOCK (insn)) = 1; | |
aaec3d85 | 2327 | BLOCK_IN_COLD_SECTION_P (NOTE_BLOCK (insn)) = in_cold_section_p; |
be1bb652 | 2328 | } |
180295ed | 2329 | if (write_symbols == DBX_DEBUG) |
d752cfdb JJ |
2330 | { |
2331 | location_t *locus_ptr | |
2332 | = block_nonartificial_location (NOTE_BLOCK (insn)); | |
2333 | ||
2334 | if (locus_ptr != NULL) | |
2335 | { | |
2336 | override_filename = LOCATION_FILE (*locus_ptr); | |
2337 | override_linenum = LOCATION_LINE (*locus_ptr); | |
497b7c47 | 2338 | override_columnnum = LOCATION_COLUMN (*locus_ptr); |
d752cfdb JJ |
2339 | } |
2340 | } | |
be1bb652 | 2341 | break; |
18c038b9 | 2342 | |
be1bb652 RH |
2343 | case NOTE_INSN_BLOCK_END: |
2344 | if (debug_info_level == DINFO_LEVEL_NORMAL | |
2345 | || debug_info_level == DINFO_LEVEL_VERBOSE | |
7a0c8d71 DR |
2346 | || write_symbols == DWARF2_DEBUG |
2347 | || write_symbols == VMS_AND_DWARF2_DEBUG | |
2348 | || write_symbols == VMS_DEBUG) | |
be1bb652 RH |
2349 | { |
2350 | int n = BLOCK_NUMBER (NOTE_BLOCK (insn)); | |
3cf2715d | 2351 | |
be1bb652 RH |
2352 | app_disable (); |
2353 | ||
2354 | /* End of a symbol-block. */ | |
2355 | --block_depth; | |
0bccc606 | 2356 | gcc_assert (block_depth >= 0); |
3cf2715d | 2357 | |
725730f2 EB |
2358 | if (!DECL_IGNORED_P (current_function_decl)) |
2359 | debug_hooks->end_block (high_block_linenum, n); | |
aaec3d85 JJ |
2360 | gcc_assert (BLOCK_IN_COLD_SECTION_P (NOTE_BLOCK (insn)) |
2361 | == in_cold_section_p); | |
be1bb652 | 2362 | } |
180295ed | 2363 | if (write_symbols == DBX_DEBUG) |
d752cfdb JJ |
2364 | { |
2365 | tree outer_block = BLOCK_SUPERCONTEXT (NOTE_BLOCK (insn)); | |
2366 | location_t *locus_ptr | |
2367 | = block_nonartificial_location (outer_block); | |
2368 | ||
2369 | if (locus_ptr != NULL) | |
2370 | { | |
2371 | override_filename = LOCATION_FILE (*locus_ptr); | |
2372 | override_linenum = LOCATION_LINE (*locus_ptr); | |
497b7c47 | 2373 | override_columnnum = LOCATION_COLUMN (*locus_ptr); |
d752cfdb JJ |
2374 | } |
2375 | else | |
2376 | { | |
2377 | override_filename = NULL; | |
2378 | override_linenum = 0; | |
497b7c47 | 2379 | override_columnnum = 0; |
d752cfdb JJ |
2380 | } |
2381 | } | |
be1bb652 RH |
2382 | break; |
2383 | ||
2384 | case NOTE_INSN_DELETED_LABEL: | |
2385 | /* Emit the label. We may have deleted the CODE_LABEL because | |
2386 | the label could be proved to be unreachable, though still | |
2387 | referenced (in the form of having its address taken. */ | |
8215347e | 2388 | ASM_OUTPUT_DEBUG_LABEL (file, "L", CODE_LABEL_NUMBER (insn)); |
be1bb652 | 2389 | break; |
3cf2715d | 2390 | |
5619e52c JJ |
2391 | case NOTE_INSN_DELETED_DEBUG_LABEL: |
2392 | /* Similarly, but need to use different namespace for it. */ | |
2393 | if (CODE_LABEL_NUMBER (insn) != -1) | |
2394 | ASM_OUTPUT_DEBUG_LABEL (file, "LDL", CODE_LABEL_NUMBER (insn)); | |
2395 | break; | |
2396 | ||
014a1138 | 2397 | case NOTE_INSN_VAR_LOCATION: |
2b1c5433 | 2398 | case NOTE_INSN_CALL_ARG_LOCATION: |
725730f2 | 2399 | if (!DECL_IGNORED_P (current_function_decl)) |
fa7af581 | 2400 | debug_hooks->var_location (insn); |
014a1138 JZ |
2401 | break; |
2402 | ||
be1bb652 | 2403 | default: |
a38e7aa5 | 2404 | gcc_unreachable (); |
f5d927c0 | 2405 | break; |
3cf2715d DE |
2406 | } |
2407 | break; | |
2408 | ||
2409 | case BARRIER: | |
3cf2715d DE |
2410 | break; |
2411 | ||
2412 | case CODE_LABEL: | |
1dd8faa8 R |
2413 | /* The target port might emit labels in the output function for |
2414 | some insn, e.g. sh.c output_branchy_insn. */ | |
de7987a6 R |
2415 | if (CODE_LABEL_NUMBER (insn) <= max_labelno) |
2416 | { | |
2417 | int align = LABEL_TO_ALIGNMENT (insn); | |
50b2596f | 2418 | #ifdef ASM_OUTPUT_MAX_SKIP_ALIGN |
9e423e6d | 2419 | int max_skip = LABEL_TO_MAX_SKIP (insn); |
50b2596f | 2420 | #endif |
fc470718 | 2421 | |
1dd8faa8 | 2422 | if (align && NEXT_INSN (insn)) |
40cdfca6 | 2423 | { |
9e423e6d | 2424 | #ifdef ASM_OUTPUT_MAX_SKIP_ALIGN |
40cdfca6 | 2425 | ASM_OUTPUT_MAX_SKIP_ALIGN (file, align, max_skip); |
8e16ab99 SF |
2426 | #else |
2427 | #ifdef ASM_OUTPUT_ALIGN_WITH_NOP | |
2428 | ASM_OUTPUT_ALIGN_WITH_NOP (file, align); | |
9e423e6d | 2429 | #else |
40cdfca6 | 2430 | ASM_OUTPUT_ALIGN (file, align); |
8e16ab99 | 2431 | #endif |
9e423e6d | 2432 | #endif |
40cdfca6 | 2433 | } |
de7987a6 | 2434 | } |
3cf2715d | 2435 | CC_STATUS_INIT; |
03ffa171 | 2436 | |
725730f2 | 2437 | if (!DECL_IGNORED_P (current_function_decl) && LABEL_NAME (insn)) |
f630fc6a | 2438 | debug_hooks->label (as_a <rtx_code_label *> (insn)); |
e1772ac0 | 2439 | |
bad4f40b | 2440 | app_disable (); |
b2a6a2fb | 2441 | |
0676c393 MM |
2442 | /* If this label is followed by a jump-table, make sure we put |
2443 | the label in the read-only section. Also possibly write the | |
2444 | label and jump table together. */ | |
d305ca88 RS |
2445 | table = jump_table_for_label (as_a <rtx_code_label *> (insn)); |
2446 | if (table) | |
3cf2715d | 2447 | { |
e0d80184 | 2448 | #if defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC) |
0676c393 MM |
2449 | /* In this case, the case vector is being moved by the |
2450 | target, so don't output the label at all. Leave that | |
2451 | to the back end macros. */ | |
e0d80184 | 2452 | #else |
0676c393 MM |
2453 | if (! JUMP_TABLES_IN_TEXT_SECTION) |
2454 | { | |
2455 | int log_align; | |
340f7e7c | 2456 | |
0676c393 MM |
2457 | switch_to_section (targetm.asm_out.function_rodata_section |
2458 | (current_function_decl)); | |
340f7e7c RH |
2459 | |
2460 | #ifdef ADDR_VEC_ALIGN | |
d305ca88 | 2461 | log_align = ADDR_VEC_ALIGN (table); |
340f7e7c | 2462 | #else |
0676c393 | 2463 | log_align = exact_log2 (BIGGEST_ALIGNMENT / BITS_PER_UNIT); |
340f7e7c | 2464 | #endif |
0676c393 MM |
2465 | ASM_OUTPUT_ALIGN (file, log_align); |
2466 | } | |
2467 | else | |
2468 | switch_to_section (current_function_section ()); | |
75197b37 | 2469 | |
3cf2715d | 2470 | #ifdef ASM_OUTPUT_CASE_LABEL |
d305ca88 | 2471 | ASM_OUTPUT_CASE_LABEL (file, "L", CODE_LABEL_NUMBER (insn), table); |
3cf2715d | 2472 | #else |
0676c393 | 2473 | targetm.asm_out.internal_label (file, "L", CODE_LABEL_NUMBER (insn)); |
e0d80184 | 2474 | #endif |
3cf2715d | 2475 | #endif |
0676c393 | 2476 | break; |
3cf2715d | 2477 | } |
0dc36574 ZW |
2478 | if (LABEL_ALT_ENTRY_P (insn)) |
2479 | output_alternate_entry_point (file, insn); | |
8cd0faaf | 2480 | else |
5fd9b178 | 2481 | targetm.asm_out.internal_label (file, "L", CODE_LABEL_NUMBER (insn)); |
3cf2715d DE |
2482 | break; |
2483 | ||
2484 | default: | |
2485 | { | |
b3694847 | 2486 | rtx body = PATTERN (insn); |
3cf2715d | 2487 | int insn_code_number; |
48c54229 | 2488 | const char *templ; |
ed5ef2e4 | 2489 | bool is_stmt; |
3cf2715d | 2490 | |
9a1a4737 PB |
2491 | /* Reset this early so it is correct for ASM statements. */ |
2492 | current_insn_predicate = NULL_RTX; | |
2929029c | 2493 | |
3cf2715d DE |
2494 | /* An INSN, JUMP_INSN or CALL_INSN. |
2495 | First check for special kinds that recog doesn't recognize. */ | |
2496 | ||
6614fd40 | 2497 | if (GET_CODE (body) == USE /* These are just declarations. */ |
3cf2715d DE |
2498 | || GET_CODE (body) == CLOBBER) |
2499 | break; | |
2500 | ||
f1e52ed6 | 2501 | #if HAVE_cc0 |
4928181c SB |
2502 | { |
2503 | /* If there is a REG_CC_SETTER note on this insn, it means that | |
2504 | the setting of the condition code was done in the delay slot | |
2505 | of the insn that branched here. So recover the cc status | |
2506 | from the insn that set it. */ | |
3cf2715d | 2507 | |
4928181c SB |
2508 | rtx note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX); |
2509 | if (note) | |
2510 | { | |
647d790d DM |
2511 | rtx_insn *other = as_a <rtx_insn *> (XEXP (note, 0)); |
2512 | NOTICE_UPDATE_CC (PATTERN (other), other); | |
4928181c SB |
2513 | cc_prev_status = cc_status; |
2514 | } | |
2515 | } | |
3cf2715d DE |
2516 | #endif |
2517 | ||
2518 | /* Detect insns that are really jump-tables | |
2519 | and output them as such. */ | |
2520 | ||
34f0d87a | 2521 | if (JUMP_TABLE_DATA_P (insn)) |
3cf2715d | 2522 | { |
7f7f8214 | 2523 | #if !(defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC)) |
b3694847 | 2524 | int vlen, idx; |
7f7f8214 | 2525 | #endif |
3cf2715d | 2526 | |
b2a6a2fb | 2527 | if (! JUMP_TABLES_IN_TEXT_SECTION) |
d6b5193b RS |
2528 | switch_to_section (targetm.asm_out.function_rodata_section |
2529 | (current_function_decl)); | |
b2a6a2fb | 2530 | else |
d6b5193b | 2531 | switch_to_section (current_function_section ()); |
b2a6a2fb | 2532 | |
bad4f40b | 2533 | app_disable (); |
3cf2715d | 2534 | |
e0d80184 DM |
2535 | #if defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC) |
2536 | if (GET_CODE (body) == ADDR_VEC) | |
2537 | { | |
2538 | #ifdef ASM_OUTPUT_ADDR_VEC | |
2539 | ASM_OUTPUT_ADDR_VEC (PREV_INSN (insn), body); | |
2540 | #else | |
0bccc606 | 2541 | gcc_unreachable (); |
e0d80184 DM |
2542 | #endif |
2543 | } | |
2544 | else | |
2545 | { | |
2546 | #ifdef ASM_OUTPUT_ADDR_DIFF_VEC | |
2547 | ASM_OUTPUT_ADDR_DIFF_VEC (PREV_INSN (insn), body); | |
2548 | #else | |
0bccc606 | 2549 | gcc_unreachable (); |
e0d80184 DM |
2550 | #endif |
2551 | } | |
2552 | #else | |
3cf2715d DE |
2553 | vlen = XVECLEN (body, GET_CODE (body) == ADDR_DIFF_VEC); |
2554 | for (idx = 0; idx < vlen; idx++) | |
2555 | { | |
2556 | if (GET_CODE (body) == ADDR_VEC) | |
2557 | { | |
2558 | #ifdef ASM_OUTPUT_ADDR_VEC_ELT | |
2559 | ASM_OUTPUT_ADDR_VEC_ELT | |
2560 | (file, CODE_LABEL_NUMBER (XEXP (XVECEXP (body, 0, idx), 0))); | |
2561 | #else | |
0bccc606 | 2562 | gcc_unreachable (); |
3cf2715d DE |
2563 | #endif |
2564 | } | |
2565 | else | |
2566 | { | |
2567 | #ifdef ASM_OUTPUT_ADDR_DIFF_ELT | |
2568 | ASM_OUTPUT_ADDR_DIFF_ELT | |
2569 | (file, | |
33f7f353 | 2570 | body, |
3cf2715d DE |
2571 | CODE_LABEL_NUMBER (XEXP (XVECEXP (body, 1, idx), 0)), |
2572 | CODE_LABEL_NUMBER (XEXP (XEXP (body, 0), 0))); | |
2573 | #else | |
0bccc606 | 2574 | gcc_unreachable (); |
3cf2715d DE |
2575 | #endif |
2576 | } | |
2577 | } | |
2578 | #ifdef ASM_OUTPUT_CASE_END | |
2579 | ASM_OUTPUT_CASE_END (file, | |
2580 | CODE_LABEL_NUMBER (PREV_INSN (insn)), | |
2581 | insn); | |
e0d80184 | 2582 | #endif |
3cf2715d DE |
2583 | #endif |
2584 | ||
d6b5193b | 2585 | switch_to_section (current_function_section ()); |
3cf2715d DE |
2586 | |
2587 | break; | |
2588 | } | |
0435312e JH |
2589 | /* Output this line note if it is the first or the last line |
2590 | note in a row. */ | |
725730f2 EB |
2591 | if (!DECL_IGNORED_P (current_function_decl) |
2592 | && notice_source_line (insn, &is_stmt)) | |
82f72146 DM |
2593 | { |
2594 | if (flag_verbose_asm) | |
2595 | asm_show_source (last_filename, last_linenum); | |
497b7c47 JJ |
2596 | (*debug_hooks->source_line) (last_linenum, last_columnnum, |
2597 | last_filename, last_discriminator, | |
2598 | is_stmt); | |
82f72146 | 2599 | } |
3cf2715d | 2600 | |
93671519 BE |
2601 | if (GET_CODE (body) == PARALLEL |
2602 | && GET_CODE (XVECEXP (body, 0, 0)) == ASM_INPUT) | |
2603 | body = XVECEXP (body, 0, 0); | |
2604 | ||
3cf2715d DE |
2605 | if (GET_CODE (body) == ASM_INPUT) |
2606 | { | |
36d7136e RH |
2607 | const char *string = XSTR (body, 0); |
2608 | ||
3cf2715d DE |
2609 | /* There's no telling what that did to the condition codes. */ |
2610 | CC_STATUS_INIT; | |
36d7136e RH |
2611 | |
2612 | if (string[0]) | |
3cf2715d | 2613 | { |
5ffeb913 | 2614 | expanded_location loc; |
bff4b63d | 2615 | |
3a694d86 | 2616 | app_enable (); |
5ffeb913 | 2617 | loc = expand_location (ASM_INPUT_SOURCE_LOCATION (body)); |
0de2ae02 | 2618 | if (*loc.file && loc.line) |
bff4b63d AO |
2619 | fprintf (asm_out_file, "%s %i \"%s\" 1\n", |
2620 | ASM_COMMENT_START, loc.line, loc.file); | |
36d7136e | 2621 | fprintf (asm_out_file, "\t%s\n", string); |
03943c05 AO |
2622 | #if HAVE_AS_LINE_ZERO |
2623 | if (*loc.file && loc.line) | |
bff4b63d | 2624 | fprintf (asm_out_file, "%s 0 \"\" 2\n", ASM_COMMENT_START); |
03943c05 | 2625 | #endif |
3cf2715d | 2626 | } |
3cf2715d DE |
2627 | break; |
2628 | } | |
2629 | ||
2630 | /* Detect `asm' construct with operands. */ | |
2631 | if (asm_noperands (body) >= 0) | |
2632 | { | |
22bf4422 | 2633 | unsigned int noperands = asm_noperands (body); |
1b4572a8 | 2634 | rtx *ops = XALLOCAVEC (rtx, noperands); |
3cce094d | 2635 | const char *string; |
bff4b63d | 2636 | location_t loc; |
5ffeb913 | 2637 | expanded_location expanded; |
3cf2715d DE |
2638 | |
2639 | /* There's no telling what that did to the condition codes. */ | |
2640 | CC_STATUS_INIT; | |
3cf2715d | 2641 | |
3cf2715d | 2642 | /* Get out the operand values. */ |
bff4b63d | 2643 | string = decode_asm_operands (body, ops, NULL, NULL, NULL, &loc); |
41129be2 | 2644 | /* Inhibit dying on what would otherwise be compiler bugs. */ |
3cf2715d DE |
2645 | insn_noperands = noperands; |
2646 | this_is_asm_operands = insn; | |
5ffeb913 | 2647 | expanded = expand_location (loc); |
3cf2715d | 2648 | |
ad7e39ca AO |
2649 | #ifdef FINAL_PRESCAN_INSN |
2650 | FINAL_PRESCAN_INSN (insn, ops, insn_noperands); | |
2651 | #endif | |
2652 | ||
3cf2715d | 2653 | /* Output the insn using them. */ |
36d7136e RH |
2654 | if (string[0]) |
2655 | { | |
3a694d86 | 2656 | app_enable (); |
5ffeb913 | 2657 | if (expanded.file && expanded.line) |
bff4b63d | 2658 | fprintf (asm_out_file, "%s %i \"%s\" 1\n", |
5ffeb913 | 2659 | ASM_COMMENT_START, expanded.line, expanded.file); |
36d7136e | 2660 | output_asm_insn (string, ops); |
03943c05 | 2661 | #if HAVE_AS_LINE_ZERO |
5ffeb913 | 2662 | if (expanded.file && expanded.line) |
bff4b63d | 2663 | fprintf (asm_out_file, "%s 0 \"\" 2\n", ASM_COMMENT_START); |
03943c05 | 2664 | #endif |
36d7136e RH |
2665 | } |
2666 | ||
1afc5373 CF |
2667 | if (targetm.asm_out.final_postscan_insn) |
2668 | targetm.asm_out.final_postscan_insn (file, insn, ops, | |
2669 | insn_noperands); | |
2670 | ||
3cf2715d DE |
2671 | this_is_asm_operands = 0; |
2672 | break; | |
2673 | } | |
2674 | ||
bad4f40b | 2675 | app_disable (); |
3cf2715d | 2676 | |
e429a50b | 2677 | if (rtx_sequence *seq = dyn_cast <rtx_sequence *> (body)) |
3cf2715d DE |
2678 | { |
2679 | /* A delayed-branch sequence */ | |
b3694847 | 2680 | int i; |
3cf2715d | 2681 | |
b32d5189 | 2682 | final_sequence = seq; |
3cf2715d DE |
2683 | |
2684 | /* The first insn in this SEQUENCE might be a JUMP_INSN that will | |
2685 | force the restoration of a comparison that was previously | |
2686 | thought unnecessary. If that happens, cancel this sequence | |
2687 | and cause that insn to be restored. */ | |
2688 | ||
e429a50b DM |
2689 | next = final_scan_insn (seq->insn (0), file, 0, 1, seen); |
2690 | if (next != seq->insn (1)) | |
3cf2715d DE |
2691 | { |
2692 | final_sequence = 0; | |
2693 | return next; | |
2694 | } | |
2695 | ||
e429a50b | 2696 | for (i = 1; i < seq->len (); i++) |
c7eee2df | 2697 | { |
e429a50b | 2698 | rtx_insn *insn = seq->insn (i); |
fa7af581 | 2699 | rtx_insn *next = NEXT_INSN (insn); |
c7eee2df RK |
2700 | /* We loop in case any instruction in a delay slot gets |
2701 | split. */ | |
2702 | do | |
c9d691e9 | 2703 | insn = final_scan_insn (insn, file, 0, 1, seen); |
c7eee2df RK |
2704 | while (insn != next); |
2705 | } | |
3cf2715d DE |
2706 | #ifdef DBR_OUTPUT_SEQEND |
2707 | DBR_OUTPUT_SEQEND (file); | |
2708 | #endif | |
2709 | final_sequence = 0; | |
2710 | ||
2711 | /* If the insn requiring the delay slot was a CALL_INSN, the | |
2712 | insns in the delay slot are actually executed before the | |
2713 | called function. Hence we don't preserve any CC-setting | |
2714 | actions in these insns and the CC must be marked as being | |
2715 | clobbered by the function. */ | |
e429a50b | 2716 | if (CALL_P (seq->insn (0))) |
b729186a JL |
2717 | { |
2718 | CC_STATUS_INIT; | |
2719 | } | |
3cf2715d DE |
2720 | break; |
2721 | } | |
2722 | ||
2723 | /* We have a real machine instruction as rtl. */ | |
2724 | ||
2725 | body = PATTERN (insn); | |
2726 | ||
f1e52ed6 | 2727 | #if HAVE_cc0 |
f5d927c0 | 2728 | set = single_set (insn); |
b88c92cc | 2729 | |
3cf2715d DE |
2730 | /* Check for redundant test and compare instructions |
2731 | (when the condition codes are already set up as desired). | |
2732 | This is done only when optimizing; if not optimizing, | |
2733 | it should be possible for the user to alter a variable | |
2734 | with the debugger in between statements | |
2735 | and the next statement should reexamine the variable | |
2736 | to compute the condition codes. */ | |
2737 | ||
46625112 | 2738 | if (optimize_p) |
3cf2715d | 2739 | { |
30f5e9f5 RK |
2740 | if (set |
2741 | && GET_CODE (SET_DEST (set)) == CC0 | |
2742 | && insn != last_ignored_compare) | |
3cf2715d | 2743 | { |
f90b7a5a | 2744 | rtx src1, src2; |
30f5e9f5 | 2745 | if (GET_CODE (SET_SRC (set)) == SUBREG) |
55a2c322 | 2746 | SET_SRC (set) = alter_subreg (&SET_SRC (set), true); |
f90b7a5a PB |
2747 | |
2748 | src1 = SET_SRC (set); | |
2749 | src2 = NULL_RTX; | |
2750 | if (GET_CODE (SET_SRC (set)) == COMPARE) | |
30f5e9f5 RK |
2751 | { |
2752 | if (GET_CODE (XEXP (SET_SRC (set), 0)) == SUBREG) | |
2753 | XEXP (SET_SRC (set), 0) | |
55a2c322 | 2754 | = alter_subreg (&XEXP (SET_SRC (set), 0), true); |
30f5e9f5 RK |
2755 | if (GET_CODE (XEXP (SET_SRC (set), 1)) == SUBREG) |
2756 | XEXP (SET_SRC (set), 1) | |
55a2c322 | 2757 | = alter_subreg (&XEXP (SET_SRC (set), 1), true); |
f90b7a5a PB |
2758 | if (XEXP (SET_SRC (set), 1) |
2759 | == CONST0_RTX (GET_MODE (XEXP (SET_SRC (set), 0)))) | |
2760 | src2 = XEXP (SET_SRC (set), 0); | |
30f5e9f5 RK |
2761 | } |
2762 | if ((cc_status.value1 != 0 | |
f90b7a5a | 2763 | && rtx_equal_p (src1, cc_status.value1)) |
30f5e9f5 | 2764 | || (cc_status.value2 != 0 |
f90b7a5a PB |
2765 | && rtx_equal_p (src1, cc_status.value2)) |
2766 | || (src2 != 0 && cc_status.value1 != 0 | |
2767 | && rtx_equal_p (src2, cc_status.value1)) | |
2768 | || (src2 != 0 && cc_status.value2 != 0 | |
2769 | && rtx_equal_p (src2, cc_status.value2))) | |
3cf2715d | 2770 | { |
30f5e9f5 | 2771 | /* Don't delete insn if it has an addressing side-effect. */ |
ff81832f | 2772 | if (! FIND_REG_INC_NOTE (insn, NULL_RTX) |
30f5e9f5 RK |
2773 | /* or if anything in it is volatile. */ |
2774 | && ! volatile_refs_p (PATTERN (insn))) | |
2775 | { | |
2776 | /* We don't really delete the insn; just ignore it. */ | |
2777 | last_ignored_compare = insn; | |
2778 | break; | |
2779 | } | |
3cf2715d DE |
2780 | } |
2781 | } | |
2782 | } | |
3cf2715d | 2783 | |
3cf2715d DE |
2784 | /* If this is a conditional branch, maybe modify it |
2785 | if the cc's are in a nonstandard state | |
2786 | so that it accomplishes the same thing that it would | |
2787 | do straightforwardly if the cc's were set up normally. */ | |
2788 | ||
2789 | if (cc_status.flags != 0 | |
4b4bf941 | 2790 | && JUMP_P (insn) |
3cf2715d DE |
2791 | && GET_CODE (body) == SET |
2792 | && SET_DEST (body) == pc_rtx | |
2793 | && GET_CODE (SET_SRC (body)) == IF_THEN_ELSE | |
ec8e098d | 2794 | && COMPARISON_P (XEXP (SET_SRC (body), 0)) |
c9d691e9 | 2795 | && XEXP (XEXP (SET_SRC (body), 0), 0) == cc0_rtx) |
3cf2715d DE |
2796 | { |
2797 | /* This function may alter the contents of its argument | |
2798 | and clear some of the cc_status.flags bits. | |
2799 | It may also return 1 meaning condition now always true | |
2800 | or -1 meaning condition now always false | |
2801 | or 2 meaning condition nontrivial but altered. */ | |
b3694847 | 2802 | int result = alter_cond (XEXP (SET_SRC (body), 0)); |
3cf2715d DE |
2803 | /* If condition now has fixed value, replace the IF_THEN_ELSE |
2804 | with its then-operand or its else-operand. */ | |
2805 | if (result == 1) | |
2806 | SET_SRC (body) = XEXP (SET_SRC (body), 1); | |
2807 | if (result == -1) | |
2808 | SET_SRC (body) = XEXP (SET_SRC (body), 2); | |
2809 | ||
2810 | /* The jump is now either unconditional or a no-op. | |
2811 | If it has become a no-op, don't try to output it. | |
2812 | (It would not be recognized.) */ | |
2813 | if (SET_SRC (body) == pc_rtx) | |
2814 | { | |
ca6c03ca | 2815 | delete_insn (insn); |
3cf2715d DE |
2816 | break; |
2817 | } | |
26898771 | 2818 | else if (ANY_RETURN_P (SET_SRC (body))) |
3cf2715d DE |
2819 | /* Replace (set (pc) (return)) with (return). */ |
2820 | PATTERN (insn) = body = SET_SRC (body); | |
2821 | ||
2822 | /* Rerecognize the instruction if it has changed. */ | |
2823 | if (result != 0) | |
2824 | INSN_CODE (insn) = -1; | |
2825 | } | |
2826 | ||
604e4ce3 | 2827 | /* If this is a conditional trap, maybe modify it if the cc's |
604e4ce3 KH |
2828 | are in a nonstandard state so that it accomplishes the same |
2829 | thing that it would do straightforwardly if the cc's were | |
2830 | set up normally. */ | |
2831 | if (cc_status.flags != 0 | |
2832 | && NONJUMP_INSN_P (insn) | |
2833 | && GET_CODE (body) == TRAP_IF | |
2834 | && COMPARISON_P (TRAP_CONDITION (body)) | |
2835 | && XEXP (TRAP_CONDITION (body), 0) == cc0_rtx) | |
2836 | { | |
2837 | /* This function may alter the contents of its argument | |
2838 | and clear some of the cc_status.flags bits. | |
2839 | It may also return 1 meaning condition now always true | |
2840 | or -1 meaning condition now always false | |
2841 | or 2 meaning condition nontrivial but altered. */ | |
2842 | int result = alter_cond (TRAP_CONDITION (body)); | |
2843 | ||
2844 | /* If TRAP_CONDITION has become always false, delete the | |
2845 | instruction. */ | |
2846 | if (result == -1) | |
2847 | { | |
2848 | delete_insn (insn); | |
2849 | break; | |
2850 | } | |
2851 | ||
2852 | /* If TRAP_CONDITION has become always true, replace | |
2853 | TRAP_CONDITION with const_true_rtx. */ | |
2854 | if (result == 1) | |
2855 | TRAP_CONDITION (body) = const_true_rtx; | |
2856 | ||
2857 | /* Rerecognize the instruction if it has changed. */ | |
2858 | if (result != 0) | |
2859 | INSN_CODE (insn) = -1; | |
2860 | } | |
2861 | ||
3cf2715d | 2862 | /* Make same adjustments to instructions that examine the |
462da2af SC |
2863 | condition codes without jumping and instructions that |
2864 | handle conditional moves (if this machine has either one). */ | |
3cf2715d DE |
2865 | |
2866 | if (cc_status.flags != 0 | |
b88c92cc | 2867 | && set != 0) |
3cf2715d | 2868 | { |
462da2af | 2869 | rtx cond_rtx, then_rtx, else_rtx; |
f5d927c0 | 2870 | |
4b4bf941 | 2871 | if (!JUMP_P (insn) |
b88c92cc | 2872 | && GET_CODE (SET_SRC (set)) == IF_THEN_ELSE) |
462da2af | 2873 | { |
b88c92cc RK |
2874 | cond_rtx = XEXP (SET_SRC (set), 0); |
2875 | then_rtx = XEXP (SET_SRC (set), 1); | |
2876 | else_rtx = XEXP (SET_SRC (set), 2); | |
462da2af SC |
2877 | } |
2878 | else | |
2879 | { | |
b88c92cc | 2880 | cond_rtx = SET_SRC (set); |
462da2af SC |
2881 | then_rtx = const_true_rtx; |
2882 | else_rtx = const0_rtx; | |
2883 | } | |
f5d927c0 | 2884 | |
511d31d8 AS |
2885 | if (COMPARISON_P (cond_rtx) |
2886 | && XEXP (cond_rtx, 0) == cc0_rtx) | |
3cf2715d | 2887 | { |
511d31d8 AS |
2888 | int result; |
2889 | result = alter_cond (cond_rtx); | |
2890 | if (result == 1) | |
2891 | validate_change (insn, &SET_SRC (set), then_rtx, 0); | |
2892 | else if (result == -1) | |
2893 | validate_change (insn, &SET_SRC (set), else_rtx, 0); | |
2894 | else if (result == 2) | |
2895 | INSN_CODE (insn) = -1; | |
2896 | if (SET_DEST (set) == SET_SRC (set)) | |
2897 | delete_insn (insn); | |
3cf2715d DE |
2898 | } |
2899 | } | |
462da2af | 2900 | |
3cf2715d DE |
2901 | #endif |
2902 | ||
2903 | /* Do machine-specific peephole optimizations if desired. */ | |
2904 | ||
d87834de | 2905 | if (HAVE_peephole && optimize_p && !flag_no_peephole && !nopeepholes) |
3cf2715d | 2906 | { |
fa7af581 | 2907 | rtx_insn *next = peephole (insn); |
3cf2715d DE |
2908 | /* When peepholing, if there were notes within the peephole, |
2909 | emit them before the peephole. */ | |
2910 | if (next != 0 && next != NEXT_INSN (insn)) | |
2911 | { | |
fa7af581 | 2912 | rtx_insn *note, *prev = PREV_INSN (insn); |
3cf2715d DE |
2913 | |
2914 | for (note = NEXT_INSN (insn); note != next; | |
2915 | note = NEXT_INSN (note)) | |
46625112 | 2916 | final_scan_insn (note, file, optimize_p, nopeepholes, seen); |
a2785739 ILT |
2917 | |
2918 | /* Put the notes in the proper position for a later | |
2919 | rescan. For example, the SH target can do this | |
2920 | when generating a far jump in a delayed branch | |
2921 | sequence. */ | |
2922 | note = NEXT_INSN (insn); | |
0f82e5c9 DM |
2923 | SET_PREV_INSN (note) = prev; |
2924 | SET_NEXT_INSN (prev) = note; | |
2925 | SET_NEXT_INSN (PREV_INSN (next)) = insn; | |
2926 | SET_PREV_INSN (insn) = PREV_INSN (next); | |
2927 | SET_NEXT_INSN (insn) = next; | |
2928 | SET_PREV_INSN (next) = insn; | |
3cf2715d DE |
2929 | } |
2930 | ||
2931 | /* PEEPHOLE might have changed this. */ | |
2932 | body = PATTERN (insn); | |
2933 | } | |
2934 | ||
2935 | /* Try to recognize the instruction. | |
2936 | If successful, verify that the operands satisfy the | |
2937 | constraints for the instruction. Crash if they don't, | |
2938 | since `reload' should have changed them so that they do. */ | |
2939 | ||
2940 | insn_code_number = recog_memoized (insn); | |
0304f787 | 2941 | cleanup_subreg_operands (insn); |
3cf2715d | 2942 | |
8c503f0d SB |
2943 | /* Dump the insn in the assembly for debugging (-dAP). |
2944 | If the final dump is requested as slim RTL, dump slim | |
2945 | RTL to the assembly file also. */ | |
dd3f0101 KH |
2946 | if (flag_dump_rtl_in_asm) |
2947 | { | |
2948 | print_rtx_head = ASM_COMMENT_START; | |
8c503f0d SB |
2949 | if (! (dump_flags & TDF_SLIM)) |
2950 | print_rtl_single (asm_out_file, insn); | |
2951 | else | |
2952 | dump_insn_slim (asm_out_file, insn); | |
dd3f0101 KH |
2953 | print_rtx_head = ""; |
2954 | } | |
b9f22704 | 2955 | |
daca1a96 | 2956 | if (! constrain_operands_cached (insn, 1)) |
3cf2715d | 2957 | fatal_insn_not_found (insn); |
3cf2715d DE |
2958 | |
2959 | /* Some target machines need to prescan each insn before | |
2960 | it is output. */ | |
2961 | ||
2962 | #ifdef FINAL_PRESCAN_INSN | |
1ccbefce | 2963 | FINAL_PRESCAN_INSN (insn, recog_data.operand, recog_data.n_operands); |
3cf2715d DE |
2964 | #endif |
2965 | ||
2929029c WG |
2966 | if (targetm.have_conditional_execution () |
2967 | && GET_CODE (PATTERN (insn)) == COND_EXEC) | |
afe48e06 | 2968 | current_insn_predicate = COND_EXEC_TEST (PATTERN (insn)); |
afe48e06 | 2969 | |
f1e52ed6 | 2970 | #if HAVE_cc0 |
3cf2715d DE |
2971 | cc_prev_status = cc_status; |
2972 | ||
2973 | /* Update `cc_status' for this instruction. | |
2974 | The instruction's output routine may change it further. | |
2975 | If the output routine for a jump insn needs to depend | |
2976 | on the cc status, it should look at cc_prev_status. */ | |
2977 | ||
2978 | NOTICE_UPDATE_CC (body, insn); | |
2979 | #endif | |
2980 | ||
b1a9f6a0 | 2981 | current_output_insn = debug_insn = insn; |
3cf2715d | 2982 | |
4bbf910e | 2983 | /* Find the proper template for this insn. */ |
48c54229 | 2984 | templ = get_insn_template (insn_code_number, insn); |
3cf2715d | 2985 | |
4bbf910e RH |
2986 | /* If the C code returns 0, it means that it is a jump insn |
2987 | which follows a deleted test insn, and that test insn | |
2988 | needs to be reinserted. */ | |
48c54229 | 2989 | if (templ == 0) |
3cf2715d | 2990 | { |
fa7af581 | 2991 | rtx_insn *prev; |
efd0378b | 2992 | |
0bccc606 | 2993 | gcc_assert (prev_nonnote_insn (insn) == last_ignored_compare); |
efd0378b HPN |
2994 | |
2995 | /* We have already processed the notes between the setter and | |
2996 | the user. Make sure we don't process them again, this is | |
2997 | particularly important if one of the notes is a block | |
2998 | scope note or an EH note. */ | |
2999 | for (prev = insn; | |
3000 | prev != last_ignored_compare; | |
3001 | prev = PREV_INSN (prev)) | |
3002 | { | |
4b4bf941 | 3003 | if (NOTE_P (prev)) |
ca6c03ca | 3004 | delete_insn (prev); /* Use delete_note. */ |
efd0378b HPN |
3005 | } |
3006 | ||
3007 | return prev; | |
3cf2715d DE |
3008 | } |
3009 | ||
3010 | /* If the template is the string "#", it means that this insn must | |
3011 | be split. */ | |
48c54229 | 3012 | if (templ[0] == '#' && templ[1] == '\0') |
3cf2715d | 3013 | { |
fa7af581 | 3014 | rtx_insn *new_rtx = try_split (body, insn, 0); |
3cf2715d DE |
3015 | |
3016 | /* If we didn't split the insn, go away. */ | |
48c54229 | 3017 | if (new_rtx == insn && PATTERN (new_rtx) == body) |
c725bd79 | 3018 | fatal_insn ("could not split insn", insn); |
f5d927c0 | 3019 | |
d327457f JR |
3020 | /* If we have a length attribute, this instruction should have |
3021 | been split in shorten_branches, to ensure that we would have | |
3022 | valid length info for the splitees. */ | |
3023 | gcc_assert (!HAVE_ATTR_length); | |
3d14e82f | 3024 | |
48c54229 | 3025 | return new_rtx; |
3cf2715d | 3026 | } |
f5d927c0 | 3027 | |
951120ea PB |
3028 | /* ??? This will put the directives in the wrong place if |
3029 | get_insn_template outputs assembly directly. However calling it | |
3030 | before get_insn_template breaks if the insns is split. */ | |
3bc6b3e6 RH |
3031 | if (targetm.asm_out.unwind_emit_before_insn |
3032 | && targetm.asm_out.unwind_emit) | |
2784ed9c | 3033 | targetm.asm_out.unwind_emit (asm_out_file, insn); |
3cf2715d | 3034 | |
f2834b5d PMR |
3035 | rtx_call_insn *call_insn = dyn_cast <rtx_call_insn *> (insn); |
3036 | if (call_insn != NULL) | |
f410e1b3 | 3037 | { |
fa7af581 | 3038 | rtx x = call_from_call_insn (call_insn); |
f410e1b3 RAE |
3039 | x = XEXP (x, 0); |
3040 | if (x && MEM_P (x) && GET_CODE (XEXP (x, 0)) == SYMBOL_REF) | |
3041 | { | |
3042 | tree t; | |
3043 | x = XEXP (x, 0); | |
3044 | t = SYMBOL_REF_DECL (x); | |
3045 | if (t) | |
3046 | assemble_external (t); | |
3047 | } | |
3048 | } | |
3049 | ||
951120ea | 3050 | /* Output assembler code from the template. */ |
48c54229 | 3051 | output_asm_insn (templ, recog_data.operand); |
3cf2715d | 3052 | |
1afc5373 CF |
3053 | /* Some target machines need to postscan each insn after |
3054 | it is output. */ | |
3055 | if (targetm.asm_out.final_postscan_insn) | |
3056 | targetm.asm_out.final_postscan_insn (file, insn, recog_data.operand, | |
3057 | recog_data.n_operands); | |
3058 | ||
3bc6b3e6 RH |
3059 | if (!targetm.asm_out.unwind_emit_before_insn |
3060 | && targetm.asm_out.unwind_emit) | |
3061 | targetm.asm_out.unwind_emit (asm_out_file, insn); | |
3062 | ||
f2834b5d PMR |
3063 | /* Let the debug info back-end know about this call. We do this only |
3064 | after the instruction has been emitted because labels that may be | |
3065 | created to reference the call instruction must appear after it. */ | |
3066 | if (call_insn != NULL && !DECL_IGNORED_P (current_function_decl)) | |
3067 | debug_hooks->var_location (insn); | |
3068 | ||
b1a9f6a0 | 3069 | current_output_insn = debug_insn = 0; |
3cf2715d DE |
3070 | } |
3071 | } | |
3072 | return NEXT_INSN (insn); | |
3073 | } | |
3074 | \f | |
ed5ef2e4 CC |
3075 | /* Return whether a source line note needs to be emitted before INSN. |
3076 | Sets IS_STMT to TRUE if the line should be marked as a possible | |
3077 | breakpoint location. */ | |
3cf2715d | 3078 | |
0435312e | 3079 | static bool |
fa7af581 | 3080 | notice_source_line (rtx_insn *insn, bool *is_stmt) |
3cf2715d | 3081 | { |
d752cfdb | 3082 | const char *filename; |
497b7c47 | 3083 | int linenum, columnnum; |
d752cfdb JJ |
3084 | |
3085 | if (override_filename) | |
3086 | { | |
3087 | filename = override_filename; | |
3088 | linenum = override_linenum; | |
497b7c47 | 3089 | columnnum = override_columnnum; |
d752cfdb | 3090 | } |
ffa4602f EB |
3091 | else if (INSN_HAS_LOCATION (insn)) |
3092 | { | |
3093 | expanded_location xloc = insn_location (insn); | |
3094 | filename = xloc.file; | |
3095 | linenum = xloc.line; | |
497b7c47 | 3096 | columnnum = xloc.column; |
ffa4602f | 3097 | } |
d752cfdb JJ |
3098 | else |
3099 | { | |
ffa4602f EB |
3100 | filename = NULL; |
3101 | linenum = 0; | |
497b7c47 | 3102 | columnnum = 0; |
d752cfdb | 3103 | } |
3cf2715d | 3104 | |
ed5ef2e4 CC |
3105 | if (filename == NULL) |
3106 | return false; | |
3107 | ||
3108 | if (force_source_line | |
3109 | || filename != last_filename | |
497b7c47 JJ |
3110 | || last_linenum != linenum |
3111 | || (debug_column_info && last_columnnum != columnnum)) | |
0435312e | 3112 | { |
b8176fe4 | 3113 | force_source_line = false; |
0435312e JH |
3114 | last_filename = filename; |
3115 | last_linenum = linenum; | |
497b7c47 | 3116 | last_columnnum = columnnum; |
6c52e687 | 3117 | last_discriminator = discriminator; |
ed5ef2e4 | 3118 | *is_stmt = true; |
0435312e JH |
3119 | high_block_linenum = MAX (last_linenum, high_block_linenum); |
3120 | high_function_linenum = MAX (last_linenum, high_function_linenum); | |
3121 | return true; | |
3122 | } | |
ed5ef2e4 CC |
3123 | |
3124 | if (SUPPORTS_DISCRIMINATOR && last_discriminator != discriminator) | |
3125 | { | |
3126 | /* If the discriminator changed, but the line number did not, | |
3127 | output the line table entry with is_stmt false so the | |
3128 | debugger does not treat this as a breakpoint location. */ | |
3129 | last_discriminator = discriminator; | |
3130 | *is_stmt = false; | |
3131 | return true; | |
3132 | } | |
3133 | ||
0435312e | 3134 | return false; |
3cf2715d DE |
3135 | } |
3136 | \f | |
0304f787 JL |
3137 | /* For each operand in INSN, simplify (subreg (reg)) so that it refers |
3138 | directly to the desired hard register. */ | |
f5d927c0 | 3139 | |
0304f787 | 3140 | void |
647d790d | 3141 | cleanup_subreg_operands (rtx_insn *insn) |
0304f787 | 3142 | { |
f62a15e3 | 3143 | int i; |
6fb5fa3c | 3144 | bool changed = false; |
6c698a6d | 3145 | extract_insn_cached (insn); |
1ccbefce | 3146 | for (i = 0; i < recog_data.n_operands; i++) |
0304f787 | 3147 | { |
2067c116 | 3148 | /* The following test cannot use recog_data.operand when testing |
9f4524f2 RE |
3149 | for a SUBREG: the underlying object might have been changed |
3150 | already if we are inside a match_operator expression that | |
3151 | matches the else clause. Instead we test the underlying | |
3152 | expression directly. */ | |
3153 | if (GET_CODE (*recog_data.operand_loc[i]) == SUBREG) | |
6fb5fa3c | 3154 | { |
55a2c322 | 3155 | recog_data.operand[i] = alter_subreg (recog_data.operand_loc[i], true); |
6fb5fa3c DB |
3156 | changed = true; |
3157 | } | |
1ccbefce | 3158 | else if (GET_CODE (recog_data.operand[i]) == PLUS |
04337620 | 3159 | || GET_CODE (recog_data.operand[i]) == MULT |
3c0cb5de | 3160 | || MEM_P (recog_data.operand[i])) |
6fb5fa3c | 3161 | recog_data.operand[i] = walk_alter_subreg (recog_data.operand_loc[i], &changed); |
0304f787 JL |
3162 | } |
3163 | ||
1ccbefce | 3164 | for (i = 0; i < recog_data.n_dups; i++) |
0304f787 | 3165 | { |
1ccbefce | 3166 | if (GET_CODE (*recog_data.dup_loc[i]) == SUBREG) |
6fb5fa3c | 3167 | { |
55a2c322 | 3168 | *recog_data.dup_loc[i] = alter_subreg (recog_data.dup_loc[i], true); |
6fb5fa3c DB |
3169 | changed = true; |
3170 | } | |
1ccbefce | 3171 | else if (GET_CODE (*recog_data.dup_loc[i]) == PLUS |
04337620 | 3172 | || GET_CODE (*recog_data.dup_loc[i]) == MULT |
3c0cb5de | 3173 | || MEM_P (*recog_data.dup_loc[i])) |
6fb5fa3c | 3174 | *recog_data.dup_loc[i] = walk_alter_subreg (recog_data.dup_loc[i], &changed); |
0304f787 | 3175 | } |
6fb5fa3c | 3176 | if (changed) |
647d790d | 3177 | df_insn_rescan (insn); |
0304f787 JL |
3178 | } |
3179 | ||
55a2c322 VM |
3180 | /* If X is a SUBREG, try to replace it with a REG or a MEM, based on |
3181 | the thing it is a subreg of. Do it anyway if FINAL_P. */ | |
3cf2715d DE |
3182 | |
3183 | rtx | |
55a2c322 | 3184 | alter_subreg (rtx *xp, bool final_p) |
3cf2715d | 3185 | { |
49d801d3 | 3186 | rtx x = *xp; |
b3694847 | 3187 | rtx y = SUBREG_REG (x); |
f5963e61 | 3188 | |
49d801d3 JH |
3189 | /* simplify_subreg does not remove subreg from volatile references. |
3190 | We are required to. */ | |
3c0cb5de | 3191 | if (MEM_P (y)) |
fd326ba8 UW |
3192 | { |
3193 | int offset = SUBREG_BYTE (x); | |
3194 | ||
3195 | /* For paradoxical subregs on big-endian machines, SUBREG_BYTE | |
3196 | contains 0 instead of the proper offset. See simplify_subreg. */ | |
03a95621 | 3197 | if (paradoxical_subreg_p (x)) |
90f2b7e2 | 3198 | offset = byte_lowpart_offset (GET_MODE (x), GET_MODE (y)); |
fd326ba8 | 3199 | |
55a2c322 VM |
3200 | if (final_p) |
3201 | *xp = adjust_address (y, GET_MODE (x), offset); | |
3202 | else | |
3203 | *xp = adjust_address_nv (y, GET_MODE (x), offset); | |
fd326ba8 | 3204 | } |
a50fa76a | 3205 | else if (REG_P (y) && HARD_REGISTER_P (y)) |
fea54805 | 3206 | { |
48c54229 | 3207 | rtx new_rtx = simplify_subreg (GET_MODE (x), y, GET_MODE (y), |
55a2c322 | 3208 | SUBREG_BYTE (x)); |
fea54805 | 3209 | |
48c54229 KG |
3210 | if (new_rtx != 0) |
3211 | *xp = new_rtx; | |
55a2c322 | 3212 | else if (final_p && REG_P (y)) |
fea54805 | 3213 | { |
0bccc606 | 3214 | /* Simplify_subreg can't handle some REG cases, but we have to. */ |
38ae7651 RS |
3215 | unsigned int regno; |
3216 | HOST_WIDE_INT offset; | |
3217 | ||
3218 | regno = subreg_regno (x); | |
3219 | if (subreg_lowpart_p (x)) | |
3220 | offset = byte_lowpart_offset (GET_MODE (x), GET_MODE (y)); | |
3221 | else | |
3222 | offset = SUBREG_BYTE (x); | |
3223 | *xp = gen_rtx_REG_offset (y, GET_MODE (x), regno, offset); | |
fea54805 | 3224 | } |
fea54805 RK |
3225 | } |
3226 | ||
49d801d3 | 3227 | return *xp; |
3cf2715d DE |
3228 | } |
3229 | ||
3230 | /* Do alter_subreg on all the SUBREGs contained in X. */ | |
3231 | ||
3232 | static rtx | |
6fb5fa3c | 3233 | walk_alter_subreg (rtx *xp, bool *changed) |
3cf2715d | 3234 | { |
49d801d3 | 3235 | rtx x = *xp; |
3cf2715d DE |
3236 | switch (GET_CODE (x)) |
3237 | { | |
3238 | case PLUS: | |
3239 | case MULT: | |
beed8fc0 | 3240 | case AND: |
6fb5fa3c DB |
3241 | XEXP (x, 0) = walk_alter_subreg (&XEXP (x, 0), changed); |
3242 | XEXP (x, 1) = walk_alter_subreg (&XEXP (x, 1), changed); | |
3cf2715d DE |
3243 | break; |
3244 | ||
3245 | case MEM: | |
beed8fc0 | 3246 | case ZERO_EXTEND: |
6fb5fa3c | 3247 | XEXP (x, 0) = walk_alter_subreg (&XEXP (x, 0), changed); |
3cf2715d DE |
3248 | break; |
3249 | ||
3250 | case SUBREG: | |
6fb5fa3c | 3251 | *changed = true; |
55a2c322 | 3252 | return alter_subreg (xp, true); |
f5d927c0 | 3253 | |
e9a25f70 JL |
3254 | default: |
3255 | break; | |
3cf2715d DE |
3256 | } |
3257 | ||
5bc72aeb | 3258 | return *xp; |
3cf2715d DE |
3259 | } |
3260 | \f | |
f1e52ed6 | 3261 | #if HAVE_cc0 |
3cf2715d DE |
3262 | |
3263 | /* Given BODY, the body of a jump instruction, alter the jump condition | |
3264 | as required by the bits that are set in cc_status.flags. | |
3265 | Not all of the bits there can be handled at this level in all cases. | |
3266 | ||
3267 | The value is normally 0. | |
3268 | 1 means that the condition has become always true. | |
3269 | -1 means that the condition has become always false. | |
3270 | 2 means that COND has been altered. */ | |
3271 | ||
3272 | static int | |
6cf9ac28 | 3273 | alter_cond (rtx cond) |
3cf2715d DE |
3274 | { |
3275 | int value = 0; | |
3276 | ||
3277 | if (cc_status.flags & CC_REVERSED) | |
3278 | { | |
3279 | value = 2; | |
3280 | PUT_CODE (cond, swap_condition (GET_CODE (cond))); | |
3281 | } | |
3282 | ||
3283 | if (cc_status.flags & CC_INVERTED) | |
3284 | { | |
3285 | value = 2; | |
3286 | PUT_CODE (cond, reverse_condition (GET_CODE (cond))); | |
3287 | } | |
3288 | ||
3289 | if (cc_status.flags & CC_NOT_POSITIVE) | |
3290 | switch (GET_CODE (cond)) | |
3291 | { | |
3292 | case LE: | |
3293 | case LEU: | |
3294 | case GEU: | |
3295 | /* Jump becomes unconditional. */ | |
3296 | return 1; | |
3297 | ||
3298 | case GT: | |
3299 | case GTU: | |
3300 | case LTU: | |
3301 | /* Jump becomes no-op. */ | |
3302 | return -1; | |
3303 | ||
3304 | case GE: | |
3305 | PUT_CODE (cond, EQ); | |
3306 | value = 2; | |
3307 | break; | |
3308 | ||
3309 | case LT: | |
3310 | PUT_CODE (cond, NE); | |
3311 | value = 2; | |
3312 | break; | |
f5d927c0 | 3313 | |
e9a25f70 JL |
3314 | default: |
3315 | break; | |
3cf2715d DE |
3316 | } |
3317 | ||
3318 | if (cc_status.flags & CC_NOT_NEGATIVE) | |
3319 | switch (GET_CODE (cond)) | |
3320 | { | |
3321 | case GE: | |
3322 | case GEU: | |
3323 | /* Jump becomes unconditional. */ | |
3324 | return 1; | |
3325 | ||
3326 | case LT: | |
3327 | case LTU: | |
3328 | /* Jump becomes no-op. */ | |
3329 | return -1; | |
3330 | ||
3331 | case LE: | |
3332 | case LEU: | |
3333 | PUT_CODE (cond, EQ); | |
3334 | value = 2; | |
3335 | break; | |
3336 | ||
3337 | case GT: | |
3338 | case GTU: | |
3339 | PUT_CODE (cond, NE); | |
3340 | value = 2; | |
3341 | break; | |
f5d927c0 | 3342 | |
e9a25f70 JL |
3343 | default: |
3344 | break; | |
3cf2715d DE |
3345 | } |
3346 | ||
3347 | if (cc_status.flags & CC_NO_OVERFLOW) | |
3348 | switch (GET_CODE (cond)) | |
3349 | { | |
3350 | case GEU: | |
3351 | /* Jump becomes unconditional. */ | |
3352 | return 1; | |
3353 | ||
3354 | case LEU: | |
3355 | PUT_CODE (cond, EQ); | |
3356 | value = 2; | |
3357 | break; | |
3358 | ||
3359 | case GTU: | |
3360 | PUT_CODE (cond, NE); | |
3361 | value = 2; | |
3362 | break; | |
3363 | ||
3364 | case LTU: | |
3365 | /* Jump becomes no-op. */ | |
3366 | return -1; | |
f5d927c0 | 3367 | |
e9a25f70 JL |
3368 | default: |
3369 | break; | |
3cf2715d DE |
3370 | } |
3371 | ||
3372 | if (cc_status.flags & (CC_Z_IN_NOT_N | CC_Z_IN_N)) | |
3373 | switch (GET_CODE (cond)) | |
3374 | { | |
e9a25f70 | 3375 | default: |
0bccc606 | 3376 | gcc_unreachable (); |
3cf2715d DE |
3377 | |
3378 | case NE: | |
3379 | PUT_CODE (cond, cc_status.flags & CC_Z_IN_N ? GE : LT); | |
3380 | value = 2; | |
3381 | break; | |
3382 | ||
3383 | case EQ: | |
3384 | PUT_CODE (cond, cc_status.flags & CC_Z_IN_N ? LT : GE); | |
3385 | value = 2; | |
3386 | break; | |
3387 | } | |
3388 | ||
3389 | if (cc_status.flags & CC_NOT_SIGNED) | |
3390 | /* The flags are valid if signed condition operators are converted | |
3391 | to unsigned. */ | |
3392 | switch (GET_CODE (cond)) | |
3393 | { | |
3394 | case LE: | |
3395 | PUT_CODE (cond, LEU); | |
3396 | value = 2; | |
3397 | break; | |
3398 | ||
3399 | case LT: | |
3400 | PUT_CODE (cond, LTU); | |
3401 | value = 2; | |
3402 | break; | |
3403 | ||
3404 | case GT: | |
3405 | PUT_CODE (cond, GTU); | |
3406 | value = 2; | |
3407 | break; | |
3408 | ||
3409 | case GE: | |
3410 | PUT_CODE (cond, GEU); | |
3411 | value = 2; | |
3412 | break; | |
e9a25f70 JL |
3413 | |
3414 | default: | |
3415 | break; | |
3cf2715d DE |
3416 | } |
3417 | ||
3418 | return value; | |
3419 | } | |
3420 | #endif | |
3421 | \f | |
3422 | /* Report inconsistency between the assembler template and the operands. | |
3423 | In an `asm', it's the user's fault; otherwise, the compiler's fault. */ | |
3424 | ||
3425 | void | |
4b794eaf | 3426 | output_operand_lossage (const char *cmsgid, ...) |
3cf2715d | 3427 | { |
a52453cc PT |
3428 | char *fmt_string; |
3429 | char *new_message; | |
fd478a0a | 3430 | const char *pfx_str; |
e34d07f2 | 3431 | va_list ap; |
6cf9ac28 | 3432 | |
4b794eaf | 3433 | va_start (ap, cmsgid); |
a52453cc | 3434 | |
9e637a26 | 3435 | pfx_str = this_is_asm_operands ? _("invalid 'asm': ") : "output_operand: "; |
582f770b UB |
3436 | fmt_string = xasprintf ("%s%s", pfx_str, _(cmsgid)); |
3437 | new_message = xvasprintf (fmt_string, ap); | |
dd3f0101 | 3438 | |
3cf2715d | 3439 | if (this_is_asm_operands) |
a52453cc | 3440 | error_for_asm (this_is_asm_operands, "%s", new_message); |
3cf2715d | 3441 | else |
a52453cc PT |
3442 | internal_error ("%s", new_message); |
3443 | ||
3444 | free (fmt_string); | |
3445 | free (new_message); | |
e34d07f2 | 3446 | va_end (ap); |
3cf2715d DE |
3447 | } |
3448 | \f | |
3449 | /* Output of assembler code from a template, and its subroutines. */ | |
3450 | ||
0d4903b8 RK |
3451 | /* Annotate the assembly with a comment describing the pattern and |
3452 | alternative used. */ | |
3453 | ||
3454 | static void | |
6cf9ac28 | 3455 | output_asm_name (void) |
0d4903b8 RK |
3456 | { |
3457 | if (debug_insn) | |
3458 | { | |
3459 | int num = INSN_CODE (debug_insn); | |
3460 | fprintf (asm_out_file, "\t%s %d\t%s", | |
3461 | ASM_COMMENT_START, INSN_UID (debug_insn), | |
3462 | insn_data[num].name); | |
3463 | if (insn_data[num].n_alternatives > 1) | |
3464 | fprintf (asm_out_file, "/%d", which_alternative + 1); | |
d327457f JR |
3465 | |
3466 | if (HAVE_ATTR_length) | |
3467 | fprintf (asm_out_file, "\t[length = %d]", | |
3468 | get_attr_length (debug_insn)); | |
3469 | ||
0d4903b8 RK |
3470 | /* Clear this so only the first assembler insn |
3471 | of any rtl insn will get the special comment for -dp. */ | |
3472 | debug_insn = 0; | |
3473 | } | |
3474 | } | |
3475 | ||
998d7deb RH |
3476 | /* If OP is a REG or MEM and we can find a MEM_EXPR corresponding to it |
3477 | or its address, return that expr . Set *PADDRESSP to 1 if the expr | |
c5adc06a RK |
3478 | corresponds to the address of the object and 0 if to the object. */ |
3479 | ||
3480 | static tree | |
6cf9ac28 | 3481 | get_mem_expr_from_op (rtx op, int *paddressp) |
c5adc06a | 3482 | { |
998d7deb | 3483 | tree expr; |
c5adc06a RK |
3484 | int inner_addressp; |
3485 | ||
3486 | *paddressp = 0; | |
3487 | ||
f8cfc6aa | 3488 | if (REG_P (op)) |
a560d4d4 | 3489 | return REG_EXPR (op); |
3c0cb5de | 3490 | else if (!MEM_P (op)) |
c5adc06a RK |
3491 | return 0; |
3492 | ||
998d7deb RH |
3493 | if (MEM_EXPR (op) != 0) |
3494 | return MEM_EXPR (op); | |
c5adc06a RK |
3495 | |
3496 | /* Otherwise we have an address, so indicate it and look at the address. */ | |
3497 | *paddressp = 1; | |
3498 | op = XEXP (op, 0); | |
3499 | ||
3500 | /* First check if we have a decl for the address, then look at the right side | |
3501 | if it is a PLUS. Otherwise, strip off arithmetic and keep looking. | |
3502 | But don't allow the address to itself be indirect. */ | |
998d7deb RH |
3503 | if ((expr = get_mem_expr_from_op (op, &inner_addressp)) && ! inner_addressp) |
3504 | return expr; | |
c5adc06a | 3505 | else if (GET_CODE (op) == PLUS |
998d7deb RH |
3506 | && (expr = get_mem_expr_from_op (XEXP (op, 1), &inner_addressp))) |
3507 | return expr; | |
c5adc06a | 3508 | |
481683e1 | 3509 | while (UNARY_P (op) |
ec8e098d | 3510 | || GET_RTX_CLASS (GET_CODE (op)) == RTX_BIN_ARITH) |
c5adc06a RK |
3511 | op = XEXP (op, 0); |
3512 | ||
998d7deb RH |
3513 | expr = get_mem_expr_from_op (op, &inner_addressp); |
3514 | return inner_addressp ? 0 : expr; | |
c5adc06a | 3515 | } |
ff81832f | 3516 | |
4f9b4029 RK |
3517 | /* Output operand names for assembler instructions. OPERANDS is the |
3518 | operand vector, OPORDER is the order to write the operands, and NOPS | |
3519 | is the number of operands to write. */ | |
3520 | ||
3521 | static void | |
6cf9ac28 | 3522 | output_asm_operand_names (rtx *operands, int *oporder, int nops) |
4f9b4029 RK |
3523 | { |
3524 | int wrote = 0; | |
3525 | int i; | |
3526 | ||
3527 | for (i = 0; i < nops; i++) | |
3528 | { | |
3529 | int addressp; | |
a560d4d4 JH |
3530 | rtx op = operands[oporder[i]]; |
3531 | tree expr = get_mem_expr_from_op (op, &addressp); | |
4f9b4029 | 3532 | |
a560d4d4 JH |
3533 | fprintf (asm_out_file, "%c%s", |
3534 | wrote ? ',' : '\t', wrote ? "" : ASM_COMMENT_START); | |
3535 | wrote = 1; | |
998d7deb | 3536 | if (expr) |
4f9b4029 | 3537 | { |
a560d4d4 | 3538 | fprintf (asm_out_file, "%s", |
998d7deb RH |
3539 | addressp ? "*" : ""); |
3540 | print_mem_expr (asm_out_file, expr); | |
4f9b4029 RK |
3541 | wrote = 1; |
3542 | } | |
a560d4d4 JH |
3543 | else if (REG_P (op) && ORIGINAL_REGNO (op) |
3544 | && ORIGINAL_REGNO (op) != REGNO (op)) | |
3545 | fprintf (asm_out_file, " tmp%i", ORIGINAL_REGNO (op)); | |
4f9b4029 RK |
3546 | } |
3547 | } | |
3548 | ||
d1658619 SP |
3549 | #ifdef ASSEMBLER_DIALECT |
3550 | /* Helper function to parse assembler dialects in the asm string. | |
3551 | This is called from output_asm_insn and asm_fprintf. */ | |
3552 | static const char * | |
3553 | do_assembler_dialects (const char *p, int *dialect) | |
3554 | { | |
3555 | char c = *(p - 1); | |
3556 | ||
3557 | switch (c) | |
3558 | { | |
3559 | case '{': | |
3560 | { | |
3561 | int i; | |
3562 | ||
3563 | if (*dialect) | |
3564 | output_operand_lossage ("nested assembly dialect alternatives"); | |
3565 | else | |
3566 | *dialect = 1; | |
3567 | ||
3568 | /* If we want the first dialect, do nothing. Otherwise, skip | |
3569 | DIALECT_NUMBER of strings ending with '|'. */ | |
3570 | for (i = 0; i < dialect_number; i++) | |
3571 | { | |
382522cb MK |
3572 | while (*p && *p != '}') |
3573 | { | |
3574 | if (*p == '|') | |
3575 | { | |
3576 | p++; | |
3577 | break; | |
3578 | } | |
3579 | ||
3580 | /* Skip over any character after a percent sign. */ | |
3581 | if (*p == '%') | |
3582 | p++; | |
3583 | if (*p) | |
3584 | p++; | |
3585 | } | |
3586 | ||
d1658619 SP |
3587 | if (*p == '}') |
3588 | break; | |
3589 | } | |
3590 | ||
3591 | if (*p == '\0') | |
3592 | output_operand_lossage ("unterminated assembly dialect alternative"); | |
3593 | } | |
3594 | break; | |
3595 | ||
3596 | case '|': | |
3597 | if (*dialect) | |
3598 | { | |
3599 | /* Skip to close brace. */ | |
3600 | do | |
3601 | { | |
3602 | if (*p == '\0') | |
3603 | { | |
3604 | output_operand_lossage ("unterminated assembly dialect alternative"); | |
3605 | break; | |
3606 | } | |
382522cb MK |
3607 | |
3608 | /* Skip over any character after a percent sign. */ | |
3609 | if (*p == '%' && p[1]) | |
3610 | { | |
3611 | p += 2; | |
3612 | continue; | |
3613 | } | |
3614 | ||
3615 | if (*p++ == '}') | |
3616 | break; | |
d1658619 | 3617 | } |
382522cb MK |
3618 | while (1); |
3619 | ||
d1658619 SP |
3620 | *dialect = 0; |
3621 | } | |
3622 | else | |
3623 | putc (c, asm_out_file); | |
3624 | break; | |
3625 | ||
3626 | case '}': | |
3627 | if (! *dialect) | |
3628 | putc (c, asm_out_file); | |
3629 | *dialect = 0; | |
3630 | break; | |
3631 | default: | |
3632 | gcc_unreachable (); | |
3633 | } | |
3634 | ||
3635 | return p; | |
3636 | } | |
3637 | #endif | |
3638 | ||
3cf2715d DE |
3639 | /* Output text from TEMPLATE to the assembler output file, |
3640 | obeying %-directions to substitute operands taken from | |
3641 | the vector OPERANDS. | |
3642 | ||
3643 | %N (for N a digit) means print operand N in usual manner. | |
3644 | %lN means require operand N to be a CODE_LABEL or LABEL_REF | |
3645 | and print the label name with no punctuation. | |
3646 | %cN means require operand N to be a constant | |
3647 | and print the constant expression with no punctuation. | |
3648 | %aN means expect operand N to be a memory address | |
3649 | (not a memory reference!) and print a reference | |
3650 | to that address. | |
3651 | %nN means expect operand N to be a constant | |
3652 | and print a constant expression for minus the value | |
3653 | of the operand, with no other punctuation. */ | |
3654 | ||
3655 | void | |
48c54229 | 3656 | output_asm_insn (const char *templ, rtx *operands) |
3cf2715d | 3657 | { |
b3694847 SS |
3658 | const char *p; |
3659 | int c; | |
8554d9a4 JJ |
3660 | #ifdef ASSEMBLER_DIALECT |
3661 | int dialect = 0; | |
3662 | #endif | |
0d4903b8 | 3663 | int oporder[MAX_RECOG_OPERANDS]; |
4f9b4029 | 3664 | char opoutput[MAX_RECOG_OPERANDS]; |
0d4903b8 | 3665 | int ops = 0; |
3cf2715d DE |
3666 | |
3667 | /* An insn may return a null string template | |
3668 | in a case where no assembler code is needed. */ | |
48c54229 | 3669 | if (*templ == 0) |
3cf2715d DE |
3670 | return; |
3671 | ||
4f9b4029 | 3672 | memset (opoutput, 0, sizeof opoutput); |
48c54229 | 3673 | p = templ; |
3cf2715d DE |
3674 | putc ('\t', asm_out_file); |
3675 | ||
3676 | #ifdef ASM_OUTPUT_OPCODE | |
3677 | ASM_OUTPUT_OPCODE (asm_out_file, p); | |
3678 | #endif | |
3679 | ||
b729186a | 3680 | while ((c = *p++)) |
3cf2715d DE |
3681 | switch (c) |
3682 | { | |
3cf2715d | 3683 | case '\n': |
4f9b4029 RK |
3684 | if (flag_verbose_asm) |
3685 | output_asm_operand_names (operands, oporder, ops); | |
0d4903b8 RK |
3686 | if (flag_print_asm_name) |
3687 | output_asm_name (); | |
3688 | ||
4f9b4029 RK |
3689 | ops = 0; |
3690 | memset (opoutput, 0, sizeof opoutput); | |
3691 | ||
3cf2715d | 3692 | putc (c, asm_out_file); |
cb649530 | 3693 | #ifdef ASM_OUTPUT_OPCODE |
3cf2715d DE |
3694 | while ((c = *p) == '\t') |
3695 | { | |
3696 | putc (c, asm_out_file); | |
3697 | p++; | |
3698 | } | |
3699 | ASM_OUTPUT_OPCODE (asm_out_file, p); | |
3cf2715d | 3700 | #endif |
cb649530 | 3701 | break; |
3cf2715d DE |
3702 | |
3703 | #ifdef ASSEMBLER_DIALECT | |
3704 | case '{': | |
3cf2715d | 3705 | case '}': |
d1658619 SP |
3706 | case '|': |
3707 | p = do_assembler_dialects (p, &dialect); | |
3cf2715d DE |
3708 | break; |
3709 | #endif | |
3710 | ||
3711 | case '%': | |
382522cb MK |
3712 | /* %% outputs a single %. %{, %} and %| print {, } and | respectively |
3713 | if ASSEMBLER_DIALECT defined and these characters have a special | |
3714 | meaning as dialect delimiters.*/ | |
3715 | if (*p == '%' | |
3716 | #ifdef ASSEMBLER_DIALECT | |
3717 | || *p == '{' || *p == '}' || *p == '|' | |
3718 | #endif | |
3719 | ) | |
3cf2715d | 3720 | { |
382522cb | 3721 | putc (*p, asm_out_file); |
3cf2715d | 3722 | p++; |
3cf2715d DE |
3723 | } |
3724 | /* %= outputs a number which is unique to each insn in the entire | |
3725 | compilation. This is useful for making local labels that are | |
3726 | referred to more than once in a given insn. */ | |
3727 | else if (*p == '=') | |
3728 | { | |
3729 | p++; | |
3730 | fprintf (asm_out_file, "%d", insn_counter); | |
3731 | } | |
3732 | /* % followed by a letter and some digits | |
3733 | outputs an operand in a special way depending on the letter. | |
3734 | Letters `acln' are implemented directly. | |
3735 | Other letters are passed to `output_operand' so that | |
6e2188e0 | 3736 | the TARGET_PRINT_OPERAND hook can define them. */ |
0df6c2c7 | 3737 | else if (ISALPHA (*p)) |
3cf2715d DE |
3738 | { |
3739 | int letter = *p++; | |
c383c15f GK |
3740 | unsigned long opnum; |
3741 | char *endptr; | |
b0efb46b | 3742 | |
c383c15f GK |
3743 | opnum = strtoul (p, &endptr, 10); |
3744 | ||
3745 | if (endptr == p) | |
3746 | output_operand_lossage ("operand number missing " | |
3747 | "after %%-letter"); | |
3748 | else if (this_is_asm_operands && opnum >= insn_noperands) | |
3cf2715d DE |
3749 | output_operand_lossage ("operand number out of range"); |
3750 | else if (letter == 'l') | |
c383c15f | 3751 | output_asm_label (operands[opnum]); |
3cf2715d | 3752 | else if (letter == 'a') |
cc8ca59e | 3753 | output_address (VOIDmode, operands[opnum]); |
3cf2715d DE |
3754 | else if (letter == 'c') |
3755 | { | |
c383c15f GK |
3756 | if (CONSTANT_ADDRESS_P (operands[opnum])) |
3757 | output_addr_const (asm_out_file, operands[opnum]); | |
3cf2715d | 3758 | else |
c383c15f | 3759 | output_operand (operands[opnum], 'c'); |
3cf2715d DE |
3760 | } |
3761 | else if (letter == 'n') | |
3762 | { | |
481683e1 | 3763 | if (CONST_INT_P (operands[opnum])) |
21e3a81b | 3764 | fprintf (asm_out_file, HOST_WIDE_INT_PRINT_DEC, |
c383c15f | 3765 | - INTVAL (operands[opnum])); |
3cf2715d DE |
3766 | else |
3767 | { | |
3768 | putc ('-', asm_out_file); | |
c383c15f | 3769 | output_addr_const (asm_out_file, operands[opnum]); |
3cf2715d DE |
3770 | } |
3771 | } | |
3772 | else | |
c383c15f | 3773 | output_operand (operands[opnum], letter); |
f5d927c0 | 3774 | |
c383c15f | 3775 | if (!opoutput[opnum]) |
dc9d0b14 | 3776 | oporder[ops++] = opnum; |
c383c15f | 3777 | opoutput[opnum] = 1; |
0d4903b8 | 3778 | |
c383c15f GK |
3779 | p = endptr; |
3780 | c = *p; | |
3cf2715d DE |
3781 | } |
3782 | /* % followed by a digit outputs an operand the default way. */ | |
0df6c2c7 | 3783 | else if (ISDIGIT (*p)) |
3cf2715d | 3784 | { |
c383c15f GK |
3785 | unsigned long opnum; |
3786 | char *endptr; | |
b0efb46b | 3787 | |
c383c15f GK |
3788 | opnum = strtoul (p, &endptr, 10); |
3789 | if (this_is_asm_operands && opnum >= insn_noperands) | |
3cf2715d DE |
3790 | output_operand_lossage ("operand number out of range"); |
3791 | else | |
c383c15f | 3792 | output_operand (operands[opnum], 0); |
0d4903b8 | 3793 | |
c383c15f | 3794 | if (!opoutput[opnum]) |
dc9d0b14 | 3795 | oporder[ops++] = opnum; |
c383c15f | 3796 | opoutput[opnum] = 1; |
4f9b4029 | 3797 | |
c383c15f GK |
3798 | p = endptr; |
3799 | c = *p; | |
3cf2715d DE |
3800 | } |
3801 | /* % followed by punctuation: output something for that | |
6e2188e0 NF |
3802 | punctuation character alone, with no operand. The |
3803 | TARGET_PRINT_OPERAND hook decides what is actually done. */ | |
3804 | else if (targetm.asm_out.print_operand_punct_valid_p ((unsigned char) *p)) | |
3cf2715d | 3805 | output_operand (NULL_RTX, *p++); |
3cf2715d DE |
3806 | else |
3807 | output_operand_lossage ("invalid %%-code"); | |
3808 | break; | |
3809 | ||
3810 | default: | |
3811 | putc (c, asm_out_file); | |
3812 | } | |
3813 | ||
0d4903b8 RK |
3814 | /* Write out the variable names for operands, if we know them. */ |
3815 | if (flag_verbose_asm) | |
4f9b4029 | 3816 | output_asm_operand_names (operands, oporder, ops); |
0d4903b8 RK |
3817 | if (flag_print_asm_name) |
3818 | output_asm_name (); | |
3cf2715d DE |
3819 | |
3820 | putc ('\n', asm_out_file); | |
3821 | } | |
3822 | \f | |
3823 | /* Output a LABEL_REF, or a bare CODE_LABEL, as an assembler symbol. */ | |
3824 | ||
3825 | void | |
6cf9ac28 | 3826 | output_asm_label (rtx x) |
3cf2715d DE |
3827 | { |
3828 | char buf[256]; | |
3829 | ||
3830 | if (GET_CODE (x) == LABEL_REF) | |
04a121a7 | 3831 | x = label_ref_label (x); |
4b4bf941 JQ |
3832 | if (LABEL_P (x) |
3833 | || (NOTE_P (x) | |
a38e7aa5 | 3834 | && NOTE_KIND (x) == NOTE_INSN_DELETED_LABEL)) |
3cf2715d DE |
3835 | ASM_GENERATE_INTERNAL_LABEL (buf, "L", CODE_LABEL_NUMBER (x)); |
3836 | else | |
9e637a26 | 3837 | output_operand_lossage ("'%%l' operand isn't a label"); |
3cf2715d DE |
3838 | |
3839 | assemble_name (asm_out_file, buf); | |
3840 | } | |
3841 | ||
a7fe25b8 JJ |
3842 | /* Marks SYMBOL_REFs in x as referenced through use of assemble_external. */ |
3843 | ||
3844 | void | |
3845 | mark_symbol_refs_as_used (rtx x) | |
3846 | { | |
effb8a26 RS |
3847 | subrtx_iterator::array_type array; |
3848 | FOR_EACH_SUBRTX (iter, array, x, ALL) | |
3849 | { | |
3850 | const_rtx x = *iter; | |
3851 | if (GET_CODE (x) == SYMBOL_REF) | |
3852 | if (tree t = SYMBOL_REF_DECL (x)) | |
3853 | assemble_external (t); | |
3854 | } | |
a7fe25b8 JJ |
3855 | } |
3856 | ||
3cf2715d | 3857 | /* Print operand X using machine-dependent assembler syntax. |
3cf2715d DE |
3858 | CODE is a non-digit that preceded the operand-number in the % spec, |
3859 | such as 'z' if the spec was `%z3'. CODE is 0 if there was no char | |
3860 | between the % and the digits. | |
3861 | When CODE is a non-letter, X is 0. | |
3862 | ||
3863 | The meanings of the letters are machine-dependent and controlled | |
6e2188e0 | 3864 | by TARGET_PRINT_OPERAND. */ |
3cf2715d | 3865 | |
6b3c42ae | 3866 | void |
6cf9ac28 | 3867 | output_operand (rtx x, int code ATTRIBUTE_UNUSED) |
3cf2715d DE |
3868 | { |
3869 | if (x && GET_CODE (x) == SUBREG) | |
55a2c322 | 3870 | x = alter_subreg (&x, true); |
3cf2715d | 3871 | |
04c7ae48 | 3872 | /* X must not be a pseudo reg. */ |
a50fa76a BS |
3873 | if (!targetm.no_register_allocation) |
3874 | gcc_assert (!x || !REG_P (x) || REGNO (x) < FIRST_PSEUDO_REGISTER); | |
3cf2715d | 3875 | |
6e2188e0 | 3876 | targetm.asm_out.print_operand (asm_out_file, x, code); |
c70d0414 HPN |
3877 | |
3878 | if (x == NULL_RTX) | |
3879 | return; | |
3880 | ||
effb8a26 | 3881 | mark_symbol_refs_as_used (x); |
3cf2715d DE |
3882 | } |
3883 | ||
6e2188e0 NF |
3884 | /* Print a memory reference operand for address X using |
3885 | machine-dependent assembler syntax. */ | |
3cf2715d DE |
3886 | |
3887 | void | |
cc8ca59e | 3888 | output_address (machine_mode mode, rtx x) |
3cf2715d | 3889 | { |
6fb5fa3c DB |
3890 | bool changed = false; |
3891 | walk_alter_subreg (&x, &changed); | |
cc8ca59e | 3892 | targetm.asm_out.print_operand_address (asm_out_file, mode, x); |
3cf2715d DE |
3893 | } |
3894 | \f | |
3895 | /* Print an integer constant expression in assembler syntax. | |
3896 | Addition and subtraction are the only arithmetic | |
3897 | that may appear in these expressions. */ | |
3898 | ||
3899 | void | |
6cf9ac28 | 3900 | output_addr_const (FILE *file, rtx x) |
3cf2715d DE |
3901 | { |
3902 | char buf[256]; | |
3903 | ||
3904 | restart: | |
3905 | switch (GET_CODE (x)) | |
3906 | { | |
3907 | case PC: | |
eac50d7a | 3908 | putc ('.', file); |
3cf2715d DE |
3909 | break; |
3910 | ||
3911 | case SYMBOL_REF: | |
21dad7e6 | 3912 | if (SYMBOL_REF_DECL (x)) |
152464d2 | 3913 | assemble_external (SYMBOL_REF_DECL (x)); |
99c8c61c AO |
3914 | #ifdef ASM_OUTPUT_SYMBOL_REF |
3915 | ASM_OUTPUT_SYMBOL_REF (file, x); | |
3916 | #else | |
3cf2715d | 3917 | assemble_name (file, XSTR (x, 0)); |
99c8c61c | 3918 | #endif |
3cf2715d DE |
3919 | break; |
3920 | ||
3921 | case LABEL_REF: | |
04a121a7 | 3922 | x = label_ref_label (x); |
422be3c3 | 3923 | /* Fall through. */ |
3cf2715d DE |
3924 | case CODE_LABEL: |
3925 | ASM_GENERATE_INTERNAL_LABEL (buf, "L", CODE_LABEL_NUMBER (x)); | |
2f0b7af6 GK |
3926 | #ifdef ASM_OUTPUT_LABEL_REF |
3927 | ASM_OUTPUT_LABEL_REF (file, buf); | |
3928 | #else | |
3cf2715d | 3929 | assemble_name (file, buf); |
2f0b7af6 | 3930 | #endif |
3cf2715d DE |
3931 | break; |
3932 | ||
3933 | case CONST_INT: | |
6725cc58 | 3934 | fprintf (file, HOST_WIDE_INT_PRINT_DEC, INTVAL (x)); |
3cf2715d DE |
3935 | break; |
3936 | ||
3937 | case CONST: | |
3938 | /* This used to output parentheses around the expression, | |
3939 | but that does not work on the 386 (either ATT or BSD assembler). */ | |
3940 | output_addr_const (file, XEXP (x, 0)); | |
3941 | break; | |
3942 | ||
807e902e KZ |
3943 | case CONST_WIDE_INT: |
3944 | /* We do not know the mode here so we have to use a round about | |
3945 | way to build a wide-int to get it printed properly. */ | |
3946 | { | |
3947 | wide_int w = wide_int::from_array (&CONST_WIDE_INT_ELT (x, 0), | |
3948 | CONST_WIDE_INT_NUNITS (x), | |
3949 | CONST_WIDE_INT_NUNITS (x) | |
3950 | * HOST_BITS_PER_WIDE_INT, | |
3951 | false); | |
3952 | print_decs (w, file); | |
3953 | } | |
3954 | break; | |
3955 | ||
3cf2715d | 3956 | case CONST_DOUBLE: |
807e902e | 3957 | if (CONST_DOUBLE_AS_INT_P (x)) |
3cf2715d DE |
3958 | { |
3959 | /* We can use %d if the number is one word and positive. */ | |
3960 | if (CONST_DOUBLE_HIGH (x)) | |
21e3a81b | 3961 | fprintf (file, HOST_WIDE_INT_PRINT_DOUBLE_HEX, |
3d57d7ce DK |
3962 | (unsigned HOST_WIDE_INT) CONST_DOUBLE_HIGH (x), |
3963 | (unsigned HOST_WIDE_INT) CONST_DOUBLE_LOW (x)); | |
f5d927c0 | 3964 | else if (CONST_DOUBLE_LOW (x) < 0) |
3d57d7ce DK |
3965 | fprintf (file, HOST_WIDE_INT_PRINT_HEX, |
3966 | (unsigned HOST_WIDE_INT) CONST_DOUBLE_LOW (x)); | |
3cf2715d | 3967 | else |
21e3a81b | 3968 | fprintf (file, HOST_WIDE_INT_PRINT_DEC, CONST_DOUBLE_LOW (x)); |
3cf2715d DE |
3969 | } |
3970 | else | |
3971 | /* We can't handle floating point constants; | |
3972 | PRINT_OPERAND must handle them. */ | |
3973 | output_operand_lossage ("floating constant misused"); | |
3974 | break; | |
3975 | ||
14c931f1 | 3976 | case CONST_FIXED: |
848fac28 | 3977 | fprintf (file, HOST_WIDE_INT_PRINT_DEC, CONST_FIXED_VALUE_LOW (x)); |
14c931f1 CF |
3978 | break; |
3979 | ||
3cf2715d DE |
3980 | case PLUS: |
3981 | /* Some assemblers need integer constants to appear last (eg masm). */ | |
481683e1 | 3982 | if (CONST_INT_P (XEXP (x, 0))) |
3cf2715d DE |
3983 | { |
3984 | output_addr_const (file, XEXP (x, 1)); | |
3985 | if (INTVAL (XEXP (x, 0)) >= 0) | |
3986 | fprintf (file, "+"); | |
3987 | output_addr_const (file, XEXP (x, 0)); | |
3988 | } | |
3989 | else | |
3990 | { | |
3991 | output_addr_const (file, XEXP (x, 0)); | |
481683e1 | 3992 | if (!CONST_INT_P (XEXP (x, 1)) |
08106825 | 3993 | || INTVAL (XEXP (x, 1)) >= 0) |
3cf2715d DE |
3994 | fprintf (file, "+"); |
3995 | output_addr_const (file, XEXP (x, 1)); | |
3996 | } | |
3997 | break; | |
3998 | ||
3999 | case MINUS: | |
4000 | /* Avoid outputting things like x-x or x+5-x, | |
4001 | since some assemblers can't handle that. */ | |
4002 | x = simplify_subtraction (x); | |
4003 | if (GET_CODE (x) != MINUS) | |
4004 | goto restart; | |
4005 | ||
4006 | output_addr_const (file, XEXP (x, 0)); | |
4007 | fprintf (file, "-"); | |
481683e1 | 4008 | if ((CONST_INT_P (XEXP (x, 1)) && INTVAL (XEXP (x, 1)) >= 0) |
301d03af RS |
4009 | || GET_CODE (XEXP (x, 1)) == PC |
4010 | || GET_CODE (XEXP (x, 1)) == SYMBOL_REF) | |
4011 | output_addr_const (file, XEXP (x, 1)); | |
4012 | else | |
3cf2715d | 4013 | { |
17b53c33 | 4014 | fputs (targetm.asm_out.open_paren, file); |
3cf2715d | 4015 | output_addr_const (file, XEXP (x, 1)); |
17b53c33 | 4016 | fputs (targetm.asm_out.close_paren, file); |
3cf2715d | 4017 | } |
3cf2715d DE |
4018 | break; |
4019 | ||
4020 | case ZERO_EXTEND: | |
4021 | case SIGN_EXTEND: | |
fdf473ae | 4022 | case SUBREG: |
c01e4479 | 4023 | case TRUNCATE: |
3cf2715d DE |
4024 | output_addr_const (file, XEXP (x, 0)); |
4025 | break; | |
4026 | ||
4027 | default: | |
6cbd8875 AS |
4028 | if (targetm.asm_out.output_addr_const_extra (file, x)) |
4029 | break; | |
422be3c3 | 4030 | |
3cf2715d DE |
4031 | output_operand_lossage ("invalid expression as operand"); |
4032 | } | |
4033 | } | |
4034 | \f | |
a803773f JM |
4035 | /* Output a quoted string. */ |
4036 | ||
4037 | void | |
4038 | output_quoted_string (FILE *asm_file, const char *string) | |
4039 | { | |
4040 | #ifdef OUTPUT_QUOTED_STRING | |
4041 | OUTPUT_QUOTED_STRING (asm_file, string); | |
4042 | #else | |
4043 | char c; | |
4044 | ||
4045 | putc ('\"', asm_file); | |
4046 | while ((c = *string++) != 0) | |
4047 | { | |
4048 | if (ISPRINT (c)) | |
4049 | { | |
4050 | if (c == '\"' || c == '\\') | |
4051 | putc ('\\', asm_file); | |
4052 | putc (c, asm_file); | |
4053 | } | |
4054 | else | |
4055 | fprintf (asm_file, "\\%03o", (unsigned char) c); | |
4056 | } | |
4057 | putc ('\"', asm_file); | |
4058 | #endif | |
4059 | } | |
4060 | \f | |
5e3929ed DA |
4061 | /* Write a HOST_WIDE_INT number in hex form 0x1234, fast. */ |
4062 | ||
4063 | void | |
4064 | fprint_whex (FILE *f, unsigned HOST_WIDE_INT value) | |
4065 | { | |
4066 | char buf[2 + CHAR_BIT * sizeof (value) / 4]; | |
4067 | if (value == 0) | |
4068 | putc ('0', f); | |
4069 | else | |
4070 | { | |
4071 | char *p = buf + sizeof (buf); | |
4072 | do | |
4073 | *--p = "0123456789abcdef"[value % 16]; | |
4074 | while ((value /= 16) != 0); | |
4075 | *--p = 'x'; | |
4076 | *--p = '0'; | |
4077 | fwrite (p, 1, buf + sizeof (buf) - p, f); | |
4078 | } | |
4079 | } | |
4080 | ||
4081 | /* Internal function that prints an unsigned long in decimal in reverse. | |
4082 | The output string IS NOT null-terminated. */ | |
4083 | ||
4084 | static int | |
4085 | sprint_ul_rev (char *s, unsigned long value) | |
4086 | { | |
4087 | int i = 0; | |
4088 | do | |
4089 | { | |
4090 | s[i] = "0123456789"[value % 10]; | |
4091 | value /= 10; | |
4092 | i++; | |
4093 | /* alternate version, without modulo */ | |
4094 | /* oldval = value; */ | |
4095 | /* value /= 10; */ | |
4096 | /* s[i] = "0123456789" [oldval - 10*value]; */ | |
4097 | /* i++ */ | |
4098 | } | |
4099 | while (value != 0); | |
4100 | return i; | |
4101 | } | |
4102 | ||
5e3929ed DA |
4103 | /* Write an unsigned long as decimal to a file, fast. */ |
4104 | ||
4105 | void | |
4106 | fprint_ul (FILE *f, unsigned long value) | |
4107 | { | |
4108 | /* python says: len(str(2**64)) == 20 */ | |
4109 | char s[20]; | |
4110 | int i; | |
4111 | ||
4112 | i = sprint_ul_rev (s, value); | |
4113 | ||
4114 | /* It's probably too small to bother with string reversal and fputs. */ | |
4115 | do | |
4116 | { | |
4117 | i--; | |
4118 | putc (s[i], f); | |
4119 | } | |
4120 | while (i != 0); | |
4121 | } | |
4122 | ||
4123 | /* Write an unsigned long as decimal to a string, fast. | |
4124 | s must be wide enough to not overflow, at least 21 chars. | |
4125 | Returns the length of the string (without terminating '\0'). */ | |
4126 | ||
4127 | int | |
4128 | sprint_ul (char *s, unsigned long value) | |
4129 | { | |
fab27f52 | 4130 | int len = sprint_ul_rev (s, value); |
5e3929ed DA |
4131 | s[len] = '\0'; |
4132 | ||
fab27f52 | 4133 | std::reverse (s, s + len); |
5e3929ed DA |
4134 | return len; |
4135 | } | |
4136 | ||
3cf2715d DE |
4137 | /* A poor man's fprintf, with the added features of %I, %R, %L, and %U. |
4138 | %R prints the value of REGISTER_PREFIX. | |
4139 | %L prints the value of LOCAL_LABEL_PREFIX. | |
4140 | %U prints the value of USER_LABEL_PREFIX. | |
4141 | %I prints the value of IMMEDIATE_PREFIX. | |
4142 | %O runs ASM_OUTPUT_OPCODE to transform what follows in the string. | |
b1721339 | 4143 | Also supported are %d, %i, %u, %x, %X, %o, %c, %s and %%. |
3cf2715d DE |
4144 | |
4145 | We handle alternate assembler dialects here, just like output_asm_insn. */ | |
4146 | ||
4147 | void | |
e34d07f2 | 4148 | asm_fprintf (FILE *file, const char *p, ...) |
3cf2715d | 4149 | { |
3cf2715d DE |
4150 | char buf[10]; |
4151 | char *q, c; | |
d1658619 SP |
4152 | #ifdef ASSEMBLER_DIALECT |
4153 | int dialect = 0; | |
4154 | #endif | |
e34d07f2 | 4155 | va_list argptr; |
6cf9ac28 | 4156 | |
e34d07f2 | 4157 | va_start (argptr, p); |
3cf2715d DE |
4158 | |
4159 | buf[0] = '%'; | |
4160 | ||
b729186a | 4161 | while ((c = *p++)) |
3cf2715d DE |
4162 | switch (c) |
4163 | { | |
4164 | #ifdef ASSEMBLER_DIALECT | |
4165 | case '{': | |
3cf2715d | 4166 | case '}': |
d1658619 SP |
4167 | case '|': |
4168 | p = do_assembler_dialects (p, &dialect); | |
3cf2715d DE |
4169 | break; |
4170 | #endif | |
4171 | ||
4172 | case '%': | |
4173 | c = *p++; | |
4174 | q = &buf[1]; | |
b1721339 KG |
4175 | while (strchr ("-+ #0", c)) |
4176 | { | |
4177 | *q++ = c; | |
4178 | c = *p++; | |
4179 | } | |
0df6c2c7 | 4180 | while (ISDIGIT (c) || c == '.') |
3cf2715d DE |
4181 | { |
4182 | *q++ = c; | |
4183 | c = *p++; | |
4184 | } | |
4185 | switch (c) | |
4186 | { | |
4187 | case '%': | |
b1721339 | 4188 | putc ('%', file); |
3cf2715d DE |
4189 | break; |
4190 | ||
4191 | case 'd': case 'i': case 'u': | |
b1721339 KG |
4192 | case 'x': case 'X': case 'o': |
4193 | case 'c': | |
3cf2715d DE |
4194 | *q++ = c; |
4195 | *q = 0; | |
4196 | fprintf (file, buf, va_arg (argptr, int)); | |
4197 | break; | |
4198 | ||
4199 | case 'w': | |
b1721339 KG |
4200 | /* This is a prefix to the 'd', 'i', 'u', 'x', 'X', and |
4201 | 'o' cases, but we do not check for those cases. It | |
4202 | means that the value is a HOST_WIDE_INT, which may be | |
4203 | either `long' or `long long'. */ | |
85f015e1 KG |
4204 | memcpy (q, HOST_WIDE_INT_PRINT, strlen (HOST_WIDE_INT_PRINT)); |
4205 | q += strlen (HOST_WIDE_INT_PRINT); | |
3cf2715d DE |
4206 | *q++ = *p++; |
4207 | *q = 0; | |
4208 | fprintf (file, buf, va_arg (argptr, HOST_WIDE_INT)); | |
4209 | break; | |
4210 | ||
4211 | case 'l': | |
4212 | *q++ = c; | |
b1721339 KG |
4213 | #ifdef HAVE_LONG_LONG |
4214 | if (*p == 'l') | |
4215 | { | |
4216 | *q++ = *p++; | |
4217 | *q++ = *p++; | |
4218 | *q = 0; | |
4219 | fprintf (file, buf, va_arg (argptr, long long)); | |
4220 | } | |
4221 | else | |
4222 | #endif | |
4223 | { | |
4224 | *q++ = *p++; | |
4225 | *q = 0; | |
4226 | fprintf (file, buf, va_arg (argptr, long)); | |
4227 | } | |
6cf9ac28 | 4228 | |
3cf2715d DE |
4229 | break; |
4230 | ||
4231 | case 's': | |
4232 | *q++ = c; | |
4233 | *q = 0; | |
4234 | fprintf (file, buf, va_arg (argptr, char *)); | |
4235 | break; | |
4236 | ||
4237 | case 'O': | |
4238 | #ifdef ASM_OUTPUT_OPCODE | |
4239 | ASM_OUTPUT_OPCODE (asm_out_file, p); | |
4240 | #endif | |
4241 | break; | |
4242 | ||
4243 | case 'R': | |
4244 | #ifdef REGISTER_PREFIX | |
4245 | fprintf (file, "%s", REGISTER_PREFIX); | |
4246 | #endif | |
4247 | break; | |
4248 | ||
4249 | case 'I': | |
4250 | #ifdef IMMEDIATE_PREFIX | |
4251 | fprintf (file, "%s", IMMEDIATE_PREFIX); | |
4252 | #endif | |
4253 | break; | |
4254 | ||
4255 | case 'L': | |
4256 | #ifdef LOCAL_LABEL_PREFIX | |
4257 | fprintf (file, "%s", LOCAL_LABEL_PREFIX); | |
4258 | #endif | |
4259 | break; | |
4260 | ||
4261 | case 'U': | |
19283265 | 4262 | fputs (user_label_prefix, file); |
3cf2715d DE |
4263 | break; |
4264 | ||
fe0503ea | 4265 | #ifdef ASM_FPRINTF_EXTENSIONS |
7ef0daad | 4266 | /* Uppercase letters are reserved for general use by asm_fprintf |
fe0503ea NC |
4267 | and so are not available to target specific code. In order to |
4268 | prevent the ASM_FPRINTF_EXTENSIONS macro from using them then, | |
4269 | they are defined here. As they get turned into real extensions | |
4270 | to asm_fprintf they should be removed from this list. */ | |
4271 | case 'A': case 'B': case 'C': case 'D': case 'E': | |
4272 | case 'F': case 'G': case 'H': case 'J': case 'K': | |
4273 | case 'M': case 'N': case 'P': case 'Q': case 'S': | |
4274 | case 'T': case 'V': case 'W': case 'Y': case 'Z': | |
4275 | break; | |
f5d927c0 | 4276 | |
fe0503ea NC |
4277 | ASM_FPRINTF_EXTENSIONS (file, argptr, p) |
4278 | #endif | |
3cf2715d | 4279 | default: |
0bccc606 | 4280 | gcc_unreachable (); |
3cf2715d DE |
4281 | } |
4282 | break; | |
4283 | ||
4284 | default: | |
b1721339 | 4285 | putc (c, file); |
3cf2715d | 4286 | } |
e34d07f2 | 4287 | va_end (argptr); |
3cf2715d DE |
4288 | } |
4289 | \f | |
3cf2715d DE |
4290 | /* Return nonzero if this function has no function calls. */ |
4291 | ||
4292 | int | |
6cf9ac28 | 4293 | leaf_function_p (void) |
3cf2715d | 4294 | { |
fa7af581 | 4295 | rtx_insn *insn; |
3cf2715d | 4296 | |
00d60013 WD |
4297 | /* Ensure we walk the entire function body. */ |
4298 | gcc_assert (!in_sequence_p ()); | |
4299 | ||
d56a43a0 AK |
4300 | /* Some back-ends (e.g. s390) want leaf functions to stay leaf |
4301 | functions even if they call mcount. */ | |
4302 | if (crtl->profile && !targetm.keep_leaf_when_profiled ()) | |
3cf2715d DE |
4303 | return 0; |
4304 | ||
4305 | for (insn = get_insns (); insn; insn = NEXT_INSN (insn)) | |
4306 | { | |
4b4bf941 | 4307 | if (CALL_P (insn) |
7d167afd | 4308 | && ! SIBLING_CALL_P (insn)) |
3cf2715d | 4309 | return 0; |
4b4bf941 | 4310 | if (NONJUMP_INSN_P (insn) |
3cf2715d | 4311 | && GET_CODE (PATTERN (insn)) == SEQUENCE |
4b4bf941 | 4312 | && CALL_P (XVECEXP (PATTERN (insn), 0, 0)) |
0a1c58a2 | 4313 | && ! SIBLING_CALL_P (XVECEXP (PATTERN (insn), 0, 0))) |
3cf2715d DE |
4314 | return 0; |
4315 | } | |
3cf2715d DE |
4316 | |
4317 | return 1; | |
4318 | } | |
4319 | ||
09da1532 | 4320 | /* Return 1 if branch is a forward branch. |
ef6257cd JH |
4321 | Uses insn_shuid array, so it works only in the final pass. May be used by |
4322 | output templates to customary add branch prediction hints. | |
4323 | */ | |
4324 | int | |
fa7af581 | 4325 | final_forward_branch_p (rtx_insn *insn) |
ef6257cd JH |
4326 | { |
4327 | int insn_id, label_id; | |
b0efb46b | 4328 | |
0bccc606 | 4329 | gcc_assert (uid_shuid); |
ef6257cd JH |
4330 | insn_id = INSN_SHUID (insn); |
4331 | label_id = INSN_SHUID (JUMP_LABEL (insn)); | |
4332 | /* We've hit some insns that does not have id information available. */ | |
0bccc606 | 4333 | gcc_assert (insn_id && label_id); |
ef6257cd JH |
4334 | return insn_id < label_id; |
4335 | } | |
4336 | ||
3cf2715d DE |
4337 | /* On some machines, a function with no call insns |
4338 | can run faster if it doesn't create its own register window. | |
4339 | When output, the leaf function should use only the "output" | |
4340 | registers. Ordinarily, the function would be compiled to use | |
4341 | the "input" registers to find its arguments; it is a candidate | |
4342 | for leaf treatment if it uses only the "input" registers. | |
4343 | Leaf function treatment means renumbering so the function | |
4344 | uses the "output" registers instead. */ | |
4345 | ||
4346 | #ifdef LEAF_REGISTERS | |
4347 | ||
3cf2715d DE |
4348 | /* Return 1 if this function uses only the registers that can be |
4349 | safely renumbered. */ | |
4350 | ||
4351 | int | |
6cf9ac28 | 4352 | only_leaf_regs_used (void) |
3cf2715d DE |
4353 | { |
4354 | int i; | |
4977bab6 | 4355 | const char *const permitted_reg_in_leaf_functions = LEAF_REGISTERS; |
3cf2715d DE |
4356 | |
4357 | for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) | |
6fb5fa3c | 4358 | if ((df_regs_ever_live_p (i) || global_regs[i]) |
e5e809f4 JL |
4359 | && ! permitted_reg_in_leaf_functions[i]) |
4360 | return 0; | |
4361 | ||
e3b5732b | 4362 | if (crtl->uses_pic_offset_table |
e5e809f4 | 4363 | && pic_offset_table_rtx != 0 |
f8cfc6aa | 4364 | && REG_P (pic_offset_table_rtx) |
e5e809f4 JL |
4365 | && ! permitted_reg_in_leaf_functions[REGNO (pic_offset_table_rtx)]) |
4366 | return 0; | |
4367 | ||
3cf2715d DE |
4368 | return 1; |
4369 | } | |
4370 | ||
4371 | /* Scan all instructions and renumber all registers into those | |
4372 | available in leaf functions. */ | |
4373 | ||
4374 | static void | |
fa7af581 | 4375 | leaf_renumber_regs (rtx_insn *first) |
3cf2715d | 4376 | { |
fa7af581 | 4377 | rtx_insn *insn; |
3cf2715d DE |
4378 | |
4379 | /* Renumber only the actual patterns. | |
4380 | The reg-notes can contain frame pointer refs, | |
4381 | and renumbering them could crash, and should not be needed. */ | |
4382 | for (insn = first; insn; insn = NEXT_INSN (insn)) | |
2c3c49de | 4383 | if (INSN_P (insn)) |
3cf2715d | 4384 | leaf_renumber_regs_insn (PATTERN (insn)); |
3cf2715d DE |
4385 | } |
4386 | ||
4387 | /* Scan IN_RTX and its subexpressions, and renumber all regs into those | |
4388 | available in leaf functions. */ | |
4389 | ||
4390 | void | |
6cf9ac28 | 4391 | leaf_renumber_regs_insn (rtx in_rtx) |
3cf2715d | 4392 | { |
b3694847 SS |
4393 | int i, j; |
4394 | const char *format_ptr; | |
3cf2715d DE |
4395 | |
4396 | if (in_rtx == 0) | |
4397 | return; | |
4398 | ||
4399 | /* Renumber all input-registers into output-registers. | |
4400 | renumbered_regs would be 1 for an output-register; | |
4401 | they */ | |
4402 | ||
f8cfc6aa | 4403 | if (REG_P (in_rtx)) |
3cf2715d DE |
4404 | { |
4405 | int newreg; | |
4406 | ||
4407 | /* Don't renumber the same reg twice. */ | |
4408 | if (in_rtx->used) | |
4409 | return; | |
4410 | ||
4411 | newreg = REGNO (in_rtx); | |
4412 | /* Don't try to renumber pseudo regs. It is possible for a pseudo reg | |
4413 | to reach here as part of a REG_NOTE. */ | |
4414 | if (newreg >= FIRST_PSEUDO_REGISTER) | |
4415 | { | |
4416 | in_rtx->used = 1; | |
4417 | return; | |
4418 | } | |
4419 | newreg = LEAF_REG_REMAP (newreg); | |
0bccc606 | 4420 | gcc_assert (newreg >= 0); |
6fb5fa3c DB |
4421 | df_set_regs_ever_live (REGNO (in_rtx), false); |
4422 | df_set_regs_ever_live (newreg, true); | |
4423 | SET_REGNO (in_rtx, newreg); | |
3cf2715d | 4424 | in_rtx->used = 1; |
9fccb335 | 4425 | return; |
3cf2715d DE |
4426 | } |
4427 | ||
2c3c49de | 4428 | if (INSN_P (in_rtx)) |
3cf2715d DE |
4429 | { |
4430 | /* Inside a SEQUENCE, we find insns. | |
4431 | Renumber just the patterns of these insns, | |
4432 | just as we do for the top-level insns. */ | |
4433 | leaf_renumber_regs_insn (PATTERN (in_rtx)); | |
4434 | return; | |
4435 | } | |
4436 | ||
4437 | format_ptr = GET_RTX_FORMAT (GET_CODE (in_rtx)); | |
4438 | ||
4439 | for (i = 0; i < GET_RTX_LENGTH (GET_CODE (in_rtx)); i++) | |
4440 | switch (*format_ptr++) | |
4441 | { | |
4442 | case 'e': | |
4443 | leaf_renumber_regs_insn (XEXP (in_rtx, i)); | |
4444 | break; | |
4445 | ||
4446 | case 'E': | |
4447 | if (NULL != XVEC (in_rtx, i)) | |
4448 | { | |
4449 | for (j = 0; j < XVECLEN (in_rtx, i); j++) | |
4450 | leaf_renumber_regs_insn (XVECEXP (in_rtx, i, j)); | |
4451 | } | |
4452 | break; | |
4453 | ||
4454 | case 'S': | |
4455 | case 's': | |
4456 | case '0': | |
4457 | case 'i': | |
4458 | case 'w': | |
4459 | case 'n': | |
4460 | case 'u': | |
4461 | break; | |
4462 | ||
4463 | default: | |
0bccc606 | 4464 | gcc_unreachable (); |
3cf2715d DE |
4465 | } |
4466 | } | |
4467 | #endif | |
ef330312 PB |
4468 | \f |
4469 | /* Turn the RTL into assembly. */ | |
c2924966 | 4470 | static unsigned int |
ef330312 PB |
4471 | rest_of_handle_final (void) |
4472 | { | |
0d4b5b86 | 4473 | const char *fnname = get_fnname_from_decl (current_function_decl); |
ef330312 PB |
4474 | |
4475 | assemble_start_function (current_function_decl, fnname); | |
4476 | final_start_function (get_insns (), asm_out_file, optimize); | |
4477 | final (get_insns (), asm_out_file, optimize); | |
036ea399 JJ |
4478 | if (flag_ipa_ra |
4479 | && !lookup_attribute ("noipa", DECL_ATTRIBUTES (current_function_decl))) | |
27c07cc5 | 4480 | collect_fn_hard_reg_usage (); |
ef330312 PB |
4481 | final_end_function (); |
4482 | ||
182a0c11 RH |
4483 | /* The IA-64 ".handlerdata" directive must be issued before the ".endp" |
4484 | directive that closes the procedure descriptor. Similarly, for x64 SEH. | |
4485 | Otherwise it's not strictly necessary, but it doesn't hurt either. */ | |
22ba88ef | 4486 | output_function_exception_table (fnname); |
ef330312 PB |
4487 | |
4488 | assemble_end_function (current_function_decl, fnname); | |
4489 | ||
6fb5fa3c DB |
4490 | /* Free up reg info memory. */ |
4491 | free_reg_info (); | |
4492 | ||
ef330312 PB |
4493 | if (! quiet_flag) |
4494 | fflush (asm_out_file); | |
4495 | ||
ef330312 PB |
4496 | /* Write DBX symbols if requested. */ |
4497 | ||
4498 | /* Note that for those inline functions where we don't initially | |
4499 | know for certain that we will be generating an out-of-line copy, | |
4500 | the first invocation of this routine (rest_of_compilation) will | |
4501 | skip over this code by doing a `goto exit_rest_of_compilation;'. | |
4502 | Later on, wrapup_global_declarations will (indirectly) call | |
4503 | rest_of_compilation again for those inline functions that need | |
4504 | to have out-of-line copies generated. During that call, we | |
4505 | *will* be routed past here. */ | |
4506 | ||
4507 | timevar_push (TV_SYMOUT); | |
725730f2 EB |
4508 | if (!DECL_IGNORED_P (current_function_decl)) |
4509 | debug_hooks->function_decl (current_function_decl); | |
ef330312 | 4510 | timevar_pop (TV_SYMOUT); |
6b20f353 DS |
4511 | |
4512 | /* Release the blocks that are linked to DECL_INITIAL() to free the memory. */ | |
4513 | DECL_INITIAL (current_function_decl) = error_mark_node; | |
4514 | ||
395a40e0 JH |
4515 | if (DECL_STATIC_CONSTRUCTOR (current_function_decl) |
4516 | && targetm.have_ctors_dtors) | |
4517 | targetm.asm_out.constructor (XEXP (DECL_RTL (current_function_decl), 0), | |
4518 | decl_init_priority_lookup | |
4519 | (current_function_decl)); | |
4520 | if (DECL_STATIC_DESTRUCTOR (current_function_decl) | |
4521 | && targetm.have_ctors_dtors) | |
4522 | targetm.asm_out.destructor (XEXP (DECL_RTL (current_function_decl), 0), | |
4523 | decl_fini_priority_lookup | |
4524 | (current_function_decl)); | |
c2924966 | 4525 | return 0; |
ef330312 PB |
4526 | } |
4527 | ||
27a4cd48 DM |
4528 | namespace { |
4529 | ||
4530 | const pass_data pass_data_final = | |
ef330312 | 4531 | { |
27a4cd48 DM |
4532 | RTL_PASS, /* type */ |
4533 | "final", /* name */ | |
4534 | OPTGROUP_NONE, /* optinfo_flags */ | |
27a4cd48 DM |
4535 | TV_FINAL, /* tv_id */ |
4536 | 0, /* properties_required */ | |
4537 | 0, /* properties_provided */ | |
4538 | 0, /* properties_destroyed */ | |
4539 | 0, /* todo_flags_start */ | |
4540 | 0, /* todo_flags_finish */ | |
ef330312 PB |
4541 | }; |
4542 | ||
27a4cd48 DM |
4543 | class pass_final : public rtl_opt_pass |
4544 | { | |
4545 | public: | |
c3284718 RS |
4546 | pass_final (gcc::context *ctxt) |
4547 | : rtl_opt_pass (pass_data_final, ctxt) | |
27a4cd48 DM |
4548 | {} |
4549 | ||
4550 | /* opt_pass methods: */ | |
be55bfe6 | 4551 | virtual unsigned int execute (function *) { return rest_of_handle_final (); } |
27a4cd48 DM |
4552 | |
4553 | }; // class pass_final | |
4554 | ||
4555 | } // anon namespace | |
4556 | ||
4557 | rtl_opt_pass * | |
4558 | make_pass_final (gcc::context *ctxt) | |
4559 | { | |
4560 | return new pass_final (ctxt); | |
4561 | } | |
4562 | ||
ef330312 | 4563 | |
c2924966 | 4564 | static unsigned int |
ef330312 PB |
4565 | rest_of_handle_shorten_branches (void) |
4566 | { | |
4567 | /* Shorten branches. */ | |
4568 | shorten_branches (get_insns ()); | |
c2924966 | 4569 | return 0; |
ef330312 | 4570 | } |
b0efb46b | 4571 | |
27a4cd48 DM |
4572 | namespace { |
4573 | ||
4574 | const pass_data pass_data_shorten_branches = | |
ef330312 | 4575 | { |
27a4cd48 DM |
4576 | RTL_PASS, /* type */ |
4577 | "shorten", /* name */ | |
4578 | OPTGROUP_NONE, /* optinfo_flags */ | |
27a4cd48 DM |
4579 | TV_SHORTEN_BRANCH, /* tv_id */ |
4580 | 0, /* properties_required */ | |
4581 | 0, /* properties_provided */ | |
4582 | 0, /* properties_destroyed */ | |
4583 | 0, /* todo_flags_start */ | |
4584 | 0, /* todo_flags_finish */ | |
ef330312 PB |
4585 | }; |
4586 | ||
27a4cd48 DM |
4587 | class pass_shorten_branches : public rtl_opt_pass |
4588 | { | |
4589 | public: | |
c3284718 RS |
4590 | pass_shorten_branches (gcc::context *ctxt) |
4591 | : rtl_opt_pass (pass_data_shorten_branches, ctxt) | |
27a4cd48 DM |
4592 | {} |
4593 | ||
4594 | /* opt_pass methods: */ | |
be55bfe6 TS |
4595 | virtual unsigned int execute (function *) |
4596 | { | |
4597 | return rest_of_handle_shorten_branches (); | |
4598 | } | |
27a4cd48 DM |
4599 | |
4600 | }; // class pass_shorten_branches | |
4601 | ||
4602 | } // anon namespace | |
4603 | ||
4604 | rtl_opt_pass * | |
4605 | make_pass_shorten_branches (gcc::context *ctxt) | |
4606 | { | |
4607 | return new pass_shorten_branches (ctxt); | |
4608 | } | |
4609 | ||
ef330312 | 4610 | |
c2924966 | 4611 | static unsigned int |
ef330312 PB |
4612 | rest_of_clean_state (void) |
4613 | { | |
fa7af581 | 4614 | rtx_insn *insn, *next; |
2153915d AO |
4615 | FILE *final_output = NULL; |
4616 | int save_unnumbered = flag_dump_unnumbered; | |
4617 | int save_noaddr = flag_dump_noaddr; | |
4618 | ||
4619 | if (flag_dump_final_insns) | |
4620 | { | |
4621 | final_output = fopen (flag_dump_final_insns, "a"); | |
4622 | if (!final_output) | |
4623 | { | |
7ca92787 JM |
4624 | error ("could not open final insn dump file %qs: %m", |
4625 | flag_dump_final_insns); | |
2153915d AO |
4626 | flag_dump_final_insns = NULL; |
4627 | } | |
4628 | else | |
4629 | { | |
2153915d | 4630 | flag_dump_noaddr = flag_dump_unnumbered = 1; |
c7ba0cfb RG |
4631 | if (flag_compare_debug_opt || flag_compare_debug) |
4632 | dump_flags |= TDF_NOUID; | |
6d8402ac AO |
4633 | dump_function_header (final_output, current_function_decl, |
4634 | dump_flags); | |
6ca5d1f6 | 4635 | final_insns_dump_p = true; |
2153915d AO |
4636 | |
4637 | for (insn = get_insns (); insn; insn = NEXT_INSN (insn)) | |
4638 | if (LABEL_P (insn)) | |
4639 | INSN_UID (insn) = CODE_LABEL_NUMBER (insn); | |
4640 | else | |
a59d15cf AO |
4641 | { |
4642 | if (NOTE_P (insn)) | |
4643 | set_block_for_insn (insn, NULL); | |
4644 | INSN_UID (insn) = 0; | |
4645 | } | |
2153915d AO |
4646 | } |
4647 | } | |
ef330312 PB |
4648 | |
4649 | /* It is very important to decompose the RTL instruction chain here: | |
4650 | debug information keeps pointing into CODE_LABEL insns inside the function | |
4651 | body. If these remain pointing to the other insns, we end up preserving | |
4652 | whole RTL chain and attached detailed debug info in memory. */ | |
4653 | for (insn = get_insns (); insn; insn = next) | |
4654 | { | |
4655 | next = NEXT_INSN (insn); | |
0f82e5c9 DM |
4656 | SET_NEXT_INSN (insn) = NULL; |
4657 | SET_PREV_INSN (insn) = NULL; | |
2153915d AO |
4658 | |
4659 | if (final_output | |
4660 | && (!NOTE_P (insn) || | |
4661 | (NOTE_KIND (insn) != NOTE_INSN_VAR_LOCATION | |
2b1c5433 | 4662 | && NOTE_KIND (insn) != NOTE_INSN_CALL_ARG_LOCATION |
2153915d | 4663 | && NOTE_KIND (insn) != NOTE_INSN_BLOCK_BEG |
5619e52c JJ |
4664 | && NOTE_KIND (insn) != NOTE_INSN_BLOCK_END |
4665 | && NOTE_KIND (insn) != NOTE_INSN_DELETED_DEBUG_LABEL))) | |
2153915d | 4666 | print_rtl_single (final_output, insn); |
2153915d AO |
4667 | } |
4668 | ||
4669 | if (final_output) | |
4670 | { | |
4671 | flag_dump_noaddr = save_noaddr; | |
4672 | flag_dump_unnumbered = save_unnumbered; | |
6ca5d1f6 | 4673 | final_insns_dump_p = false; |
2153915d AO |
4674 | |
4675 | if (fclose (final_output)) | |
4676 | { | |
7ca92787 JM |
4677 | error ("could not close final insn dump file %qs: %m", |
4678 | flag_dump_final_insns); | |
2153915d AO |
4679 | flag_dump_final_insns = NULL; |
4680 | } | |
ef330312 PB |
4681 | } |
4682 | ||
5f39ad47 | 4683 | flag_rerun_cse_after_global_opts = 0; |
ef330312 PB |
4684 | reload_completed = 0; |
4685 | epilogue_completed = 0; | |
23249ac4 DB |
4686 | #ifdef STACK_REGS |
4687 | regstack_completed = 0; | |
4688 | #endif | |
ef330312 PB |
4689 | |
4690 | /* Clear out the insn_length contents now that they are no | |
4691 | longer valid. */ | |
4692 | init_insn_lengths (); | |
4693 | ||
4694 | /* Show no temporary slots allocated. */ | |
4695 | init_temp_slots (); | |
4696 | ||
ef330312 PB |
4697 | free_bb_for_insn (); |
4698 | ||
c2e84327 DM |
4699 | if (cfun->gimple_df) |
4700 | delete_tree_ssa (cfun); | |
55b34b5f | 4701 | |
051f8cc6 JH |
4702 | /* We can reduce stack alignment on call site only when we are sure that |
4703 | the function body just produced will be actually used in the final | |
4704 | executable. */ | |
4705 | if (decl_binds_to_current_def_p (current_function_decl)) | |
ef330312 | 4706 | { |
17b29c0a | 4707 | unsigned int pref = crtl->preferred_stack_boundary; |
cb91fab0 JH |
4708 | if (crtl->stack_alignment_needed > crtl->preferred_stack_boundary) |
4709 | pref = crtl->stack_alignment_needed; | |
3dafb85c ML |
4710 | cgraph_node::rtl_info (current_function_decl) |
4711 | ->preferred_incoming_stack_boundary = pref; | |
ef330312 PB |
4712 | } |
4713 | ||
4714 | /* Make sure volatile mem refs aren't considered valid operands for | |
4715 | arithmetic insns. We must call this here if this is a nested inline | |
4716 | function, since the above code leaves us in the init_recog state, | |
4717 | and the function context push/pop code does not save/restore volatile_ok. | |
4718 | ||
4719 | ??? Maybe it isn't necessary for expand_start_function to call this | |
4720 | anymore if we do it here? */ | |
4721 | ||
4722 | init_recog_no_volatile (); | |
4723 | ||
4724 | /* We're done with this function. Free up memory if we can. */ | |
4725 | free_after_parsing (cfun); | |
4726 | free_after_compilation (cfun); | |
c2924966 | 4727 | return 0; |
ef330312 PB |
4728 | } |
4729 | ||
27a4cd48 DM |
4730 | namespace { |
4731 | ||
4732 | const pass_data pass_data_clean_state = | |
ef330312 | 4733 | { |
27a4cd48 DM |
4734 | RTL_PASS, /* type */ |
4735 | "*clean_state", /* name */ | |
4736 | OPTGROUP_NONE, /* optinfo_flags */ | |
27a4cd48 DM |
4737 | TV_FINAL, /* tv_id */ |
4738 | 0, /* properties_required */ | |
4739 | 0, /* properties_provided */ | |
4740 | PROP_rtl, /* properties_destroyed */ | |
4741 | 0, /* todo_flags_start */ | |
4742 | 0, /* todo_flags_finish */ | |
ef330312 | 4743 | }; |
27a4cd48 DM |
4744 | |
4745 | class pass_clean_state : public rtl_opt_pass | |
4746 | { | |
4747 | public: | |
c3284718 RS |
4748 | pass_clean_state (gcc::context *ctxt) |
4749 | : rtl_opt_pass (pass_data_clean_state, ctxt) | |
27a4cd48 DM |
4750 | {} |
4751 | ||
4752 | /* opt_pass methods: */ | |
be55bfe6 TS |
4753 | virtual unsigned int execute (function *) |
4754 | { | |
4755 | return rest_of_clean_state (); | |
4756 | } | |
27a4cd48 DM |
4757 | |
4758 | }; // class pass_clean_state | |
4759 | ||
4760 | } // anon namespace | |
4761 | ||
4762 | rtl_opt_pass * | |
4763 | make_pass_clean_state (gcc::context *ctxt) | |
4764 | { | |
4765 | return new pass_clean_state (ctxt); | |
4766 | } | |
27c07cc5 | 4767 | |
026c3cfd | 4768 | /* Return true if INSN is a call to the current function. */ |
26e288ba TV |
4769 | |
4770 | static bool | |
fa7af581 | 4771 | self_recursive_call_p (rtx_insn *insn) |
26e288ba TV |
4772 | { |
4773 | tree fndecl = get_call_fndecl (insn); | |
4774 | return (fndecl == current_function_decl | |
4775 | && decl_binds_to_current_def_p (fndecl)); | |
4776 | } | |
4777 | ||
27c07cc5 RO |
4778 | /* Collect hard register usage for the current function. */ |
4779 | ||
4780 | static void | |
4781 | collect_fn_hard_reg_usage (void) | |
4782 | { | |
fa7af581 | 4783 | rtx_insn *insn; |
4b29b965 | 4784 | #ifdef STACK_REGS |
27c07cc5 | 4785 | int i; |
4b29b965 | 4786 | #endif |
27c07cc5 | 4787 | struct cgraph_rtl_info *node; |
53f2f6c1 | 4788 | HARD_REG_SET function_used_regs; |
27c07cc5 RO |
4789 | |
4790 | /* ??? To be removed when all the ports have been fixed. */ | |
4791 | if (!targetm.call_fusage_contains_non_callee_clobbers) | |
4792 | return; | |
4793 | ||
53f2f6c1 | 4794 | CLEAR_HARD_REG_SET (function_used_regs); |
27c07cc5 RO |
4795 | |
4796 | for (insn = get_insns (); insn != NULL_RTX; insn = next_insn (insn)) | |
4797 | { | |
4798 | HARD_REG_SET insn_used_regs; | |
4799 | ||
4800 | if (!NONDEBUG_INSN_P (insn)) | |
4801 | continue; | |
4802 | ||
26e288ba TV |
4803 | if (CALL_P (insn) |
4804 | && !self_recursive_call_p (insn)) | |
6621ab68 TV |
4805 | { |
4806 | if (!get_call_reg_set_usage (insn, &insn_used_regs, | |
4807 | call_used_reg_set)) | |
4808 | return; | |
27c07cc5 | 4809 | |
6621ab68 TV |
4810 | IOR_HARD_REG_SET (function_used_regs, insn_used_regs); |
4811 | } | |
27c07cc5 | 4812 | |
6621ab68 | 4813 | find_all_hard_reg_sets (insn, &insn_used_regs, false); |
53f2f6c1 | 4814 | IOR_HARD_REG_SET (function_used_regs, insn_used_regs); |
27c07cc5 RO |
4815 | } |
4816 | ||
4817 | /* Be conservative - mark fixed and global registers as used. */ | |
53f2f6c1 | 4818 | IOR_HARD_REG_SET (function_used_regs, fixed_reg_set); |
27c07cc5 RO |
4819 | |
4820 | #ifdef STACK_REGS | |
4821 | /* Handle STACK_REGS conservatively, since the df-framework does not | |
4822 | provide accurate information for them. */ | |
4823 | ||
4824 | for (i = FIRST_STACK_REG; i <= LAST_STACK_REG; i++) | |
53f2f6c1 | 4825 | SET_HARD_REG_BIT (function_used_regs, i); |
27c07cc5 RO |
4826 | #endif |
4827 | ||
5fea8186 TV |
4828 | /* The information we have gathered is only interesting if it exposes a |
4829 | register from the call_used_regs that is not used in this function. */ | |
4830 | if (hard_reg_set_subset_p (call_used_reg_set, function_used_regs)) | |
4831 | return; | |
4832 | ||
3dafb85c | 4833 | node = cgraph_node::rtl_info (current_function_decl); |
53f2f6c1 TV |
4834 | gcc_assert (node != NULL); |
4835 | ||
4836 | COPY_HARD_REG_SET (node->function_used_regs, function_used_regs); | |
27c07cc5 RO |
4837 | node->function_used_regs_valid = 1; |
4838 | } | |
4839 | ||
4840 | /* Get the declaration of the function called by INSN. */ | |
4841 | ||
4842 | static tree | |
fa7af581 | 4843 | get_call_fndecl (rtx_insn *insn) |
27c07cc5 RO |
4844 | { |
4845 | rtx note, datum; | |
4846 | ||
4847 | note = find_reg_note (insn, REG_CALL_DECL, NULL_RTX); | |
4848 | if (note == NULL_RTX) | |
4849 | return NULL_TREE; | |
4850 | ||
4851 | datum = XEXP (note, 0); | |
4852 | if (datum != NULL_RTX) | |
4853 | return SYMBOL_REF_DECL (datum); | |
4854 | ||
4855 | return NULL_TREE; | |
4856 | } | |
4857 | ||
4858 | /* Return the cgraph_rtl_info of the function called by INSN. Returns NULL for | |
4859 | call targets that can be overwritten. */ | |
4860 | ||
4861 | static struct cgraph_rtl_info * | |
fa7af581 | 4862 | get_call_cgraph_rtl_info (rtx_insn *insn) |
27c07cc5 RO |
4863 | { |
4864 | tree fndecl; | |
4865 | ||
4866 | if (insn == NULL_RTX) | |
4867 | return NULL; | |
4868 | ||
4869 | fndecl = get_call_fndecl (insn); | |
4870 | if (fndecl == NULL_TREE | |
4871 | || !decl_binds_to_current_def_p (fndecl)) | |
4872 | return NULL; | |
4873 | ||
3dafb85c | 4874 | return cgraph_node::rtl_info (fndecl); |
27c07cc5 RO |
4875 | } |
4876 | ||
4877 | /* Find hard registers used by function call instruction INSN, and return them | |
4878 | in REG_SET. Return DEFAULT_SET in REG_SET if not found. */ | |
4879 | ||
4880 | bool | |
86bf2d46 | 4881 | get_call_reg_set_usage (rtx_insn *insn, HARD_REG_SET *reg_set, |
27c07cc5 RO |
4882 | HARD_REG_SET default_set) |
4883 | { | |
1e288103 | 4884 | if (flag_ipa_ra) |
27c07cc5 RO |
4885 | { |
4886 | struct cgraph_rtl_info *node = get_call_cgraph_rtl_info (insn); | |
4887 | if (node != NULL | |
4888 | && node->function_used_regs_valid) | |
4889 | { | |
4890 | COPY_HARD_REG_SET (*reg_set, node->function_used_regs); | |
4891 | AND_HARD_REG_SET (*reg_set, default_set); | |
4892 | return true; | |
4893 | } | |
4894 | } | |
4895 | ||
4896 | COPY_HARD_REG_SET (*reg_set, default_set); | |
4897 | return false; | |
4898 | } |