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f4e584dc | 1 | /* Global common subexpression elimination/Partial redundancy elimination |
7506f491 | 2 | and global constant/copy propagation for GNU compiler. |
ad616de1 | 3 | Copyright (C) 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005 |
8e42ace1 | 4 | Free Software Foundation, Inc. |
7506f491 | 5 | |
1322177d | 6 | This file is part of GCC. |
7506f491 | 7 | |
1322177d LB |
8 | GCC is free software; you can redistribute it and/or modify it under |
9 | the terms of the GNU General Public License as published by the Free | |
10 | Software Foundation; either version 2, or (at your option) any later | |
11 | version. | |
7506f491 | 12 | |
1322177d LB |
13 | GCC is distributed in the hope that it will be useful, but WITHOUT ANY |
14 | WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
15 | FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License | |
16 | for more details. | |
7506f491 DE |
17 | |
18 | You should have received a copy of the GNU General Public License | |
1322177d LB |
19 | along with GCC; see the file COPYING. If not, write to the Free |
20 | Software Foundation, 59 Temple Place - Suite 330, Boston, MA | |
21 | 02111-1307, USA. */ | |
7506f491 DE |
22 | |
23 | /* TODO | |
24 | - reordering of memory allocation and freeing to be more space efficient | |
25 | - do rough calc of how many regs are needed in each block, and a rough | |
26 | calc of how many regs are available in each class and use that to | |
27 | throttle back the code in cases where RTX_COST is minimal. | |
f4e584dc JL |
28 | - a store to the same address as a load does not kill the load if the |
29 | source of the store is also the destination of the load. Handling this | |
30 | allows more load motion, particularly out of loops. | |
7506f491 DE |
31 | - ability to realloc sbitmap vectors would allow one initial computation |
32 | of reg_set_in_block with only subsequent additions, rather than | |
33 | recomputing it for each pass | |
34 | ||
7506f491 DE |
35 | */ |
36 | ||
37 | /* References searched while implementing this. | |
7506f491 DE |
38 | |
39 | Compilers Principles, Techniques and Tools | |
40 | Aho, Sethi, Ullman | |
41 | Addison-Wesley, 1988 | |
42 | ||
43 | Global Optimization by Suppression of Partial Redundancies | |
44 | E. Morel, C. Renvoise | |
45 | communications of the acm, Vol. 22, Num. 2, Feb. 1979 | |
46 | ||
47 | A Portable Machine-Independent Global Optimizer - Design and Measurements | |
48 | Frederick Chow | |
49 | Stanford Ph.D. thesis, Dec. 1983 | |
50 | ||
7506f491 DE |
51 | A Fast Algorithm for Code Movement Optimization |
52 | D.M. Dhamdhere | |
53 | SIGPLAN Notices, Vol. 23, Num. 10, Oct. 1988 | |
54 | ||
55 | A Solution to a Problem with Morel and Renvoise's | |
56 | Global Optimization by Suppression of Partial Redundancies | |
57 | K-H Drechsler, M.P. Stadel | |
58 | ACM TOPLAS, Vol. 10, Num. 4, Oct. 1988 | |
59 | ||
60 | Practical Adaptation of the Global Optimization | |
61 | Algorithm of Morel and Renvoise | |
62 | D.M. Dhamdhere | |
63 | ACM TOPLAS, Vol. 13, Num. 2. Apr. 1991 | |
64 | ||
65 | Efficiently Computing Static Single Assignment Form and the Control | |
66 | Dependence Graph | |
67 | R. Cytron, J. Ferrante, B.K. Rosen, M.N. Wegman, and F.K. Zadeck | |
68 | ACM TOPLAS, Vol. 13, Num. 4, Oct. 1991 | |
69 | ||
7506f491 DE |
70 | Lazy Code Motion |
71 | J. Knoop, O. Ruthing, B. Steffen | |
72 | ACM SIGPLAN Notices Vol. 27, Num. 7, Jul. 1992, '92 Conference on PLDI | |
73 | ||
74 | What's In a Region? Or Computing Control Dependence Regions in Near-Linear | |
75 | Time for Reducible Flow Control | |
76 | Thomas Ball | |
77 | ACM Letters on Programming Languages and Systems, | |
78 | Vol. 2, Num. 1-4, Mar-Dec 1993 | |
79 | ||
80 | An Efficient Representation for Sparse Sets | |
81 | Preston Briggs, Linda Torczon | |
82 | ACM Letters on Programming Languages and Systems, | |
83 | Vol. 2, Num. 1-4, Mar-Dec 1993 | |
84 | ||
85 | A Variation of Knoop, Ruthing, and Steffen's Lazy Code Motion | |
86 | K-H Drechsler, M.P. Stadel | |
87 | ACM SIGPLAN Notices, Vol. 28, Num. 5, May 1993 | |
88 | ||
89 | Partial Dead Code Elimination | |
90 | J. Knoop, O. Ruthing, B. Steffen | |
91 | ACM SIGPLAN Notices, Vol. 29, Num. 6, Jun. 1994 | |
92 | ||
93 | Effective Partial Redundancy Elimination | |
94 | P. Briggs, K.D. Cooper | |
95 | ACM SIGPLAN Notices, Vol. 29, Num. 6, Jun. 1994 | |
96 | ||
97 | The Program Structure Tree: Computing Control Regions in Linear Time | |
98 | R. Johnson, D. Pearson, K. Pingali | |
99 | ACM SIGPLAN Notices, Vol. 29, Num. 6, Jun. 1994 | |
100 | ||
101 | Optimal Code Motion: Theory and Practice | |
102 | J. Knoop, O. Ruthing, B. Steffen | |
103 | ACM TOPLAS, Vol. 16, Num. 4, Jul. 1994 | |
104 | ||
105 | The power of assignment motion | |
106 | J. Knoop, O. Ruthing, B. Steffen | |
107 | ACM SIGPLAN Notices Vol. 30, Num. 6, Jun. 1995, '95 Conference on PLDI | |
108 | ||
109 | Global code motion / global value numbering | |
110 | C. Click | |
111 | ACM SIGPLAN Notices Vol. 30, Num. 6, Jun. 1995, '95 Conference on PLDI | |
112 | ||
113 | Value Driven Redundancy Elimination | |
114 | L.T. Simpson | |
115 | Rice University Ph.D. thesis, Apr. 1996 | |
116 | ||
117 | Value Numbering | |
118 | L.T. Simpson | |
119 | Massively Scalar Compiler Project, Rice University, Sep. 1996 | |
120 | ||
121 | High Performance Compilers for Parallel Computing | |
122 | Michael Wolfe | |
123 | Addison-Wesley, 1996 | |
124 | ||
f4e584dc JL |
125 | Advanced Compiler Design and Implementation |
126 | Steven Muchnick | |
127 | Morgan Kaufmann, 1997 | |
128 | ||
a42cd965 AM |
129 | Building an Optimizing Compiler |
130 | Robert Morgan | |
131 | Digital Press, 1998 | |
132 | ||
f4e584dc JL |
133 | People wishing to speed up the code here should read: |
134 | Elimination Algorithms for Data Flow Analysis | |
135 | B.G. Ryder, M.C. Paull | |
136 | ACM Computing Surveys, Vol. 18, Num. 3, Sep. 1986 | |
137 | ||
138 | How to Analyze Large Programs Efficiently and Informatively | |
139 | D.M. Dhamdhere, B.K. Rosen, F.K. Zadeck | |
140 | ACM SIGPLAN Notices Vol. 27, Num. 7, Jul. 1992, '92 Conference on PLDI | |
141 | ||
7506f491 DE |
142 | People wishing to do something different can find various possibilities |
143 | in the above papers and elsewhere. | |
144 | */ | |
145 | ||
146 | #include "config.h" | |
50b2596f | 147 | #include "system.h" |
4977bab6 ZW |
148 | #include "coretypes.h" |
149 | #include "tm.h" | |
01198c2f | 150 | #include "toplev.h" |
7506f491 DE |
151 | |
152 | #include "rtl.h" | |
b0656d8b | 153 | #include "tree.h" |
6baf1cc8 | 154 | #include "tm_p.h" |
7506f491 DE |
155 | #include "regs.h" |
156 | #include "hard-reg-set.h" | |
157 | #include "flags.h" | |
158 | #include "real.h" | |
159 | #include "insn-config.h" | |
160 | #include "recog.h" | |
161 | #include "basic-block.h" | |
50b2596f | 162 | #include "output.h" |
49ad7cfa | 163 | #include "function.h" |
589005ff | 164 | #include "expr.h" |
e7d482b9 | 165 | #include "except.h" |
fb0c0a12 | 166 | #include "ggc.h" |
f1fa37ff | 167 | #include "params.h" |
ae860ff7 | 168 | #include "cselib.h" |
d128effb | 169 | #include "intl.h" |
7506f491 | 170 | #include "obstack.h" |
27fb79ad | 171 | #include "timevar.h" |
4fa31c2a | 172 | |
7506f491 DE |
173 | /* Propagate flow information through back edges and thus enable PRE's |
174 | moving loop invariant calculations out of loops. | |
175 | ||
176 | Originally this tended to create worse overall code, but several | |
177 | improvements during the development of PRE seem to have made following | |
178 | back edges generally a win. | |
179 | ||
180 | Note much of the loop invariant code motion done here would normally | |
181 | be done by loop.c, which has more heuristics for when to move invariants | |
182 | out of loops. At some point we might need to move some of those | |
183 | heuristics into gcse.c. */ | |
7506f491 | 184 | |
f4e584dc JL |
185 | /* We support GCSE via Partial Redundancy Elimination. PRE optimizations |
186 | are a superset of those done by GCSE. | |
7506f491 | 187 | |
f4e584dc | 188 | We perform the following steps: |
7506f491 DE |
189 | |
190 | 1) Compute basic block information. | |
191 | ||
192 | 2) Compute table of places where registers are set. | |
193 | ||
194 | 3) Perform copy/constant propagation. | |
195 | ||
e83f4801 SB |
196 | 4) Perform global cse using lazy code motion if not optimizing |
197 | for size, or code hoisting if we are. | |
7506f491 | 198 | |
e78d9500 | 199 | 5) Perform another pass of copy/constant propagation. |
7506f491 DE |
200 | |
201 | Two passes of copy/constant propagation are done because the first one | |
202 | enables more GCSE and the second one helps to clean up the copies that | |
203 | GCSE creates. This is needed more for PRE than for Classic because Classic | |
204 | GCSE will try to use an existing register containing the common | |
205 | subexpression rather than create a new one. This is harder to do for PRE | |
206 | because of the code motion (which Classic GCSE doesn't do). | |
207 | ||
208 | Expressions we are interested in GCSE-ing are of the form | |
209 | (set (pseudo-reg) (expression)). | |
210 | Function want_to_gcse_p says what these are. | |
211 | ||
212 | PRE handles moving invariant expressions out of loops (by treating them as | |
f4e584dc | 213 | partially redundant). |
7506f491 DE |
214 | |
215 | Eventually it would be nice to replace cse.c/gcse.c with SSA (static single | |
216 | assignment) based GVN (global value numbering). L. T. Simpson's paper | |
217 | (Rice University) on value numbering is a useful reference for this. | |
218 | ||
219 | ********************** | |
220 | ||
221 | We used to support multiple passes but there are diminishing returns in | |
222 | doing so. The first pass usually makes 90% of the changes that are doable. | |
223 | A second pass can make a few more changes made possible by the first pass. | |
224 | Experiments show any further passes don't make enough changes to justify | |
225 | the expense. | |
226 | ||
227 | A study of spec92 using an unlimited number of passes: | |
228 | [1 pass] = 1208 substitutions, [2] = 577, [3] = 202, [4] = 192, [5] = 83, | |
229 | [6] = 34, [7] = 17, [8] = 9, [9] = 4, [10] = 4, [11] = 2, | |
230 | [12] = 2, [13] = 1, [15] = 1, [16] = 2, [41] = 1 | |
231 | ||
232 | It was found doing copy propagation between each pass enables further | |
233 | substitutions. | |
234 | ||
235 | PRE is quite expensive in complicated functions because the DFA can take | |
7b1b4aed SB |
236 | a while to converge. Hence we only perform one pass. The parameter |
237 | max-gcse-passes can be modified if one wants to experiment. | |
7506f491 DE |
238 | |
239 | ********************** | |
240 | ||
241 | The steps for PRE are: | |
242 | ||
243 | 1) Build the hash table of expressions we wish to GCSE (expr_hash_table). | |
244 | ||
245 | 2) Perform the data flow analysis for PRE. | |
246 | ||
247 | 3) Delete the redundant instructions | |
248 | ||
249 | 4) Insert the required copies [if any] that make the partially | |
250 | redundant instructions fully redundant. | |
251 | ||
252 | 5) For other reaching expressions, insert an instruction to copy the value | |
253 | to a newly created pseudo that will reach the redundant instruction. | |
254 | ||
255 | The deletion is done first so that when we do insertions we | |
256 | know which pseudo reg to use. | |
257 | ||
258 | Various papers have argued that PRE DFA is expensive (O(n^2)) and others | |
259 | argue it is not. The number of iterations for the algorithm to converge | |
260 | is typically 2-4 so I don't view it as that expensive (relatively speaking). | |
261 | ||
f4e584dc | 262 | PRE GCSE depends heavily on the second CSE pass to clean up the copies |
7506f491 DE |
263 | we create. To make an expression reach the place where it's redundant, |
264 | the result of the expression is copied to a new register, and the redundant | |
265 | expression is deleted by replacing it with this new register. Classic GCSE | |
266 | doesn't have this problem as much as it computes the reaching defs of | |
a3c28ba2 KH |
267 | each register in each block and thus can try to use an existing |
268 | register. */ | |
7506f491 DE |
269 | \f |
270 | /* GCSE global vars. */ | |
271 | ||
272 | /* -dG dump file. */ | |
273 | static FILE *gcse_file; | |
274 | ||
f4e584dc JL |
275 | /* Note whether or not we should run jump optimization after gcse. We |
276 | want to do this for two cases. | |
277 | ||
278 | * If we changed any jumps via cprop. | |
279 | ||
280 | * If we added any labels via edge splitting. */ | |
f4e584dc JL |
281 | static int run_jump_opt_after_gcse; |
282 | ||
7506f491 DE |
283 | /* Bitmaps are normally not included in debugging dumps. |
284 | However it's useful to be able to print them from GDB. | |
285 | We could create special functions for this, but it's simpler to | |
286 | just allow passing stderr to the dump_foo fns. Since stderr can | |
287 | be a macro, we store a copy here. */ | |
288 | static FILE *debug_stderr; | |
289 | ||
290 | /* An obstack for our working variables. */ | |
291 | static struct obstack gcse_obstack; | |
292 | ||
c4c81601 | 293 | struct reg_use {rtx reg_rtx; }; |
abd535b6 | 294 | |
7506f491 DE |
295 | /* Hash table of expressions. */ |
296 | ||
297 | struct expr | |
298 | { | |
299 | /* The expression (SET_SRC for expressions, PATTERN for assignments). */ | |
300 | rtx expr; | |
301 | /* Index in the available expression bitmaps. */ | |
302 | int bitmap_index; | |
303 | /* Next entry with the same hash. */ | |
304 | struct expr *next_same_hash; | |
305 | /* List of anticipatable occurrences in basic blocks in the function. | |
306 | An "anticipatable occurrence" is one that is the first occurrence in the | |
f4e584dc JL |
307 | basic block, the operands are not modified in the basic block prior |
308 | to the occurrence and the output is not used between the start of | |
309 | the block and the occurrence. */ | |
7506f491 DE |
310 | struct occr *antic_occr; |
311 | /* List of available occurrence in basic blocks in the function. | |
312 | An "available occurrence" is one that is the last occurrence in the | |
313 | basic block and the operands are not modified by following statements in | |
314 | the basic block [including this insn]. */ | |
315 | struct occr *avail_occr; | |
316 | /* Non-null if the computation is PRE redundant. | |
317 | The value is the newly created pseudo-reg to record a copy of the | |
318 | expression in all the places that reach the redundant copy. */ | |
319 | rtx reaching_reg; | |
320 | }; | |
321 | ||
322 | /* Occurrence of an expression. | |
323 | There is one per basic block. If a pattern appears more than once the | |
324 | last appearance is used [or first for anticipatable expressions]. */ | |
325 | ||
326 | struct occr | |
327 | { | |
328 | /* Next occurrence of this expression. */ | |
329 | struct occr *next; | |
330 | /* The insn that computes the expression. */ | |
331 | rtx insn; | |
cc2902df | 332 | /* Nonzero if this [anticipatable] occurrence has been deleted. */ |
7506f491 | 333 | char deleted_p; |
cc2902df | 334 | /* Nonzero if this [available] occurrence has been copied to |
7506f491 DE |
335 | reaching_reg. */ |
336 | /* ??? This is mutually exclusive with deleted_p, so they could share | |
337 | the same byte. */ | |
338 | char copied_p; | |
339 | }; | |
340 | ||
341 | /* Expression and copy propagation hash tables. | |
342 | Each hash table is an array of buckets. | |
343 | ??? It is known that if it were an array of entries, structure elements | |
344 | `next_same_hash' and `bitmap_index' wouldn't be necessary. However, it is | |
345 | not clear whether in the final analysis a sufficient amount of memory would | |
346 | be saved as the size of the available expression bitmaps would be larger | |
347 | [one could build a mapping table without holes afterwards though]. | |
c4c81601 | 348 | Someday I'll perform the computation and figure it out. */ |
7506f491 | 349 | |
02280659 ZD |
350 | struct hash_table |
351 | { | |
352 | /* The table itself. | |
353 | This is an array of `expr_hash_table_size' elements. */ | |
354 | struct expr **table; | |
355 | ||
356 | /* Size of the hash table, in elements. */ | |
357 | unsigned int size; | |
2e653e39 | 358 | |
02280659 ZD |
359 | /* Number of hash table elements. */ |
360 | unsigned int n_elems; | |
7506f491 | 361 | |
02280659 ZD |
362 | /* Whether the table is expression of copy propagation one. */ |
363 | int set_p; | |
364 | }; | |
c4c81601 | 365 | |
02280659 ZD |
366 | /* Expression hash table. */ |
367 | static struct hash_table expr_hash_table; | |
368 | ||
369 | /* Copy propagation hash table. */ | |
370 | static struct hash_table set_hash_table; | |
7506f491 DE |
371 | |
372 | /* Mapping of uids to cuids. | |
373 | Only real insns get cuids. */ | |
374 | static int *uid_cuid; | |
375 | ||
376 | /* Highest UID in UID_CUID. */ | |
377 | static int max_uid; | |
378 | ||
379 | /* Get the cuid of an insn. */ | |
b86db3eb | 380 | #ifdef ENABLE_CHECKING |
282899df NS |
381 | #define INSN_CUID(INSN) \ |
382 | (gcc_assert (INSN_UID (INSN) <= max_uid), uid_cuid[INSN_UID (INSN)]) | |
b86db3eb | 383 | #else |
7506f491 | 384 | #define INSN_CUID(INSN) (uid_cuid[INSN_UID (INSN)]) |
b86db3eb | 385 | #endif |
7506f491 DE |
386 | |
387 | /* Number of cuids. */ | |
388 | static int max_cuid; | |
389 | ||
390 | /* Mapping of cuids to insns. */ | |
391 | static rtx *cuid_insn; | |
392 | ||
393 | /* Get insn from cuid. */ | |
394 | #define CUID_INSN(CUID) (cuid_insn[CUID]) | |
395 | ||
396 | /* Maximum register number in function prior to doing gcse + 1. | |
397 | Registers created during this pass have regno >= max_gcse_regno. | |
398 | This is named with "gcse" to not collide with global of same name. */ | |
770ae6cc | 399 | static unsigned int max_gcse_regno; |
7506f491 | 400 | |
7506f491 | 401 | /* Table of registers that are modified. |
c4c81601 | 402 | |
7506f491 DE |
403 | For each register, each element is a list of places where the pseudo-reg |
404 | is set. | |
405 | ||
406 | For simplicity, GCSE is done on sets of pseudo-regs only. PRE GCSE only | |
407 | requires knowledge of which blocks kill which regs [and thus could use | |
f4e584dc | 408 | a bitmap instead of the lists `reg_set_table' uses]. |
7506f491 | 409 | |
c4c81601 RK |
410 | `reg_set_table' and could be turned into an array of bitmaps (num-bbs x |
411 | num-regs) [however perhaps it may be useful to keep the data as is]. One | |
412 | advantage of recording things this way is that `reg_set_table' is fairly | |
413 | sparse with respect to pseudo regs but for hard regs could be fairly dense | |
414 | [relatively speaking]. And recording sets of pseudo-regs in lists speeds | |
7506f491 DE |
415 | up functions like compute_transp since in the case of pseudo-regs we only |
416 | need to iterate over the number of times a pseudo-reg is set, not over the | |
417 | number of basic blocks [clearly there is a bit of a slow down in the cases | |
418 | where a pseudo is set more than once in a block, however it is believed | |
419 | that the net effect is to speed things up]. This isn't done for hard-regs | |
420 | because recording call-clobbered hard-regs in `reg_set_table' at each | |
c4c81601 RK |
421 | function call can consume a fair bit of memory, and iterating over |
422 | hard-regs stored this way in compute_transp will be more expensive. */ | |
7506f491 | 423 | |
c4c81601 RK |
424 | typedef struct reg_set |
425 | { | |
7506f491 DE |
426 | /* The next setting of this register. */ |
427 | struct reg_set *next; | |
ed425871 JL |
428 | /* The index of the block where it was set. */ |
429 | int bb_index; | |
7506f491 | 430 | } reg_set; |
c4c81601 | 431 | |
7506f491 | 432 | static reg_set **reg_set_table; |
c4c81601 | 433 | |
7506f491 DE |
434 | /* Size of `reg_set_table'. |
435 | The table starts out at max_gcse_regno + slop, and is enlarged as | |
436 | necessary. */ | |
437 | static int reg_set_table_size; | |
c4c81601 | 438 | |
7506f491 DE |
439 | /* Amount to grow `reg_set_table' by when it's full. */ |
440 | #define REG_SET_TABLE_SLOP 100 | |
441 | ||
a13d4ebf | 442 | /* This is a list of expressions which are MEMs and will be used by load |
589005ff | 443 | or store motion. |
a13d4ebf | 444 | Load motion tracks MEMs which aren't killed by |
454ff5cb | 445 | anything except itself. (i.e., loads and stores to a single location). |
589005ff | 446 | We can then allow movement of these MEM refs with a little special |
a13d4ebf AM |
447 | allowance. (all stores copy the same value to the reaching reg used |
448 | for the loads). This means all values used to store into memory must have | |
589005ff | 449 | no side effects so we can re-issue the setter value. |
a13d4ebf AM |
450 | Store Motion uses this structure as an expression table to track stores |
451 | which look interesting, and might be moveable towards the exit block. */ | |
452 | ||
453 | struct ls_expr | |
454 | { | |
455 | struct expr * expr; /* Gcse expression reference for LM. */ | |
456 | rtx pattern; /* Pattern of this mem. */ | |
47a3dae1 | 457 | rtx pattern_regs; /* List of registers mentioned by the mem. */ |
aaa4ca30 AJ |
458 | rtx loads; /* INSN list of loads seen. */ |
459 | rtx stores; /* INSN list of stores seen. */ | |
a13d4ebf AM |
460 | struct ls_expr * next; /* Next in the list. */ |
461 | int invalid; /* Invalid for some reason. */ | |
462 | int index; /* If it maps to a bitmap index. */ | |
b58b21d5 | 463 | unsigned int hash_index; /* Index when in a hash table. */ |
a13d4ebf AM |
464 | rtx reaching_reg; /* Register to use when re-writing. */ |
465 | }; | |
466 | ||
fbef91d8 RS |
467 | /* Array of implicit set patterns indexed by basic block index. */ |
468 | static rtx *implicit_sets; | |
469 | ||
a13d4ebf AM |
470 | /* Head of the list of load/store memory refs. */ |
471 | static struct ls_expr * pre_ldst_mems = NULL; | |
472 | ||
7506f491 DE |
473 | /* Bitmap containing one bit for each register in the program. |
474 | Used when performing GCSE to track which registers have been set since | |
475 | the start of the basic block. */ | |
73991d6a | 476 | static regset reg_set_bitmap; |
7506f491 DE |
477 | |
478 | /* For each block, a bitmap of registers set in the block. | |
e83f4801 | 479 | This is used by compute_transp. |
7506f491 DE |
480 | It is computed during hash table computation and not by compute_sets |
481 | as it includes registers added since the last pass (or between cprop and | |
482 | gcse) and it's currently not easy to realloc sbitmap vectors. */ | |
483 | static sbitmap *reg_set_in_block; | |
484 | ||
a13d4ebf AM |
485 | /* Array, indexed by basic block number for a list of insns which modify |
486 | memory within that block. */ | |
487 | static rtx * modify_mem_list; | |
0516f6fe | 488 | static bitmap modify_mem_list_set; |
a13d4ebf AM |
489 | |
490 | /* This array parallels modify_mem_list, but is kept canonicalized. */ | |
491 | static rtx * canon_modify_mem_list; | |
0516f6fe | 492 | |
aa47fcfa JL |
493 | /* Bitmap indexed by block numbers to record which blocks contain |
494 | function calls. */ | |
495 | static bitmap blocks_with_calls; | |
496 | ||
7506f491 DE |
497 | /* Various variables for statistics gathering. */ |
498 | ||
499 | /* Memory used in a pass. | |
500 | This isn't intended to be absolutely precise. Its intent is only | |
501 | to keep an eye on memory usage. */ | |
502 | static int bytes_used; | |
c4c81601 | 503 | |
7506f491 DE |
504 | /* GCSE substitutions made. */ |
505 | static int gcse_subst_count; | |
506 | /* Number of copy instructions created. */ | |
507 | static int gcse_create_count; | |
27fb79ad SB |
508 | /* Number of local constants propagated. */ |
509 | static int local_const_prop_count; | |
0fa2e4df | 510 | /* Number of local copies propagated. */ |
27fb79ad SB |
511 | static int local_copy_prop_count; |
512 | /* Number of global constants propagated. */ | |
513 | static int global_const_prop_count; | |
0fa2e4df | 514 | /* Number of global copies propagated. */ |
27fb79ad | 515 | static int global_copy_prop_count; |
7506f491 | 516 | \f |
e83f4801 SB |
517 | /* For available exprs */ |
518 | static sbitmap *ae_kill, *ae_gen; | |
7506f491 | 519 | \f |
1d088dee | 520 | static void compute_can_copy (void); |
9fe15a12 KG |
521 | static void *gmalloc (size_t) ATTRIBUTE_MALLOC; |
522 | static void *gcalloc (size_t, size_t) ATTRIBUTE_MALLOC; | |
523 | static void *grealloc (void *, size_t); | |
703ad42b | 524 | static void *gcse_alloc (unsigned long); |
eb232f4e | 525 | static void alloc_gcse_mem (void); |
1d088dee AJ |
526 | static void free_gcse_mem (void); |
527 | static void alloc_reg_set_mem (int); | |
528 | static void free_reg_set_mem (void); | |
1d088dee AJ |
529 | static void record_one_set (int, rtx); |
530 | static void record_set_info (rtx, rtx, void *); | |
eb232f4e | 531 | static void compute_sets (void); |
1d088dee AJ |
532 | static void hash_scan_insn (rtx, struct hash_table *, int); |
533 | static void hash_scan_set (rtx, rtx, struct hash_table *); | |
534 | static void hash_scan_clobber (rtx, rtx, struct hash_table *); | |
535 | static void hash_scan_call (rtx, rtx, struct hash_table *); | |
536 | static int want_to_gcse_p (rtx); | |
1707bafa | 537 | static bool can_assign_to_reg_p (rtx); |
1d088dee AJ |
538 | static bool gcse_constant_p (rtx); |
539 | static int oprs_unchanged_p (rtx, rtx, int); | |
540 | static int oprs_anticipatable_p (rtx, rtx); | |
541 | static int oprs_available_p (rtx, rtx); | |
542 | static void insert_expr_in_table (rtx, enum machine_mode, rtx, int, int, | |
543 | struct hash_table *); | |
544 | static void insert_set_in_table (rtx, rtx, struct hash_table *); | |
545 | static unsigned int hash_expr (rtx, enum machine_mode, int *, int); | |
1d088dee AJ |
546 | static unsigned int hash_set (int, int); |
547 | static int expr_equiv_p (rtx, rtx); | |
548 | static void record_last_reg_set_info (rtx, int); | |
549 | static void record_last_mem_set_info (rtx); | |
550 | static void record_last_set_info (rtx, rtx, void *); | |
551 | static void compute_hash_table (struct hash_table *); | |
552 | static void alloc_hash_table (int, struct hash_table *, int); | |
553 | static void free_hash_table (struct hash_table *); | |
554 | static void compute_hash_table_work (struct hash_table *); | |
555 | static void dump_hash_table (FILE *, const char *, struct hash_table *); | |
1d088dee AJ |
556 | static struct expr *lookup_set (unsigned int, struct hash_table *); |
557 | static struct expr *next_set (unsigned int, struct expr *); | |
558 | static void reset_opr_set_tables (void); | |
559 | static int oprs_not_set_p (rtx, rtx); | |
560 | static void mark_call (rtx); | |
561 | static void mark_set (rtx, rtx); | |
562 | static void mark_clobber (rtx, rtx); | |
563 | static void mark_oprs_set (rtx); | |
564 | static void alloc_cprop_mem (int, int); | |
565 | static void free_cprop_mem (void); | |
566 | static void compute_transp (rtx, int, sbitmap *, int); | |
567 | static void compute_transpout (void); | |
568 | static void compute_local_properties (sbitmap *, sbitmap *, sbitmap *, | |
569 | struct hash_table *); | |
570 | static void compute_cprop_data (void); | |
571 | static void find_used_regs (rtx *, void *); | |
572 | static int try_replace_reg (rtx, rtx, rtx); | |
573 | static struct expr *find_avail_set (int, rtx); | |
574 | static int cprop_jump (basic_block, rtx, rtx, rtx, rtx); | |
575 | static void mems_conflict_for_gcse_p (rtx, rtx, void *); | |
576 | static int load_killed_in_block_p (basic_block, int, rtx, int); | |
577 | static void canon_list_insert (rtx, rtx, void *); | |
578 | static int cprop_insn (rtx, int); | |
579 | static int cprop (int); | |
580 | static void find_implicit_sets (void); | |
eb232f4e SB |
581 | static int one_cprop_pass (int, bool, bool); |
582 | static bool constprop_register (rtx, rtx, rtx, bool); | |
1d088dee AJ |
583 | static struct expr *find_bypass_set (int, int); |
584 | static bool reg_killed_on_edge (rtx, edge); | |
585 | static int bypass_block (basic_block, rtx, rtx); | |
586 | static int bypass_conditional_jumps (void); | |
587 | static void alloc_pre_mem (int, int); | |
588 | static void free_pre_mem (void); | |
589 | static void compute_pre_data (void); | |
590 | static int pre_expr_reaches_here_p (basic_block, struct expr *, | |
591 | basic_block); | |
592 | static void insert_insn_end_bb (struct expr *, basic_block, int); | |
593 | static void pre_insert_copy_insn (struct expr *, rtx); | |
594 | static void pre_insert_copies (void); | |
595 | static int pre_delete (void); | |
596 | static int pre_gcse (void); | |
597 | static int one_pre_gcse_pass (int); | |
598 | static void add_label_notes (rtx, rtx); | |
599 | static void alloc_code_hoist_mem (int, int); | |
600 | static void free_code_hoist_mem (void); | |
601 | static void compute_code_hoist_vbeinout (void); | |
602 | static void compute_code_hoist_data (void); | |
603 | static int hoist_expr_reaches_here_p (basic_block, int, basic_block, char *); | |
604 | static void hoist_code (void); | |
605 | static int one_code_hoisting_pass (void); | |
1d088dee AJ |
606 | static rtx process_insert_insn (struct expr *); |
607 | static int pre_edge_insert (struct edge_list *, struct expr **); | |
1d088dee AJ |
608 | static int pre_expr_reaches_here_p_work (basic_block, struct expr *, |
609 | basic_block, char *); | |
610 | static struct ls_expr * ldst_entry (rtx); | |
611 | static void free_ldst_entry (struct ls_expr *); | |
612 | static void free_ldst_mems (void); | |
613 | static void print_ldst_list (FILE *); | |
614 | static struct ls_expr * find_rtx_in_ldst (rtx); | |
615 | static int enumerate_ldsts (void); | |
616 | static inline struct ls_expr * first_ls_expr (void); | |
617 | static inline struct ls_expr * next_ls_expr (struct ls_expr *); | |
618 | static int simple_mem (rtx); | |
619 | static void invalidate_any_buried_refs (rtx); | |
620 | static void compute_ld_motion_mems (void); | |
621 | static void trim_ld_motion_mems (void); | |
622 | static void update_ld_motion_stores (struct expr *); | |
623 | static void reg_set_info (rtx, rtx, void *); | |
01c43039 | 624 | static void reg_clear_last_set (rtx, rtx, void *); |
1d088dee AJ |
625 | static bool store_ops_ok (rtx, int *); |
626 | static rtx extract_mentioned_regs (rtx); | |
627 | static rtx extract_mentioned_regs_helper (rtx, rtx); | |
628 | static void find_moveable_store (rtx, int *, int *); | |
629 | static int compute_store_table (void); | |
3b14e3af ZD |
630 | static bool load_kills_store (rtx, rtx, int); |
631 | static bool find_loads (rtx, rtx, int); | |
632 | static bool store_killed_in_insn (rtx, rtx, rtx, int); | |
1d088dee AJ |
633 | static bool store_killed_after (rtx, rtx, rtx, basic_block, int *, rtx *); |
634 | static bool store_killed_before (rtx, rtx, rtx, basic_block, int *); | |
635 | static void build_store_vectors (void); | |
636 | static void insert_insn_start_bb (rtx, basic_block); | |
637 | static int insert_store (struct ls_expr *, edge); | |
d088acea ZD |
638 | static void remove_reachable_equiv_notes (basic_block, struct ls_expr *); |
639 | static void replace_store_insn (rtx, rtx, basic_block, struct ls_expr *); | |
1d088dee AJ |
640 | static void delete_store (struct ls_expr *, basic_block); |
641 | static void free_store_memory (void); | |
642 | static void store_motion (void); | |
643 | static void free_insn_expr_list_list (rtx *); | |
644 | static void clear_modify_mem_tables (void); | |
645 | static void free_modify_mem_tables (void); | |
646 | static rtx gcse_emit_move_after (rtx, rtx, rtx); | |
647 | static void local_cprop_find_used_regs (rtx *, void *); | |
eb232f4e | 648 | static bool do_local_cprop (rtx, rtx, bool, rtx*); |
1d088dee | 649 | static bool adjust_libcall_notes (rtx, rtx, rtx, rtx*); |
eb232f4e | 650 | static void local_cprop_pass (bool); |
d128effb | 651 | static bool is_too_expensive (const char *); |
7506f491 | 652 | \f |
d128effb | 653 | |
7506f491 | 654 | /* Entry point for global common subexpression elimination. |
b732f36f KH |
655 | F is the first instruction in the function. Return nonzero if a |
656 | change is mode. */ | |
7506f491 | 657 | |
e78d9500 | 658 | int |
eb232f4e | 659 | gcse_main (rtx f ATTRIBUTE_UNUSED, FILE *file) |
7506f491 DE |
660 | { |
661 | int changed, pass; | |
662 | /* Bytes used at start of pass. */ | |
663 | int initial_bytes_used; | |
664 | /* Maximum number of bytes used by a pass. */ | |
665 | int max_pass_bytes; | |
666 | /* Point to release obstack data from for each pass. */ | |
667 | char *gcse_obstack_bottom; | |
668 | ||
b5ce41ff JL |
669 | /* We do not construct an accurate cfg in functions which call |
670 | setjmp, so just punt to be safe. */ | |
7506f491 | 671 | if (current_function_calls_setjmp) |
e78d9500 | 672 | return 0; |
589005ff | 673 | |
b5ce41ff JL |
674 | /* Assume that we do not need to run jump optimizations after gcse. */ |
675 | run_jump_opt_after_gcse = 0; | |
676 | ||
7506f491 DE |
677 | /* For calling dump_foo fns from gdb. */ |
678 | debug_stderr = stderr; | |
b5ce41ff | 679 | gcse_file = file; |
7506f491 | 680 | |
b5ce41ff JL |
681 | /* Identify the basic block information for this function, including |
682 | successors and predecessors. */ | |
7506f491 | 683 | max_gcse_regno = max_reg_num (); |
7506f491 | 684 | |
a42cd965 AM |
685 | if (file) |
686 | dump_flow_info (file); | |
687 | ||
d128effb NS |
688 | /* Return if there's nothing to do, or it is too expensive. */ |
689 | if (n_basic_blocks <= 1 || is_too_expensive (_("GCSE disabled"))) | |
a18820c6 | 690 | return 0; |
7b1b4aed | 691 | |
7506f491 | 692 | gcc_obstack_init (&gcse_obstack); |
a42cd965 | 693 | bytes_used = 0; |
7506f491 | 694 | |
a13d4ebf AM |
695 | /* We need alias. */ |
696 | init_alias_analysis (); | |
c4c81601 RK |
697 | /* Record where pseudo-registers are set. This data is kept accurate |
698 | during each pass. ??? We could also record hard-reg information here | |
699 | [since it's unchanging], however it is currently done during hash table | |
700 | computation. | |
b5ce41ff | 701 | |
c4c81601 RK |
702 | It may be tempting to compute MEM set information here too, but MEM sets |
703 | will be subject to code motion one day and thus we need to compute | |
b5ce41ff | 704 | information about memory sets when we build the hash tables. */ |
7506f491 DE |
705 | |
706 | alloc_reg_set_mem (max_gcse_regno); | |
eb232f4e | 707 | compute_sets (); |
7506f491 DE |
708 | |
709 | pass = 0; | |
710 | initial_bytes_used = bytes_used; | |
711 | max_pass_bytes = 0; | |
712 | gcse_obstack_bottom = gcse_alloc (1); | |
713 | changed = 1; | |
740f35a0 | 714 | while (changed && pass < MAX_GCSE_PASSES) |
7506f491 DE |
715 | { |
716 | changed = 0; | |
717 | if (file) | |
718 | fprintf (file, "GCSE pass %d\n\n", pass + 1); | |
719 | ||
720 | /* Initialize bytes_used to the space for the pred/succ lists, | |
721 | and the reg_set_table data. */ | |
722 | bytes_used = initial_bytes_used; | |
723 | ||
724 | /* Each pass may create new registers, so recalculate each time. */ | |
725 | max_gcse_regno = max_reg_num (); | |
726 | ||
eb232f4e | 727 | alloc_gcse_mem (); |
7506f491 | 728 | |
b5ce41ff JL |
729 | /* Don't allow constant propagation to modify jumps |
730 | during this pass. */ | |
27fb79ad | 731 | timevar_push (TV_CPROP1); |
eb232f4e | 732 | changed = one_cprop_pass (pass + 1, false, false); |
27fb79ad | 733 | timevar_pop (TV_CPROP1); |
7506f491 DE |
734 | |
735 | if (optimize_size) | |
e83f4801 | 736 | /* Do nothing. */ ; |
7506f491 | 737 | else |
589005ff | 738 | { |
27fb79ad | 739 | timevar_push (TV_PRE); |
a42cd965 | 740 | changed |= one_pre_gcse_pass (pass + 1); |
a13d4ebf AM |
741 | /* We may have just created new basic blocks. Release and |
742 | recompute various things which are sized on the number of | |
743 | basic blocks. */ | |
744 | if (changed) | |
745 | { | |
73991d6a | 746 | free_modify_mem_tables (); |
9fe15a12 KG |
747 | modify_mem_list = gcalloc (last_basic_block, sizeof (rtx)); |
748 | canon_modify_mem_list = gcalloc (last_basic_block, sizeof (rtx)); | |
a13d4ebf | 749 | } |
a42cd965 AM |
750 | free_reg_set_mem (); |
751 | alloc_reg_set_mem (max_reg_num ()); | |
eb232f4e | 752 | compute_sets (); |
a42cd965 | 753 | run_jump_opt_after_gcse = 1; |
27fb79ad | 754 | timevar_pop (TV_PRE); |
a42cd965 | 755 | } |
7506f491 DE |
756 | |
757 | if (max_pass_bytes < bytes_used) | |
758 | max_pass_bytes = bytes_used; | |
759 | ||
bb457bd9 JL |
760 | /* Free up memory, then reallocate for code hoisting. We can |
761 | not re-use the existing allocated memory because the tables | |
762 | will not have info for the insns or registers created by | |
763 | partial redundancy elimination. */ | |
7506f491 DE |
764 | free_gcse_mem (); |
765 | ||
5d3cc252 | 766 | /* It does not make sense to run code hoisting unless we are optimizing |
bb457bd9 JL |
767 | for code size -- it rarely makes programs faster, and can make |
768 | them bigger if we did partial redundancy elimination (when optimizing | |
e83f4801 | 769 | for space, we don't run the partial redundancy algorithms). */ |
bb457bd9 | 770 | if (optimize_size) |
589005ff | 771 | { |
27fb79ad | 772 | timevar_push (TV_HOIST); |
bb457bd9 | 773 | max_gcse_regno = max_reg_num (); |
eb232f4e | 774 | alloc_gcse_mem (); |
bb457bd9 JL |
775 | changed |= one_code_hoisting_pass (); |
776 | free_gcse_mem (); | |
777 | ||
778 | if (max_pass_bytes < bytes_used) | |
779 | max_pass_bytes = bytes_used; | |
27fb79ad | 780 | timevar_pop (TV_HOIST); |
589005ff | 781 | } |
bb457bd9 | 782 | |
7506f491 DE |
783 | if (file) |
784 | { | |
785 | fprintf (file, "\n"); | |
786 | fflush (file); | |
787 | } | |
c4c81601 | 788 | |
7506f491 DE |
789 | obstack_free (&gcse_obstack, gcse_obstack_bottom); |
790 | pass++; | |
791 | } | |
792 | ||
b5ce41ff JL |
793 | /* Do one last pass of copy propagation, including cprop into |
794 | conditional jumps. */ | |
795 | ||
796 | max_gcse_regno = max_reg_num (); | |
eb232f4e | 797 | alloc_gcse_mem (); |
b5ce41ff | 798 | /* This time, go ahead and allow cprop to alter jumps. */ |
27fb79ad | 799 | timevar_push (TV_CPROP2); |
eb232f4e | 800 | one_cprop_pass (pass + 1, true, false); |
27fb79ad | 801 | timevar_pop (TV_CPROP2); |
b5ce41ff | 802 | free_gcse_mem (); |
7506f491 DE |
803 | |
804 | if (file) | |
805 | { | |
806 | fprintf (file, "GCSE of %s: %d basic blocks, ", | |
faed5cc3 | 807 | current_function_name (), n_basic_blocks); |
7506f491 DE |
808 | fprintf (file, "%d pass%s, %d bytes\n\n", |
809 | pass, pass > 1 ? "es" : "", max_pass_bytes); | |
810 | } | |
811 | ||
6496a589 | 812 | obstack_free (&gcse_obstack, NULL); |
7506f491 | 813 | free_reg_set_mem (); |
7b1b4aed | 814 | |
a13d4ebf AM |
815 | /* We are finished with alias. */ |
816 | end_alias_analysis (); | |
817 | allocate_reg_info (max_reg_num (), FALSE, FALSE); | |
818 | ||
47a3dae1 | 819 | if (!optimize_size && flag_gcse_sm) |
27fb79ad SB |
820 | { |
821 | timevar_push (TV_LSM); | |
822 | store_motion (); | |
823 | timevar_pop (TV_LSM); | |
824 | } | |
47a3dae1 | 825 | |
a13d4ebf | 826 | /* Record where pseudo-registers are set. */ |
e78d9500 | 827 | return run_jump_opt_after_gcse; |
7506f491 DE |
828 | } |
829 | \f | |
830 | /* Misc. utilities. */ | |
831 | ||
773eae39 EB |
832 | /* Nonzero for each mode that supports (set (reg) (reg)). |
833 | This is trivially true for integer and floating point values. | |
834 | It may or may not be true for condition codes. */ | |
835 | static char can_copy[(int) NUM_MACHINE_MODES]; | |
836 | ||
7506f491 DE |
837 | /* Compute which modes support reg/reg copy operations. */ |
838 | ||
839 | static void | |
1d088dee | 840 | compute_can_copy (void) |
7506f491 DE |
841 | { |
842 | int i; | |
50b2596f | 843 | #ifndef AVOID_CCMODE_COPIES |
8e42ace1 | 844 | rtx reg, insn; |
50b2596f | 845 | #endif |
773eae39 | 846 | memset (can_copy, 0, NUM_MACHINE_MODES); |
7506f491 DE |
847 | |
848 | start_sequence (); | |
849 | for (i = 0; i < NUM_MACHINE_MODES; i++) | |
c4c81601 RK |
850 | if (GET_MODE_CLASS (i) == MODE_CC) |
851 | { | |
7506f491 | 852 | #ifdef AVOID_CCMODE_COPIES |
773eae39 | 853 | can_copy[i] = 0; |
7506f491 | 854 | #else |
c4c81601 RK |
855 | reg = gen_rtx_REG ((enum machine_mode) i, LAST_VIRTUAL_REGISTER + 1); |
856 | insn = emit_insn (gen_rtx_SET (VOIDmode, reg, reg)); | |
9714cf43 | 857 | if (recog (PATTERN (insn), insn, NULL) >= 0) |
773eae39 | 858 | can_copy[i] = 1; |
7506f491 | 859 | #endif |
c4c81601 | 860 | } |
141b5810 | 861 | else |
773eae39 | 862 | can_copy[i] = 1; |
c4c81601 | 863 | |
7506f491 | 864 | end_sequence (); |
7506f491 | 865 | } |
773eae39 EB |
866 | |
867 | /* Returns whether the mode supports reg/reg copy operations. */ | |
868 | ||
869 | bool | |
1d088dee | 870 | can_copy_p (enum machine_mode mode) |
773eae39 EB |
871 | { |
872 | static bool can_copy_init_p = false; | |
873 | ||
874 | if (! can_copy_init_p) | |
875 | { | |
876 | compute_can_copy (); | |
877 | can_copy_init_p = true; | |
878 | } | |
879 | ||
880 | return can_copy[mode] != 0; | |
881 | } | |
7506f491 DE |
882 | \f |
883 | /* Cover function to xmalloc to record bytes allocated. */ | |
884 | ||
703ad42b | 885 | static void * |
4ac11022 | 886 | gmalloc (size_t size) |
7506f491 DE |
887 | { |
888 | bytes_used += size; | |
889 | return xmalloc (size); | |
890 | } | |
891 | ||
9fe15a12 KG |
892 | /* Cover function to xcalloc to record bytes allocated. */ |
893 | ||
894 | static void * | |
895 | gcalloc (size_t nelem, size_t elsize) | |
896 | { | |
897 | bytes_used += nelem * elsize; | |
898 | return xcalloc (nelem, elsize); | |
899 | } | |
900 | ||
7506f491 DE |
901 | /* Cover function to xrealloc. |
902 | We don't record the additional size since we don't know it. | |
903 | It won't affect memory usage stats much anyway. */ | |
904 | ||
703ad42b | 905 | static void * |
9fe15a12 | 906 | grealloc (void *ptr, size_t size) |
7506f491 DE |
907 | { |
908 | return xrealloc (ptr, size); | |
909 | } | |
910 | ||
77bbd421 | 911 | /* Cover function to obstack_alloc. */ |
7506f491 | 912 | |
703ad42b | 913 | static void * |
1d088dee | 914 | gcse_alloc (unsigned long size) |
7506f491 | 915 | { |
77bbd421 | 916 | bytes_used += size; |
703ad42b | 917 | return obstack_alloc (&gcse_obstack, size); |
7506f491 DE |
918 | } |
919 | ||
920 | /* Allocate memory for the cuid mapping array, | |
921 | and reg/memory set tracking tables. | |
922 | ||
923 | This is called at the start of each pass. */ | |
924 | ||
925 | static void | |
eb232f4e | 926 | alloc_gcse_mem (void) |
7506f491 | 927 | { |
9fe15a12 | 928 | int i; |
eb232f4e | 929 | basic_block bb; |
7506f491 DE |
930 | rtx insn; |
931 | ||
932 | /* Find the largest UID and create a mapping from UIDs to CUIDs. | |
933 | CUIDs are like UIDs except they increase monotonically, have no gaps, | |
eb232f4e SB |
934 | and only apply to real insns. |
935 | (Actually, there are gaps, for insn that are not inside a basic block. | |
936 | but we should never see those anyway, so this is OK.) */ | |
7506f491 DE |
937 | |
938 | max_uid = get_max_uid (); | |
9fe15a12 | 939 | uid_cuid = gcalloc (max_uid + 1, sizeof (int)); |
eb232f4e SB |
940 | i = 0; |
941 | FOR_EACH_BB (bb) | |
942 | FOR_BB_INSNS (bb, insn) | |
943 | { | |
944 | if (INSN_P (insn)) | |
945 | uid_cuid[INSN_UID (insn)] = i++; | |
946 | else | |
947 | uid_cuid[INSN_UID (insn)] = i; | |
948 | } | |
7506f491 DE |
949 | |
950 | /* Create a table mapping cuids to insns. */ | |
951 | ||
952 | max_cuid = i; | |
9fe15a12 | 953 | cuid_insn = gcalloc (max_cuid + 1, sizeof (rtx)); |
eb232f4e SB |
954 | i = 0; |
955 | FOR_EACH_BB (bb) | |
956 | FOR_BB_INSNS (bb, insn) | |
957 | if (INSN_P (insn)) | |
958 | CUID_INSN (i++) = insn; | |
7506f491 DE |
959 | |
960 | /* Allocate vars to track sets of regs. */ | |
8bdbfff5 | 961 | reg_set_bitmap = BITMAP_ALLOC (NULL); |
7506f491 DE |
962 | |
963 | /* Allocate vars to track sets of regs, memory per block. */ | |
703ad42b | 964 | reg_set_in_block = sbitmap_vector_alloc (last_basic_block, max_gcse_regno); |
a13d4ebf AM |
965 | /* Allocate array to keep a list of insns which modify memory in each |
966 | basic block. */ | |
9fe15a12 KG |
967 | modify_mem_list = gcalloc (last_basic_block, sizeof (rtx)); |
968 | canon_modify_mem_list = gcalloc (last_basic_block, sizeof (rtx)); | |
8bdbfff5 NS |
969 | modify_mem_list_set = BITMAP_ALLOC (NULL); |
970 | blocks_with_calls = BITMAP_ALLOC (NULL); | |
7506f491 DE |
971 | } |
972 | ||
973 | /* Free memory allocated by alloc_gcse_mem. */ | |
974 | ||
975 | static void | |
1d088dee | 976 | free_gcse_mem (void) |
7506f491 DE |
977 | { |
978 | free (uid_cuid); | |
979 | free (cuid_insn); | |
980 | ||
8bdbfff5 | 981 | BITMAP_FREE (reg_set_bitmap); |
7506f491 | 982 | |
5a660bff | 983 | sbitmap_vector_free (reg_set_in_block); |
73991d6a | 984 | free_modify_mem_tables (); |
8bdbfff5 NS |
985 | BITMAP_FREE (modify_mem_list_set); |
986 | BITMAP_FREE (blocks_with_calls); | |
7506f491 | 987 | } |
b5ce41ff JL |
988 | \f |
989 | /* Compute the local properties of each recorded expression. | |
c4c81601 RK |
990 | |
991 | Local properties are those that are defined by the block, irrespective of | |
992 | other blocks. | |
b5ce41ff JL |
993 | |
994 | An expression is transparent in a block if its operands are not modified | |
995 | in the block. | |
996 | ||
997 | An expression is computed (locally available) in a block if it is computed | |
998 | at least once and expression would contain the same value if the | |
999 | computation was moved to the end of the block. | |
1000 | ||
1001 | An expression is locally anticipatable in a block if it is computed at | |
1002 | least once and expression would contain the same value if the computation | |
1003 | was moved to the beginning of the block. | |
1004 | ||
c4c81601 RK |
1005 | We call this routine for cprop, pre and code hoisting. They all compute |
1006 | basically the same information and thus can easily share this code. | |
7506f491 | 1007 | |
c4c81601 RK |
1008 | TRANSP, COMP, and ANTLOC are destination sbitmaps for recording local |
1009 | properties. If NULL, then it is not necessary to compute or record that | |
1010 | particular property. | |
b5ce41ff | 1011 | |
02280659 ZD |
1012 | TABLE controls which hash table to look at. If it is set hash table, |
1013 | additionally, TRANSP is computed as ~TRANSP, since this is really cprop's | |
c4c81601 | 1014 | ABSALTERED. */ |
589005ff | 1015 | |
b5ce41ff | 1016 | static void |
7b1b4aed SB |
1017 | compute_local_properties (sbitmap *transp, sbitmap *comp, sbitmap *antloc, |
1018 | struct hash_table *table) | |
b5ce41ff | 1019 | { |
02280659 | 1020 | unsigned int i; |
589005ff | 1021 | |
b5ce41ff JL |
1022 | /* Initialize any bitmaps that were passed in. */ |
1023 | if (transp) | |
695ab36a | 1024 | { |
02280659 | 1025 | if (table->set_p) |
d55bc081 | 1026 | sbitmap_vector_zero (transp, last_basic_block); |
695ab36a | 1027 | else |
d55bc081 | 1028 | sbitmap_vector_ones (transp, last_basic_block); |
695ab36a | 1029 | } |
c4c81601 | 1030 | |
b5ce41ff | 1031 | if (comp) |
d55bc081 | 1032 | sbitmap_vector_zero (comp, last_basic_block); |
b5ce41ff | 1033 | if (antloc) |
d55bc081 | 1034 | sbitmap_vector_zero (antloc, last_basic_block); |
b5ce41ff | 1035 | |
02280659 | 1036 | for (i = 0; i < table->size; i++) |
7506f491 | 1037 | { |
b5ce41ff JL |
1038 | struct expr *expr; |
1039 | ||
02280659 | 1040 | for (expr = table->table[i]; expr != NULL; expr = expr->next_same_hash) |
b5ce41ff | 1041 | { |
b5ce41ff | 1042 | int indx = expr->bitmap_index; |
c4c81601 | 1043 | struct occr *occr; |
b5ce41ff JL |
1044 | |
1045 | /* The expression is transparent in this block if it is not killed. | |
1046 | We start by assuming all are transparent [none are killed], and | |
1047 | then reset the bits for those that are. */ | |
b5ce41ff | 1048 | if (transp) |
02280659 | 1049 | compute_transp (expr->expr, indx, transp, table->set_p); |
b5ce41ff JL |
1050 | |
1051 | /* The occurrences recorded in antic_occr are exactly those that | |
cc2902df | 1052 | we want to set to nonzero in ANTLOC. */ |
b5ce41ff | 1053 | if (antloc) |
c4c81601 RK |
1054 | for (occr = expr->antic_occr; occr != NULL; occr = occr->next) |
1055 | { | |
1056 | SET_BIT (antloc[BLOCK_NUM (occr->insn)], indx); | |
b5ce41ff | 1057 | |
c4c81601 RK |
1058 | /* While we're scanning the table, this is a good place to |
1059 | initialize this. */ | |
1060 | occr->deleted_p = 0; | |
1061 | } | |
b5ce41ff JL |
1062 | |
1063 | /* The occurrences recorded in avail_occr are exactly those that | |
cc2902df | 1064 | we want to set to nonzero in COMP. */ |
b5ce41ff | 1065 | if (comp) |
c4c81601 RK |
1066 | for (occr = expr->avail_occr; occr != NULL; occr = occr->next) |
1067 | { | |
1068 | SET_BIT (comp[BLOCK_NUM (occr->insn)], indx); | |
b5ce41ff | 1069 | |
c4c81601 RK |
1070 | /* While we're scanning the table, this is a good place to |
1071 | initialize this. */ | |
1072 | occr->copied_p = 0; | |
1073 | } | |
b5ce41ff JL |
1074 | |
1075 | /* While we're scanning the table, this is a good place to | |
1076 | initialize this. */ | |
1077 | expr->reaching_reg = 0; | |
1078 | } | |
7506f491 | 1079 | } |
7506f491 DE |
1080 | } |
1081 | \f | |
1082 | /* Register set information. | |
1083 | ||
1084 | `reg_set_table' records where each register is set or otherwise | |
1085 | modified. */ | |
1086 | ||
1087 | static struct obstack reg_set_obstack; | |
1088 | ||
1089 | static void | |
1d088dee | 1090 | alloc_reg_set_mem (int n_regs) |
7506f491 | 1091 | { |
7506f491 | 1092 | reg_set_table_size = n_regs + REG_SET_TABLE_SLOP; |
9fe15a12 | 1093 | reg_set_table = gcalloc (reg_set_table_size, sizeof (struct reg_set *)); |
7506f491 DE |
1094 | |
1095 | gcc_obstack_init (®_set_obstack); | |
1096 | } | |
1097 | ||
1098 | static void | |
1d088dee | 1099 | free_reg_set_mem (void) |
7506f491 DE |
1100 | { |
1101 | free (reg_set_table); | |
6496a589 | 1102 | obstack_free (®_set_obstack, NULL); |
7506f491 DE |
1103 | } |
1104 | ||
1105 | /* Record REGNO in the reg_set table. */ | |
1106 | ||
1107 | static void | |
1d088dee | 1108 | record_one_set (int regno, rtx insn) |
7506f491 | 1109 | { |
172890a2 | 1110 | /* Allocate a new reg_set element and link it onto the list. */ |
63bc1d05 | 1111 | struct reg_set *new_reg_info; |
7506f491 DE |
1112 | |
1113 | /* If the table isn't big enough, enlarge it. */ | |
1114 | if (regno >= reg_set_table_size) | |
1115 | { | |
1116 | int new_size = regno + REG_SET_TABLE_SLOP; | |
c4c81601 | 1117 | |
703ad42b KG |
1118 | reg_set_table = grealloc (reg_set_table, |
1119 | new_size * sizeof (struct reg_set *)); | |
1120 | memset (reg_set_table + reg_set_table_size, 0, | |
8e42ace1 | 1121 | (new_size - reg_set_table_size) * sizeof (struct reg_set *)); |
7506f491 DE |
1122 | reg_set_table_size = new_size; |
1123 | } | |
1124 | ||
703ad42b | 1125 | new_reg_info = obstack_alloc (®_set_obstack, sizeof (struct reg_set)); |
7506f491 | 1126 | bytes_used += sizeof (struct reg_set); |
ed425871 | 1127 | new_reg_info->bb_index = BLOCK_NUM (insn); |
274969ea MM |
1128 | new_reg_info->next = reg_set_table[regno]; |
1129 | reg_set_table[regno] = new_reg_info; | |
7506f491 DE |
1130 | } |
1131 | ||
c4c81601 RK |
1132 | /* Called from compute_sets via note_stores to handle one SET or CLOBBER in |
1133 | an insn. The DATA is really the instruction in which the SET is | |
1134 | occurring. */ | |
7506f491 DE |
1135 | |
1136 | static void | |
1d088dee | 1137 | record_set_info (rtx dest, rtx setter ATTRIBUTE_UNUSED, void *data) |
7506f491 | 1138 | { |
84832317 MM |
1139 | rtx record_set_insn = (rtx) data; |
1140 | ||
7b1b4aed | 1141 | if (REG_P (dest) && REGNO (dest) >= FIRST_PSEUDO_REGISTER) |
c4c81601 | 1142 | record_one_set (REGNO (dest), record_set_insn); |
7506f491 DE |
1143 | } |
1144 | ||
1145 | /* Scan the function and record each set of each pseudo-register. | |
1146 | ||
c4c81601 | 1147 | This is called once, at the start of the gcse pass. See the comments for |
fbe5a4a6 | 1148 | `reg_set_table' for further documentation. */ |
7506f491 DE |
1149 | |
1150 | static void | |
eb232f4e | 1151 | compute_sets (void) |
7506f491 | 1152 | { |
eb232f4e | 1153 | basic_block bb; |
c4c81601 | 1154 | rtx insn; |
7506f491 | 1155 | |
eb232f4e SB |
1156 | FOR_EACH_BB (bb) |
1157 | FOR_BB_INSNS (bb, insn) | |
1158 | if (INSN_P (insn)) | |
1159 | note_stores (PATTERN (insn), record_set_info, insn); | |
7506f491 DE |
1160 | } |
1161 | \f | |
1162 | /* Hash table support. */ | |
1163 | ||
80c29cc4 RZ |
1164 | struct reg_avail_info |
1165 | { | |
e0082a72 | 1166 | basic_block last_bb; |
80c29cc4 RZ |
1167 | int first_set; |
1168 | int last_set; | |
1169 | }; | |
1170 | ||
1171 | static struct reg_avail_info *reg_avail_info; | |
e0082a72 | 1172 | static basic_block current_bb; |
7506f491 | 1173 | |
7506f491 | 1174 | |
fb0c0a12 RK |
1175 | /* See whether X, the source of a set, is something we want to consider for |
1176 | GCSE. */ | |
7506f491 DE |
1177 | |
1178 | static int | |
1d088dee | 1179 | want_to_gcse_p (rtx x) |
7506f491 | 1180 | { |
c4c81601 | 1181 | switch (GET_CODE (x)) |
7506f491 DE |
1182 | { |
1183 | case REG: | |
1184 | case SUBREG: | |
1185 | case CONST_INT: | |
1186 | case CONST_DOUBLE: | |
69ef87e2 | 1187 | case CONST_VECTOR: |
7506f491 DE |
1188 | case CALL: |
1189 | return 0; | |
1190 | ||
1191 | default: | |
1707bafa | 1192 | return can_assign_to_reg_p (x); |
7506f491 | 1193 | } |
1707bafa RS |
1194 | } |
1195 | ||
1196 | /* Used internally by can_assign_to_reg_p. */ | |
1197 | ||
1198 | static GTY(()) rtx test_insn; | |
1199 | ||
1200 | /* Return true if we can assign X to a pseudo register. */ | |
1201 | ||
1202 | static bool | |
1203 | can_assign_to_reg_p (rtx x) | |
1204 | { | |
1205 | int num_clobbers = 0; | |
1206 | int icode; | |
7506f491 | 1207 | |
fb0c0a12 RK |
1208 | /* If this is a valid operand, we are OK. If it's VOIDmode, we aren't. */ |
1209 | if (general_operand (x, GET_MODE (x))) | |
1210 | return 1; | |
1211 | else if (GET_MODE (x) == VOIDmode) | |
1212 | return 0; | |
1213 | ||
1214 | /* Otherwise, check if we can make a valid insn from it. First initialize | |
1215 | our test insn if we haven't already. */ | |
1216 | if (test_insn == 0) | |
1217 | { | |
1218 | test_insn | |
1219 | = make_insn_raw (gen_rtx_SET (VOIDmode, | |
1220 | gen_rtx_REG (word_mode, | |
1221 | FIRST_PSEUDO_REGISTER * 2), | |
1222 | const0_rtx)); | |
1223 | NEXT_INSN (test_insn) = PREV_INSN (test_insn) = 0; | |
fb0c0a12 RK |
1224 | } |
1225 | ||
1226 | /* Now make an insn like the one we would make when GCSE'ing and see if | |
1227 | valid. */ | |
1228 | PUT_MODE (SET_DEST (PATTERN (test_insn)), GET_MODE (x)); | |
1229 | SET_SRC (PATTERN (test_insn)) = x; | |
1230 | return ((icode = recog (PATTERN (test_insn), test_insn, &num_clobbers)) >= 0 | |
1231 | && (num_clobbers == 0 || ! added_clobbers_hard_reg_p (icode))); | |
7506f491 DE |
1232 | } |
1233 | ||
cc2902df | 1234 | /* Return nonzero if the operands of expression X are unchanged from the |
7506f491 DE |
1235 | start of INSN's basic block up to but not including INSN (if AVAIL_P == 0), |
1236 | or from INSN to the end of INSN's basic block (if AVAIL_P != 0). */ | |
1237 | ||
1238 | static int | |
1d088dee | 1239 | oprs_unchanged_p (rtx x, rtx insn, int avail_p) |
7506f491 | 1240 | { |
c4c81601 | 1241 | int i, j; |
7506f491 | 1242 | enum rtx_code code; |
6f7d635c | 1243 | const char *fmt; |
7506f491 | 1244 | |
7506f491 DE |
1245 | if (x == 0) |
1246 | return 1; | |
1247 | ||
1248 | code = GET_CODE (x); | |
1249 | switch (code) | |
1250 | { | |
1251 | case REG: | |
80c29cc4 RZ |
1252 | { |
1253 | struct reg_avail_info *info = ®_avail_info[REGNO (x)]; | |
1254 | ||
1255 | if (info->last_bb != current_bb) | |
1256 | return 1; | |
589005ff | 1257 | if (avail_p) |
80c29cc4 RZ |
1258 | return info->last_set < INSN_CUID (insn); |
1259 | else | |
1260 | return info->first_set >= INSN_CUID (insn); | |
1261 | } | |
7506f491 DE |
1262 | |
1263 | case MEM: | |
e0082a72 | 1264 | if (load_killed_in_block_p (current_bb, INSN_CUID (insn), |
a13d4ebf AM |
1265 | x, avail_p)) |
1266 | return 0; | |
7506f491 | 1267 | else |
c4c81601 | 1268 | return oprs_unchanged_p (XEXP (x, 0), insn, avail_p); |
7506f491 DE |
1269 | |
1270 | case PRE_DEC: | |
1271 | case PRE_INC: | |
1272 | case POST_DEC: | |
1273 | case POST_INC: | |
4b983fdc RH |
1274 | case PRE_MODIFY: |
1275 | case POST_MODIFY: | |
7506f491 DE |
1276 | return 0; |
1277 | ||
1278 | case PC: | |
1279 | case CC0: /*FIXME*/ | |
1280 | case CONST: | |
1281 | case CONST_INT: | |
1282 | case CONST_DOUBLE: | |
69ef87e2 | 1283 | case CONST_VECTOR: |
7506f491 DE |
1284 | case SYMBOL_REF: |
1285 | case LABEL_REF: | |
1286 | case ADDR_VEC: | |
1287 | case ADDR_DIFF_VEC: | |
1288 | return 1; | |
1289 | ||
1290 | default: | |
1291 | break; | |
1292 | } | |
1293 | ||
c4c81601 | 1294 | for (i = GET_RTX_LENGTH (code) - 1, fmt = GET_RTX_FORMAT (code); i >= 0; i--) |
7506f491 DE |
1295 | { |
1296 | if (fmt[i] == 'e') | |
1297 | { | |
c4c81601 RK |
1298 | /* If we are about to do the last recursive call needed at this |
1299 | level, change it into iteration. This function is called enough | |
1300 | to be worth it. */ | |
7506f491 | 1301 | if (i == 0) |
c4c81601 RK |
1302 | return oprs_unchanged_p (XEXP (x, i), insn, avail_p); |
1303 | ||
1304 | else if (! oprs_unchanged_p (XEXP (x, i), insn, avail_p)) | |
7506f491 DE |
1305 | return 0; |
1306 | } | |
1307 | else if (fmt[i] == 'E') | |
c4c81601 RK |
1308 | for (j = 0; j < XVECLEN (x, i); j++) |
1309 | if (! oprs_unchanged_p (XVECEXP (x, i, j), insn, avail_p)) | |
1310 | return 0; | |
7506f491 DE |
1311 | } |
1312 | ||
1313 | return 1; | |
1314 | } | |
1315 | ||
a13d4ebf AM |
1316 | /* Used for communication between mems_conflict_for_gcse_p and |
1317 | load_killed_in_block_p. Nonzero if mems_conflict_for_gcse_p finds a | |
1318 | conflict between two memory references. */ | |
1319 | static int gcse_mems_conflict_p; | |
1320 | ||
1321 | /* Used for communication between mems_conflict_for_gcse_p and | |
1322 | load_killed_in_block_p. A memory reference for a load instruction, | |
1323 | mems_conflict_for_gcse_p will see if a memory store conflicts with | |
1324 | this memory load. */ | |
1325 | static rtx gcse_mem_operand; | |
1326 | ||
1327 | /* DEST is the output of an instruction. If it is a memory reference, and | |
1328 | possibly conflicts with the load found in gcse_mem_operand, then set | |
1329 | gcse_mems_conflict_p to a nonzero value. */ | |
1330 | ||
1331 | static void | |
1d088dee AJ |
1332 | mems_conflict_for_gcse_p (rtx dest, rtx setter ATTRIBUTE_UNUSED, |
1333 | void *data ATTRIBUTE_UNUSED) | |
a13d4ebf AM |
1334 | { |
1335 | while (GET_CODE (dest) == SUBREG | |
1336 | || GET_CODE (dest) == ZERO_EXTRACT | |
a13d4ebf AM |
1337 | || GET_CODE (dest) == STRICT_LOW_PART) |
1338 | dest = XEXP (dest, 0); | |
1339 | ||
1340 | /* If DEST is not a MEM, then it will not conflict with the load. Note | |
1341 | that function calls are assumed to clobber memory, but are handled | |
1342 | elsewhere. */ | |
7b1b4aed | 1343 | if (! MEM_P (dest)) |
a13d4ebf | 1344 | return; |
aaa4ca30 | 1345 | |
a13d4ebf | 1346 | /* If we are setting a MEM in our list of specially recognized MEMs, |
589005ff KH |
1347 | don't mark as killed this time. */ |
1348 | ||
47a3dae1 | 1349 | if (expr_equiv_p (dest, gcse_mem_operand) && pre_ldst_mems != NULL) |
a13d4ebf AM |
1350 | { |
1351 | if (!find_rtx_in_ldst (dest)) | |
1352 | gcse_mems_conflict_p = 1; | |
1353 | return; | |
1354 | } | |
aaa4ca30 | 1355 | |
a13d4ebf AM |
1356 | if (true_dependence (dest, GET_MODE (dest), gcse_mem_operand, |
1357 | rtx_addr_varies_p)) | |
1358 | gcse_mems_conflict_p = 1; | |
1359 | } | |
1360 | ||
1361 | /* Return nonzero if the expression in X (a memory reference) is killed | |
1362 | in block BB before or after the insn with the CUID in UID_LIMIT. | |
1363 | AVAIL_P is nonzero for kills after UID_LIMIT, and zero for kills | |
1364 | before UID_LIMIT. | |
1365 | ||
1366 | To check the entire block, set UID_LIMIT to max_uid + 1 and | |
1367 | AVAIL_P to 0. */ | |
1368 | ||
1369 | static int | |
1d088dee | 1370 | load_killed_in_block_p (basic_block bb, int uid_limit, rtx x, int avail_p) |
a13d4ebf | 1371 | { |
0b17ab2f | 1372 | rtx list_entry = modify_mem_list[bb->index]; |
16c5b95d MH |
1373 | |
1374 | /* If this is a readonly then we aren't going to be changing it. */ | |
1375 | if (MEM_READONLY_P (x)) | |
1376 | return 0; | |
1377 | ||
a13d4ebf AM |
1378 | while (list_entry) |
1379 | { | |
1380 | rtx setter; | |
1381 | /* Ignore entries in the list that do not apply. */ | |
1382 | if ((avail_p | |
1383 | && INSN_CUID (XEXP (list_entry, 0)) < uid_limit) | |
1384 | || (! avail_p | |
1385 | && INSN_CUID (XEXP (list_entry, 0)) > uid_limit)) | |
1386 | { | |
1387 | list_entry = XEXP (list_entry, 1); | |
1388 | continue; | |
1389 | } | |
1390 | ||
1391 | setter = XEXP (list_entry, 0); | |
1392 | ||
1393 | /* If SETTER is a call everything is clobbered. Note that calls | |
1394 | to pure functions are never put on the list, so we need not | |
1395 | worry about them. */ | |
7b1b4aed | 1396 | if (CALL_P (setter)) |
a13d4ebf AM |
1397 | return 1; |
1398 | ||
1399 | /* SETTER must be an INSN of some kind that sets memory. Call | |
589005ff | 1400 | note_stores to examine each hunk of memory that is modified. |
a13d4ebf AM |
1401 | |
1402 | The note_stores interface is pretty limited, so we have to | |
1403 | communicate via global variables. Yuk. */ | |
1404 | gcse_mem_operand = x; | |
1405 | gcse_mems_conflict_p = 0; | |
1406 | note_stores (PATTERN (setter), mems_conflict_for_gcse_p, NULL); | |
1407 | if (gcse_mems_conflict_p) | |
1408 | return 1; | |
1409 | list_entry = XEXP (list_entry, 1); | |
1410 | } | |
1411 | return 0; | |
1412 | } | |
1413 | ||
cc2902df | 1414 | /* Return nonzero if the operands of expression X are unchanged from |
7506f491 DE |
1415 | the start of INSN's basic block up to but not including INSN. */ |
1416 | ||
1417 | static int | |
1d088dee | 1418 | oprs_anticipatable_p (rtx x, rtx insn) |
7506f491 DE |
1419 | { |
1420 | return oprs_unchanged_p (x, insn, 0); | |
1421 | } | |
1422 | ||
cc2902df | 1423 | /* Return nonzero if the operands of expression X are unchanged from |
7506f491 DE |
1424 | INSN to the end of INSN's basic block. */ |
1425 | ||
1426 | static int | |
1d088dee | 1427 | oprs_available_p (rtx x, rtx insn) |
7506f491 DE |
1428 | { |
1429 | return oprs_unchanged_p (x, insn, 1); | |
1430 | } | |
1431 | ||
1432 | /* Hash expression X. | |
c4c81601 RK |
1433 | |
1434 | MODE is only used if X is a CONST_INT. DO_NOT_RECORD_P is a boolean | |
1435 | indicating if a volatile operand is found or if the expression contains | |
b58b21d5 | 1436 | something we don't want to insert in the table. HASH_TABLE_SIZE is |
0516f6fe | 1437 | the current size of the hash table to be probed. */ |
7506f491 DE |
1438 | |
1439 | static unsigned int | |
b58b21d5 RS |
1440 | hash_expr (rtx x, enum machine_mode mode, int *do_not_record_p, |
1441 | int hash_table_size) | |
7506f491 DE |
1442 | { |
1443 | unsigned int hash; | |
1444 | ||
1445 | *do_not_record_p = 0; | |
1446 | ||
0516f6fe SB |
1447 | hash = hash_rtx (x, mode, do_not_record_p, |
1448 | NULL, /*have_reg_qty=*/false); | |
7506f491 DE |
1449 | return hash % hash_table_size; |
1450 | } | |
172890a2 | 1451 | |
7506f491 DE |
1452 | /* Hash a set of register REGNO. |
1453 | ||
c4c81601 RK |
1454 | Sets are hashed on the register that is set. This simplifies the PRE copy |
1455 | propagation code. | |
7506f491 DE |
1456 | |
1457 | ??? May need to make things more elaborate. Later, as necessary. */ | |
1458 | ||
1459 | static unsigned int | |
1d088dee | 1460 | hash_set (int regno, int hash_table_size) |
7506f491 DE |
1461 | { |
1462 | unsigned int hash; | |
1463 | ||
1464 | hash = regno; | |
1465 | return hash % hash_table_size; | |
1466 | } | |
1467 | ||
0516f6fe | 1468 | /* Return nonzero if exp1 is equivalent to exp2. */ |
7506f491 DE |
1469 | |
1470 | static int | |
1d088dee | 1471 | expr_equiv_p (rtx x, rtx y) |
7506f491 | 1472 | { |
0516f6fe | 1473 | return exp_equiv_p (x, y, 0, true); |
7506f491 DE |
1474 | } |
1475 | ||
02280659 | 1476 | /* Insert expression X in INSN in the hash TABLE. |
7506f491 DE |
1477 | If it is already present, record it as the last occurrence in INSN's |
1478 | basic block. | |
1479 | ||
1480 | MODE is the mode of the value X is being stored into. | |
1481 | It is only used if X is a CONST_INT. | |
1482 | ||
cc2902df KH |
1483 | ANTIC_P is nonzero if X is an anticipatable expression. |
1484 | AVAIL_P is nonzero if X is an available expression. */ | |
7506f491 DE |
1485 | |
1486 | static void | |
1d088dee AJ |
1487 | insert_expr_in_table (rtx x, enum machine_mode mode, rtx insn, int antic_p, |
1488 | int avail_p, struct hash_table *table) | |
7506f491 DE |
1489 | { |
1490 | int found, do_not_record_p; | |
1491 | unsigned int hash; | |
1492 | struct expr *cur_expr, *last_expr = NULL; | |
1493 | struct occr *antic_occr, *avail_occr; | |
7506f491 | 1494 | |
02280659 | 1495 | hash = hash_expr (x, mode, &do_not_record_p, table->size); |
7506f491 DE |
1496 | |
1497 | /* Do not insert expression in table if it contains volatile operands, | |
1498 | or if hash_expr determines the expression is something we don't want | |
1499 | to or can't handle. */ | |
1500 | if (do_not_record_p) | |
1501 | return; | |
1502 | ||
02280659 | 1503 | cur_expr = table->table[hash]; |
7506f491 DE |
1504 | found = 0; |
1505 | ||
c4c81601 | 1506 | while (cur_expr && 0 == (found = expr_equiv_p (cur_expr->expr, x))) |
7506f491 DE |
1507 | { |
1508 | /* If the expression isn't found, save a pointer to the end of | |
1509 | the list. */ | |
1510 | last_expr = cur_expr; | |
1511 | cur_expr = cur_expr->next_same_hash; | |
1512 | } | |
1513 | ||
1514 | if (! found) | |
1515 | { | |
703ad42b | 1516 | cur_expr = gcse_alloc (sizeof (struct expr)); |
7506f491 | 1517 | bytes_used += sizeof (struct expr); |
02280659 | 1518 | if (table->table[hash] == NULL) |
c4c81601 | 1519 | /* This is the first pattern that hashed to this index. */ |
02280659 | 1520 | table->table[hash] = cur_expr; |
7506f491 | 1521 | else |
c4c81601 RK |
1522 | /* Add EXPR to end of this hash chain. */ |
1523 | last_expr->next_same_hash = cur_expr; | |
1524 | ||
589005ff | 1525 | /* Set the fields of the expr element. */ |
7506f491 | 1526 | cur_expr->expr = x; |
02280659 | 1527 | cur_expr->bitmap_index = table->n_elems++; |
7506f491 DE |
1528 | cur_expr->next_same_hash = NULL; |
1529 | cur_expr->antic_occr = NULL; | |
1530 | cur_expr->avail_occr = NULL; | |
1531 | } | |
1532 | ||
1533 | /* Now record the occurrence(s). */ | |
7506f491 DE |
1534 | if (antic_p) |
1535 | { | |
1536 | antic_occr = cur_expr->antic_occr; | |
1537 | ||
b6e47ceb JL |
1538 | if (antic_occr && BLOCK_NUM (antic_occr->insn) != BLOCK_NUM (insn)) |
1539 | antic_occr = NULL; | |
7506f491 DE |
1540 | |
1541 | if (antic_occr) | |
c4c81601 RK |
1542 | /* Found another instance of the expression in the same basic block. |
1543 | Prefer the currently recorded one. We want the first one in the | |
1544 | block and the block is scanned from start to end. */ | |
1545 | ; /* nothing to do */ | |
7506f491 DE |
1546 | else |
1547 | { | |
1548 | /* First occurrence of this expression in this basic block. */ | |
703ad42b | 1549 | antic_occr = gcse_alloc (sizeof (struct occr)); |
7506f491 | 1550 | bytes_used += sizeof (struct occr); |
7506f491 | 1551 | antic_occr->insn = insn; |
b6e47ceb | 1552 | antic_occr->next = cur_expr->antic_occr; |
f9957958 | 1553 | antic_occr->deleted_p = 0; |
b6e47ceb | 1554 | cur_expr->antic_occr = antic_occr; |
7506f491 DE |
1555 | } |
1556 | } | |
1557 | ||
1558 | if (avail_p) | |
1559 | { | |
1560 | avail_occr = cur_expr->avail_occr; | |
1561 | ||
b6e47ceb | 1562 | if (avail_occr && BLOCK_NUM (avail_occr->insn) == BLOCK_NUM (insn)) |
7506f491 | 1563 | { |
b6e47ceb JL |
1564 | /* Found another instance of the expression in the same basic block. |
1565 | Prefer this occurrence to the currently recorded one. We want | |
1566 | the last one in the block and the block is scanned from start | |
1567 | to end. */ | |
1568 | avail_occr->insn = insn; | |
7506f491 | 1569 | } |
7506f491 DE |
1570 | else |
1571 | { | |
1572 | /* First occurrence of this expression in this basic block. */ | |
703ad42b | 1573 | avail_occr = gcse_alloc (sizeof (struct occr)); |
7506f491 | 1574 | bytes_used += sizeof (struct occr); |
7506f491 | 1575 | avail_occr->insn = insn; |
b6e47ceb | 1576 | avail_occr->next = cur_expr->avail_occr; |
f9957958 | 1577 | avail_occr->deleted_p = 0; |
b6e47ceb | 1578 | cur_expr->avail_occr = avail_occr; |
7506f491 DE |
1579 | } |
1580 | } | |
1581 | } | |
1582 | ||
1583 | /* Insert pattern X in INSN in the hash table. | |
1584 | X is a SET of a reg to either another reg or a constant. | |
1585 | If it is already present, record it as the last occurrence in INSN's | |
1586 | basic block. */ | |
1587 | ||
1588 | static void | |
1d088dee | 1589 | insert_set_in_table (rtx x, rtx insn, struct hash_table *table) |
7506f491 DE |
1590 | { |
1591 | int found; | |
1592 | unsigned int hash; | |
1593 | struct expr *cur_expr, *last_expr = NULL; | |
b6e47ceb | 1594 | struct occr *cur_occr; |
7506f491 | 1595 | |
282899df | 1596 | gcc_assert (GET_CODE (x) == SET && REG_P (SET_DEST (x))); |
7506f491 | 1597 | |
02280659 | 1598 | hash = hash_set (REGNO (SET_DEST (x)), table->size); |
7506f491 | 1599 | |
02280659 | 1600 | cur_expr = table->table[hash]; |
7506f491 DE |
1601 | found = 0; |
1602 | ||
c4c81601 | 1603 | while (cur_expr && 0 == (found = expr_equiv_p (cur_expr->expr, x))) |
7506f491 DE |
1604 | { |
1605 | /* If the expression isn't found, save a pointer to the end of | |
1606 | the list. */ | |
1607 | last_expr = cur_expr; | |
1608 | cur_expr = cur_expr->next_same_hash; | |
1609 | } | |
1610 | ||
1611 | if (! found) | |
1612 | { | |
703ad42b | 1613 | cur_expr = gcse_alloc (sizeof (struct expr)); |
7506f491 | 1614 | bytes_used += sizeof (struct expr); |
02280659 | 1615 | if (table->table[hash] == NULL) |
c4c81601 | 1616 | /* This is the first pattern that hashed to this index. */ |
02280659 | 1617 | table->table[hash] = cur_expr; |
7506f491 | 1618 | else |
c4c81601 RK |
1619 | /* Add EXPR to end of this hash chain. */ |
1620 | last_expr->next_same_hash = cur_expr; | |
1621 | ||
7506f491 DE |
1622 | /* Set the fields of the expr element. |
1623 | We must copy X because it can be modified when copy propagation is | |
1624 | performed on its operands. */ | |
7506f491 | 1625 | cur_expr->expr = copy_rtx (x); |
02280659 | 1626 | cur_expr->bitmap_index = table->n_elems++; |
7506f491 DE |
1627 | cur_expr->next_same_hash = NULL; |
1628 | cur_expr->antic_occr = NULL; | |
1629 | cur_expr->avail_occr = NULL; | |
1630 | } | |
1631 | ||
1632 | /* Now record the occurrence. */ | |
7506f491 DE |
1633 | cur_occr = cur_expr->avail_occr; |
1634 | ||
b6e47ceb | 1635 | if (cur_occr && BLOCK_NUM (cur_occr->insn) == BLOCK_NUM (insn)) |
7506f491 | 1636 | { |
b6e47ceb JL |
1637 | /* Found another instance of the expression in the same basic block. |
1638 | Prefer this occurrence to the currently recorded one. We want | |
1639 | the last one in the block and the block is scanned from start | |
1640 | to end. */ | |
1641 | cur_occr->insn = insn; | |
7506f491 | 1642 | } |
7506f491 DE |
1643 | else |
1644 | { | |
1645 | /* First occurrence of this expression in this basic block. */ | |
703ad42b | 1646 | cur_occr = gcse_alloc (sizeof (struct occr)); |
7506f491 | 1647 | bytes_used += sizeof (struct occr); |
c4c81601 | 1648 | |
b6e47ceb JL |
1649 | cur_occr->insn = insn; |
1650 | cur_occr->next = cur_expr->avail_occr; | |
1651 | cur_occr->deleted_p = 0; | |
1652 | cur_expr->avail_occr = cur_occr; | |
7506f491 DE |
1653 | } |
1654 | } | |
1655 | ||
6b2d1c9e RS |
1656 | /* Determine whether the rtx X should be treated as a constant for |
1657 | the purposes of GCSE's constant propagation. */ | |
1658 | ||
1659 | static bool | |
1d088dee | 1660 | gcse_constant_p (rtx x) |
6b2d1c9e RS |
1661 | { |
1662 | /* Consider a COMPARE of two integers constant. */ | |
1663 | if (GET_CODE (x) == COMPARE | |
1664 | && GET_CODE (XEXP (x, 0)) == CONST_INT | |
1665 | && GET_CODE (XEXP (x, 1)) == CONST_INT) | |
1666 | return true; | |
1667 | ||
db2f435b | 1668 | /* Consider a COMPARE of the same registers is a constant |
7b1b4aed | 1669 | if they are not floating point registers. */ |
db2f435b | 1670 | if (GET_CODE(x) == COMPARE |
7b1b4aed | 1671 | && REG_P (XEXP (x, 0)) && REG_P (XEXP (x, 1)) |
db2f435b AP |
1672 | && REGNO (XEXP (x, 0)) == REGNO (XEXP (x, 1)) |
1673 | && ! FLOAT_MODE_P (GET_MODE (XEXP (x, 0))) | |
1674 | && ! FLOAT_MODE_P (GET_MODE (XEXP (x, 1)))) | |
1675 | return true; | |
1676 | ||
6b2d1c9e RS |
1677 | return CONSTANT_P (x); |
1678 | } | |
1679 | ||
02280659 ZD |
1680 | /* Scan pattern PAT of INSN and add an entry to the hash TABLE (set or |
1681 | expression one). */ | |
7506f491 DE |
1682 | |
1683 | static void | |
1d088dee | 1684 | hash_scan_set (rtx pat, rtx insn, struct hash_table *table) |
7506f491 DE |
1685 | { |
1686 | rtx src = SET_SRC (pat); | |
1687 | rtx dest = SET_DEST (pat); | |
172890a2 | 1688 | rtx note; |
7506f491 | 1689 | |
6e72d1e9 | 1690 | if (GET_CODE (src) == CALL) |
02280659 | 1691 | hash_scan_call (src, insn, table); |
7506f491 | 1692 | |
7b1b4aed | 1693 | else if (REG_P (dest)) |
7506f491 | 1694 | { |
172890a2 | 1695 | unsigned int regno = REGNO (dest); |
7506f491 DE |
1696 | rtx tmp; |
1697 | ||
172890a2 RK |
1698 | /* If this is a single set and we are doing constant propagation, |
1699 | see if a REG_NOTE shows this equivalent to a constant. */ | |
02280659 | 1700 | if (table->set_p && (note = find_reg_equal_equiv_note (insn)) != 0 |
6b2d1c9e | 1701 | && gcse_constant_p (XEXP (note, 0))) |
172890a2 RK |
1702 | src = XEXP (note, 0), pat = gen_rtx_SET (VOIDmode, dest, src); |
1703 | ||
7506f491 | 1704 | /* Only record sets of pseudo-regs in the hash table. */ |
02280659 | 1705 | if (! table->set_p |
7506f491 DE |
1706 | && regno >= FIRST_PSEUDO_REGISTER |
1707 | /* Don't GCSE something if we can't do a reg/reg copy. */ | |
773eae39 | 1708 | && can_copy_p (GET_MODE (dest)) |
068473ec JH |
1709 | /* GCSE commonly inserts instruction after the insn. We can't |
1710 | do that easily for EH_REGION notes so disable GCSE on these | |
1711 | for now. */ | |
1712 | && !find_reg_note (insn, REG_EH_REGION, NULL_RTX) | |
7506f491 | 1713 | /* Is SET_SRC something we want to gcse? */ |
172890a2 RK |
1714 | && want_to_gcse_p (src) |
1715 | /* Don't CSE a nop. */ | |
43e72072 JJ |
1716 | && ! set_noop_p (pat) |
1717 | /* Don't GCSE if it has attached REG_EQUIV note. | |
1718 | At this point this only function parameters should have | |
1719 | REG_EQUIV notes and if the argument slot is used somewhere | |
a1f300c0 | 1720 | explicitly, it means address of parameter has been taken, |
43e72072 JJ |
1721 | so we should not extend the lifetime of the pseudo. */ |
1722 | && ((note = find_reg_note (insn, REG_EQUIV, NULL_RTX)) == 0 | |
7b1b4aed | 1723 | || ! MEM_P (XEXP (note, 0)))) |
7506f491 DE |
1724 | { |
1725 | /* An expression is not anticipatable if its operands are | |
52d76e11 RK |
1726 | modified before this insn or if this is not the only SET in |
1727 | this insn. */ | |
1728 | int antic_p = oprs_anticipatable_p (src, insn) && single_set (insn); | |
7506f491 | 1729 | /* An expression is not available if its operands are |
eb296bd9 GK |
1730 | subsequently modified, including this insn. It's also not |
1731 | available if this is a branch, because we can't insert | |
1732 | a set after the branch. */ | |
1733 | int avail_p = (oprs_available_p (src, insn) | |
1734 | && ! JUMP_P (insn)); | |
c4c81601 | 1735 | |
02280659 | 1736 | insert_expr_in_table (src, GET_MODE (dest), insn, antic_p, avail_p, table); |
7506f491 | 1737 | } |
c4c81601 | 1738 | |
7506f491 | 1739 | /* Record sets for constant/copy propagation. */ |
02280659 | 1740 | else if (table->set_p |
7506f491 | 1741 | && regno >= FIRST_PSEUDO_REGISTER |
7b1b4aed | 1742 | && ((REG_P (src) |
7506f491 | 1743 | && REGNO (src) >= FIRST_PSEUDO_REGISTER |
773eae39 | 1744 | && can_copy_p (GET_MODE (dest)) |
172890a2 | 1745 | && REGNO (src) != regno) |
6b2d1c9e | 1746 | || gcse_constant_p (src)) |
7506f491 DE |
1747 | /* A copy is not available if its src or dest is subsequently |
1748 | modified. Here we want to search from INSN+1 on, but | |
1749 | oprs_available_p searches from INSN on. */ | |
a813c111 | 1750 | && (insn == BB_END (BLOCK_FOR_INSN (insn)) |
7506f491 DE |
1751 | || ((tmp = next_nonnote_insn (insn)) != NULL_RTX |
1752 | && oprs_available_p (pat, tmp)))) | |
02280659 | 1753 | insert_set_in_table (pat, insn, table); |
7506f491 | 1754 | } |
d91edf86 | 1755 | /* In case of store we want to consider the memory value as available in |
f5f2e3cd MH |
1756 | the REG stored in that memory. This makes it possible to remove |
1757 | redundant loads from due to stores to the same location. */ | |
7b1b4aed | 1758 | else if (flag_gcse_las && REG_P (src) && MEM_P (dest)) |
f5f2e3cd MH |
1759 | { |
1760 | unsigned int regno = REGNO (src); | |
1761 | ||
1762 | /* Do not do this for constant/copy propagation. */ | |
1763 | if (! table->set_p | |
1764 | /* Only record sets of pseudo-regs in the hash table. */ | |
1765 | && regno >= FIRST_PSEUDO_REGISTER | |
1766 | /* Don't GCSE something if we can't do a reg/reg copy. */ | |
1767 | && can_copy_p (GET_MODE (src)) | |
1768 | /* GCSE commonly inserts instruction after the insn. We can't | |
1769 | do that easily for EH_REGION notes so disable GCSE on these | |
1770 | for now. */ | |
1771 | && ! find_reg_note (insn, REG_EH_REGION, NULL_RTX) | |
1772 | /* Is SET_DEST something we want to gcse? */ | |
1773 | && want_to_gcse_p (dest) | |
1774 | /* Don't CSE a nop. */ | |
1775 | && ! set_noop_p (pat) | |
1776 | /* Don't GCSE if it has attached REG_EQUIV note. | |
1777 | At this point this only function parameters should have | |
1778 | REG_EQUIV notes and if the argument slot is used somewhere | |
1779 | explicitly, it means address of parameter has been taken, | |
1780 | so we should not extend the lifetime of the pseudo. */ | |
1781 | && ((note = find_reg_note (insn, REG_EQUIV, NULL_RTX)) == 0 | |
7b1b4aed | 1782 | || ! MEM_P (XEXP (note, 0)))) |
f5f2e3cd MH |
1783 | { |
1784 | /* Stores are never anticipatable. */ | |
1785 | int antic_p = 0; | |
1786 | /* An expression is not available if its operands are | |
1787 | subsequently modified, including this insn. It's also not | |
1788 | available if this is a branch, because we can't insert | |
1789 | a set after the branch. */ | |
1790 | int avail_p = oprs_available_p (dest, insn) | |
1791 | && ! JUMP_P (insn); | |
1792 | ||
1793 | /* Record the memory expression (DEST) in the hash table. */ | |
1794 | insert_expr_in_table (dest, GET_MODE (dest), insn, | |
1795 | antic_p, avail_p, table); | |
1796 | } | |
1797 | } | |
7506f491 DE |
1798 | } |
1799 | ||
1800 | static void | |
1d088dee AJ |
1801 | hash_scan_clobber (rtx x ATTRIBUTE_UNUSED, rtx insn ATTRIBUTE_UNUSED, |
1802 | struct hash_table *table ATTRIBUTE_UNUSED) | |
7506f491 DE |
1803 | { |
1804 | /* Currently nothing to do. */ | |
1805 | } | |
1806 | ||
1807 | static void | |
1d088dee AJ |
1808 | hash_scan_call (rtx x ATTRIBUTE_UNUSED, rtx insn ATTRIBUTE_UNUSED, |
1809 | struct hash_table *table ATTRIBUTE_UNUSED) | |
7506f491 DE |
1810 | { |
1811 | /* Currently nothing to do. */ | |
1812 | } | |
1813 | ||
1814 | /* Process INSN and add hash table entries as appropriate. | |
1815 | ||
1816 | Only available expressions that set a single pseudo-reg are recorded. | |
1817 | ||
1818 | Single sets in a PARALLEL could be handled, but it's an extra complication | |
1819 | that isn't dealt with right now. The trick is handling the CLOBBERs that | |
1820 | are also in the PARALLEL. Later. | |
1821 | ||
cc2902df | 1822 | If SET_P is nonzero, this is for the assignment hash table, |
ed79bb3d R |
1823 | otherwise it is for the expression hash table. |
1824 | If IN_LIBCALL_BLOCK nonzero, we are in a libcall block, and should | |
1825 | not record any expressions. */ | |
7506f491 DE |
1826 | |
1827 | static void | |
1d088dee | 1828 | hash_scan_insn (rtx insn, struct hash_table *table, int in_libcall_block) |
7506f491 DE |
1829 | { |
1830 | rtx pat = PATTERN (insn); | |
c4c81601 | 1831 | int i; |
7506f491 | 1832 | |
172890a2 RK |
1833 | if (in_libcall_block) |
1834 | return; | |
1835 | ||
7506f491 DE |
1836 | /* Pick out the sets of INSN and for other forms of instructions record |
1837 | what's been modified. */ | |
1838 | ||
172890a2 | 1839 | if (GET_CODE (pat) == SET) |
02280659 | 1840 | hash_scan_set (pat, insn, table); |
7506f491 | 1841 | else if (GET_CODE (pat) == PARALLEL) |
c4c81601 RK |
1842 | for (i = 0; i < XVECLEN (pat, 0); i++) |
1843 | { | |
1844 | rtx x = XVECEXP (pat, 0, i); | |
7506f491 | 1845 | |
c4c81601 | 1846 | if (GET_CODE (x) == SET) |
02280659 | 1847 | hash_scan_set (x, insn, table); |
c4c81601 | 1848 | else if (GET_CODE (x) == CLOBBER) |
02280659 | 1849 | hash_scan_clobber (x, insn, table); |
6e72d1e9 | 1850 | else if (GET_CODE (x) == CALL) |
02280659 | 1851 | hash_scan_call (x, insn, table); |
c4c81601 | 1852 | } |
7506f491 | 1853 | |
7506f491 | 1854 | else if (GET_CODE (pat) == CLOBBER) |
02280659 | 1855 | hash_scan_clobber (pat, insn, table); |
6e72d1e9 | 1856 | else if (GET_CODE (pat) == CALL) |
02280659 | 1857 | hash_scan_call (pat, insn, table); |
7506f491 DE |
1858 | } |
1859 | ||
1860 | static void | |
1d088dee | 1861 | dump_hash_table (FILE *file, const char *name, struct hash_table *table) |
7506f491 DE |
1862 | { |
1863 | int i; | |
1864 | /* Flattened out table, so it's printed in proper order. */ | |
4da896b2 MM |
1865 | struct expr **flat_table; |
1866 | unsigned int *hash_val; | |
c4c81601 | 1867 | struct expr *expr; |
4da896b2 | 1868 | |
703ad42b KG |
1869 | flat_table = xcalloc (table->n_elems, sizeof (struct expr *)); |
1870 | hash_val = xmalloc (table->n_elems * sizeof (unsigned int)); | |
7506f491 | 1871 | |
02280659 ZD |
1872 | for (i = 0; i < (int) table->size; i++) |
1873 | for (expr = table->table[i]; expr != NULL; expr = expr->next_same_hash) | |
c4c81601 RK |
1874 | { |
1875 | flat_table[expr->bitmap_index] = expr; | |
1876 | hash_val[expr->bitmap_index] = i; | |
1877 | } | |
7506f491 DE |
1878 | |
1879 | fprintf (file, "%s hash table (%d buckets, %d entries)\n", | |
02280659 | 1880 | name, table->size, table->n_elems); |
7506f491 | 1881 | |
02280659 | 1882 | for (i = 0; i < (int) table->n_elems; i++) |
21318741 RK |
1883 | if (flat_table[i] != 0) |
1884 | { | |
a0ac9e5a | 1885 | expr = flat_table[i]; |
21318741 RK |
1886 | fprintf (file, "Index %d (hash value %d)\n ", |
1887 | expr->bitmap_index, hash_val[i]); | |
a0ac9e5a | 1888 | print_rtl (file, expr->expr); |
21318741 RK |
1889 | fprintf (file, "\n"); |
1890 | } | |
7506f491 DE |
1891 | |
1892 | fprintf (file, "\n"); | |
4da896b2 | 1893 | |
4da896b2 MM |
1894 | free (flat_table); |
1895 | free (hash_val); | |
7506f491 DE |
1896 | } |
1897 | ||
1898 | /* Record register first/last/block set information for REGNO in INSN. | |
c4c81601 | 1899 | |
80c29cc4 | 1900 | first_set records the first place in the block where the register |
7506f491 | 1901 | is set and is used to compute "anticipatability". |
c4c81601 | 1902 | |
80c29cc4 | 1903 | last_set records the last place in the block where the register |
7506f491 | 1904 | is set and is used to compute "availability". |
c4c81601 | 1905 | |
80c29cc4 RZ |
1906 | last_bb records the block for which first_set and last_set are |
1907 | valid, as a quick test to invalidate them. | |
1908 | ||
7506f491 DE |
1909 | reg_set_in_block records whether the register is set in the block |
1910 | and is used to compute "transparency". */ | |
1911 | ||
1912 | static void | |
1d088dee | 1913 | record_last_reg_set_info (rtx insn, int regno) |
7506f491 | 1914 | { |
80c29cc4 RZ |
1915 | struct reg_avail_info *info = ®_avail_info[regno]; |
1916 | int cuid = INSN_CUID (insn); | |
c4c81601 | 1917 | |
80c29cc4 RZ |
1918 | info->last_set = cuid; |
1919 | if (info->last_bb != current_bb) | |
1920 | { | |
1921 | info->last_bb = current_bb; | |
1922 | info->first_set = cuid; | |
e0082a72 | 1923 | SET_BIT (reg_set_in_block[current_bb->index], regno); |
80c29cc4 | 1924 | } |
7506f491 DE |
1925 | } |
1926 | ||
a13d4ebf AM |
1927 | |
1928 | /* Record all of the canonicalized MEMs of record_last_mem_set_info's insn. | |
1929 | Note we store a pair of elements in the list, so they have to be | |
1930 | taken off pairwise. */ | |
1931 | ||
589005ff | 1932 | static void |
1d088dee AJ |
1933 | canon_list_insert (rtx dest ATTRIBUTE_UNUSED, rtx unused1 ATTRIBUTE_UNUSED, |
1934 | void * v_insn) | |
a13d4ebf AM |
1935 | { |
1936 | rtx dest_addr, insn; | |
0fe854a7 | 1937 | int bb; |
a13d4ebf AM |
1938 | |
1939 | while (GET_CODE (dest) == SUBREG | |
1940 | || GET_CODE (dest) == ZERO_EXTRACT | |
a13d4ebf AM |
1941 | || GET_CODE (dest) == STRICT_LOW_PART) |
1942 | dest = XEXP (dest, 0); | |
1943 | ||
1944 | /* If DEST is not a MEM, then it will not conflict with a load. Note | |
1945 | that function calls are assumed to clobber memory, but are handled | |
1946 | elsewhere. */ | |
1947 | ||
7b1b4aed | 1948 | if (! MEM_P (dest)) |
a13d4ebf AM |
1949 | return; |
1950 | ||
1951 | dest_addr = get_addr (XEXP (dest, 0)); | |
1952 | dest_addr = canon_rtx (dest_addr); | |
589005ff | 1953 | insn = (rtx) v_insn; |
0fe854a7 | 1954 | bb = BLOCK_NUM (insn); |
a13d4ebf | 1955 | |
589005ff | 1956 | canon_modify_mem_list[bb] = |
0fe854a7 | 1957 | alloc_EXPR_LIST (VOIDmode, dest_addr, canon_modify_mem_list[bb]); |
589005ff | 1958 | canon_modify_mem_list[bb] = |
0fe854a7 | 1959 | alloc_EXPR_LIST (VOIDmode, dest, canon_modify_mem_list[bb]); |
a13d4ebf AM |
1960 | } |
1961 | ||
a13d4ebf AM |
1962 | /* Record memory modification information for INSN. We do not actually care |
1963 | about the memory location(s) that are set, or even how they are set (consider | |
1964 | a CALL_INSN). We merely need to record which insns modify memory. */ | |
7506f491 DE |
1965 | |
1966 | static void | |
1d088dee | 1967 | record_last_mem_set_info (rtx insn) |
7506f491 | 1968 | { |
0fe854a7 RH |
1969 | int bb = BLOCK_NUM (insn); |
1970 | ||
ccef9ef5 | 1971 | /* load_killed_in_block_p will handle the case of calls clobbering |
dc297297 | 1972 | everything. */ |
0fe854a7 RH |
1973 | modify_mem_list[bb] = alloc_INSN_LIST (insn, modify_mem_list[bb]); |
1974 | bitmap_set_bit (modify_mem_list_set, bb); | |
a13d4ebf | 1975 | |
7b1b4aed | 1976 | if (CALL_P (insn)) |
a13d4ebf AM |
1977 | { |
1978 | /* Note that traversals of this loop (other than for free-ing) | |
1979 | will break after encountering a CALL_INSN. So, there's no | |
dc297297 | 1980 | need to insert a pair of items, as canon_list_insert does. */ |
589005ff KH |
1981 | canon_modify_mem_list[bb] = |
1982 | alloc_INSN_LIST (insn, canon_modify_mem_list[bb]); | |
aa47fcfa | 1983 | bitmap_set_bit (blocks_with_calls, bb); |
a13d4ebf AM |
1984 | } |
1985 | else | |
0fe854a7 | 1986 | note_stores (PATTERN (insn), canon_list_insert, (void*) insn); |
7506f491 DE |
1987 | } |
1988 | ||
7506f491 | 1989 | /* Called from compute_hash_table via note_stores to handle one |
84832317 MM |
1990 | SET or CLOBBER in an insn. DATA is really the instruction in which |
1991 | the SET is taking place. */ | |
7506f491 DE |
1992 | |
1993 | static void | |
1d088dee | 1994 | record_last_set_info (rtx dest, rtx setter ATTRIBUTE_UNUSED, void *data) |
7506f491 | 1995 | { |
84832317 MM |
1996 | rtx last_set_insn = (rtx) data; |
1997 | ||
7506f491 DE |
1998 | if (GET_CODE (dest) == SUBREG) |
1999 | dest = SUBREG_REG (dest); | |
2000 | ||
7b1b4aed | 2001 | if (REG_P (dest)) |
7506f491 | 2002 | record_last_reg_set_info (last_set_insn, REGNO (dest)); |
7b1b4aed | 2003 | else if (MEM_P (dest) |
7506f491 DE |
2004 | /* Ignore pushes, they clobber nothing. */ |
2005 | && ! push_operand (dest, GET_MODE (dest))) | |
2006 | record_last_mem_set_info (last_set_insn); | |
2007 | } | |
2008 | ||
2009 | /* Top level function to create an expression or assignment hash table. | |
2010 | ||
2011 | Expression entries are placed in the hash table if | |
2012 | - they are of the form (set (pseudo-reg) src), | |
2013 | - src is something we want to perform GCSE on, | |
2014 | - none of the operands are subsequently modified in the block | |
2015 | ||
2016 | Assignment entries are placed in the hash table if | |
2017 | - they are of the form (set (pseudo-reg) src), | |
2018 | - src is something we want to perform const/copy propagation on, | |
2019 | - none of the operands or target are subsequently modified in the block | |
c4c81601 | 2020 | |
7506f491 DE |
2021 | Currently src must be a pseudo-reg or a const_int. |
2022 | ||
02280659 | 2023 | TABLE is the table computed. */ |
7506f491 DE |
2024 | |
2025 | static void | |
1d088dee | 2026 | compute_hash_table_work (struct hash_table *table) |
7506f491 | 2027 | { |
80c29cc4 | 2028 | unsigned int i; |
7506f491 DE |
2029 | |
2030 | /* While we compute the hash table we also compute a bit array of which | |
2031 | registers are set in which blocks. | |
7506f491 DE |
2032 | ??? This isn't needed during const/copy propagation, but it's cheap to |
2033 | compute. Later. */ | |
d55bc081 | 2034 | sbitmap_vector_zero (reg_set_in_block, last_basic_block); |
7506f491 | 2035 | |
a13d4ebf | 2036 | /* re-Cache any INSN_LIST nodes we have allocated. */ |
73991d6a | 2037 | clear_modify_mem_tables (); |
7506f491 | 2038 | /* Some working arrays used to track first and last set in each block. */ |
703ad42b | 2039 | reg_avail_info = gmalloc (max_gcse_regno * sizeof (struct reg_avail_info)); |
80c29cc4 RZ |
2040 | |
2041 | for (i = 0; i < max_gcse_regno; ++i) | |
e0082a72 | 2042 | reg_avail_info[i].last_bb = NULL; |
7506f491 | 2043 | |
e0082a72 | 2044 | FOR_EACH_BB (current_bb) |
7506f491 DE |
2045 | { |
2046 | rtx insn; | |
770ae6cc | 2047 | unsigned int regno; |
ed79bb3d | 2048 | int in_libcall_block; |
7506f491 DE |
2049 | |
2050 | /* First pass over the instructions records information used to | |
2051 | determine when registers and memory are first and last set. | |
ccef9ef5 | 2052 | ??? hard-reg reg_set_in_block computation |
7506f491 DE |
2053 | could be moved to compute_sets since they currently don't change. */ |
2054 | ||
eb232f4e | 2055 | FOR_BB_INSNS (current_bb, insn) |
7506f491 | 2056 | { |
2c3c49de | 2057 | if (! INSN_P (insn)) |
7506f491 DE |
2058 | continue; |
2059 | ||
7b1b4aed | 2060 | if (CALL_P (insn)) |
7506f491 DE |
2061 | { |
2062 | for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++) | |
6e14af16 | 2063 | if (TEST_HARD_REG_BIT (regs_invalidated_by_call, regno)) |
7506f491 | 2064 | record_last_reg_set_info (insn, regno); |
c4c81601 | 2065 | |
24a28584 | 2066 | mark_call (insn); |
7506f491 DE |
2067 | } |
2068 | ||
84832317 | 2069 | note_stores (PATTERN (insn), record_last_set_info, insn); |
7506f491 DE |
2070 | } |
2071 | ||
fbef91d8 RS |
2072 | /* Insert implicit sets in the hash table. */ |
2073 | if (table->set_p | |
2074 | && implicit_sets[current_bb->index] != NULL_RTX) | |
2075 | hash_scan_set (implicit_sets[current_bb->index], | |
a813c111 | 2076 | BB_HEAD (current_bb), table); |
fbef91d8 | 2077 | |
7506f491 | 2078 | /* The next pass builds the hash table. */ |
eb232f4e SB |
2079 | in_libcall_block = 0; |
2080 | FOR_BB_INSNS (current_bb, insn) | |
2c3c49de | 2081 | if (INSN_P (insn)) |
c4c81601 RK |
2082 | { |
2083 | if (find_reg_note (insn, REG_LIBCALL, NULL_RTX)) | |
589005ff | 2084 | in_libcall_block = 1; |
02280659 | 2085 | else if (table->set_p && find_reg_note (insn, REG_RETVAL, NULL_RTX)) |
589005ff | 2086 | in_libcall_block = 0; |
02280659 ZD |
2087 | hash_scan_insn (insn, table, in_libcall_block); |
2088 | if (!table->set_p && find_reg_note (insn, REG_RETVAL, NULL_RTX)) | |
589005ff | 2089 | in_libcall_block = 0; |
8e42ace1 | 2090 | } |
7506f491 DE |
2091 | } |
2092 | ||
80c29cc4 RZ |
2093 | free (reg_avail_info); |
2094 | reg_avail_info = NULL; | |
7506f491 DE |
2095 | } |
2096 | ||
02280659 | 2097 | /* Allocate space for the set/expr hash TABLE. |
7506f491 | 2098 | N_INSNS is the number of instructions in the function. |
02280659 ZD |
2099 | It is used to determine the number of buckets to use. |
2100 | SET_P determines whether set or expression table will | |
2101 | be created. */ | |
7506f491 DE |
2102 | |
2103 | static void | |
1d088dee | 2104 | alloc_hash_table (int n_insns, struct hash_table *table, int set_p) |
7506f491 DE |
2105 | { |
2106 | int n; | |
2107 | ||
02280659 ZD |
2108 | table->size = n_insns / 4; |
2109 | if (table->size < 11) | |
2110 | table->size = 11; | |
c4c81601 | 2111 | |
7506f491 DE |
2112 | /* Attempt to maintain efficient use of hash table. |
2113 | Making it an odd number is simplest for now. | |
2114 | ??? Later take some measurements. */ | |
02280659 ZD |
2115 | table->size |= 1; |
2116 | n = table->size * sizeof (struct expr *); | |
703ad42b | 2117 | table->table = gmalloc (n); |
02280659 | 2118 | table->set_p = set_p; |
7506f491 DE |
2119 | } |
2120 | ||
02280659 | 2121 | /* Free things allocated by alloc_hash_table. */ |
7506f491 DE |
2122 | |
2123 | static void | |
1d088dee | 2124 | free_hash_table (struct hash_table *table) |
7506f491 | 2125 | { |
02280659 | 2126 | free (table->table); |
7506f491 DE |
2127 | } |
2128 | ||
02280659 ZD |
2129 | /* Compute the hash TABLE for doing copy/const propagation or |
2130 | expression hash table. */ | |
7506f491 DE |
2131 | |
2132 | static void | |
1d088dee | 2133 | compute_hash_table (struct hash_table *table) |
7506f491 DE |
2134 | { |
2135 | /* Initialize count of number of entries in hash table. */ | |
02280659 | 2136 | table->n_elems = 0; |
703ad42b | 2137 | memset (table->table, 0, table->size * sizeof (struct expr *)); |
7506f491 | 2138 | |
02280659 | 2139 | compute_hash_table_work (table); |
7506f491 DE |
2140 | } |
2141 | \f | |
2142 | /* Expression tracking support. */ | |
2143 | ||
ceda50e9 RH |
2144 | /* Lookup REGNO in the set TABLE. The result is a pointer to the |
2145 | table entry, or NULL if not found. */ | |
7506f491 DE |
2146 | |
2147 | static struct expr * | |
1d088dee | 2148 | lookup_set (unsigned int regno, struct hash_table *table) |
7506f491 | 2149 | { |
02280659 | 2150 | unsigned int hash = hash_set (regno, table->size); |
7506f491 DE |
2151 | struct expr *expr; |
2152 | ||
02280659 | 2153 | expr = table->table[hash]; |
7506f491 | 2154 | |
ceda50e9 RH |
2155 | while (expr && REGNO (SET_DEST (expr->expr)) != regno) |
2156 | expr = expr->next_same_hash; | |
7506f491 DE |
2157 | |
2158 | return expr; | |
2159 | } | |
2160 | ||
2161 | /* Return the next entry for REGNO in list EXPR. */ | |
2162 | ||
2163 | static struct expr * | |
1d088dee | 2164 | next_set (unsigned int regno, struct expr *expr) |
7506f491 DE |
2165 | { |
2166 | do | |
2167 | expr = expr->next_same_hash; | |
2168 | while (expr && REGNO (SET_DEST (expr->expr)) != regno); | |
c4c81601 | 2169 | |
7506f491 DE |
2170 | return expr; |
2171 | } | |
2172 | ||
0fe854a7 RH |
2173 | /* Like free_INSN_LIST_list or free_EXPR_LIST_list, except that the node |
2174 | types may be mixed. */ | |
2175 | ||
2176 | static void | |
1d088dee | 2177 | free_insn_expr_list_list (rtx *listp) |
0fe854a7 RH |
2178 | { |
2179 | rtx list, next; | |
2180 | ||
2181 | for (list = *listp; list ; list = next) | |
2182 | { | |
2183 | next = XEXP (list, 1); | |
2184 | if (GET_CODE (list) == EXPR_LIST) | |
2185 | free_EXPR_LIST_node (list); | |
2186 | else | |
2187 | free_INSN_LIST_node (list); | |
2188 | } | |
2189 | ||
2190 | *listp = NULL; | |
2191 | } | |
2192 | ||
73991d6a JH |
2193 | /* Clear canon_modify_mem_list and modify_mem_list tables. */ |
2194 | static void | |
1d088dee | 2195 | clear_modify_mem_tables (void) |
73991d6a | 2196 | { |
3cd8c58a | 2197 | unsigned i; |
87c476a2 | 2198 | bitmap_iterator bi; |
73991d6a | 2199 | |
87c476a2 ZD |
2200 | EXECUTE_IF_SET_IN_BITMAP (modify_mem_list_set, 0, i, bi) |
2201 | { | |
2202 | free_INSN_LIST_list (modify_mem_list + i); | |
87c476a2 ZD |
2203 | free_insn_expr_list_list (canon_modify_mem_list + i); |
2204 | } | |
9a6cf911 | 2205 | bitmap_clear (modify_mem_list_set); |
aa47fcfa | 2206 | bitmap_clear (blocks_with_calls); |
73991d6a JH |
2207 | } |
2208 | ||
9a6cf911 | 2209 | /* Release memory used by modify_mem_list_set. */ |
73991d6a JH |
2210 | |
2211 | static void | |
1d088dee | 2212 | free_modify_mem_tables (void) |
73991d6a JH |
2213 | { |
2214 | clear_modify_mem_tables (); | |
2215 | free (modify_mem_list); | |
2216 | free (canon_modify_mem_list); | |
2217 | modify_mem_list = 0; | |
2218 | canon_modify_mem_list = 0; | |
2219 | } | |
2220 | ||
7506f491 DE |
2221 | /* Reset tables used to keep track of what's still available [since the |
2222 | start of the block]. */ | |
2223 | ||
2224 | static void | |
1d088dee | 2225 | reset_opr_set_tables (void) |
7506f491 DE |
2226 | { |
2227 | /* Maintain a bitmap of which regs have been set since beginning of | |
2228 | the block. */ | |
73991d6a | 2229 | CLEAR_REG_SET (reg_set_bitmap); |
c4c81601 | 2230 | |
7506f491 DE |
2231 | /* Also keep a record of the last instruction to modify memory. |
2232 | For now this is very trivial, we only record whether any memory | |
2233 | location has been modified. */ | |
73991d6a | 2234 | clear_modify_mem_tables (); |
7506f491 DE |
2235 | } |
2236 | ||
cc2902df | 2237 | /* Return nonzero if the operands of X are not set before INSN in |
7506f491 DE |
2238 | INSN's basic block. */ |
2239 | ||
2240 | static int | |
1d088dee | 2241 | oprs_not_set_p (rtx x, rtx insn) |
7506f491 | 2242 | { |
c4c81601 | 2243 | int i, j; |
7506f491 | 2244 | enum rtx_code code; |
6f7d635c | 2245 | const char *fmt; |
7506f491 | 2246 | |
7506f491 DE |
2247 | if (x == 0) |
2248 | return 1; | |
2249 | ||
2250 | code = GET_CODE (x); | |
2251 | switch (code) | |
2252 | { | |
2253 | case PC: | |
2254 | case CC0: | |
2255 | case CONST: | |
2256 | case CONST_INT: | |
2257 | case CONST_DOUBLE: | |
69ef87e2 | 2258 | case CONST_VECTOR: |
7506f491 DE |
2259 | case SYMBOL_REF: |
2260 | case LABEL_REF: | |
2261 | case ADDR_VEC: | |
2262 | case ADDR_DIFF_VEC: | |
2263 | return 1; | |
2264 | ||
2265 | case MEM: | |
589005ff | 2266 | if (load_killed_in_block_p (BLOCK_FOR_INSN (insn), |
e2d2ed72 | 2267 | INSN_CUID (insn), x, 0)) |
a13d4ebf | 2268 | return 0; |
c4c81601 RK |
2269 | else |
2270 | return oprs_not_set_p (XEXP (x, 0), insn); | |
7506f491 DE |
2271 | |
2272 | case REG: | |
73991d6a | 2273 | return ! REGNO_REG_SET_P (reg_set_bitmap, REGNO (x)); |
7506f491 DE |
2274 | |
2275 | default: | |
2276 | break; | |
2277 | } | |
2278 | ||
c4c81601 | 2279 | for (i = GET_RTX_LENGTH (code) - 1, fmt = GET_RTX_FORMAT (code); i >= 0; i--) |
7506f491 DE |
2280 | { |
2281 | if (fmt[i] == 'e') | |
2282 | { | |
7506f491 DE |
2283 | /* If we are about to do the last recursive call |
2284 | needed at this level, change it into iteration. | |
2285 | This function is called enough to be worth it. */ | |
2286 | if (i == 0) | |
c4c81601 RK |
2287 | return oprs_not_set_p (XEXP (x, i), insn); |
2288 | ||
2289 | if (! oprs_not_set_p (XEXP (x, i), insn)) | |
7506f491 DE |
2290 | return 0; |
2291 | } | |
2292 | else if (fmt[i] == 'E') | |
c4c81601 RK |
2293 | for (j = 0; j < XVECLEN (x, i); j++) |
2294 | if (! oprs_not_set_p (XVECEXP (x, i, j), insn)) | |
2295 | return 0; | |
7506f491 DE |
2296 | } |
2297 | ||
2298 | return 1; | |
2299 | } | |
2300 | ||
2301 | /* Mark things set by a CALL. */ | |
2302 | ||
2303 | static void | |
1d088dee | 2304 | mark_call (rtx insn) |
7506f491 | 2305 | { |
24a28584 | 2306 | if (! CONST_OR_PURE_CALL_P (insn)) |
a13d4ebf | 2307 | record_last_mem_set_info (insn); |
7506f491 DE |
2308 | } |
2309 | ||
2310 | /* Mark things set by a SET. */ | |
2311 | ||
2312 | static void | |
1d088dee | 2313 | mark_set (rtx pat, rtx insn) |
7506f491 DE |
2314 | { |
2315 | rtx dest = SET_DEST (pat); | |
2316 | ||
2317 | while (GET_CODE (dest) == SUBREG | |
2318 | || GET_CODE (dest) == ZERO_EXTRACT | |
7506f491 DE |
2319 | || GET_CODE (dest) == STRICT_LOW_PART) |
2320 | dest = XEXP (dest, 0); | |
2321 | ||
7b1b4aed | 2322 | if (REG_P (dest)) |
73991d6a | 2323 | SET_REGNO_REG_SET (reg_set_bitmap, REGNO (dest)); |
7b1b4aed | 2324 | else if (MEM_P (dest)) |
a13d4ebf AM |
2325 | record_last_mem_set_info (insn); |
2326 | ||
6e72d1e9 | 2327 | if (GET_CODE (SET_SRC (pat)) == CALL) |
b5ce41ff | 2328 | mark_call (insn); |
7506f491 DE |
2329 | } |
2330 | ||
2331 | /* Record things set by a CLOBBER. */ | |
2332 | ||
2333 | static void | |
1d088dee | 2334 | mark_clobber (rtx pat, rtx insn) |
7506f491 DE |
2335 | { |
2336 | rtx clob = XEXP (pat, 0); | |
2337 | ||
2338 | while (GET_CODE (clob) == SUBREG || GET_CODE (clob) == STRICT_LOW_PART) | |
2339 | clob = XEXP (clob, 0); | |
2340 | ||
7b1b4aed | 2341 | if (REG_P (clob)) |
73991d6a | 2342 | SET_REGNO_REG_SET (reg_set_bitmap, REGNO (clob)); |
a13d4ebf AM |
2343 | else |
2344 | record_last_mem_set_info (insn); | |
7506f491 DE |
2345 | } |
2346 | ||
2347 | /* Record things set by INSN. | |
2348 | This data is used by oprs_not_set_p. */ | |
2349 | ||
2350 | static void | |
1d088dee | 2351 | mark_oprs_set (rtx insn) |
7506f491 DE |
2352 | { |
2353 | rtx pat = PATTERN (insn); | |
c4c81601 | 2354 | int i; |
7506f491 DE |
2355 | |
2356 | if (GET_CODE (pat) == SET) | |
2357 | mark_set (pat, insn); | |
2358 | else if (GET_CODE (pat) == PARALLEL) | |
c4c81601 RK |
2359 | for (i = 0; i < XVECLEN (pat, 0); i++) |
2360 | { | |
2361 | rtx x = XVECEXP (pat, 0, i); | |
2362 | ||
2363 | if (GET_CODE (x) == SET) | |
2364 | mark_set (x, insn); | |
2365 | else if (GET_CODE (x) == CLOBBER) | |
2366 | mark_clobber (x, insn); | |
6e72d1e9 | 2367 | else if (GET_CODE (x) == CALL) |
c4c81601 RK |
2368 | mark_call (insn); |
2369 | } | |
7506f491 | 2370 | |
7506f491 DE |
2371 | else if (GET_CODE (pat) == CLOBBER) |
2372 | mark_clobber (pat, insn); | |
6e72d1e9 | 2373 | else if (GET_CODE (pat) == CALL) |
b5ce41ff | 2374 | mark_call (insn); |
7506f491 | 2375 | } |
b5ce41ff | 2376 | |
7506f491 DE |
2377 | \f |
2378 | /* Compute copy/constant propagation working variables. */ | |
2379 | ||
2380 | /* Local properties of assignments. */ | |
7506f491 DE |
2381 | static sbitmap *cprop_pavloc; |
2382 | static sbitmap *cprop_absaltered; | |
2383 | ||
2384 | /* Global properties of assignments (computed from the local properties). */ | |
7506f491 DE |
2385 | static sbitmap *cprop_avin; |
2386 | static sbitmap *cprop_avout; | |
2387 | ||
c4c81601 RK |
2388 | /* Allocate vars used for copy/const propagation. N_BLOCKS is the number of |
2389 | basic blocks. N_SETS is the number of sets. */ | |
7506f491 DE |
2390 | |
2391 | static void | |
1d088dee | 2392 | alloc_cprop_mem (int n_blocks, int n_sets) |
7506f491 DE |
2393 | { |
2394 | cprop_pavloc = sbitmap_vector_alloc (n_blocks, n_sets); | |
2395 | cprop_absaltered = sbitmap_vector_alloc (n_blocks, n_sets); | |
2396 | ||
2397 | cprop_avin = sbitmap_vector_alloc (n_blocks, n_sets); | |
2398 | cprop_avout = sbitmap_vector_alloc (n_blocks, n_sets); | |
2399 | } | |
2400 | ||
2401 | /* Free vars used by copy/const propagation. */ | |
2402 | ||
2403 | static void | |
1d088dee | 2404 | free_cprop_mem (void) |
7506f491 | 2405 | { |
5a660bff DB |
2406 | sbitmap_vector_free (cprop_pavloc); |
2407 | sbitmap_vector_free (cprop_absaltered); | |
2408 | sbitmap_vector_free (cprop_avin); | |
2409 | sbitmap_vector_free (cprop_avout); | |
7506f491 DE |
2410 | } |
2411 | ||
c4c81601 RK |
2412 | /* For each block, compute whether X is transparent. X is either an |
2413 | expression or an assignment [though we don't care which, for this context | |
2414 | an assignment is treated as an expression]. For each block where an | |
2415 | element of X is modified, set (SET_P == 1) or reset (SET_P == 0) the INDX | |
2416 | bit in BMAP. */ | |
7506f491 DE |
2417 | |
2418 | static void | |
1d088dee | 2419 | compute_transp (rtx x, int indx, sbitmap *bmap, int set_p) |
7506f491 | 2420 | { |
e0082a72 ZD |
2421 | int i, j; |
2422 | basic_block bb; | |
7506f491 | 2423 | enum rtx_code code; |
c4c81601 | 2424 | reg_set *r; |
6f7d635c | 2425 | const char *fmt; |
7506f491 | 2426 | |
c4c81601 RK |
2427 | /* repeat is used to turn tail-recursion into iteration since GCC |
2428 | can't do it when there's no return value. */ | |
7506f491 DE |
2429 | repeat: |
2430 | ||
2431 | if (x == 0) | |
2432 | return; | |
2433 | ||
2434 | code = GET_CODE (x); | |
2435 | switch (code) | |
2436 | { | |
2437 | case REG: | |
c4c81601 RK |
2438 | if (set_p) |
2439 | { | |
2440 | if (REGNO (x) < FIRST_PSEUDO_REGISTER) | |
2441 | { | |
e0082a72 ZD |
2442 | FOR_EACH_BB (bb) |
2443 | if (TEST_BIT (reg_set_in_block[bb->index], REGNO (x))) | |
2444 | SET_BIT (bmap[bb->index], indx); | |
c4c81601 RK |
2445 | } |
2446 | else | |
2447 | { | |
2448 | for (r = reg_set_table[REGNO (x)]; r != NULL; r = r->next) | |
ed425871 | 2449 | SET_BIT (bmap[r->bb_index], indx); |
c4c81601 RK |
2450 | } |
2451 | } | |
2452 | else | |
2453 | { | |
2454 | if (REGNO (x) < FIRST_PSEUDO_REGISTER) | |
2455 | { | |
e0082a72 ZD |
2456 | FOR_EACH_BB (bb) |
2457 | if (TEST_BIT (reg_set_in_block[bb->index], REGNO (x))) | |
2458 | RESET_BIT (bmap[bb->index], indx); | |
c4c81601 RK |
2459 | } |
2460 | else | |
2461 | { | |
2462 | for (r = reg_set_table[REGNO (x)]; r != NULL; r = r->next) | |
ed425871 | 2463 | RESET_BIT (bmap[r->bb_index], indx); |
c4c81601 RK |
2464 | } |
2465 | } | |
7506f491 | 2466 | |
c4c81601 | 2467 | return; |
7506f491 DE |
2468 | |
2469 | case MEM: | |
16c5b95d MH |
2470 | if (! MEM_READONLY_P (x)) |
2471 | { | |
2472 | bitmap_iterator bi; | |
2473 | unsigned bb_index; | |
aa47fcfa | 2474 | |
16c5b95d MH |
2475 | /* First handle all the blocks with calls. We don't need to |
2476 | do any list walking for them. */ | |
2477 | EXECUTE_IF_SET_IN_BITMAP (blocks_with_calls, 0, bb_index, bi) | |
2478 | { | |
2479 | if (set_p) | |
2480 | SET_BIT (bmap[bb_index], indx); | |
2481 | else | |
2482 | RESET_BIT (bmap[bb_index], indx); | |
2483 | } | |
aa47fcfa | 2484 | |
16c5b95d MH |
2485 | /* Now iterate over the blocks which have memory modifications |
2486 | but which do not have any calls. */ | |
2487 | EXECUTE_IF_AND_COMPL_IN_BITMAP (modify_mem_list_set, | |
2488 | blocks_with_calls, | |
2489 | 0, bb_index, bi) | |
aa47fcfa | 2490 | { |
16c5b95d | 2491 | rtx list_entry = canon_modify_mem_list[bb_index]; |
aa47fcfa | 2492 | |
16c5b95d | 2493 | while (list_entry) |
aa47fcfa | 2494 | { |
16c5b95d MH |
2495 | rtx dest, dest_addr; |
2496 | ||
2497 | /* LIST_ENTRY must be an INSN of some kind that sets memory. | |
2498 | Examine each hunk of memory that is modified. */ | |
2499 | ||
2500 | dest = XEXP (list_entry, 0); | |
2501 | list_entry = XEXP (list_entry, 1); | |
2502 | dest_addr = XEXP (list_entry, 0); | |
2503 | ||
2504 | if (canon_true_dependence (dest, GET_MODE (dest), dest_addr, | |
2505 | x, rtx_addr_varies_p)) | |
2506 | { | |
2507 | if (set_p) | |
2508 | SET_BIT (bmap[bb_index], indx); | |
2509 | else | |
2510 | RESET_BIT (bmap[bb_index], indx); | |
2511 | break; | |
2512 | } | |
2513 | list_entry = XEXP (list_entry, 1); | |
2514 | } | |
aa47fcfa | 2515 | } |
16c5b95d | 2516 | } |
c4c81601 | 2517 | |
7506f491 DE |
2518 | x = XEXP (x, 0); |
2519 | goto repeat; | |
2520 | ||
2521 | case PC: | |
2522 | case CC0: /*FIXME*/ | |
2523 | case CONST: | |
2524 | case CONST_INT: | |
2525 | case CONST_DOUBLE: | |
69ef87e2 | 2526 | case CONST_VECTOR: |
7506f491 DE |
2527 | case SYMBOL_REF: |
2528 | case LABEL_REF: | |
2529 | case ADDR_VEC: | |
2530 | case ADDR_DIFF_VEC: | |
2531 | return; | |
2532 | ||
2533 | default: | |
2534 | break; | |
2535 | } | |
2536 | ||
c4c81601 | 2537 | for (i = GET_RTX_LENGTH (code) - 1, fmt = GET_RTX_FORMAT (code); i >= 0; i--) |
7506f491 DE |
2538 | { |
2539 | if (fmt[i] == 'e') | |
2540 | { | |
7506f491 DE |
2541 | /* If we are about to do the last recursive call |
2542 | needed at this level, change it into iteration. | |
2543 | This function is called enough to be worth it. */ | |
2544 | if (i == 0) | |
2545 | { | |
c4c81601 | 2546 | x = XEXP (x, i); |
7506f491 DE |
2547 | goto repeat; |
2548 | } | |
c4c81601 RK |
2549 | |
2550 | compute_transp (XEXP (x, i), indx, bmap, set_p); | |
7506f491 DE |
2551 | } |
2552 | else if (fmt[i] == 'E') | |
c4c81601 RK |
2553 | for (j = 0; j < XVECLEN (x, i); j++) |
2554 | compute_transp (XVECEXP (x, i, j), indx, bmap, set_p); | |
7506f491 DE |
2555 | } |
2556 | } | |
2557 | ||
7506f491 DE |
2558 | /* Top level routine to do the dataflow analysis needed by copy/const |
2559 | propagation. */ | |
2560 | ||
2561 | static void | |
1d088dee | 2562 | compute_cprop_data (void) |
7506f491 | 2563 | { |
02280659 | 2564 | compute_local_properties (cprop_absaltered, cprop_pavloc, NULL, &set_hash_table); |
ce724250 JL |
2565 | compute_available (cprop_pavloc, cprop_absaltered, |
2566 | cprop_avout, cprop_avin); | |
7506f491 DE |
2567 | } |
2568 | \f | |
2569 | /* Copy/constant propagation. */ | |
2570 | ||
7506f491 DE |
2571 | /* Maximum number of register uses in an insn that we handle. */ |
2572 | #define MAX_USES 8 | |
2573 | ||
2574 | /* Table of uses found in an insn. | |
2575 | Allocated statically to avoid alloc/free complexity and overhead. */ | |
2576 | static struct reg_use reg_use_table[MAX_USES]; | |
2577 | ||
2578 | /* Index into `reg_use_table' while building it. */ | |
2579 | static int reg_use_count; | |
2580 | ||
c4c81601 RK |
2581 | /* Set up a list of register numbers used in INSN. The found uses are stored |
2582 | in `reg_use_table'. `reg_use_count' is initialized to zero before entry, | |
2583 | and contains the number of uses in the table upon exit. | |
7506f491 | 2584 | |
c4c81601 RK |
2585 | ??? If a register appears multiple times we will record it multiple times. |
2586 | This doesn't hurt anything but it will slow things down. */ | |
7506f491 DE |
2587 | |
2588 | static void | |
1d088dee | 2589 | find_used_regs (rtx *xptr, void *data ATTRIBUTE_UNUSED) |
7506f491 | 2590 | { |
c4c81601 | 2591 | int i, j; |
7506f491 | 2592 | enum rtx_code code; |
6f7d635c | 2593 | const char *fmt; |
9e71c818 | 2594 | rtx x = *xptr; |
7506f491 | 2595 | |
c4c81601 RK |
2596 | /* repeat is used to turn tail-recursion into iteration since GCC |
2597 | can't do it when there's no return value. */ | |
7506f491 | 2598 | repeat: |
7506f491 DE |
2599 | if (x == 0) |
2600 | return; | |
2601 | ||
2602 | code = GET_CODE (x); | |
9e71c818 | 2603 | if (REG_P (x)) |
7506f491 | 2604 | { |
7506f491 DE |
2605 | if (reg_use_count == MAX_USES) |
2606 | return; | |
c4c81601 | 2607 | |
7506f491 DE |
2608 | reg_use_table[reg_use_count].reg_rtx = x; |
2609 | reg_use_count++; | |
7506f491 DE |
2610 | } |
2611 | ||
2612 | /* Recursively scan the operands of this expression. */ | |
2613 | ||
c4c81601 | 2614 | for (i = GET_RTX_LENGTH (code) - 1, fmt = GET_RTX_FORMAT (code); i >= 0; i--) |
7506f491 DE |
2615 | { |
2616 | if (fmt[i] == 'e') | |
2617 | { | |
2618 | /* If we are about to do the last recursive call | |
2619 | needed at this level, change it into iteration. | |
2620 | This function is called enough to be worth it. */ | |
2621 | if (i == 0) | |
2622 | { | |
2623 | x = XEXP (x, 0); | |
2624 | goto repeat; | |
2625 | } | |
c4c81601 | 2626 | |
9e71c818 | 2627 | find_used_regs (&XEXP (x, i), data); |
7506f491 DE |
2628 | } |
2629 | else if (fmt[i] == 'E') | |
c4c81601 | 2630 | for (j = 0; j < XVECLEN (x, i); j++) |
9e71c818 | 2631 | find_used_regs (&XVECEXP (x, i, j), data); |
7506f491 DE |
2632 | } |
2633 | } | |
2634 | ||
2635 | /* Try to replace all non-SET_DEST occurrences of FROM in INSN with TO. | |
cc2902df | 2636 | Returns nonzero is successful. */ |
7506f491 DE |
2637 | |
2638 | static int | |
1d088dee | 2639 | try_replace_reg (rtx from, rtx to, rtx insn) |
7506f491 | 2640 | { |
172890a2 | 2641 | rtx note = find_reg_equal_equiv_note (insn); |
fb0c0a12 | 2642 | rtx src = 0; |
172890a2 RK |
2643 | int success = 0; |
2644 | rtx set = single_set (insn); | |
833fc3ad | 2645 | |
2b773ee2 JH |
2646 | validate_replace_src_group (from, to, insn); |
2647 | if (num_changes_pending () && apply_change_group ()) | |
2648 | success = 1; | |
9e71c818 | 2649 | |
9feff114 JDA |
2650 | /* Try to simplify SET_SRC if we have substituted a constant. */ |
2651 | if (success && set && CONSTANT_P (to)) | |
2652 | { | |
2653 | src = simplify_rtx (SET_SRC (set)); | |
2654 | ||
2655 | if (src) | |
2656 | validate_change (insn, &SET_SRC (set), src, 0); | |
2657 | } | |
2658 | ||
ed8395a0 JZ |
2659 | /* If there is already a NOTE, update the expression in it with our |
2660 | replacement. */ | |
2661 | if (note != 0) | |
2662 | XEXP (note, 0) = simplify_replace_rtx (XEXP (note, 0), from, to); | |
2663 | ||
f305679f | 2664 | if (!success && set && reg_mentioned_p (from, SET_SRC (set))) |
833fc3ad | 2665 | { |
f305679f JH |
2666 | /* If above failed and this is a single set, try to simplify the source of |
2667 | the set given our substitution. We could perhaps try this for multiple | |
2668 | SETs, but it probably won't buy us anything. */ | |
172890a2 RK |
2669 | src = simplify_replace_rtx (SET_SRC (set), from, to); |
2670 | ||
9e71c818 JH |
2671 | if (!rtx_equal_p (src, SET_SRC (set)) |
2672 | && validate_change (insn, &SET_SRC (set), src, 0)) | |
172890a2 | 2673 | success = 1; |
833fc3ad | 2674 | |
bbd288a4 FS |
2675 | /* If we've failed to do replacement, have a single SET, don't already |
2676 | have a note, and have no special SET, add a REG_EQUAL note to not | |
2677 | lose information. */ | |
2678 | if (!success && note == 0 && set != 0 | |
46d096a3 | 2679 | && GET_CODE (SET_DEST (set)) != ZERO_EXTRACT) |
f305679f JH |
2680 | note = set_unique_reg_note (insn, REG_EQUAL, copy_rtx (src)); |
2681 | } | |
e251e2a2 | 2682 | |
172890a2 RK |
2683 | /* REG_EQUAL may get simplified into register. |
2684 | We don't allow that. Remove that note. This code ought | |
fbe5a4a6 | 2685 | not to happen, because previous code ought to synthesize |
172890a2 RK |
2686 | reg-reg move, but be on the safe side. */ |
2687 | if (note && REG_P (XEXP (note, 0))) | |
2688 | remove_note (insn, note); | |
833fc3ad | 2689 | |
833fc3ad JH |
2690 | return success; |
2691 | } | |
c4c81601 RK |
2692 | |
2693 | /* Find a set of REGNOs that are available on entry to INSN's block. Returns | |
2694 | NULL no such set is found. */ | |
7506f491 DE |
2695 | |
2696 | static struct expr * | |
1d088dee | 2697 | find_avail_set (int regno, rtx insn) |
7506f491 | 2698 | { |
cafba495 BS |
2699 | /* SET1 contains the last set found that can be returned to the caller for |
2700 | use in a substitution. */ | |
2701 | struct expr *set1 = 0; | |
589005ff | 2702 | |
cafba495 | 2703 | /* Loops are not possible here. To get a loop we would need two sets |
454ff5cb | 2704 | available at the start of the block containing INSN. i.e. we would |
cafba495 BS |
2705 | need two sets like this available at the start of the block: |
2706 | ||
2707 | (set (reg X) (reg Y)) | |
2708 | (set (reg Y) (reg X)) | |
2709 | ||
2710 | This can not happen since the set of (reg Y) would have killed the | |
2711 | set of (reg X) making it unavailable at the start of this block. */ | |
2712 | while (1) | |
8e42ace1 | 2713 | { |
cafba495 | 2714 | rtx src; |
ceda50e9 | 2715 | struct expr *set = lookup_set (regno, &set_hash_table); |
cafba495 BS |
2716 | |
2717 | /* Find a set that is available at the start of the block | |
2718 | which contains INSN. */ | |
2719 | while (set) | |
2720 | { | |
2721 | if (TEST_BIT (cprop_avin[BLOCK_NUM (insn)], set->bitmap_index)) | |
2722 | break; | |
2723 | set = next_set (regno, set); | |
2724 | } | |
7506f491 | 2725 | |
cafba495 BS |
2726 | /* If no available set was found we've reached the end of the |
2727 | (possibly empty) copy chain. */ | |
2728 | if (set == 0) | |
589005ff | 2729 | break; |
cafba495 | 2730 | |
282899df | 2731 | gcc_assert (GET_CODE (set->expr) == SET); |
cafba495 BS |
2732 | |
2733 | src = SET_SRC (set->expr); | |
2734 | ||
2735 | /* We know the set is available. | |
2736 | Now check that SRC is ANTLOC (i.e. none of the source operands | |
589005ff | 2737 | have changed since the start of the block). |
cafba495 BS |
2738 | |
2739 | If the source operand changed, we may still use it for the next | |
2740 | iteration of this loop, but we may not use it for substitutions. */ | |
c4c81601 | 2741 | |
6b2d1c9e | 2742 | if (gcse_constant_p (src) || oprs_not_set_p (src, insn)) |
cafba495 BS |
2743 | set1 = set; |
2744 | ||
2745 | /* If the source of the set is anything except a register, then | |
2746 | we have reached the end of the copy chain. */ | |
7b1b4aed | 2747 | if (! REG_P (src)) |
7506f491 | 2748 | break; |
7506f491 | 2749 | |
454ff5cb | 2750 | /* Follow the copy chain, i.e. start another iteration of the loop |
cafba495 BS |
2751 | and see if we have an available copy into SRC. */ |
2752 | regno = REGNO (src); | |
8e42ace1 | 2753 | } |
cafba495 BS |
2754 | |
2755 | /* SET1 holds the last set that was available and anticipatable at | |
2756 | INSN. */ | |
2757 | return set1; | |
7506f491 DE |
2758 | } |
2759 | ||
abd535b6 | 2760 | /* Subroutine of cprop_insn that tries to propagate constants into |
0e3f0221 | 2761 | JUMP_INSNS. JUMP must be a conditional jump. If SETCC is non-NULL |
fbe5a4a6 | 2762 | it is the instruction that immediately precedes JUMP, and must be a |
818b6b7f | 2763 | single SET of a register. FROM is what we will try to replace, |
0e3f0221 | 2764 | SRC is the constant we will try to substitute for it. Returns nonzero |
589005ff | 2765 | if a change was made. */ |
c4c81601 | 2766 | |
abd535b6 | 2767 | static int |
1d088dee | 2768 | cprop_jump (basic_block bb, rtx setcc, rtx jump, rtx from, rtx src) |
abd535b6 | 2769 | { |
bc6688b4 | 2770 | rtx new, set_src, note_src; |
0e3f0221 | 2771 | rtx set = pc_set (jump); |
bc6688b4 | 2772 | rtx note = find_reg_equal_equiv_note (jump); |
0e3f0221 | 2773 | |
bc6688b4 RS |
2774 | if (note) |
2775 | { | |
2776 | note_src = XEXP (note, 0); | |
2777 | if (GET_CODE (note_src) == EXPR_LIST) | |
2778 | note_src = NULL_RTX; | |
2779 | } | |
2780 | else note_src = NULL_RTX; | |
2781 | ||
2782 | /* Prefer REG_EQUAL notes except those containing EXPR_LISTs. */ | |
2783 | set_src = note_src ? note_src : SET_SRC (set); | |
2784 | ||
2785 | /* First substitute the SETCC condition into the JUMP instruction, | |
2786 | then substitute that given values into this expanded JUMP. */ | |
2787 | if (setcc != NULL_RTX | |
48ddd46c JH |
2788 | && !modified_between_p (from, setcc, jump) |
2789 | && !modified_between_p (src, setcc, jump)) | |
b2f02503 | 2790 | { |
bc6688b4 | 2791 | rtx setcc_src; |
b2f02503 | 2792 | rtx setcc_set = single_set (setcc); |
bc6688b4 RS |
2793 | rtx setcc_note = find_reg_equal_equiv_note (setcc); |
2794 | setcc_src = (setcc_note && GET_CODE (XEXP (setcc_note, 0)) != EXPR_LIST) | |
2795 | ? XEXP (setcc_note, 0) : SET_SRC (setcc_set); | |
2796 | set_src = simplify_replace_rtx (set_src, SET_DEST (setcc_set), | |
2797 | setcc_src); | |
b2f02503 | 2798 | } |
0e3f0221 | 2799 | else |
bc6688b4 | 2800 | setcc = NULL_RTX; |
0e3f0221 | 2801 | |
bc6688b4 | 2802 | new = simplify_replace_rtx (set_src, from, src); |
abd535b6 | 2803 | |
bc6688b4 RS |
2804 | /* If no simplification can be made, then try the next register. */ |
2805 | if (rtx_equal_p (new, SET_SRC (set))) | |
9e48c409 | 2806 | return 0; |
589005ff | 2807 | |
7d5ab30e | 2808 | /* If this is now a no-op delete it, otherwise this must be a valid insn. */ |
172890a2 | 2809 | if (new == pc_rtx) |
0e3f0221 | 2810 | delete_insn (jump); |
7d5ab30e | 2811 | else |
abd535b6 | 2812 | { |
48ddd46c JH |
2813 | /* Ensure the value computed inside the jump insn to be equivalent |
2814 | to one computed by setcc. */ | |
bc6688b4 | 2815 | if (setcc && modified_in_p (new, setcc)) |
48ddd46c | 2816 | return 0; |
0e3f0221 | 2817 | if (! validate_change (jump, &SET_SRC (set), new, 0)) |
bc6688b4 RS |
2818 | { |
2819 | /* When (some) constants are not valid in a comparison, and there | |
2820 | are two registers to be replaced by constants before the entire | |
2821 | comparison can be folded into a constant, we need to keep | |
2822 | intermediate information in REG_EQUAL notes. For targets with | |
2823 | separate compare insns, such notes are added by try_replace_reg. | |
2824 | When we have a combined compare-and-branch instruction, however, | |
2825 | we need to attach a note to the branch itself to make this | |
2826 | optimization work. */ | |
2827 | ||
2828 | if (!rtx_equal_p (new, note_src)) | |
2829 | set_unique_reg_note (jump, REG_EQUAL, copy_rtx (new)); | |
2830 | return 0; | |
2831 | } | |
2832 | ||
2833 | /* Remove REG_EQUAL note after simplification. */ | |
2834 | if (note_src) | |
2835 | remove_note (jump, note); | |
abd535b6 | 2836 | |
7d5ab30e JH |
2837 | /* If this has turned into an unconditional jump, |
2838 | then put a barrier after it so that the unreachable | |
2839 | code will be deleted. */ | |
2840 | if (GET_CODE (SET_SRC (set)) == LABEL_REF) | |
0e3f0221 | 2841 | emit_barrier_after (jump); |
7d5ab30e | 2842 | } |
abd535b6 | 2843 | |
0e3f0221 RS |
2844 | #ifdef HAVE_cc0 |
2845 | /* Delete the cc0 setter. */ | |
818b6b7f | 2846 | if (setcc != NULL && CC0_P (SET_DEST (single_set (setcc)))) |
0e3f0221 RS |
2847 | delete_insn (setcc); |
2848 | #endif | |
2849 | ||
172890a2 | 2850 | run_jump_opt_after_gcse = 1; |
c4c81601 | 2851 | |
27fb79ad | 2852 | global_const_prop_count++; |
172890a2 RK |
2853 | if (gcse_file != NULL) |
2854 | { | |
2855 | fprintf (gcse_file, | |
27fb79ad | 2856 | "GLOBAL CONST-PROP: Replacing reg %d in jump_insn %d with constant ", |
0e3f0221 | 2857 | REGNO (from), INSN_UID (jump)); |
172890a2 RK |
2858 | print_rtl (gcse_file, src); |
2859 | fprintf (gcse_file, "\n"); | |
abd535b6 | 2860 | } |
0005550b | 2861 | purge_dead_edges (bb); |
172890a2 RK |
2862 | |
2863 | return 1; | |
abd535b6 BS |
2864 | } |
2865 | ||
ae860ff7 | 2866 | static bool |
eb232f4e | 2867 | constprop_register (rtx insn, rtx from, rtx to, bool alter_jumps) |
ae860ff7 JH |
2868 | { |
2869 | rtx sset; | |
2870 | ||
2871 | /* Check for reg or cc0 setting instructions followed by | |
2872 | conditional branch instructions first. */ | |
2873 | if (alter_jumps | |
2874 | && (sset = single_set (insn)) != NULL | |
244d05fb | 2875 | && NEXT_INSN (insn) |
ae860ff7 JH |
2876 | && any_condjump_p (NEXT_INSN (insn)) && onlyjump_p (NEXT_INSN (insn))) |
2877 | { | |
2878 | rtx dest = SET_DEST (sset); | |
2879 | if ((REG_P (dest) || CC0_P (dest)) | |
2880 | && cprop_jump (BLOCK_FOR_INSN (insn), insn, NEXT_INSN (insn), from, to)) | |
2881 | return 1; | |
2882 | } | |
2883 | ||
2884 | /* Handle normal insns next. */ | |
4b4bf941 | 2885 | if (NONJUMP_INSN_P (insn) |
ae860ff7 JH |
2886 | && try_replace_reg (from, to, insn)) |
2887 | return 1; | |
2888 | ||
2889 | /* Try to propagate a CONST_INT into a conditional jump. | |
2890 | We're pretty specific about what we will handle in this | |
2891 | code, we can extend this as necessary over time. | |
2892 | ||
2893 | Right now the insn in question must look like | |
2894 | (set (pc) (if_then_else ...)) */ | |
2895 | else if (alter_jumps && any_condjump_p (insn) && onlyjump_p (insn)) | |
2896 | return cprop_jump (BLOCK_FOR_INSN (insn), NULL, insn, from, to); | |
2897 | return 0; | |
2898 | } | |
2899 | ||
7506f491 | 2900 | /* Perform constant and copy propagation on INSN. |
cc2902df | 2901 | The result is nonzero if a change was made. */ |
7506f491 DE |
2902 | |
2903 | static int | |
1d088dee | 2904 | cprop_insn (rtx insn, int alter_jumps) |
7506f491 DE |
2905 | { |
2906 | struct reg_use *reg_used; | |
2907 | int changed = 0; | |
833fc3ad | 2908 | rtx note; |
7506f491 | 2909 | |
9e71c818 | 2910 | if (!INSN_P (insn)) |
7506f491 DE |
2911 | return 0; |
2912 | ||
2913 | reg_use_count = 0; | |
9e71c818 | 2914 | note_uses (&PATTERN (insn), find_used_regs, NULL); |
589005ff | 2915 | |
172890a2 | 2916 | note = find_reg_equal_equiv_note (insn); |
833fc3ad | 2917 | |
dc297297 | 2918 | /* We may win even when propagating constants into notes. */ |
833fc3ad | 2919 | if (note) |
9e71c818 | 2920 | find_used_regs (&XEXP (note, 0), NULL); |
7506f491 | 2921 | |
c4c81601 RK |
2922 | for (reg_used = ®_use_table[0]; reg_use_count > 0; |
2923 | reg_used++, reg_use_count--) | |
7506f491 | 2924 | { |
770ae6cc | 2925 | unsigned int regno = REGNO (reg_used->reg_rtx); |
7506f491 DE |
2926 | rtx pat, src; |
2927 | struct expr *set; | |
7506f491 DE |
2928 | |
2929 | /* Ignore registers created by GCSE. | |
dc297297 | 2930 | We do this because ... */ |
7506f491 DE |
2931 | if (regno >= max_gcse_regno) |
2932 | continue; | |
2933 | ||
2934 | /* If the register has already been set in this block, there's | |
2935 | nothing we can do. */ | |
2936 | if (! oprs_not_set_p (reg_used->reg_rtx, insn)) | |
2937 | continue; | |
2938 | ||
2939 | /* Find an assignment that sets reg_used and is available | |
2940 | at the start of the block. */ | |
2941 | set = find_avail_set (regno, insn); | |
2942 | if (! set) | |
2943 | continue; | |
589005ff | 2944 | |
7506f491 DE |
2945 | pat = set->expr; |
2946 | /* ??? We might be able to handle PARALLELs. Later. */ | |
282899df | 2947 | gcc_assert (GET_CODE (pat) == SET); |
c4c81601 | 2948 | |
7506f491 DE |
2949 | src = SET_SRC (pat); |
2950 | ||
e78d9500 | 2951 | /* Constant propagation. */ |
6b2d1c9e | 2952 | if (gcse_constant_p (src)) |
7506f491 | 2953 | { |
ae860ff7 | 2954 | if (constprop_register (insn, reg_used->reg_rtx, src, alter_jumps)) |
7506f491 DE |
2955 | { |
2956 | changed = 1; | |
27fb79ad | 2957 | global_const_prop_count++; |
7506f491 DE |
2958 | if (gcse_file != NULL) |
2959 | { | |
ae860ff7 JH |
2960 | fprintf (gcse_file, "GLOBAL CONST-PROP: Replacing reg %d in ", regno); |
2961 | fprintf (gcse_file, "insn %d with constant ", INSN_UID (insn)); | |
e78d9500 | 2962 | print_rtl (gcse_file, src); |
7506f491 DE |
2963 | fprintf (gcse_file, "\n"); |
2964 | } | |
bc6688b4 RS |
2965 | if (INSN_DELETED_P (insn)) |
2966 | return 1; | |
7506f491 DE |
2967 | } |
2968 | } | |
7b1b4aed | 2969 | else if (REG_P (src) |
7506f491 DE |
2970 | && REGNO (src) >= FIRST_PSEUDO_REGISTER |
2971 | && REGNO (src) != regno) | |
2972 | { | |
cafba495 | 2973 | if (try_replace_reg (reg_used->reg_rtx, src, insn)) |
7506f491 | 2974 | { |
cafba495 | 2975 | changed = 1; |
27fb79ad | 2976 | global_copy_prop_count++; |
cafba495 | 2977 | if (gcse_file != NULL) |
7506f491 | 2978 | { |
ae860ff7 | 2979 | fprintf (gcse_file, "GLOBAL COPY-PROP: Replacing reg %d in insn %d", |
c4c81601 RK |
2980 | regno, INSN_UID (insn)); |
2981 | fprintf (gcse_file, " with reg %d\n", REGNO (src)); | |
7506f491 | 2982 | } |
cafba495 BS |
2983 | |
2984 | /* The original insn setting reg_used may or may not now be | |
2985 | deletable. We leave the deletion to flow. */ | |
2986 | /* FIXME: If it turns out that the insn isn't deletable, | |
2987 | then we may have unnecessarily extended register lifetimes | |
2988 | and made things worse. */ | |
7506f491 DE |
2989 | } |
2990 | } | |
2991 | } | |
2992 | ||
2993 | return changed; | |
2994 | } | |
2995 | ||
710ee3ed RH |
2996 | /* Like find_used_regs, but avoid recording uses that appear in |
2997 | input-output contexts such as zero_extract or pre_dec. This | |
2998 | restricts the cases we consider to those for which local cprop | |
2999 | can legitimately make replacements. */ | |
3000 | ||
3001 | static void | |
1d088dee | 3002 | local_cprop_find_used_regs (rtx *xptr, void *data) |
710ee3ed RH |
3003 | { |
3004 | rtx x = *xptr; | |
3005 | ||
3006 | if (x == 0) | |
3007 | return; | |
3008 | ||
3009 | switch (GET_CODE (x)) | |
3010 | { | |
3011 | case ZERO_EXTRACT: | |
3012 | case SIGN_EXTRACT: | |
3013 | case STRICT_LOW_PART: | |
3014 | return; | |
3015 | ||
3016 | case PRE_DEC: | |
3017 | case PRE_INC: | |
3018 | case POST_DEC: | |
3019 | case POST_INC: | |
3020 | case PRE_MODIFY: | |
3021 | case POST_MODIFY: | |
3022 | /* Can only legitimately appear this early in the context of | |
3023 | stack pushes for function arguments, but handle all of the | |
3024 | codes nonetheless. */ | |
3025 | return; | |
3026 | ||
3027 | case SUBREG: | |
3028 | /* Setting a subreg of a register larger than word_mode leaves | |
3029 | the non-written words unchanged. */ | |
3030 | if (GET_MODE_BITSIZE (GET_MODE (SUBREG_REG (x))) > BITS_PER_WORD) | |
3031 | return; | |
3032 | break; | |
3033 | ||
3034 | default: | |
3035 | break; | |
3036 | } | |
3037 | ||
3038 | find_used_regs (xptr, data); | |
3039 | } | |
1d088dee | 3040 | |
8ba46434 R |
3041 | /* LIBCALL_SP is a zero-terminated array of insns at the end of a libcall; |
3042 | their REG_EQUAL notes need updating. */ | |
e197b6fc | 3043 | |
ae860ff7 | 3044 | static bool |
eb232f4e | 3045 | do_local_cprop (rtx x, rtx insn, bool alter_jumps, rtx *libcall_sp) |
ae860ff7 JH |
3046 | { |
3047 | rtx newreg = NULL, newcnst = NULL; | |
3048 | ||
e197b6fc RH |
3049 | /* Rule out USE instructions and ASM statements as we don't want to |
3050 | change the hard registers mentioned. */ | |
7b1b4aed | 3051 | if (REG_P (x) |
ae860ff7 | 3052 | && (REGNO (x) >= FIRST_PSEUDO_REGISTER |
e197b6fc RH |
3053 | || (GET_CODE (PATTERN (insn)) != USE |
3054 | && asm_noperands (PATTERN (insn)) < 0))) | |
ae860ff7 JH |
3055 | { |
3056 | cselib_val *val = cselib_lookup (x, GET_MODE (x), 0); | |
3057 | struct elt_loc_list *l; | |
3058 | ||
3059 | if (!val) | |
3060 | return false; | |
3061 | for (l = val->locs; l; l = l->next) | |
3062 | { | |
3063 | rtx this_rtx = l->loc; | |
46690369 JH |
3064 | rtx note; |
3065 | ||
5976e643 RS |
3066 | /* Don't CSE non-constant values out of libcall blocks. */ |
3067 | if (l->in_libcall && ! CONSTANT_P (this_rtx)) | |
9635cfad JH |
3068 | continue; |
3069 | ||
6b2d1c9e | 3070 | if (gcse_constant_p (this_rtx)) |
ae860ff7 | 3071 | newcnst = this_rtx; |
46690369 JH |
3072 | if (REG_P (this_rtx) && REGNO (this_rtx) >= FIRST_PSEUDO_REGISTER |
3073 | /* Don't copy propagate if it has attached REG_EQUIV note. | |
3074 | At this point this only function parameters should have | |
3075 | REG_EQUIV notes and if the argument slot is used somewhere | |
3076 | explicitly, it means address of parameter has been taken, | |
3077 | so we should not extend the lifetime of the pseudo. */ | |
3078 | && (!(note = find_reg_note (l->setting_insn, REG_EQUIV, NULL_RTX)) | |
7b1b4aed | 3079 | || ! MEM_P (XEXP (note, 0)))) |
ae860ff7 JH |
3080 | newreg = this_rtx; |
3081 | } | |
3082 | if (newcnst && constprop_register (insn, x, newcnst, alter_jumps)) | |
3083 | { | |
8ba46434 | 3084 | /* If we find a case where we can't fix the retval REG_EQUAL notes |
fbe5a4a6 | 3085 | match the new register, we either have to abandon this replacement |
8ba46434 R |
3086 | or fix delete_trivially_dead_insns to preserve the setting insn, |
3087 | or make it delete the REG_EUAQL note, and fix up all passes that | |
3088 | require the REG_EQUAL note there. */ | |
282899df NS |
3089 | bool adjusted; |
3090 | ||
3091 | adjusted = adjust_libcall_notes (x, newcnst, insn, libcall_sp); | |
3092 | gcc_assert (adjusted); | |
3093 | ||
ae860ff7 JH |
3094 | if (gcse_file != NULL) |
3095 | { | |
3096 | fprintf (gcse_file, "LOCAL CONST-PROP: Replacing reg %d in ", | |
3097 | REGNO (x)); | |
3098 | fprintf (gcse_file, "insn %d with constant ", | |
3099 | INSN_UID (insn)); | |
3100 | print_rtl (gcse_file, newcnst); | |
3101 | fprintf (gcse_file, "\n"); | |
3102 | } | |
27fb79ad | 3103 | local_const_prop_count++; |
ae860ff7 JH |
3104 | return true; |
3105 | } | |
3106 | else if (newreg && newreg != x && try_replace_reg (x, newreg, insn)) | |
3107 | { | |
8ba46434 | 3108 | adjust_libcall_notes (x, newreg, insn, libcall_sp); |
ae860ff7 JH |
3109 | if (gcse_file != NULL) |
3110 | { | |
3111 | fprintf (gcse_file, | |
3112 | "LOCAL COPY-PROP: Replacing reg %d in insn %d", | |
3113 | REGNO (x), INSN_UID (insn)); | |
3114 | fprintf (gcse_file, " with reg %d\n", REGNO (newreg)); | |
3115 | } | |
27fb79ad | 3116 | local_copy_prop_count++; |
ae860ff7 JH |
3117 | return true; |
3118 | } | |
3119 | } | |
3120 | return false; | |
3121 | } | |
3122 | ||
8ba46434 R |
3123 | /* LIBCALL_SP is a zero-terminated array of insns at the end of a libcall; |
3124 | their REG_EQUAL notes need updating to reflect that OLDREG has been | |
f4e3e618 RH |
3125 | replaced with NEWVAL in INSN. Return true if all substitutions could |
3126 | be made. */ | |
8ba46434 | 3127 | static bool |
1d088dee | 3128 | adjust_libcall_notes (rtx oldreg, rtx newval, rtx insn, rtx *libcall_sp) |
8ba46434 | 3129 | { |
f4e3e618 | 3130 | rtx end; |
8ba46434 R |
3131 | |
3132 | while ((end = *libcall_sp++)) | |
3133 | { | |
f4e3e618 | 3134 | rtx note = find_reg_equal_equiv_note (end); |
8ba46434 R |
3135 | |
3136 | if (! note) | |
3137 | continue; | |
3138 | ||
3139 | if (REG_P (newval)) | |
3140 | { | |
3141 | if (reg_set_between_p (newval, PREV_INSN (insn), end)) | |
3142 | { | |
3143 | do | |
3144 | { | |
3145 | note = find_reg_equal_equiv_note (end); | |
3146 | if (! note) | |
3147 | continue; | |
3148 | if (reg_mentioned_p (newval, XEXP (note, 0))) | |
3149 | return false; | |
3150 | } | |
3151 | while ((end = *libcall_sp++)); | |
3152 | return true; | |
3153 | } | |
3154 | } | |
5976e643 | 3155 | XEXP (note, 0) = simplify_replace_rtx (XEXP (note, 0), oldreg, newval); |
8ba46434 R |
3156 | insn = end; |
3157 | } | |
3158 | return true; | |
3159 | } | |
3160 | ||
3161 | #define MAX_NESTED_LIBCALLS 9 | |
3162 | ||
eb232f4e SB |
3163 | /* Do local const/copy propagation (i.e. within each basic block). |
3164 | If ALTER_JUMPS is true, allow propagating into jump insns, which | |
3165 | could modify the CFG. */ | |
3166 | ||
ae860ff7 | 3167 | static void |
eb232f4e | 3168 | local_cprop_pass (bool alter_jumps) |
ae860ff7 | 3169 | { |
eb232f4e | 3170 | basic_block bb; |
ae860ff7 JH |
3171 | rtx insn; |
3172 | struct reg_use *reg_used; | |
8ba46434 | 3173 | rtx libcall_stack[MAX_NESTED_LIBCALLS + 1], *libcall_sp; |
1649d92f | 3174 | bool changed = false; |
ae860ff7 | 3175 | |
463301c3 | 3176 | cselib_init (false); |
8ba46434 R |
3177 | libcall_sp = &libcall_stack[MAX_NESTED_LIBCALLS]; |
3178 | *libcall_sp = 0; | |
eb232f4e | 3179 | FOR_EACH_BB (bb) |
ae860ff7 | 3180 | { |
eb232f4e | 3181 | FOR_BB_INSNS (bb, insn) |
ae860ff7 | 3182 | { |
eb232f4e | 3183 | if (INSN_P (insn)) |
ae860ff7 | 3184 | { |
eb232f4e | 3185 | rtx note = find_reg_note (insn, REG_LIBCALL, NULL_RTX); |
ae860ff7 | 3186 | |
eb232f4e SB |
3187 | if (note) |
3188 | { | |
3189 | gcc_assert (libcall_sp != libcall_stack); | |
3190 | *--libcall_sp = XEXP (note, 0); | |
3191 | } | |
3192 | note = find_reg_note (insn, REG_RETVAL, NULL_RTX); | |
3193 | if (note) | |
3194 | libcall_sp++; | |
3195 | note = find_reg_equal_equiv_note (insn); | |
3196 | do | |
3197 | { | |
3198 | reg_use_count = 0; | |
3199 | note_uses (&PATTERN (insn), local_cprop_find_used_regs, | |
3200 | NULL); | |
3201 | if (note) | |
3202 | local_cprop_find_used_regs (&XEXP (note, 0), NULL); | |
3203 | ||
3204 | for (reg_used = ®_use_table[0]; reg_use_count > 0; | |
3205 | reg_used++, reg_use_count--) | |
3206 | if (do_local_cprop (reg_used->reg_rtx, insn, alter_jumps, | |
3207 | libcall_sp)) | |
3208 | { | |
3209 | changed = true; | |
3210 | break; | |
3211 | } | |
3212 | if (INSN_DELETED_P (insn)) | |
1649d92f | 3213 | break; |
eb232f4e SB |
3214 | } |
3215 | while (reg_use_count); | |
ae860ff7 | 3216 | } |
eb232f4e | 3217 | cselib_process_insn (insn); |
ae860ff7 | 3218 | } |
eb232f4e SB |
3219 | |
3220 | /* Forget everything at the end of a basic block. Make sure we are | |
3221 | not inside a libcall, they should never cross basic blocks. */ | |
3222 | cselib_clear_table (); | |
3223 | gcc_assert (libcall_sp == &libcall_stack[MAX_NESTED_LIBCALLS]); | |
ae860ff7 | 3224 | } |
eb232f4e | 3225 | |
ae860ff7 | 3226 | cselib_finish (); |
eb232f4e | 3227 | |
1649d92f JH |
3228 | /* Global analysis may get into infinite loops for unreachable blocks. */ |
3229 | if (changed && alter_jumps) | |
5f0bea72 JH |
3230 | { |
3231 | delete_unreachable_blocks (); | |
3232 | free_reg_set_mem (); | |
3233 | alloc_reg_set_mem (max_reg_num ()); | |
eb232f4e | 3234 | compute_sets (); |
5f0bea72 | 3235 | } |
ae860ff7 JH |
3236 | } |
3237 | ||
c4c81601 | 3238 | /* Forward propagate copies. This includes copies and constants. Return |
cc2902df | 3239 | nonzero if a change was made. */ |
7506f491 DE |
3240 | |
3241 | static int | |
1d088dee | 3242 | cprop (int alter_jumps) |
7506f491 | 3243 | { |
e0082a72 ZD |
3244 | int changed; |
3245 | basic_block bb; | |
7506f491 DE |
3246 | rtx insn; |
3247 | ||
3248 | /* Note we start at block 1. */ | |
e0082a72 ZD |
3249 | if (ENTRY_BLOCK_PTR->next_bb == EXIT_BLOCK_PTR) |
3250 | { | |
3251 | if (gcse_file != NULL) | |
3252 | fprintf (gcse_file, "\n"); | |
3253 | return 0; | |
3254 | } | |
7506f491 DE |
3255 | |
3256 | changed = 0; | |
e0082a72 | 3257 | FOR_BB_BETWEEN (bb, ENTRY_BLOCK_PTR->next_bb->next_bb, EXIT_BLOCK_PTR, next_bb) |
7506f491 DE |
3258 | { |
3259 | /* Reset tables used to keep track of what's still valid [since the | |
3260 | start of the block]. */ | |
3261 | reset_opr_set_tables (); | |
3262 | ||
eb232f4e | 3263 | FOR_BB_INSNS (bb, insn) |
172890a2 RK |
3264 | if (INSN_P (insn)) |
3265 | { | |
ae860ff7 | 3266 | changed |= cprop_insn (insn, alter_jumps); |
7506f491 | 3267 | |
172890a2 RK |
3268 | /* Keep track of everything modified by this insn. */ |
3269 | /* ??? Need to be careful w.r.t. mods done to INSN. Don't | |
3270 | call mark_oprs_set if we turned the insn into a NOTE. */ | |
7b1b4aed | 3271 | if (! NOTE_P (insn)) |
172890a2 | 3272 | mark_oprs_set (insn); |
8e42ace1 | 3273 | } |
7506f491 DE |
3274 | } |
3275 | ||
3276 | if (gcse_file != NULL) | |
3277 | fprintf (gcse_file, "\n"); | |
3278 | ||
3279 | return changed; | |
3280 | } | |
3281 | ||
fbef91d8 RS |
3282 | /* Similar to get_condition, only the resulting condition must be |
3283 | valid at JUMP, instead of at EARLIEST. | |
3284 | ||
3285 | This differs from noce_get_condition in ifcvt.c in that we prefer not to | |
3286 | settle for the condition variable in the jump instruction being integral. | |
3287 | We prefer to be able to record the value of a user variable, rather than | |
3288 | the value of a temporary used in a condition. This could be solved by | |
aabcd309 | 3289 | recording the value of *every* register scanned by canonicalize_condition, |
fbef91d8 RS |
3290 | but this would require some code reorganization. */ |
3291 | ||
2fa4a849 | 3292 | rtx |
1d088dee | 3293 | fis_get_condition (rtx jump) |
fbef91d8 | 3294 | { |
45d09c02 | 3295 | return get_condition (jump, NULL, false, true); |
fbef91d8 RS |
3296 | } |
3297 | ||
b0656d8b JW |
3298 | /* Check the comparison COND to see if we can safely form an implicit set from |
3299 | it. COND is either an EQ or NE comparison. */ | |
3300 | ||
3301 | static bool | |
3302 | implicit_set_cond_p (rtx cond) | |
3303 | { | |
3304 | enum machine_mode mode = GET_MODE (XEXP (cond, 0)); | |
3305 | rtx cst = XEXP (cond, 1); | |
3306 | ||
3307 | /* We can't perform this optimization if either operand might be or might | |
3308 | contain a signed zero. */ | |
3309 | if (HONOR_SIGNED_ZEROS (mode)) | |
3310 | { | |
3311 | /* It is sufficient to check if CST is or contains a zero. We must | |
3312 | handle float, complex, and vector. If any subpart is a zero, then | |
3313 | the optimization can't be performed. */ | |
3314 | /* ??? The complex and vector checks are not implemented yet. We just | |
3315 | always return zero for them. */ | |
3316 | if (GET_CODE (cst) == CONST_DOUBLE) | |
3317 | { | |
3318 | REAL_VALUE_TYPE d; | |
3319 | REAL_VALUE_FROM_CONST_DOUBLE (d, cst); | |
3320 | if (REAL_VALUES_EQUAL (d, dconst0)) | |
3321 | return 0; | |
3322 | } | |
3323 | else | |
3324 | return 0; | |
3325 | } | |
3326 | ||
3327 | return gcse_constant_p (cst); | |
3328 | } | |
3329 | ||
fbef91d8 RS |
3330 | /* Find the implicit sets of a function. An "implicit set" is a constraint |
3331 | on the value of a variable, implied by a conditional jump. For example, | |
3332 | following "if (x == 2)", the then branch may be optimized as though the | |
3333 | conditional performed an "explicit set", in this example, "x = 2". This | |
3334 | function records the set patterns that are implicit at the start of each | |
3335 | basic block. */ | |
3336 | ||
3337 | static void | |
1d088dee | 3338 | find_implicit_sets (void) |
fbef91d8 RS |
3339 | { |
3340 | basic_block bb, dest; | |
3341 | unsigned int count; | |
3342 | rtx cond, new; | |
3343 | ||
3344 | count = 0; | |
3345 | FOR_EACH_BB (bb) | |
a98ebe2e | 3346 | /* Check for more than one successor. */ |
628f6a4e | 3347 | if (EDGE_COUNT (bb->succs) > 1) |
fbef91d8 | 3348 | { |
a813c111 | 3349 | cond = fis_get_condition (BB_END (bb)); |
fbef91d8 RS |
3350 | |
3351 | if (cond | |
3352 | && (GET_CODE (cond) == EQ || GET_CODE (cond) == NE) | |
7b1b4aed | 3353 | && REG_P (XEXP (cond, 0)) |
fbef91d8 | 3354 | && REGNO (XEXP (cond, 0)) >= FIRST_PSEUDO_REGISTER |
b0656d8b | 3355 | && implicit_set_cond_p (cond)) |
fbef91d8 RS |
3356 | { |
3357 | dest = GET_CODE (cond) == EQ ? BRANCH_EDGE (bb)->dest | |
3358 | : FALLTHRU_EDGE (bb)->dest; | |
3359 | ||
c5cbcccf | 3360 | if (dest && single_pred_p (dest) |
fbef91d8 RS |
3361 | && dest != EXIT_BLOCK_PTR) |
3362 | { | |
3363 | new = gen_rtx_SET (VOIDmode, XEXP (cond, 0), | |
3364 | XEXP (cond, 1)); | |
3365 | implicit_sets[dest->index] = new; | |
3366 | if (gcse_file) | |
3367 | { | |
3368 | fprintf(gcse_file, "Implicit set of reg %d in ", | |
3369 | REGNO (XEXP (cond, 0))); | |
3370 | fprintf(gcse_file, "basic block %d\n", dest->index); | |
3371 | } | |
3372 | count++; | |
3373 | } | |
3374 | } | |
3375 | } | |
3376 | ||
3377 | if (gcse_file) | |
3378 | fprintf (gcse_file, "Found %d implicit sets\n", count); | |
3379 | } | |
3380 | ||
7506f491 | 3381 | /* Perform one copy/constant propagation pass. |
a0134312 RS |
3382 | PASS is the pass count. If CPROP_JUMPS is true, perform constant |
3383 | propagation into conditional jumps. If BYPASS_JUMPS is true, | |
3384 | perform conditional jump bypassing optimizations. */ | |
7506f491 DE |
3385 | |
3386 | static int | |
eb232f4e | 3387 | one_cprop_pass (int pass, bool cprop_jumps, bool bypass_jumps) |
7506f491 DE |
3388 | { |
3389 | int changed = 0; | |
3390 | ||
27fb79ad SB |
3391 | global_const_prop_count = local_const_prop_count = 0; |
3392 | global_copy_prop_count = local_copy_prop_count = 0; | |
7506f491 | 3393 | |
a0134312 | 3394 | local_cprop_pass (cprop_jumps); |
ae860ff7 | 3395 | |
fbef91d8 | 3396 | /* Determine implicit sets. */ |
703ad42b | 3397 | implicit_sets = xcalloc (last_basic_block, sizeof (rtx)); |
fbef91d8 RS |
3398 | find_implicit_sets (); |
3399 | ||
02280659 ZD |
3400 | alloc_hash_table (max_cuid, &set_hash_table, 1); |
3401 | compute_hash_table (&set_hash_table); | |
fbef91d8 RS |
3402 | |
3403 | /* Free implicit_sets before peak usage. */ | |
3404 | free (implicit_sets); | |
3405 | implicit_sets = NULL; | |
3406 | ||
7506f491 | 3407 | if (gcse_file) |
02280659 ZD |
3408 | dump_hash_table (gcse_file, "SET", &set_hash_table); |
3409 | if (set_hash_table.n_elems > 0) | |
7506f491 | 3410 | { |
02280659 | 3411 | alloc_cprop_mem (last_basic_block, set_hash_table.n_elems); |
7506f491 | 3412 | compute_cprop_data (); |
a0134312 RS |
3413 | changed = cprop (cprop_jumps); |
3414 | if (bypass_jumps) | |
0e3f0221 | 3415 | changed |= bypass_conditional_jumps (); |
7506f491 DE |
3416 | free_cprop_mem (); |
3417 | } | |
c4c81601 | 3418 | |
02280659 | 3419 | free_hash_table (&set_hash_table); |
7506f491 DE |
3420 | |
3421 | if (gcse_file) | |
3422 | { | |
c4c81601 | 3423 | fprintf (gcse_file, "CPROP of %s, pass %d: %d bytes needed, ", |
faed5cc3 | 3424 | current_function_name (), pass, bytes_used); |
29d51cdb | 3425 | fprintf (gcse_file, "%d local const props, %d local copy props, ", |
27fb79ad SB |
3426 | local_const_prop_count, local_copy_prop_count); |
3427 | fprintf (gcse_file, "%d global const props, %d global copy props\n\n", | |
3428 | global_const_prop_count, global_copy_prop_count); | |
7506f491 | 3429 | } |
1649d92f JH |
3430 | /* Global analysis may get into infinite loops for unreachable blocks. */ |
3431 | if (changed && cprop_jumps) | |
3432 | delete_unreachable_blocks (); | |
7506f491 DE |
3433 | |
3434 | return changed; | |
3435 | } | |
3436 | \f | |
0e3f0221 RS |
3437 | /* Bypass conditional jumps. */ |
3438 | ||
7821bfc7 RS |
3439 | /* The value of last_basic_block at the beginning of the jump_bypass |
3440 | pass. The use of redirect_edge_and_branch_force may introduce new | |
3441 | basic blocks, but the data flow analysis is only valid for basic | |
3442 | block indices less than bypass_last_basic_block. */ | |
3443 | ||
3444 | static int bypass_last_basic_block; | |
3445 | ||
0e3f0221 RS |
3446 | /* Find a set of REGNO to a constant that is available at the end of basic |
3447 | block BB. Returns NULL if no such set is found. Based heavily upon | |
3448 | find_avail_set. */ | |
3449 | ||
3450 | static struct expr * | |
1d088dee | 3451 | find_bypass_set (int regno, int bb) |
0e3f0221 RS |
3452 | { |
3453 | struct expr *result = 0; | |
3454 | ||
3455 | for (;;) | |
3456 | { | |
3457 | rtx src; | |
ceda50e9 | 3458 | struct expr *set = lookup_set (regno, &set_hash_table); |
0e3f0221 RS |
3459 | |
3460 | while (set) | |
3461 | { | |
3462 | if (TEST_BIT (cprop_avout[bb], set->bitmap_index)) | |
3463 | break; | |
3464 | set = next_set (regno, set); | |
3465 | } | |
3466 | ||
3467 | if (set == 0) | |
3468 | break; | |
3469 | ||
282899df | 3470 | gcc_assert (GET_CODE (set->expr) == SET); |
0e3f0221 RS |
3471 | |
3472 | src = SET_SRC (set->expr); | |
6b2d1c9e | 3473 | if (gcse_constant_p (src)) |
0e3f0221 RS |
3474 | result = set; |
3475 | ||
7b1b4aed | 3476 | if (! REG_P (src)) |
0e3f0221 RS |
3477 | break; |
3478 | ||
3479 | regno = REGNO (src); | |
3480 | } | |
3481 | return result; | |
3482 | } | |
3483 | ||
3484 | ||
e129b3f9 RS |
3485 | /* Subroutine of bypass_block that checks whether a pseudo is killed by |
3486 | any of the instructions inserted on an edge. Jump bypassing places | |
3487 | condition code setters on CFG edges using insert_insn_on_edge. This | |
3488 | function is required to check that our data flow analysis is still | |
3489 | valid prior to commit_edge_insertions. */ | |
3490 | ||
3491 | static bool | |
1d088dee | 3492 | reg_killed_on_edge (rtx reg, edge e) |
e129b3f9 RS |
3493 | { |
3494 | rtx insn; | |
3495 | ||
6de9cd9a | 3496 | for (insn = e->insns.r; insn; insn = NEXT_INSN (insn)) |
e129b3f9 RS |
3497 | if (INSN_P (insn) && reg_set_p (reg, insn)) |
3498 | return true; | |
3499 | ||
3500 | return false; | |
3501 | } | |
3502 | ||
0e3f0221 RS |
3503 | /* Subroutine of bypass_conditional_jumps that attempts to bypass the given |
3504 | basic block BB which has more than one predecessor. If not NULL, SETCC | |
3505 | is the first instruction of BB, which is immediately followed by JUMP_INSN | |
3506 | JUMP. Otherwise, SETCC is NULL, and JUMP is the first insn of BB. | |
e129b3f9 RS |
3507 | Returns nonzero if a change was made. |
3508 | ||
e0bb17a8 | 3509 | During the jump bypassing pass, we may place copies of SETCC instructions |
e129b3f9 RS |
3510 | on CFG edges. The following routine must be careful to pay attention to |
3511 | these inserted insns when performing its transformations. */ | |
0e3f0221 RS |
3512 | |
3513 | static int | |
1d088dee | 3514 | bypass_block (basic_block bb, rtx setcc, rtx jump) |
0e3f0221 RS |
3515 | { |
3516 | rtx insn, note; | |
628f6a4e | 3517 | edge e, edest; |
818b6b7f | 3518 | int i, change; |
72b8d451 | 3519 | int may_be_loop_header; |
628f6a4e BE |
3520 | unsigned removed_p; |
3521 | edge_iterator ei; | |
0e3f0221 RS |
3522 | |
3523 | insn = (setcc != NULL) ? setcc : jump; | |
3524 | ||
3525 | /* Determine set of register uses in INSN. */ | |
3526 | reg_use_count = 0; | |
3527 | note_uses (&PATTERN (insn), find_used_regs, NULL); | |
3528 | note = find_reg_equal_equiv_note (insn); | |
3529 | if (note) | |
3530 | find_used_regs (&XEXP (note, 0), NULL); | |
3531 | ||
72b8d451 | 3532 | may_be_loop_header = false; |
628f6a4e | 3533 | FOR_EACH_EDGE (e, ei, bb->preds) |
72b8d451 ZD |
3534 | if (e->flags & EDGE_DFS_BACK) |
3535 | { | |
3536 | may_be_loop_header = true; | |
3537 | break; | |
3538 | } | |
3539 | ||
0e3f0221 | 3540 | change = 0; |
628f6a4e | 3541 | for (ei = ei_start (bb->preds); (e = ei_safe_edge (ei)); ) |
0e3f0221 | 3542 | { |
628f6a4e BE |
3543 | removed_p = 0; |
3544 | ||
7821bfc7 | 3545 | if (e->flags & EDGE_COMPLEX) |
628f6a4e BE |
3546 | { |
3547 | ei_next (&ei); | |
3548 | continue; | |
3549 | } | |
7821bfc7 RS |
3550 | |
3551 | /* We can't redirect edges from new basic blocks. */ | |
3552 | if (e->src->index >= bypass_last_basic_block) | |
628f6a4e BE |
3553 | { |
3554 | ei_next (&ei); | |
3555 | continue; | |
3556 | } | |
7821bfc7 | 3557 | |
72b8d451 | 3558 | /* The irreducible loops created by redirecting of edges entering the |
e0bb17a8 KH |
3559 | loop from outside would decrease effectiveness of some of the following |
3560 | optimizations, so prevent this. */ | |
72b8d451 ZD |
3561 | if (may_be_loop_header |
3562 | && !(e->flags & EDGE_DFS_BACK)) | |
628f6a4e BE |
3563 | { |
3564 | ei_next (&ei); | |
3565 | continue; | |
3566 | } | |
72b8d451 | 3567 | |
0e3f0221 RS |
3568 | for (i = 0; i < reg_use_count; i++) |
3569 | { | |
3570 | struct reg_use *reg_used = ®_use_table[i]; | |
589005ff | 3571 | unsigned int regno = REGNO (reg_used->reg_rtx); |
818b6b7f | 3572 | basic_block dest, old_dest; |
589005ff KH |
3573 | struct expr *set; |
3574 | rtx src, new; | |
0e3f0221 | 3575 | |
589005ff KH |
3576 | if (regno >= max_gcse_regno) |
3577 | continue; | |
0e3f0221 | 3578 | |
589005ff | 3579 | set = find_bypass_set (regno, e->src->index); |
0e3f0221 RS |
3580 | |
3581 | if (! set) | |
3582 | continue; | |
3583 | ||
e129b3f9 | 3584 | /* Check the data flow is valid after edge insertions. */ |
6de9cd9a | 3585 | if (e->insns.r && reg_killed_on_edge (reg_used->reg_rtx, e)) |
e129b3f9 RS |
3586 | continue; |
3587 | ||
589005ff | 3588 | src = SET_SRC (pc_set (jump)); |
0e3f0221 RS |
3589 | |
3590 | if (setcc != NULL) | |
3591 | src = simplify_replace_rtx (src, | |
589005ff KH |
3592 | SET_DEST (PATTERN (setcc)), |
3593 | SET_SRC (PATTERN (setcc))); | |
0e3f0221 RS |
3594 | |
3595 | new = simplify_replace_rtx (src, reg_used->reg_rtx, | |
589005ff | 3596 | SET_SRC (set->expr)); |
0e3f0221 | 3597 | |
1d088dee | 3598 | /* Jump bypassing may have already placed instructions on |
e129b3f9 RS |
3599 | edges of the CFG. We can't bypass an outgoing edge that |
3600 | has instructions associated with it, as these insns won't | |
3601 | get executed if the incoming edge is redirected. */ | |
3602 | ||
589005ff | 3603 | if (new == pc_rtx) |
e129b3f9 RS |
3604 | { |
3605 | edest = FALLTHRU_EDGE (bb); | |
6de9cd9a | 3606 | dest = edest->insns.r ? NULL : edest->dest; |
e129b3f9 | 3607 | } |
0e3f0221 | 3608 | else if (GET_CODE (new) == LABEL_REF) |
e129b3f9 RS |
3609 | { |
3610 | dest = BLOCK_FOR_INSN (XEXP (new, 0)); | |
3611 | /* Don't bypass edges containing instructions. */ | |
c7d1b449 KH |
3612 | edest = find_edge (bb, dest); |
3613 | if (edest && edest->insns.r) | |
3614 | dest = NULL; | |
e129b3f9 | 3615 | } |
0e3f0221 RS |
3616 | else |
3617 | dest = NULL; | |
3618 | ||
a544524a JH |
3619 | /* Avoid unification of the edge with other edges from original |
3620 | branch. We would end up emitting the instruction on "both" | |
3621 | edges. */ | |
7b1b4aed | 3622 | |
c7d1b449 KH |
3623 | if (dest && setcc && !CC0_P (SET_DEST (PATTERN (setcc))) |
3624 | && find_edge (e->src, dest)) | |
3625 | dest = NULL; | |
a544524a | 3626 | |
818b6b7f | 3627 | old_dest = e->dest; |
7821bfc7 RS |
3628 | if (dest != NULL |
3629 | && dest != old_dest | |
3630 | && dest != EXIT_BLOCK_PTR) | |
3631 | { | |
3632 | redirect_edge_and_branch_force (e, dest); | |
3633 | ||
818b6b7f | 3634 | /* Copy the register setter to the redirected edge. |
0e3f0221 RS |
3635 | Don't copy CC0 setters, as CC0 is dead after jump. */ |
3636 | if (setcc) | |
3637 | { | |
3638 | rtx pat = PATTERN (setcc); | |
818b6b7f | 3639 | if (!CC0_P (SET_DEST (pat))) |
0e3f0221 RS |
3640 | insert_insn_on_edge (copy_insn (pat), e); |
3641 | } | |
3642 | ||
3643 | if (gcse_file != NULL) | |
3644 | { | |
27fb79ad SB |
3645 | fprintf (gcse_file, "JUMP-BYPASS: Proved reg %d " |
3646 | "in jump_insn %d equals constant ", | |
818b6b7f | 3647 | regno, INSN_UID (jump)); |
0e3f0221 RS |
3648 | print_rtl (gcse_file, SET_SRC (set->expr)); |
3649 | fprintf (gcse_file, "\nBypass edge from %d->%d to %d\n", | |
818b6b7f | 3650 | e->src->index, old_dest->index, dest->index); |
0e3f0221 RS |
3651 | } |
3652 | change = 1; | |
628f6a4e | 3653 | removed_p = 1; |
0e3f0221 RS |
3654 | break; |
3655 | } | |
3656 | } | |
628f6a4e BE |
3657 | if (!removed_p) |
3658 | ei_next (&ei); | |
0e3f0221 RS |
3659 | } |
3660 | return change; | |
3661 | } | |
3662 | ||
3663 | /* Find basic blocks with more than one predecessor that only contain a | |
3664 | single conditional jump. If the result of the comparison is known at | |
3665 | compile-time from any incoming edge, redirect that edge to the | |
9a71ece1 RH |
3666 | appropriate target. Returns nonzero if a change was made. |
3667 | ||
3668 | This function is now mis-named, because we also handle indirect jumps. */ | |
0e3f0221 RS |
3669 | |
3670 | static int | |
1d088dee | 3671 | bypass_conditional_jumps (void) |
0e3f0221 RS |
3672 | { |
3673 | basic_block bb; | |
3674 | int changed; | |
3675 | rtx setcc; | |
3676 | rtx insn; | |
3677 | rtx dest; | |
3678 | ||
3679 | /* Note we start at block 1. */ | |
3680 | if (ENTRY_BLOCK_PTR->next_bb == EXIT_BLOCK_PTR) | |
3681 | return 0; | |
3682 | ||
7821bfc7 | 3683 | bypass_last_basic_block = last_basic_block; |
72b8d451 | 3684 | mark_dfs_back_edges (); |
7821bfc7 | 3685 | |
0e3f0221 RS |
3686 | changed = 0; |
3687 | FOR_BB_BETWEEN (bb, ENTRY_BLOCK_PTR->next_bb->next_bb, | |
589005ff | 3688 | EXIT_BLOCK_PTR, next_bb) |
0e3f0221 RS |
3689 | { |
3690 | /* Check for more than one predecessor. */ | |
c5cbcccf | 3691 | if (!single_pred_p (bb)) |
0e3f0221 RS |
3692 | { |
3693 | setcc = NULL_RTX; | |
eb232f4e | 3694 | FOR_BB_INSNS (bb, insn) |
4b4bf941 | 3695 | if (NONJUMP_INSN_P (insn)) |
0e3f0221 | 3696 | { |
9543a9d2 | 3697 | if (setcc) |
0e3f0221 | 3698 | break; |
ba4f7968 | 3699 | if (GET_CODE (PATTERN (insn)) != SET) |
0e3f0221 RS |
3700 | break; |
3701 | ||
ba4f7968 | 3702 | dest = SET_DEST (PATTERN (insn)); |
818b6b7f | 3703 | if (REG_P (dest) || CC0_P (dest)) |
0e3f0221 | 3704 | setcc = insn; |
0e3f0221 RS |
3705 | else |
3706 | break; | |
3707 | } | |
7b1b4aed | 3708 | else if (JUMP_P (insn)) |
0e3f0221 | 3709 | { |
9a71ece1 RH |
3710 | if ((any_condjump_p (insn) || computed_jump_p (insn)) |
3711 | && onlyjump_p (insn)) | |
0e3f0221 RS |
3712 | changed |= bypass_block (bb, setcc, insn); |
3713 | break; | |
3714 | } | |
3715 | else if (INSN_P (insn)) | |
3716 | break; | |
3717 | } | |
3718 | } | |
3719 | ||
818b6b7f | 3720 | /* If we bypassed any register setting insns, we inserted a |
fbe5a4a6 | 3721 | copy on the redirected edge. These need to be committed. */ |
0e3f0221 RS |
3722 | if (changed) |
3723 | commit_edge_insertions(); | |
3724 | ||
3725 | return changed; | |
3726 | } | |
3727 | \f | |
a65f3558 | 3728 | /* Compute PRE+LCM working variables. */ |
7506f491 DE |
3729 | |
3730 | /* Local properties of expressions. */ | |
3731 | /* Nonzero for expressions that are transparent in the block. */ | |
a65f3558 | 3732 | static sbitmap *transp; |
7506f491 | 3733 | |
5c35539b RH |
3734 | /* Nonzero for expressions that are transparent at the end of the block. |
3735 | This is only zero for expressions killed by abnormal critical edge | |
3736 | created by a calls. */ | |
a65f3558 | 3737 | static sbitmap *transpout; |
5c35539b | 3738 | |
a65f3558 JL |
3739 | /* Nonzero for expressions that are computed (available) in the block. */ |
3740 | static sbitmap *comp; | |
7506f491 | 3741 | |
a65f3558 JL |
3742 | /* Nonzero for expressions that are locally anticipatable in the block. */ |
3743 | static sbitmap *antloc; | |
7506f491 | 3744 | |
a65f3558 JL |
3745 | /* Nonzero for expressions where this block is an optimal computation |
3746 | point. */ | |
3747 | static sbitmap *pre_optimal; | |
5c35539b | 3748 | |
a65f3558 JL |
3749 | /* Nonzero for expressions which are redundant in a particular block. */ |
3750 | static sbitmap *pre_redundant; | |
7506f491 | 3751 | |
a42cd965 AM |
3752 | /* Nonzero for expressions which should be inserted on a specific edge. */ |
3753 | static sbitmap *pre_insert_map; | |
3754 | ||
3755 | /* Nonzero for expressions which should be deleted in a specific block. */ | |
3756 | static sbitmap *pre_delete_map; | |
3757 | ||
3758 | /* Contains the edge_list returned by pre_edge_lcm. */ | |
3759 | static struct edge_list *edge_list; | |
3760 | ||
a65f3558 JL |
3761 | /* Redundant insns. */ |
3762 | static sbitmap pre_redundant_insns; | |
7506f491 | 3763 | |
a65f3558 | 3764 | /* Allocate vars used for PRE analysis. */ |
7506f491 DE |
3765 | |
3766 | static void | |
1d088dee | 3767 | alloc_pre_mem (int n_blocks, int n_exprs) |
7506f491 | 3768 | { |
a65f3558 JL |
3769 | transp = sbitmap_vector_alloc (n_blocks, n_exprs); |
3770 | comp = sbitmap_vector_alloc (n_blocks, n_exprs); | |
3771 | antloc = sbitmap_vector_alloc (n_blocks, n_exprs); | |
5faf03ae | 3772 | |
a42cd965 AM |
3773 | pre_optimal = NULL; |
3774 | pre_redundant = NULL; | |
3775 | pre_insert_map = NULL; | |
3776 | pre_delete_map = NULL; | |
a42cd965 | 3777 | ae_kill = sbitmap_vector_alloc (n_blocks, n_exprs); |
c4c81601 | 3778 | |
a42cd965 | 3779 | /* pre_insert and pre_delete are allocated later. */ |
7506f491 DE |
3780 | } |
3781 | ||
a65f3558 | 3782 | /* Free vars used for PRE analysis. */ |
7506f491 DE |
3783 | |
3784 | static void | |
1d088dee | 3785 | free_pre_mem (void) |
7506f491 | 3786 | { |
5a660bff DB |
3787 | sbitmap_vector_free (transp); |
3788 | sbitmap_vector_free (comp); | |
bd3675fc JL |
3789 | |
3790 | /* ANTLOC and AE_KILL are freed just after pre_lcm finishes. */ | |
7506f491 | 3791 | |
a42cd965 | 3792 | if (pre_optimal) |
5a660bff | 3793 | sbitmap_vector_free (pre_optimal); |
a42cd965 | 3794 | if (pre_redundant) |
5a660bff | 3795 | sbitmap_vector_free (pre_redundant); |
a42cd965 | 3796 | if (pre_insert_map) |
5a660bff | 3797 | sbitmap_vector_free (pre_insert_map); |
a42cd965 | 3798 | if (pre_delete_map) |
5a660bff | 3799 | sbitmap_vector_free (pre_delete_map); |
a42cd965 | 3800 | |
bd3675fc | 3801 | transp = comp = NULL; |
a42cd965 | 3802 | pre_optimal = pre_redundant = pre_insert_map = pre_delete_map = NULL; |
7506f491 DE |
3803 | } |
3804 | ||
3805 | /* Top level routine to do the dataflow analysis needed by PRE. */ | |
3806 | ||
3807 | static void | |
1d088dee | 3808 | compute_pre_data (void) |
7506f491 | 3809 | { |
b614171e | 3810 | sbitmap trapping_expr; |
e0082a72 | 3811 | basic_block bb; |
b614171e | 3812 | unsigned int ui; |
c66e8ae9 | 3813 | |
02280659 | 3814 | compute_local_properties (transp, comp, antloc, &expr_hash_table); |
d55bc081 | 3815 | sbitmap_vector_zero (ae_kill, last_basic_block); |
c66e8ae9 | 3816 | |
b614171e | 3817 | /* Collect expressions which might trap. */ |
02280659 | 3818 | trapping_expr = sbitmap_alloc (expr_hash_table.n_elems); |
b614171e | 3819 | sbitmap_zero (trapping_expr); |
02280659 | 3820 | for (ui = 0; ui < expr_hash_table.size; ui++) |
b614171e MM |
3821 | { |
3822 | struct expr *e; | |
02280659 | 3823 | for (e = expr_hash_table.table[ui]; e != NULL; e = e->next_same_hash) |
b614171e MM |
3824 | if (may_trap_p (e->expr)) |
3825 | SET_BIT (trapping_expr, e->bitmap_index); | |
3826 | } | |
3827 | ||
c66e8ae9 JL |
3828 | /* Compute ae_kill for each basic block using: |
3829 | ||
3830 | ~(TRANSP | COMP) | |
e83f4801 | 3831 | */ |
c66e8ae9 | 3832 | |
e0082a72 | 3833 | FOR_EACH_BB (bb) |
c66e8ae9 | 3834 | { |
b614171e | 3835 | edge e; |
628f6a4e | 3836 | edge_iterator ei; |
b614171e MM |
3837 | |
3838 | /* If the current block is the destination of an abnormal edge, we | |
3839 | kill all trapping expressions because we won't be able to properly | |
3840 | place the instruction on the edge. So make them neither | |
3841 | anticipatable nor transparent. This is fairly conservative. */ | |
628f6a4e | 3842 | FOR_EACH_EDGE (e, ei, bb->preds) |
b614171e MM |
3843 | if (e->flags & EDGE_ABNORMAL) |
3844 | { | |
e0082a72 ZD |
3845 | sbitmap_difference (antloc[bb->index], antloc[bb->index], trapping_expr); |
3846 | sbitmap_difference (transp[bb->index], transp[bb->index], trapping_expr); | |
b614171e MM |
3847 | break; |
3848 | } | |
3849 | ||
e0082a72 ZD |
3850 | sbitmap_a_or_b (ae_kill[bb->index], transp[bb->index], comp[bb->index]); |
3851 | sbitmap_not (ae_kill[bb->index], ae_kill[bb->index]); | |
c66e8ae9 JL |
3852 | } |
3853 | ||
02280659 | 3854 | edge_list = pre_edge_lcm (gcse_file, expr_hash_table.n_elems, transp, comp, antloc, |
a42cd965 | 3855 | ae_kill, &pre_insert_map, &pre_delete_map); |
5a660bff | 3856 | sbitmap_vector_free (antloc); |
bd3675fc | 3857 | antloc = NULL; |
5a660bff | 3858 | sbitmap_vector_free (ae_kill); |
589005ff | 3859 | ae_kill = NULL; |
76ac938b | 3860 | sbitmap_free (trapping_expr); |
7506f491 DE |
3861 | } |
3862 | \f | |
3863 | /* PRE utilities */ | |
3864 | ||
cc2902df | 3865 | /* Return nonzero if an occurrence of expression EXPR in OCCR_BB would reach |
a65f3558 | 3866 | block BB. |
7506f491 DE |
3867 | |
3868 | VISITED is a pointer to a working buffer for tracking which BB's have | |
3869 | been visited. It is NULL for the top-level call. | |
3870 | ||
3871 | We treat reaching expressions that go through blocks containing the same | |
3872 | reaching expression as "not reaching". E.g. if EXPR is generated in blocks | |
3873 | 2 and 3, INSN is in block 4, and 2->3->4, we treat the expression in block | |
3874 | 2 as not reaching. The intent is to improve the probability of finding | |
3875 | only one reaching expression and to reduce register lifetimes by picking | |
3876 | the closest such expression. */ | |
3877 | ||
3878 | static int | |
1d088dee | 3879 | pre_expr_reaches_here_p_work (basic_block occr_bb, struct expr *expr, basic_block bb, char *visited) |
7506f491 | 3880 | { |
36349f8b | 3881 | edge pred; |
628f6a4e BE |
3882 | edge_iterator ei; |
3883 | ||
3884 | FOR_EACH_EDGE (pred, ei, bb->preds) | |
7506f491 | 3885 | { |
e2d2ed72 | 3886 | basic_block pred_bb = pred->src; |
7506f491 | 3887 | |
36349f8b | 3888 | if (pred->src == ENTRY_BLOCK_PTR |
7506f491 | 3889 | /* Has predecessor has already been visited? */ |
0b17ab2f | 3890 | || visited[pred_bb->index]) |
c4c81601 RK |
3891 | ;/* Nothing to do. */ |
3892 | ||
7506f491 | 3893 | /* Does this predecessor generate this expression? */ |
0b17ab2f | 3894 | else if (TEST_BIT (comp[pred_bb->index], expr->bitmap_index)) |
7506f491 DE |
3895 | { |
3896 | /* Is this the occurrence we're looking for? | |
3897 | Note that there's only one generating occurrence per block | |
3898 | so we just need to check the block number. */ | |
a65f3558 | 3899 | if (occr_bb == pred_bb) |
7506f491 | 3900 | return 1; |
c4c81601 | 3901 | |
0b17ab2f | 3902 | visited[pred_bb->index] = 1; |
7506f491 DE |
3903 | } |
3904 | /* Ignore this predecessor if it kills the expression. */ | |
0b17ab2f RH |
3905 | else if (! TEST_BIT (transp[pred_bb->index], expr->bitmap_index)) |
3906 | visited[pred_bb->index] = 1; | |
c4c81601 | 3907 | |
7506f491 DE |
3908 | /* Neither gen nor kill. */ |
3909 | else | |
ac7c5af5 | 3910 | { |
0b17ab2f | 3911 | visited[pred_bb->index] = 1; |
89e606c9 | 3912 | if (pre_expr_reaches_here_p_work (occr_bb, expr, pred_bb, visited)) |
7506f491 | 3913 | return 1; |
ac7c5af5 | 3914 | } |
7506f491 DE |
3915 | } |
3916 | ||
3917 | /* All paths have been checked. */ | |
3918 | return 0; | |
3919 | } | |
283a2545 RL |
3920 | |
3921 | /* The wrapper for pre_expr_reaches_here_work that ensures that any | |
dc297297 | 3922 | memory allocated for that function is returned. */ |
283a2545 RL |
3923 | |
3924 | static int | |
1d088dee | 3925 | pre_expr_reaches_here_p (basic_block occr_bb, struct expr *expr, basic_block bb) |
283a2545 RL |
3926 | { |
3927 | int rval; | |
703ad42b | 3928 | char *visited = xcalloc (last_basic_block, 1); |
283a2545 | 3929 | |
8e42ace1 | 3930 | rval = pre_expr_reaches_here_p_work (occr_bb, expr, bb, visited); |
283a2545 RL |
3931 | |
3932 | free (visited); | |
c4c81601 | 3933 | return rval; |
283a2545 | 3934 | } |
7506f491 | 3935 | \f |
a42cd965 AM |
3936 | |
3937 | /* Given an expr, generate RTL which we can insert at the end of a BB, | |
589005ff | 3938 | or on an edge. Set the block number of any insns generated to |
a42cd965 AM |
3939 | the value of BB. */ |
3940 | ||
3941 | static rtx | |
1d088dee | 3942 | process_insert_insn (struct expr *expr) |
a42cd965 AM |
3943 | { |
3944 | rtx reg = expr->reaching_reg; | |
fb0c0a12 RK |
3945 | rtx exp = copy_rtx (expr->expr); |
3946 | rtx pat; | |
a42cd965 AM |
3947 | |
3948 | start_sequence (); | |
fb0c0a12 RK |
3949 | |
3950 | /* If the expression is something that's an operand, like a constant, | |
3951 | just copy it to a register. */ | |
3952 | if (general_operand (exp, GET_MODE (reg))) | |
3953 | emit_move_insn (reg, exp); | |
3954 | ||
3955 | /* Otherwise, make a new insn to compute this expression and make sure the | |
3956 | insn will be recognized (this also adds any needed CLOBBERs). Copy the | |
3957 | expression to make sure we don't have any sharing issues. */ | |
282899df NS |
3958 | else |
3959 | { | |
3960 | rtx insn = emit_insn (gen_rtx_SET (VOIDmode, reg, exp)); | |
3961 | ||
2f021b67 AP |
3962 | if (insn_invalid_p (insn)) |
3963 | gcc_unreachable (); | |
282899df NS |
3964 | } |
3965 | ||
589005ff | 3966 | |
2f937369 | 3967 | pat = get_insns (); |
a42cd965 AM |
3968 | end_sequence (); |
3969 | ||
3970 | return pat; | |
3971 | } | |
589005ff | 3972 | |
a65f3558 JL |
3973 | /* Add EXPR to the end of basic block BB. |
3974 | ||
3975 | This is used by both the PRE and code hoisting. | |
3976 | ||
3977 | For PRE, we want to verify that the expr is either transparent | |
3978 | or locally anticipatable in the target block. This check makes | |
3979 | no sense for code hoisting. */ | |
7506f491 DE |
3980 | |
3981 | static void | |
1d088dee | 3982 | insert_insn_end_bb (struct expr *expr, basic_block bb, int pre) |
7506f491 | 3983 | { |
a813c111 | 3984 | rtx insn = BB_END (bb); |
7506f491 DE |
3985 | rtx new_insn; |
3986 | rtx reg = expr->reaching_reg; | |
3987 | int regno = REGNO (reg); | |
2f937369 | 3988 | rtx pat, pat_end; |
7506f491 | 3989 | |
a42cd965 | 3990 | pat = process_insert_insn (expr); |
282899df | 3991 | gcc_assert (pat && INSN_P (pat)); |
2f937369 DM |
3992 | |
3993 | pat_end = pat; | |
3994 | while (NEXT_INSN (pat_end) != NULL_RTX) | |
3995 | pat_end = NEXT_INSN (pat_end); | |
7506f491 DE |
3996 | |
3997 | /* If the last insn is a jump, insert EXPR in front [taking care to | |
4d6922ee | 3998 | handle cc0, etc. properly]. Similarly we need to care trapping |
068473ec | 3999 | instructions in presence of non-call exceptions. */ |
7506f491 | 4000 | |
7b1b4aed | 4001 | if (JUMP_P (insn) |
4b4bf941 | 4002 | || (NONJUMP_INSN_P (insn) |
c5cbcccf ZD |
4003 | && (!single_succ_p (bb) |
4004 | || single_succ_edge (bb)->flags & EDGE_ABNORMAL))) | |
7506f491 | 4005 | { |
50b2596f | 4006 | #ifdef HAVE_cc0 |
7506f491 | 4007 | rtx note; |
50b2596f | 4008 | #endif |
068473ec JH |
4009 | /* It should always be the case that we can put these instructions |
4010 | anywhere in the basic block with performing PRE optimizations. | |
4011 | Check this. */ | |
282899df NS |
4012 | gcc_assert (!NONJUMP_INSN_P (insn) || !pre |
4013 | || TEST_BIT (antloc[bb->index], expr->bitmap_index) | |
4014 | || TEST_BIT (transp[bb->index], expr->bitmap_index)); | |
7506f491 DE |
4015 | |
4016 | /* If this is a jump table, then we can't insert stuff here. Since | |
4017 | we know the previous real insn must be the tablejump, we insert | |
4018 | the new instruction just before the tablejump. */ | |
4019 | if (GET_CODE (PATTERN (insn)) == ADDR_VEC | |
4020 | || GET_CODE (PATTERN (insn)) == ADDR_DIFF_VEC) | |
4021 | insn = prev_real_insn (insn); | |
4022 | ||
4023 | #ifdef HAVE_cc0 | |
4024 | /* FIXME: 'twould be nice to call prev_cc0_setter here but it aborts | |
4025 | if cc0 isn't set. */ | |
4026 | note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX); | |
4027 | if (note) | |
4028 | insn = XEXP (note, 0); | |
4029 | else | |
4030 | { | |
4031 | rtx maybe_cc0_setter = prev_nonnote_insn (insn); | |
4032 | if (maybe_cc0_setter | |
2c3c49de | 4033 | && INSN_P (maybe_cc0_setter) |
7506f491 DE |
4034 | && sets_cc0_p (PATTERN (maybe_cc0_setter))) |
4035 | insn = maybe_cc0_setter; | |
4036 | } | |
4037 | #endif | |
4038 | /* FIXME: What if something in cc0/jump uses value set in new insn? */ | |
a7102479 | 4039 | new_insn = emit_insn_before_noloc (pat, insn); |
3947e2f9 | 4040 | } |
c4c81601 | 4041 | |
3947e2f9 RH |
4042 | /* Likewise if the last insn is a call, as will happen in the presence |
4043 | of exception handling. */ | |
7b1b4aed | 4044 | else if (CALL_P (insn) |
c5cbcccf ZD |
4045 | && (!single_succ_p (bb) |
4046 | || single_succ_edge (bb)->flags & EDGE_ABNORMAL)) | |
3947e2f9 | 4047 | { |
3947e2f9 RH |
4048 | /* Keeping in mind SMALL_REGISTER_CLASSES and parameters in registers, |
4049 | we search backward and place the instructions before the first | |
4050 | parameter is loaded. Do this for everyone for consistency and a | |
fbe5a4a6 | 4051 | presumption that we'll get better code elsewhere as well. |
3947e2f9 | 4052 | |
c4c81601 | 4053 | It should always be the case that we can put these instructions |
a65f3558 JL |
4054 | anywhere in the basic block with performing PRE optimizations. |
4055 | Check this. */ | |
c4c81601 | 4056 | |
282899df NS |
4057 | gcc_assert (!pre |
4058 | || TEST_BIT (antloc[bb->index], expr->bitmap_index) | |
4059 | || TEST_BIT (transp[bb->index], expr->bitmap_index)); | |
3947e2f9 RH |
4060 | |
4061 | /* Since different machines initialize their parameter registers | |
4062 | in different orders, assume nothing. Collect the set of all | |
4063 | parameter registers. */ | |
a813c111 | 4064 | insn = find_first_parameter_load (insn, BB_HEAD (bb)); |
3947e2f9 | 4065 | |
b1d26727 JL |
4066 | /* If we found all the parameter loads, then we want to insert |
4067 | before the first parameter load. | |
4068 | ||
4069 | If we did not find all the parameter loads, then we might have | |
4070 | stopped on the head of the block, which could be a CODE_LABEL. | |
4071 | If we inserted before the CODE_LABEL, then we would be putting | |
4072 | the insn in the wrong basic block. In that case, put the insn | |
b5229628 | 4073 | after the CODE_LABEL. Also, respect NOTE_INSN_BASIC_BLOCK. */ |
7b1b4aed | 4074 | while (LABEL_P (insn) |
589ca5cb | 4075 | || NOTE_INSN_BASIC_BLOCK_P (insn)) |
b5229628 | 4076 | insn = NEXT_INSN (insn); |
c4c81601 | 4077 | |
a7102479 | 4078 | new_insn = emit_insn_before_noloc (pat, insn); |
7506f491 DE |
4079 | } |
4080 | else | |
a7102479 | 4081 | new_insn = emit_insn_after_noloc (pat, insn); |
7506f491 | 4082 | |
2f937369 | 4083 | while (1) |
a65f3558 | 4084 | { |
2f937369 | 4085 | if (INSN_P (pat)) |
a65f3558 | 4086 | { |
2f937369 DM |
4087 | add_label_notes (PATTERN (pat), new_insn); |
4088 | note_stores (PATTERN (pat), record_set_info, pat); | |
a65f3558 | 4089 | } |
2f937369 DM |
4090 | if (pat == pat_end) |
4091 | break; | |
4092 | pat = NEXT_INSN (pat); | |
a65f3558 | 4093 | } |
3947e2f9 | 4094 | |
7506f491 DE |
4095 | gcse_create_count++; |
4096 | ||
4097 | if (gcse_file) | |
4098 | { | |
c4c81601 | 4099 | fprintf (gcse_file, "PRE/HOIST: end of bb %d, insn %d, ", |
0b17ab2f | 4100 | bb->index, INSN_UID (new_insn)); |
c4c81601 RK |
4101 | fprintf (gcse_file, "copying expression %d to reg %d\n", |
4102 | expr->bitmap_index, regno); | |
7506f491 DE |
4103 | } |
4104 | } | |
4105 | ||
a42cd965 AM |
4106 | /* Insert partially redundant expressions on edges in the CFG to make |
4107 | the expressions fully redundant. */ | |
7506f491 | 4108 | |
a42cd965 | 4109 | static int |
1d088dee | 4110 | pre_edge_insert (struct edge_list *edge_list, struct expr **index_map) |
7506f491 | 4111 | { |
c4c81601 | 4112 | int e, i, j, num_edges, set_size, did_insert = 0; |
a65f3558 JL |
4113 | sbitmap *inserted; |
4114 | ||
a42cd965 AM |
4115 | /* Where PRE_INSERT_MAP is nonzero, we add the expression on that edge |
4116 | if it reaches any of the deleted expressions. */ | |
7506f491 | 4117 | |
a42cd965 AM |
4118 | set_size = pre_insert_map[0]->size; |
4119 | num_edges = NUM_EDGES (edge_list); | |
02280659 | 4120 | inserted = sbitmap_vector_alloc (num_edges, expr_hash_table.n_elems); |
a42cd965 | 4121 | sbitmap_vector_zero (inserted, num_edges); |
7506f491 | 4122 | |
a42cd965 | 4123 | for (e = 0; e < num_edges; e++) |
7506f491 DE |
4124 | { |
4125 | int indx; | |
e2d2ed72 | 4126 | basic_block bb = INDEX_EDGE_PRED_BB (edge_list, e); |
a65f3558 | 4127 | |
a65f3558 | 4128 | for (i = indx = 0; i < set_size; i++, indx += SBITMAP_ELT_BITS) |
7506f491 | 4129 | { |
a42cd965 | 4130 | SBITMAP_ELT_TYPE insert = pre_insert_map[e]->elms[i]; |
7506f491 | 4131 | |
02280659 | 4132 | for (j = indx; insert && j < (int) expr_hash_table.n_elems; j++, insert >>= 1) |
c4c81601 RK |
4133 | if ((insert & 1) != 0 && index_map[j]->reaching_reg != NULL_RTX) |
4134 | { | |
4135 | struct expr *expr = index_map[j]; | |
4136 | struct occr *occr; | |
a65f3558 | 4137 | |
ff7cc307 | 4138 | /* Now look at each deleted occurrence of this expression. */ |
c4c81601 RK |
4139 | for (occr = expr->antic_occr; occr != NULL; occr = occr->next) |
4140 | { | |
4141 | if (! occr->deleted_p) | |
4142 | continue; | |
4143 | ||
3f117656 | 4144 | /* Insert this expression on this edge if it would |
ff7cc307 | 4145 | reach the deleted occurrence in BB. */ |
c4c81601 RK |
4146 | if (!TEST_BIT (inserted[e], j)) |
4147 | { | |
4148 | rtx insn; | |
4149 | edge eg = INDEX_EDGE (edge_list, e); | |
4150 | ||
4151 | /* We can't insert anything on an abnormal and | |
4152 | critical edge, so we insert the insn at the end of | |
4153 | the previous block. There are several alternatives | |
4154 | detailed in Morgans book P277 (sec 10.5) for | |
4155 | handling this situation. This one is easiest for | |
4156 | now. */ | |
4157 | ||
b16aa8a5 | 4158 | if (eg->flags & EDGE_ABNORMAL) |
c4c81601 RK |
4159 | insert_insn_end_bb (index_map[j], bb, 0); |
4160 | else | |
4161 | { | |
4162 | insn = process_insert_insn (index_map[j]); | |
4163 | insert_insn_on_edge (insn, eg); | |
4164 | } | |
4165 | ||
4166 | if (gcse_file) | |
4167 | { | |
4168 | fprintf (gcse_file, "PRE/HOIST: edge (%d,%d), ", | |
0b17ab2f RH |
4169 | bb->index, |
4170 | INDEX_EDGE_SUCC_BB (edge_list, e)->index); | |
c4c81601 RK |
4171 | fprintf (gcse_file, "copy expression %d\n", |
4172 | expr->bitmap_index); | |
4173 | } | |
4174 | ||
a13d4ebf | 4175 | update_ld_motion_stores (expr); |
c4c81601 RK |
4176 | SET_BIT (inserted[e], j); |
4177 | did_insert = 1; | |
4178 | gcse_create_count++; | |
4179 | } | |
4180 | } | |
4181 | } | |
7506f491 DE |
4182 | } |
4183 | } | |
5faf03ae | 4184 | |
5a660bff | 4185 | sbitmap_vector_free (inserted); |
a42cd965 | 4186 | return did_insert; |
7506f491 DE |
4187 | } |
4188 | ||
073089a7 | 4189 | /* Copy the result of EXPR->EXPR generated by INSN to EXPR->REACHING_REG. |
b885908b MH |
4190 | Given "old_reg <- expr" (INSN), instead of adding after it |
4191 | reaching_reg <- old_reg | |
4192 | it's better to do the following: | |
4193 | reaching_reg <- expr | |
4194 | old_reg <- reaching_reg | |
4195 | because this way copy propagation can discover additional PRE | |
f5f2e3cd MH |
4196 | opportunities. But if this fails, we try the old way. |
4197 | When "expr" is a store, i.e. | |
4198 | given "MEM <- old_reg", instead of adding after it | |
4199 | reaching_reg <- old_reg | |
4200 | it's better to add it before as follows: | |
4201 | reaching_reg <- old_reg | |
4202 | MEM <- reaching_reg. */ | |
7506f491 DE |
4203 | |
4204 | static void | |
1d088dee | 4205 | pre_insert_copy_insn (struct expr *expr, rtx insn) |
7506f491 DE |
4206 | { |
4207 | rtx reg = expr->reaching_reg; | |
4208 | int regno = REGNO (reg); | |
4209 | int indx = expr->bitmap_index; | |
073089a7 RS |
4210 | rtx pat = PATTERN (insn); |
4211 | rtx set, new_insn; | |
b885908b | 4212 | rtx old_reg; |
073089a7 | 4213 | int i; |
7506f491 | 4214 | |
073089a7 | 4215 | /* This block matches the logic in hash_scan_insn. */ |
282899df | 4216 | switch (GET_CODE (pat)) |
073089a7 | 4217 | { |
282899df NS |
4218 | case SET: |
4219 | set = pat; | |
4220 | break; | |
4221 | ||
4222 | case PARALLEL: | |
073089a7 RS |
4223 | /* Search through the parallel looking for the set whose |
4224 | source was the expression that we're interested in. */ | |
4225 | set = NULL_RTX; | |
4226 | for (i = 0; i < XVECLEN (pat, 0); i++) | |
4227 | { | |
4228 | rtx x = XVECEXP (pat, 0, i); | |
4229 | if (GET_CODE (x) == SET | |
4230 | && expr_equiv_p (SET_SRC (x), expr->expr)) | |
4231 | { | |
4232 | set = x; | |
4233 | break; | |
4234 | } | |
4235 | } | |
282899df NS |
4236 | break; |
4237 | ||
4238 | default: | |
4239 | gcc_unreachable (); | |
073089a7 | 4240 | } |
c4c81601 | 4241 | |
7b1b4aed | 4242 | if (REG_P (SET_DEST (set))) |
073089a7 | 4243 | { |
f5f2e3cd MH |
4244 | old_reg = SET_DEST (set); |
4245 | /* Check if we can modify the set destination in the original insn. */ | |
4246 | if (validate_change (insn, &SET_DEST (set), reg, 0)) | |
4247 | { | |
4248 | new_insn = gen_move_insn (old_reg, reg); | |
4249 | new_insn = emit_insn_after (new_insn, insn); | |
4250 | ||
4251 | /* Keep register set table up to date. */ | |
f5f2e3cd MH |
4252 | record_one_set (regno, insn); |
4253 | } | |
4254 | else | |
4255 | { | |
4256 | new_insn = gen_move_insn (reg, old_reg); | |
4257 | new_insn = emit_insn_after (new_insn, insn); | |
073089a7 | 4258 | |
f5f2e3cd MH |
4259 | /* Keep register set table up to date. */ |
4260 | record_one_set (regno, new_insn); | |
4261 | } | |
073089a7 | 4262 | } |
f5f2e3cd | 4263 | else /* This is possible only in case of a store to memory. */ |
073089a7 | 4264 | { |
f5f2e3cd | 4265 | old_reg = SET_SRC (set); |
073089a7 | 4266 | new_insn = gen_move_insn (reg, old_reg); |
f5f2e3cd MH |
4267 | |
4268 | /* Check if we can modify the set source in the original insn. */ | |
4269 | if (validate_change (insn, &SET_SRC (set), reg, 0)) | |
4270 | new_insn = emit_insn_before (new_insn, insn); | |
4271 | else | |
4272 | new_insn = emit_insn_after (new_insn, insn); | |
c4c81601 | 4273 | |
073089a7 RS |
4274 | /* Keep register set table up to date. */ |
4275 | record_one_set (regno, new_insn); | |
4276 | } | |
7506f491 DE |
4277 | |
4278 | gcse_create_count++; | |
4279 | ||
4280 | if (gcse_file) | |
a42cd965 AM |
4281 | fprintf (gcse_file, |
4282 | "PRE: bb %d, insn %d, copy expression %d in insn %d to reg %d\n", | |
4283 | BLOCK_NUM (insn), INSN_UID (new_insn), indx, | |
4284 | INSN_UID (insn), regno); | |
7506f491 DE |
4285 | } |
4286 | ||
4287 | /* Copy available expressions that reach the redundant expression | |
4288 | to `reaching_reg'. */ | |
4289 | ||
4290 | static void | |
1d088dee | 4291 | pre_insert_copies (void) |
7506f491 | 4292 | { |
f5f2e3cd | 4293 | unsigned int i, added_copy; |
c4c81601 RK |
4294 | struct expr *expr; |
4295 | struct occr *occr; | |
4296 | struct occr *avail; | |
a65f3558 | 4297 | |
7506f491 DE |
4298 | /* For each available expression in the table, copy the result to |
4299 | `reaching_reg' if the expression reaches a deleted one. | |
4300 | ||
4301 | ??? The current algorithm is rather brute force. | |
4302 | Need to do some profiling. */ | |
4303 | ||
02280659 ZD |
4304 | for (i = 0; i < expr_hash_table.size; i++) |
4305 | for (expr = expr_hash_table.table[i]; expr != NULL; expr = expr->next_same_hash) | |
c4c81601 RK |
4306 | { |
4307 | /* If the basic block isn't reachable, PPOUT will be TRUE. However, | |
4308 | we don't want to insert a copy here because the expression may not | |
4309 | really be redundant. So only insert an insn if the expression was | |
4310 | deleted. This test also avoids further processing if the | |
4311 | expression wasn't deleted anywhere. */ | |
4312 | if (expr->reaching_reg == NULL) | |
4313 | continue; | |
7b1b4aed | 4314 | |
f5f2e3cd | 4315 | /* Set when we add a copy for that expression. */ |
7b1b4aed | 4316 | added_copy = 0; |
c4c81601 RK |
4317 | |
4318 | for (occr = expr->antic_occr; occr != NULL; occr = occr->next) | |
4319 | { | |
4320 | if (! occr->deleted_p) | |
4321 | continue; | |
7506f491 | 4322 | |
c4c81601 RK |
4323 | for (avail = expr->avail_occr; avail != NULL; avail = avail->next) |
4324 | { | |
4325 | rtx insn = avail->insn; | |
7506f491 | 4326 | |
c4c81601 RK |
4327 | /* No need to handle this one if handled already. */ |
4328 | if (avail->copied_p) | |
4329 | continue; | |
7506f491 | 4330 | |
c4c81601 RK |
4331 | /* Don't handle this one if it's a redundant one. */ |
4332 | if (TEST_BIT (pre_redundant_insns, INSN_CUID (insn))) | |
4333 | continue; | |
7506f491 | 4334 | |
c4c81601 | 4335 | /* Or if the expression doesn't reach the deleted one. */ |
589005ff | 4336 | if (! pre_expr_reaches_here_p (BLOCK_FOR_INSN (avail->insn), |
e2d2ed72 AM |
4337 | expr, |
4338 | BLOCK_FOR_INSN (occr->insn))) | |
c4c81601 | 4339 | continue; |
7506f491 | 4340 | |
f5f2e3cd MH |
4341 | added_copy = 1; |
4342 | ||
c4c81601 RK |
4343 | /* Copy the result of avail to reaching_reg. */ |
4344 | pre_insert_copy_insn (expr, insn); | |
4345 | avail->copied_p = 1; | |
4346 | } | |
4347 | } | |
f5f2e3cd | 4348 | |
7b1b4aed | 4349 | if (added_copy) |
f5f2e3cd | 4350 | update_ld_motion_stores (expr); |
c4c81601 | 4351 | } |
7506f491 DE |
4352 | } |
4353 | ||
10d1bb36 JH |
4354 | /* Emit move from SRC to DEST noting the equivalence with expression computed |
4355 | in INSN. */ | |
4356 | static rtx | |
1d088dee | 4357 | gcse_emit_move_after (rtx src, rtx dest, rtx insn) |
10d1bb36 JH |
4358 | { |
4359 | rtx new; | |
6bdb8dd6 | 4360 | rtx set = single_set (insn), set2; |
10d1bb36 JH |
4361 | rtx note; |
4362 | rtx eqv; | |
4363 | ||
4364 | /* This should never fail since we're creating a reg->reg copy | |
4365 | we've verified to be valid. */ | |
4366 | ||
6bdb8dd6 | 4367 | new = emit_insn_after (gen_move_insn (dest, src), insn); |
285464d0 | 4368 | |
10d1bb36 | 4369 | /* Note the equivalence for local CSE pass. */ |
6bdb8dd6 JH |
4370 | set2 = single_set (new); |
4371 | if (!set2 || !rtx_equal_p (SET_DEST (set2), dest)) | |
4372 | return new; | |
10d1bb36 JH |
4373 | if ((note = find_reg_equal_equiv_note (insn))) |
4374 | eqv = XEXP (note, 0); | |
4375 | else | |
4376 | eqv = SET_SRC (set); | |
4377 | ||
a500466b | 4378 | set_unique_reg_note (new, REG_EQUAL, copy_insn_1 (eqv)); |
10d1bb36 JH |
4379 | |
4380 | return new; | |
4381 | } | |
4382 | ||
7506f491 | 4383 | /* Delete redundant computations. |
7506f491 DE |
4384 | Deletion is done by changing the insn to copy the `reaching_reg' of |
4385 | the expression into the result of the SET. It is left to later passes | |
4386 | (cprop, cse2, flow, combine, regmove) to propagate the copy or eliminate it. | |
4387 | ||
cc2902df | 4388 | Returns nonzero if a change is made. */ |
7506f491 DE |
4389 | |
4390 | static int | |
1d088dee | 4391 | pre_delete (void) |
7506f491 | 4392 | { |
2e653e39 | 4393 | unsigned int i; |
63bc1d05 | 4394 | int changed; |
c4c81601 RK |
4395 | struct expr *expr; |
4396 | struct occr *occr; | |
a65f3558 | 4397 | |
7506f491 | 4398 | changed = 0; |
02280659 | 4399 | for (i = 0; i < expr_hash_table.size; i++) |
073089a7 RS |
4400 | for (expr = expr_hash_table.table[i]; |
4401 | expr != NULL; | |
4402 | expr = expr->next_same_hash) | |
c4c81601 RK |
4403 | { |
4404 | int indx = expr->bitmap_index; | |
7506f491 | 4405 | |
c4c81601 RK |
4406 | /* We only need to search antic_occr since we require |
4407 | ANTLOC != 0. */ | |
7506f491 | 4408 | |
c4c81601 RK |
4409 | for (occr = expr->antic_occr; occr != NULL; occr = occr->next) |
4410 | { | |
4411 | rtx insn = occr->insn; | |
4412 | rtx set; | |
e2d2ed72 | 4413 | basic_block bb = BLOCK_FOR_INSN (insn); |
7506f491 | 4414 | |
073089a7 RS |
4415 | /* We only delete insns that have a single_set. */ |
4416 | if (TEST_BIT (pre_delete_map[bb->index], indx) | |
4417 | && (set = single_set (insn)) != 0) | |
c4c81601 | 4418 | { |
c4c81601 RK |
4419 | /* Create a pseudo-reg to store the result of reaching |
4420 | expressions into. Get the mode for the new pseudo from | |
4421 | the mode of the original destination pseudo. */ | |
4422 | if (expr->reaching_reg == NULL) | |
4423 | expr->reaching_reg | |
4424 | = gen_reg_rtx (GET_MODE (SET_DEST (set))); | |
4425 | ||
9b76aa3b | 4426 | gcse_emit_move_after (expr->reaching_reg, SET_DEST (set), insn); |
10d1bb36 JH |
4427 | delete_insn (insn); |
4428 | occr->deleted_p = 1; | |
4429 | SET_BIT (pre_redundant_insns, INSN_CUID (insn)); | |
4430 | changed = 1; | |
4431 | gcse_subst_count++; | |
7506f491 | 4432 | |
c4c81601 RK |
4433 | if (gcse_file) |
4434 | { | |
4435 | fprintf (gcse_file, | |
4436 | "PRE: redundant insn %d (expression %d) in ", | |
4437 | INSN_UID (insn), indx); | |
4438 | fprintf (gcse_file, "bb %d, reaching reg is %d\n", | |
0b17ab2f | 4439 | bb->index, REGNO (expr->reaching_reg)); |
c4c81601 RK |
4440 | } |
4441 | } | |
4442 | } | |
4443 | } | |
7506f491 DE |
4444 | |
4445 | return changed; | |
4446 | } | |
4447 | ||
4448 | /* Perform GCSE optimizations using PRE. | |
4449 | This is called by one_pre_gcse_pass after all the dataflow analysis | |
4450 | has been done. | |
4451 | ||
c4c81601 RK |
4452 | This is based on the original Morel-Renvoise paper Fred Chow's thesis, and |
4453 | lazy code motion from Knoop, Ruthing and Steffen as described in Advanced | |
4454 | Compiler Design and Implementation. | |
7506f491 | 4455 | |
c4c81601 RK |
4456 | ??? A new pseudo reg is created to hold the reaching expression. The nice |
4457 | thing about the classical approach is that it would try to use an existing | |
4458 | reg. If the register can't be adequately optimized [i.e. we introduce | |
4459 | reload problems], one could add a pass here to propagate the new register | |
4460 | through the block. | |
7506f491 | 4461 | |
c4c81601 RK |
4462 | ??? We don't handle single sets in PARALLELs because we're [currently] not |
4463 | able to copy the rest of the parallel when we insert copies to create full | |
4464 | redundancies from partial redundancies. However, there's no reason why we | |
4465 | can't handle PARALLELs in the cases where there are no partial | |
7506f491 DE |
4466 | redundancies. */ |
4467 | ||
4468 | static int | |
1d088dee | 4469 | pre_gcse (void) |
7506f491 | 4470 | { |
2e653e39 RK |
4471 | unsigned int i; |
4472 | int did_insert, changed; | |
7506f491 | 4473 | struct expr **index_map; |
c4c81601 | 4474 | struct expr *expr; |
7506f491 DE |
4475 | |
4476 | /* Compute a mapping from expression number (`bitmap_index') to | |
4477 | hash table entry. */ | |
4478 | ||
703ad42b | 4479 | index_map = xcalloc (expr_hash_table.n_elems, sizeof (struct expr *)); |
02280659 ZD |
4480 | for (i = 0; i < expr_hash_table.size; i++) |
4481 | for (expr = expr_hash_table.table[i]; expr != NULL; expr = expr->next_same_hash) | |
c4c81601 | 4482 | index_map[expr->bitmap_index] = expr; |
7506f491 DE |
4483 | |
4484 | /* Reset bitmap used to track which insns are redundant. */ | |
a65f3558 JL |
4485 | pre_redundant_insns = sbitmap_alloc (max_cuid); |
4486 | sbitmap_zero (pre_redundant_insns); | |
7506f491 DE |
4487 | |
4488 | /* Delete the redundant insns first so that | |
4489 | - we know what register to use for the new insns and for the other | |
4490 | ones with reaching expressions | |
4491 | - we know which insns are redundant when we go to create copies */ | |
c4c81601 | 4492 | |
7506f491 DE |
4493 | changed = pre_delete (); |
4494 | ||
a42cd965 | 4495 | did_insert = pre_edge_insert (edge_list, index_map); |
c4c81601 | 4496 | |
7506f491 | 4497 | /* In other places with reaching expressions, copy the expression to the |
a42cd965 | 4498 | specially allocated pseudo-reg that reaches the redundant expr. */ |
7506f491 | 4499 | pre_insert_copies (); |
a42cd965 AM |
4500 | if (did_insert) |
4501 | { | |
4502 | commit_edge_insertions (); | |
4503 | changed = 1; | |
4504 | } | |
7506f491 | 4505 | |
283a2545 | 4506 | free (index_map); |
76ac938b | 4507 | sbitmap_free (pre_redundant_insns); |
7506f491 DE |
4508 | return changed; |
4509 | } | |
4510 | ||
4511 | /* Top level routine to perform one PRE GCSE pass. | |
4512 | ||
cc2902df | 4513 | Return nonzero if a change was made. */ |
7506f491 DE |
4514 | |
4515 | static int | |
1d088dee | 4516 | one_pre_gcse_pass (int pass) |
7506f491 DE |
4517 | { |
4518 | int changed = 0; | |
4519 | ||
4520 | gcse_subst_count = 0; | |
4521 | gcse_create_count = 0; | |
4522 | ||
02280659 | 4523 | alloc_hash_table (max_cuid, &expr_hash_table, 0); |
a42cd965 | 4524 | add_noreturn_fake_exit_edges (); |
a13d4ebf AM |
4525 | if (flag_gcse_lm) |
4526 | compute_ld_motion_mems (); | |
4527 | ||
02280659 | 4528 | compute_hash_table (&expr_hash_table); |
a13d4ebf | 4529 | trim_ld_motion_mems (); |
7506f491 | 4530 | if (gcse_file) |
02280659 | 4531 | dump_hash_table (gcse_file, "Expression", &expr_hash_table); |
c4c81601 | 4532 | |
02280659 | 4533 | if (expr_hash_table.n_elems > 0) |
7506f491 | 4534 | { |
02280659 | 4535 | alloc_pre_mem (last_basic_block, expr_hash_table.n_elems); |
7506f491 DE |
4536 | compute_pre_data (); |
4537 | changed |= pre_gcse (); | |
a42cd965 | 4538 | free_edge_list (edge_list); |
7506f491 DE |
4539 | free_pre_mem (); |
4540 | } | |
c4c81601 | 4541 | |
a13d4ebf | 4542 | free_ldst_mems (); |
6809cbf9 | 4543 | remove_fake_exit_edges (); |
02280659 | 4544 | free_hash_table (&expr_hash_table); |
7506f491 DE |
4545 | |
4546 | if (gcse_file) | |
4547 | { | |
c4c81601 | 4548 | fprintf (gcse_file, "\nPRE GCSE of %s, pass %d: %d bytes needed, ", |
faed5cc3 | 4549 | current_function_name (), pass, bytes_used); |
c4c81601 RK |
4550 | fprintf (gcse_file, "%d substs, %d insns created\n", |
4551 | gcse_subst_count, gcse_create_count); | |
7506f491 DE |
4552 | } |
4553 | ||
4554 | return changed; | |
4555 | } | |
aeb2f500 JW |
4556 | \f |
4557 | /* If X contains any LABEL_REF's, add REG_LABEL notes for them to INSN. | |
5b1ef594 JDA |
4558 | If notes are added to an insn which references a CODE_LABEL, the |
4559 | LABEL_NUSES count is incremented. We have to add REG_LABEL notes, | |
4560 | because the following loop optimization pass requires them. */ | |
aeb2f500 JW |
4561 | |
4562 | /* ??? This is very similar to the loop.c add_label_notes function. We | |
4563 | could probably share code here. */ | |
4564 | ||
4565 | /* ??? If there was a jump optimization pass after gcse and before loop, | |
4566 | then we would not need to do this here, because jump would add the | |
4567 | necessary REG_LABEL notes. */ | |
4568 | ||
4569 | static void | |
1d088dee | 4570 | add_label_notes (rtx x, rtx insn) |
aeb2f500 JW |
4571 | { |
4572 | enum rtx_code code = GET_CODE (x); | |
4573 | int i, j; | |
6f7d635c | 4574 | const char *fmt; |
aeb2f500 JW |
4575 | |
4576 | if (code == LABEL_REF && !LABEL_REF_NONLOCAL_P (x)) | |
4577 | { | |
6b3603c2 | 4578 | /* This code used to ignore labels that referred to dispatch tables to |
e0bb17a8 | 4579 | avoid flow generating (slightly) worse code. |
6b3603c2 | 4580 | |
ac7c5af5 JL |
4581 | We no longer ignore such label references (see LABEL_REF handling in |
4582 | mark_jump_label for additional information). */ | |
c4c81601 | 4583 | |
6b8c9327 | 4584 | REG_NOTES (insn) = gen_rtx_INSN_LIST (REG_LABEL, XEXP (x, 0), |
6b3603c2 | 4585 | REG_NOTES (insn)); |
5b1ef594 | 4586 | if (LABEL_P (XEXP (x, 0))) |
589005ff | 4587 | LABEL_NUSES (XEXP (x, 0))++; |
aeb2f500 JW |
4588 | return; |
4589 | } | |
4590 | ||
c4c81601 | 4591 | for (i = GET_RTX_LENGTH (code) - 1, fmt = GET_RTX_FORMAT (code); i >= 0; i--) |
aeb2f500 JW |
4592 | { |
4593 | if (fmt[i] == 'e') | |
4594 | add_label_notes (XEXP (x, i), insn); | |
4595 | else if (fmt[i] == 'E') | |
4596 | for (j = XVECLEN (x, i) - 1; j >= 0; j--) | |
4597 | add_label_notes (XVECEXP (x, i, j), insn); | |
4598 | } | |
4599 | } | |
a65f3558 JL |
4600 | |
4601 | /* Compute transparent outgoing information for each block. | |
4602 | ||
4603 | An expression is transparent to an edge unless it is killed by | |
4604 | the edge itself. This can only happen with abnormal control flow, | |
4605 | when the edge is traversed through a call. This happens with | |
4606 | non-local labels and exceptions. | |
4607 | ||
4608 | This would not be necessary if we split the edge. While this is | |
4609 | normally impossible for abnormal critical edges, with some effort | |
4610 | it should be possible with exception handling, since we still have | |
4611 | control over which handler should be invoked. But due to increased | |
4612 | EH table sizes, this may not be worthwhile. */ | |
4613 | ||
4614 | static void | |
1d088dee | 4615 | compute_transpout (void) |
a65f3558 | 4616 | { |
e0082a72 | 4617 | basic_block bb; |
2e653e39 | 4618 | unsigned int i; |
c4c81601 | 4619 | struct expr *expr; |
a65f3558 | 4620 | |
d55bc081 | 4621 | sbitmap_vector_ones (transpout, last_basic_block); |
a65f3558 | 4622 | |
e0082a72 | 4623 | FOR_EACH_BB (bb) |
a65f3558 | 4624 | { |
a65f3558 JL |
4625 | /* Note that flow inserted a nop a the end of basic blocks that |
4626 | end in call instructions for reasons other than abnormal | |
4627 | control flow. */ | |
7b1b4aed | 4628 | if (! CALL_P (BB_END (bb))) |
a65f3558 JL |
4629 | continue; |
4630 | ||
02280659 ZD |
4631 | for (i = 0; i < expr_hash_table.size; i++) |
4632 | for (expr = expr_hash_table.table[i]; expr ; expr = expr->next_same_hash) | |
7b1b4aed | 4633 | if (MEM_P (expr->expr)) |
c4c81601 RK |
4634 | { |
4635 | if (GET_CODE (XEXP (expr->expr, 0)) == SYMBOL_REF | |
4636 | && CONSTANT_POOL_ADDRESS_P (XEXP (expr->expr, 0))) | |
4637 | continue; | |
589005ff | 4638 | |
c4c81601 RK |
4639 | /* ??? Optimally, we would use interprocedural alias |
4640 | analysis to determine if this mem is actually killed | |
4641 | by this call. */ | |
e0082a72 | 4642 | RESET_BIT (transpout[bb->index], expr->bitmap_index); |
c4c81601 | 4643 | } |
a65f3558 JL |
4644 | } |
4645 | } | |
dfdb644f | 4646 | |
bb457bd9 JL |
4647 | /* Code Hoisting variables and subroutines. */ |
4648 | ||
4649 | /* Very busy expressions. */ | |
4650 | static sbitmap *hoist_vbein; | |
4651 | static sbitmap *hoist_vbeout; | |
4652 | ||
4653 | /* Hoistable expressions. */ | |
4654 | static sbitmap *hoist_exprs; | |
4655 | ||
bb457bd9 | 4656 | /* ??? We could compute post dominators and run this algorithm in |
68e82b83 | 4657 | reverse to perform tail merging, doing so would probably be |
bb457bd9 JL |
4658 | more effective than the tail merging code in jump.c. |
4659 | ||
4660 | It's unclear if tail merging could be run in parallel with | |
4661 | code hoisting. It would be nice. */ | |
4662 | ||
4663 | /* Allocate vars used for code hoisting analysis. */ | |
4664 | ||
4665 | static void | |
1d088dee | 4666 | alloc_code_hoist_mem (int n_blocks, int n_exprs) |
bb457bd9 JL |
4667 | { |
4668 | antloc = sbitmap_vector_alloc (n_blocks, n_exprs); | |
4669 | transp = sbitmap_vector_alloc (n_blocks, n_exprs); | |
4670 | comp = sbitmap_vector_alloc (n_blocks, n_exprs); | |
4671 | ||
4672 | hoist_vbein = sbitmap_vector_alloc (n_blocks, n_exprs); | |
4673 | hoist_vbeout = sbitmap_vector_alloc (n_blocks, n_exprs); | |
4674 | hoist_exprs = sbitmap_vector_alloc (n_blocks, n_exprs); | |
4675 | transpout = sbitmap_vector_alloc (n_blocks, n_exprs); | |
bb457bd9 JL |
4676 | } |
4677 | ||
4678 | /* Free vars used for code hoisting analysis. */ | |
4679 | ||
4680 | static void | |
1d088dee | 4681 | free_code_hoist_mem (void) |
bb457bd9 | 4682 | { |
5a660bff DB |
4683 | sbitmap_vector_free (antloc); |
4684 | sbitmap_vector_free (transp); | |
4685 | sbitmap_vector_free (comp); | |
bb457bd9 | 4686 | |
5a660bff DB |
4687 | sbitmap_vector_free (hoist_vbein); |
4688 | sbitmap_vector_free (hoist_vbeout); | |
4689 | sbitmap_vector_free (hoist_exprs); | |
4690 | sbitmap_vector_free (transpout); | |
bb457bd9 | 4691 | |
d47cc544 | 4692 | free_dominance_info (CDI_DOMINATORS); |
bb457bd9 JL |
4693 | } |
4694 | ||
4695 | /* Compute the very busy expressions at entry/exit from each block. | |
4696 | ||
4697 | An expression is very busy if all paths from a given point | |
4698 | compute the expression. */ | |
4699 | ||
4700 | static void | |
1d088dee | 4701 | compute_code_hoist_vbeinout (void) |
bb457bd9 | 4702 | { |
e0082a72 ZD |
4703 | int changed, passes; |
4704 | basic_block bb; | |
bb457bd9 | 4705 | |
d55bc081 ZD |
4706 | sbitmap_vector_zero (hoist_vbeout, last_basic_block); |
4707 | sbitmap_vector_zero (hoist_vbein, last_basic_block); | |
bb457bd9 JL |
4708 | |
4709 | passes = 0; | |
4710 | changed = 1; | |
c4c81601 | 4711 | |
bb457bd9 JL |
4712 | while (changed) |
4713 | { | |
4714 | changed = 0; | |
c4c81601 | 4715 | |
bb457bd9 JL |
4716 | /* We scan the blocks in the reverse order to speed up |
4717 | the convergence. */ | |
e0082a72 | 4718 | FOR_EACH_BB_REVERSE (bb) |
bb457bd9 | 4719 | { |
e0082a72 ZD |
4720 | changed |= sbitmap_a_or_b_and_c_cg (hoist_vbein[bb->index], antloc[bb->index], |
4721 | hoist_vbeout[bb->index], transp[bb->index]); | |
4722 | if (bb->next_bb != EXIT_BLOCK_PTR) | |
4723 | sbitmap_intersection_of_succs (hoist_vbeout[bb->index], hoist_vbein, bb->index); | |
bb457bd9 | 4724 | } |
c4c81601 | 4725 | |
bb457bd9 JL |
4726 | passes++; |
4727 | } | |
4728 | ||
4729 | if (gcse_file) | |
4730 | fprintf (gcse_file, "hoisting vbeinout computation: %d passes\n", passes); | |
4731 | } | |
4732 | ||
4733 | /* Top level routine to do the dataflow analysis needed by code hoisting. */ | |
4734 | ||
4735 | static void | |
1d088dee | 4736 | compute_code_hoist_data (void) |
bb457bd9 | 4737 | { |
02280659 | 4738 | compute_local_properties (transp, comp, antloc, &expr_hash_table); |
bb457bd9 JL |
4739 | compute_transpout (); |
4740 | compute_code_hoist_vbeinout (); | |
d47cc544 | 4741 | calculate_dominance_info (CDI_DOMINATORS); |
bb457bd9 JL |
4742 | if (gcse_file) |
4743 | fprintf (gcse_file, "\n"); | |
4744 | } | |
4745 | ||
4746 | /* Determine if the expression identified by EXPR_INDEX would | |
4747 | reach BB unimpared if it was placed at the end of EXPR_BB. | |
4748 | ||
4749 | It's unclear exactly what Muchnick meant by "unimpared". It seems | |
4750 | to me that the expression must either be computed or transparent in | |
4751 | *every* block in the path(s) from EXPR_BB to BB. Any other definition | |
4752 | would allow the expression to be hoisted out of loops, even if | |
4753 | the expression wasn't a loop invariant. | |
4754 | ||
4755 | Contrast this to reachability for PRE where an expression is | |
4756 | considered reachable if *any* path reaches instead of *all* | |
4757 | paths. */ | |
4758 | ||
4759 | static int | |
1d088dee | 4760 | hoist_expr_reaches_here_p (basic_block expr_bb, int expr_index, basic_block bb, char *visited) |
bb457bd9 JL |
4761 | { |
4762 | edge pred; | |
628f6a4e | 4763 | edge_iterator ei; |
283a2545 | 4764 | int visited_allocated_locally = 0; |
589005ff | 4765 | |
bb457bd9 JL |
4766 | |
4767 | if (visited == NULL) | |
4768 | { | |
8e42ace1 | 4769 | visited_allocated_locally = 1; |
d55bc081 | 4770 | visited = xcalloc (last_basic_block, 1); |
bb457bd9 JL |
4771 | } |
4772 | ||
628f6a4e | 4773 | FOR_EACH_EDGE (pred, ei, bb->preds) |
bb457bd9 | 4774 | { |
e2d2ed72 | 4775 | basic_block pred_bb = pred->src; |
bb457bd9 JL |
4776 | |
4777 | if (pred->src == ENTRY_BLOCK_PTR) | |
4778 | break; | |
f305679f JH |
4779 | else if (pred_bb == expr_bb) |
4780 | continue; | |
0b17ab2f | 4781 | else if (visited[pred_bb->index]) |
bb457bd9 | 4782 | continue; |
c4c81601 | 4783 | |
bb457bd9 | 4784 | /* Does this predecessor generate this expression? */ |
0b17ab2f | 4785 | else if (TEST_BIT (comp[pred_bb->index], expr_index)) |
bb457bd9 | 4786 | break; |
0b17ab2f | 4787 | else if (! TEST_BIT (transp[pred_bb->index], expr_index)) |
bb457bd9 | 4788 | break; |
c4c81601 | 4789 | |
bb457bd9 JL |
4790 | /* Not killed. */ |
4791 | else | |
4792 | { | |
0b17ab2f | 4793 | visited[pred_bb->index] = 1; |
bb457bd9 JL |
4794 | if (! hoist_expr_reaches_here_p (expr_bb, expr_index, |
4795 | pred_bb, visited)) | |
4796 | break; | |
4797 | } | |
4798 | } | |
589005ff | 4799 | if (visited_allocated_locally) |
283a2545 | 4800 | free (visited); |
c4c81601 | 4801 | |
bb457bd9 JL |
4802 | return (pred == NULL); |
4803 | } | |
4804 | \f | |
4805 | /* Actually perform code hoisting. */ | |
c4c81601 | 4806 | |
bb457bd9 | 4807 | static void |
1d088dee | 4808 | hoist_code (void) |
bb457bd9 | 4809 | { |
e0082a72 | 4810 | basic_block bb, dominated; |
c635a1ec DB |
4811 | basic_block *domby; |
4812 | unsigned int domby_len; | |
4813 | unsigned int i,j; | |
bb457bd9 | 4814 | struct expr **index_map; |
c4c81601 | 4815 | struct expr *expr; |
bb457bd9 | 4816 | |
d55bc081 | 4817 | sbitmap_vector_zero (hoist_exprs, last_basic_block); |
bb457bd9 JL |
4818 | |
4819 | /* Compute a mapping from expression number (`bitmap_index') to | |
4820 | hash table entry. */ | |
4821 | ||
703ad42b | 4822 | index_map = xcalloc (expr_hash_table.n_elems, sizeof (struct expr *)); |
02280659 ZD |
4823 | for (i = 0; i < expr_hash_table.size; i++) |
4824 | for (expr = expr_hash_table.table[i]; expr != NULL; expr = expr->next_same_hash) | |
c4c81601 | 4825 | index_map[expr->bitmap_index] = expr; |
bb457bd9 JL |
4826 | |
4827 | /* Walk over each basic block looking for potentially hoistable | |
4828 | expressions, nothing gets hoisted from the entry block. */ | |
e0082a72 | 4829 | FOR_EACH_BB (bb) |
bb457bd9 JL |
4830 | { |
4831 | int found = 0; | |
4832 | int insn_inserted_p; | |
4833 | ||
d47cc544 | 4834 | domby_len = get_dominated_by (CDI_DOMINATORS, bb, &domby); |
bb457bd9 JL |
4835 | /* Examine each expression that is very busy at the exit of this |
4836 | block. These are the potentially hoistable expressions. */ | |
e0082a72 | 4837 | for (i = 0; i < hoist_vbeout[bb->index]->n_bits; i++) |
bb457bd9 JL |
4838 | { |
4839 | int hoistable = 0; | |
c4c81601 | 4840 | |
c635a1ec DB |
4841 | if (TEST_BIT (hoist_vbeout[bb->index], i) |
4842 | && TEST_BIT (transpout[bb->index], i)) | |
bb457bd9 JL |
4843 | { |
4844 | /* We've found a potentially hoistable expression, now | |
4845 | we look at every block BB dominates to see if it | |
4846 | computes the expression. */ | |
c635a1ec | 4847 | for (j = 0; j < domby_len; j++) |
bb457bd9 | 4848 | { |
c635a1ec | 4849 | dominated = domby[j]; |
bb457bd9 | 4850 | /* Ignore self dominance. */ |
c635a1ec | 4851 | if (bb == dominated) |
bb457bd9 | 4852 | continue; |
bb457bd9 JL |
4853 | /* We've found a dominated block, now see if it computes |
4854 | the busy expression and whether or not moving that | |
4855 | expression to the "beginning" of that block is safe. */ | |
e0082a72 | 4856 | if (!TEST_BIT (antloc[dominated->index], i)) |
bb457bd9 JL |
4857 | continue; |
4858 | ||
4859 | /* Note if the expression would reach the dominated block | |
589005ff | 4860 | unimpared if it was placed at the end of BB. |
bb457bd9 JL |
4861 | |
4862 | Keep track of how many times this expression is hoistable | |
4863 | from a dominated block into BB. */ | |
e0082a72 | 4864 | if (hoist_expr_reaches_here_p (bb, i, dominated, NULL)) |
bb457bd9 JL |
4865 | hoistable++; |
4866 | } | |
4867 | ||
ff7cc307 | 4868 | /* If we found more than one hoistable occurrence of this |
bb457bd9 JL |
4869 | expression, then note it in the bitmap of expressions to |
4870 | hoist. It makes no sense to hoist things which are computed | |
4871 | in only one BB, and doing so tends to pessimize register | |
4872 | allocation. One could increase this value to try harder | |
4873 | to avoid any possible code expansion due to register | |
4874 | allocation issues; however experiments have shown that | |
4875 | the vast majority of hoistable expressions are only movable | |
e0bb17a8 | 4876 | from two successors, so raising this threshold is likely |
bb457bd9 JL |
4877 | to nullify any benefit we get from code hoisting. */ |
4878 | if (hoistable > 1) | |
4879 | { | |
e0082a72 | 4880 | SET_BIT (hoist_exprs[bb->index], i); |
bb457bd9 JL |
4881 | found = 1; |
4882 | } | |
4883 | } | |
4884 | } | |
bb457bd9 JL |
4885 | /* If we found nothing to hoist, then quit now. */ |
4886 | if (! found) | |
c635a1ec | 4887 | { |
1d088dee | 4888 | free (domby); |
bb457bd9 | 4889 | continue; |
c635a1ec | 4890 | } |
bb457bd9 JL |
4891 | |
4892 | /* Loop over all the hoistable expressions. */ | |
e0082a72 | 4893 | for (i = 0; i < hoist_exprs[bb->index]->n_bits; i++) |
bb457bd9 JL |
4894 | { |
4895 | /* We want to insert the expression into BB only once, so | |
4896 | note when we've inserted it. */ | |
4897 | insn_inserted_p = 0; | |
4898 | ||
4899 | /* These tests should be the same as the tests above. */ | |
e0082a72 | 4900 | if (TEST_BIT (hoist_vbeout[bb->index], i)) |
bb457bd9 JL |
4901 | { |
4902 | /* We've found a potentially hoistable expression, now | |
4903 | we look at every block BB dominates to see if it | |
4904 | computes the expression. */ | |
c635a1ec | 4905 | for (j = 0; j < domby_len; j++) |
bb457bd9 | 4906 | { |
c635a1ec | 4907 | dominated = domby[j]; |
bb457bd9 | 4908 | /* Ignore self dominance. */ |
c635a1ec | 4909 | if (bb == dominated) |
bb457bd9 JL |
4910 | continue; |
4911 | ||
4912 | /* We've found a dominated block, now see if it computes | |
4913 | the busy expression and whether or not moving that | |
4914 | expression to the "beginning" of that block is safe. */ | |
e0082a72 | 4915 | if (!TEST_BIT (antloc[dominated->index], i)) |
bb457bd9 JL |
4916 | continue; |
4917 | ||
4918 | /* The expression is computed in the dominated block and | |
4919 | it would be safe to compute it at the start of the | |
4920 | dominated block. Now we have to determine if the | |
ff7cc307 | 4921 | expression would reach the dominated block if it was |
bb457bd9 | 4922 | placed at the end of BB. */ |
e0082a72 | 4923 | if (hoist_expr_reaches_here_p (bb, i, dominated, NULL)) |
bb457bd9 JL |
4924 | { |
4925 | struct expr *expr = index_map[i]; | |
4926 | struct occr *occr = expr->antic_occr; | |
4927 | rtx insn; | |
4928 | rtx set; | |
4929 | ||
ff7cc307 | 4930 | /* Find the right occurrence of this expression. */ |
e0082a72 | 4931 | while (BLOCK_FOR_INSN (occr->insn) != dominated && occr) |
bb457bd9 JL |
4932 | occr = occr->next; |
4933 | ||
282899df | 4934 | gcc_assert (occr); |
bb457bd9 | 4935 | insn = occr->insn; |
bb457bd9 | 4936 | set = single_set (insn); |
282899df | 4937 | gcc_assert (set); |
bb457bd9 JL |
4938 | |
4939 | /* Create a pseudo-reg to store the result of reaching | |
4940 | expressions into. Get the mode for the new pseudo | |
4941 | from the mode of the original destination pseudo. */ | |
4942 | if (expr->reaching_reg == NULL) | |
4943 | expr->reaching_reg | |
4944 | = gen_reg_rtx (GET_MODE (SET_DEST (set))); | |
4945 | ||
10d1bb36 JH |
4946 | gcse_emit_move_after (expr->reaching_reg, SET_DEST (set), insn); |
4947 | delete_insn (insn); | |
4948 | occr->deleted_p = 1; | |
4949 | if (!insn_inserted_p) | |
bb457bd9 | 4950 | { |
10d1bb36 JH |
4951 | insert_insn_end_bb (index_map[i], bb, 0); |
4952 | insn_inserted_p = 1; | |
bb457bd9 JL |
4953 | } |
4954 | } | |
4955 | } | |
4956 | } | |
4957 | } | |
c635a1ec | 4958 | free (domby); |
bb457bd9 | 4959 | } |
c4c81601 | 4960 | |
8e42ace1 | 4961 | free (index_map); |
bb457bd9 JL |
4962 | } |
4963 | ||
4964 | /* Top level routine to perform one code hoisting (aka unification) pass | |
4965 | ||
cc2902df | 4966 | Return nonzero if a change was made. */ |
bb457bd9 JL |
4967 | |
4968 | static int | |
1d088dee | 4969 | one_code_hoisting_pass (void) |
bb457bd9 JL |
4970 | { |
4971 | int changed = 0; | |
4972 | ||
02280659 ZD |
4973 | alloc_hash_table (max_cuid, &expr_hash_table, 0); |
4974 | compute_hash_table (&expr_hash_table); | |
bb457bd9 | 4975 | if (gcse_file) |
02280659 | 4976 | dump_hash_table (gcse_file, "Code Hosting Expressions", &expr_hash_table); |
c4c81601 | 4977 | |
02280659 | 4978 | if (expr_hash_table.n_elems > 0) |
bb457bd9 | 4979 | { |
02280659 | 4980 | alloc_code_hoist_mem (last_basic_block, expr_hash_table.n_elems); |
bb457bd9 JL |
4981 | compute_code_hoist_data (); |
4982 | hoist_code (); | |
4983 | free_code_hoist_mem (); | |
4984 | } | |
c4c81601 | 4985 | |
02280659 | 4986 | free_hash_table (&expr_hash_table); |
bb457bd9 JL |
4987 | |
4988 | return changed; | |
4989 | } | |
a13d4ebf AM |
4990 | \f |
4991 | /* Here we provide the things required to do store motion towards | |
4992 | the exit. In order for this to be effective, gcse also needed to | |
4993 | be taught how to move a load when it is kill only by a store to itself. | |
4994 | ||
4995 | int i; | |
4996 | float a[10]; | |
4997 | ||
4998 | void foo(float scale) | |
4999 | { | |
5000 | for (i=0; i<10; i++) | |
5001 | a[i] *= scale; | |
5002 | } | |
5003 | ||
5004 | 'i' is both loaded and stored to in the loop. Normally, gcse cannot move | |
589005ff KH |
5005 | the load out since its live around the loop, and stored at the bottom |
5006 | of the loop. | |
a13d4ebf | 5007 | |
589005ff | 5008 | The 'Load Motion' referred to and implemented in this file is |
a13d4ebf AM |
5009 | an enhancement to gcse which when using edge based lcm, recognizes |
5010 | this situation and allows gcse to move the load out of the loop. | |
5011 | ||
5012 | Once gcse has hoisted the load, store motion can then push this | |
5013 | load towards the exit, and we end up with no loads or stores of 'i' | |
5014 | in the loop. */ | |
5015 | ||
ff7cc307 | 5016 | /* This will search the ldst list for a matching expression. If it |
a13d4ebf AM |
5017 | doesn't find one, we create one and initialize it. */ |
5018 | ||
5019 | static struct ls_expr * | |
1d088dee | 5020 | ldst_entry (rtx x) |
a13d4ebf | 5021 | { |
b58b21d5 | 5022 | int do_not_record_p = 0; |
a13d4ebf | 5023 | struct ls_expr * ptr; |
b58b21d5 | 5024 | unsigned int hash; |
a13d4ebf | 5025 | |
0516f6fe SB |
5026 | hash = hash_rtx (x, GET_MODE (x), &do_not_record_p, |
5027 | NULL, /*have_reg_qty=*/false); | |
a13d4ebf | 5028 | |
b58b21d5 RS |
5029 | for (ptr = pre_ldst_mems; ptr != NULL; ptr = ptr->next) |
5030 | if (ptr->hash_index == hash && expr_equiv_p (ptr->pattern, x)) | |
5031 | return ptr; | |
5032 | ||
5033 | ptr = xmalloc (sizeof (struct ls_expr)); | |
5034 | ||
5035 | ptr->next = pre_ldst_mems; | |
5036 | ptr->expr = NULL; | |
5037 | ptr->pattern = x; | |
5038 | ptr->pattern_regs = NULL_RTX; | |
5039 | ptr->loads = NULL_RTX; | |
5040 | ptr->stores = NULL_RTX; | |
5041 | ptr->reaching_reg = NULL_RTX; | |
5042 | ptr->invalid = 0; | |
5043 | ptr->index = 0; | |
5044 | ptr->hash_index = hash; | |
5045 | pre_ldst_mems = ptr; | |
589005ff | 5046 | |
a13d4ebf AM |
5047 | return ptr; |
5048 | } | |
5049 | ||
5050 | /* Free up an individual ldst entry. */ | |
5051 | ||
589005ff | 5052 | static void |
1d088dee | 5053 | free_ldst_entry (struct ls_expr * ptr) |
a13d4ebf | 5054 | { |
aaa4ca30 AJ |
5055 | free_INSN_LIST_list (& ptr->loads); |
5056 | free_INSN_LIST_list (& ptr->stores); | |
a13d4ebf AM |
5057 | |
5058 | free (ptr); | |
5059 | } | |
5060 | ||
5061 | /* Free up all memory associated with the ldst list. */ | |
5062 | ||
5063 | static void | |
1d088dee | 5064 | free_ldst_mems (void) |
a13d4ebf | 5065 | { |
589005ff | 5066 | while (pre_ldst_mems) |
a13d4ebf AM |
5067 | { |
5068 | struct ls_expr * tmp = pre_ldst_mems; | |
5069 | ||
5070 | pre_ldst_mems = pre_ldst_mems->next; | |
5071 | ||
5072 | free_ldst_entry (tmp); | |
5073 | } | |
5074 | ||
5075 | pre_ldst_mems = NULL; | |
5076 | } | |
5077 | ||
5078 | /* Dump debugging info about the ldst list. */ | |
5079 | ||
5080 | static void | |
1d088dee | 5081 | print_ldst_list (FILE * file) |
a13d4ebf AM |
5082 | { |
5083 | struct ls_expr * ptr; | |
5084 | ||
5085 | fprintf (file, "LDST list: \n"); | |
5086 | ||
5087 | for (ptr = first_ls_expr(); ptr != NULL; ptr = next_ls_expr (ptr)) | |
5088 | { | |
5089 | fprintf (file, " Pattern (%3d): ", ptr->index); | |
5090 | ||
5091 | print_rtl (file, ptr->pattern); | |
5092 | ||
5093 | fprintf (file, "\n Loads : "); | |
5094 | ||
5095 | if (ptr->loads) | |
5096 | print_rtl (file, ptr->loads); | |
5097 | else | |
5098 | fprintf (file, "(nil)"); | |
5099 | ||
5100 | fprintf (file, "\n Stores : "); | |
5101 | ||
5102 | if (ptr->stores) | |
5103 | print_rtl (file, ptr->stores); | |
5104 | else | |
5105 | fprintf (file, "(nil)"); | |
5106 | ||
5107 | fprintf (file, "\n\n"); | |
5108 | } | |
5109 | ||
5110 | fprintf (file, "\n"); | |
5111 | } | |
5112 | ||
5113 | /* Returns 1 if X is in the list of ldst only expressions. */ | |
5114 | ||
5115 | static struct ls_expr * | |
1d088dee | 5116 | find_rtx_in_ldst (rtx x) |
a13d4ebf AM |
5117 | { |
5118 | struct ls_expr * ptr; | |
589005ff | 5119 | |
a13d4ebf AM |
5120 | for (ptr = pre_ldst_mems; ptr != NULL; ptr = ptr->next) |
5121 | if (expr_equiv_p (ptr->pattern, x) && ! ptr->invalid) | |
5122 | return ptr; | |
5123 | ||
5124 | return NULL; | |
5125 | } | |
5126 | ||
5127 | /* Assign each element of the list of mems a monotonically increasing value. */ | |
5128 | ||
5129 | static int | |
1d088dee | 5130 | enumerate_ldsts (void) |
a13d4ebf AM |
5131 | { |
5132 | struct ls_expr * ptr; | |
5133 | int n = 0; | |
5134 | ||
5135 | for (ptr = pre_ldst_mems; ptr != NULL; ptr = ptr->next) | |
5136 | ptr->index = n++; | |
5137 | ||
5138 | return n; | |
5139 | } | |
5140 | ||
5141 | /* Return first item in the list. */ | |
5142 | ||
5143 | static inline struct ls_expr * | |
1d088dee | 5144 | first_ls_expr (void) |
a13d4ebf AM |
5145 | { |
5146 | return pre_ldst_mems; | |
5147 | } | |
5148 | ||
0e8a66de | 5149 | /* Return the next item in the list after the specified one. */ |
a13d4ebf AM |
5150 | |
5151 | static inline struct ls_expr * | |
1d088dee | 5152 | next_ls_expr (struct ls_expr * ptr) |
a13d4ebf AM |
5153 | { |
5154 | return ptr->next; | |
5155 | } | |
5156 | \f | |
5157 | /* Load Motion for loads which only kill themselves. */ | |
5158 | ||
5159 | /* Return true if x is a simple MEM operation, with no registers or | |
5160 | side effects. These are the types of loads we consider for the | |
5161 | ld_motion list, otherwise we let the usual aliasing take care of it. */ | |
5162 | ||
589005ff | 5163 | static int |
1d088dee | 5164 | simple_mem (rtx x) |
a13d4ebf | 5165 | { |
7b1b4aed | 5166 | if (! MEM_P (x)) |
a13d4ebf | 5167 | return 0; |
589005ff | 5168 | |
a13d4ebf AM |
5169 | if (MEM_VOLATILE_P (x)) |
5170 | return 0; | |
589005ff | 5171 | |
a13d4ebf AM |
5172 | if (GET_MODE (x) == BLKmode) |
5173 | return 0; | |
aaa4ca30 | 5174 | |
47a3dae1 ZD |
5175 | /* If we are handling exceptions, we must be careful with memory references |
5176 | that may trap. If we are not, the behavior is undefined, so we may just | |
5177 | continue. */ | |
5178 | if (flag_non_call_exceptions && may_trap_p (x)) | |
98d3d336 RS |
5179 | return 0; |
5180 | ||
47a3dae1 ZD |
5181 | if (side_effects_p (x)) |
5182 | return 0; | |
589005ff | 5183 | |
47a3dae1 ZD |
5184 | /* Do not consider function arguments passed on stack. */ |
5185 | if (reg_mentioned_p (stack_pointer_rtx, x)) | |
5186 | return 0; | |
5187 | ||
5188 | if (flag_float_store && FLOAT_MODE_P (GET_MODE (x))) | |
5189 | return 0; | |
5190 | ||
5191 | return 1; | |
a13d4ebf AM |
5192 | } |
5193 | ||
589005ff KH |
5194 | /* Make sure there isn't a buried reference in this pattern anywhere. |
5195 | If there is, invalidate the entry for it since we're not capable | |
5196 | of fixing it up just yet.. We have to be sure we know about ALL | |
a13d4ebf AM |
5197 | loads since the aliasing code will allow all entries in the |
5198 | ld_motion list to not-alias itself. If we miss a load, we will get | |
589005ff | 5199 | the wrong value since gcse might common it and we won't know to |
a13d4ebf AM |
5200 | fix it up. */ |
5201 | ||
5202 | static void | |
1d088dee | 5203 | invalidate_any_buried_refs (rtx x) |
a13d4ebf AM |
5204 | { |
5205 | const char * fmt; | |
8e42ace1 | 5206 | int i, j; |
a13d4ebf AM |
5207 | struct ls_expr * ptr; |
5208 | ||
5209 | /* Invalidate it in the list. */ | |
7b1b4aed | 5210 | if (MEM_P (x) && simple_mem (x)) |
a13d4ebf AM |
5211 | { |
5212 | ptr = ldst_entry (x); | |
5213 | ptr->invalid = 1; | |
5214 | } | |
5215 | ||
5216 | /* Recursively process the insn. */ | |
5217 | fmt = GET_RTX_FORMAT (GET_CODE (x)); | |
589005ff | 5218 | |
a13d4ebf AM |
5219 | for (i = GET_RTX_LENGTH (GET_CODE (x)) - 1; i >= 0; i--) |
5220 | { | |
5221 | if (fmt[i] == 'e') | |
5222 | invalidate_any_buried_refs (XEXP (x, i)); | |
5223 | else if (fmt[i] == 'E') | |
5224 | for (j = XVECLEN (x, i) - 1; j >= 0; j--) | |
5225 | invalidate_any_buried_refs (XVECEXP (x, i, j)); | |
5226 | } | |
5227 | } | |
5228 | ||
4d3eb89a HPN |
5229 | /* Find all the 'simple' MEMs which are used in LOADs and STORES. Simple |
5230 | being defined as MEM loads and stores to symbols, with no side effects | |
5231 | and no registers in the expression. For a MEM destination, we also | |
5232 | check that the insn is still valid if we replace the destination with a | |
5233 | REG, as is done in update_ld_motion_stores. If there are any uses/defs | |
5234 | which don't match this criteria, they are invalidated and trimmed out | |
5235 | later. */ | |
a13d4ebf | 5236 | |
589005ff | 5237 | static void |
1d088dee | 5238 | compute_ld_motion_mems (void) |
a13d4ebf AM |
5239 | { |
5240 | struct ls_expr * ptr; | |
e0082a72 | 5241 | basic_block bb; |
a13d4ebf | 5242 | rtx insn; |
589005ff | 5243 | |
a13d4ebf AM |
5244 | pre_ldst_mems = NULL; |
5245 | ||
e0082a72 | 5246 | FOR_EACH_BB (bb) |
a13d4ebf | 5247 | { |
eb232f4e | 5248 | FOR_BB_INSNS (bb, insn) |
a13d4ebf | 5249 | { |
735e8085 | 5250 | if (INSN_P (insn)) |
a13d4ebf AM |
5251 | { |
5252 | if (GET_CODE (PATTERN (insn)) == SET) | |
5253 | { | |
5254 | rtx src = SET_SRC (PATTERN (insn)); | |
5255 | rtx dest = SET_DEST (PATTERN (insn)); | |
5256 | ||
5257 | /* Check for a simple LOAD... */ | |
7b1b4aed | 5258 | if (MEM_P (src) && simple_mem (src)) |
a13d4ebf AM |
5259 | { |
5260 | ptr = ldst_entry (src); | |
7b1b4aed | 5261 | if (REG_P (dest)) |
a13d4ebf AM |
5262 | ptr->loads = alloc_INSN_LIST (insn, ptr->loads); |
5263 | else | |
5264 | ptr->invalid = 1; | |
5265 | } | |
5266 | else | |
5267 | { | |
5268 | /* Make sure there isn't a buried load somewhere. */ | |
5269 | invalidate_any_buried_refs (src); | |
5270 | } | |
589005ff | 5271 | |
a13d4ebf AM |
5272 | /* Check for stores. Don't worry about aliased ones, they |
5273 | will block any movement we might do later. We only care | |
5274 | about this exact pattern since those are the only | |
5275 | circumstance that we will ignore the aliasing info. */ | |
7b1b4aed | 5276 | if (MEM_P (dest) && simple_mem (dest)) |
a13d4ebf AM |
5277 | { |
5278 | ptr = ldst_entry (dest); | |
589005ff | 5279 | |
7b1b4aed | 5280 | if (! MEM_P (src) |
4d3eb89a HPN |
5281 | && GET_CODE (src) != ASM_OPERANDS |
5282 | /* Check for REG manually since want_to_gcse_p | |
5283 | returns 0 for all REGs. */ | |
1707bafa | 5284 | && can_assign_to_reg_p (src)) |
a13d4ebf AM |
5285 | ptr->stores = alloc_INSN_LIST (insn, ptr->stores); |
5286 | else | |
5287 | ptr->invalid = 1; | |
5288 | } | |
5289 | } | |
5290 | else | |
5291 | invalidate_any_buried_refs (PATTERN (insn)); | |
5292 | } | |
5293 | } | |
5294 | } | |
5295 | } | |
5296 | ||
589005ff | 5297 | /* Remove any references that have been either invalidated or are not in the |
a13d4ebf AM |
5298 | expression list for pre gcse. */ |
5299 | ||
5300 | static void | |
1d088dee | 5301 | trim_ld_motion_mems (void) |
a13d4ebf | 5302 | { |
b58b21d5 RS |
5303 | struct ls_expr * * last = & pre_ldst_mems; |
5304 | struct ls_expr * ptr = pre_ldst_mems; | |
a13d4ebf AM |
5305 | |
5306 | while (ptr != NULL) | |
5307 | { | |
b58b21d5 | 5308 | struct expr * expr; |
589005ff | 5309 | |
a13d4ebf | 5310 | /* Delete if entry has been made invalid. */ |
b58b21d5 | 5311 | if (! ptr->invalid) |
a13d4ebf | 5312 | { |
a13d4ebf | 5313 | /* Delete if we cannot find this mem in the expression list. */ |
b58b21d5 | 5314 | unsigned int hash = ptr->hash_index % expr_hash_table.size; |
589005ff | 5315 | |
b58b21d5 RS |
5316 | for (expr = expr_hash_table.table[hash]; |
5317 | expr != NULL; | |
5318 | expr = expr->next_same_hash) | |
5319 | if (expr_equiv_p (expr->expr, ptr->pattern)) | |
5320 | break; | |
a13d4ebf AM |
5321 | } |
5322 | else | |
b58b21d5 RS |
5323 | expr = (struct expr *) 0; |
5324 | ||
5325 | if (expr) | |
a13d4ebf AM |
5326 | { |
5327 | /* Set the expression field if we are keeping it. */ | |
a13d4ebf | 5328 | ptr->expr = expr; |
b58b21d5 | 5329 | last = & ptr->next; |
a13d4ebf AM |
5330 | ptr = ptr->next; |
5331 | } | |
b58b21d5 RS |
5332 | else |
5333 | { | |
5334 | *last = ptr->next; | |
5335 | free_ldst_entry (ptr); | |
5336 | ptr = * last; | |
5337 | } | |
a13d4ebf AM |
5338 | } |
5339 | ||
5340 | /* Show the world what we've found. */ | |
5341 | if (gcse_file && pre_ldst_mems != NULL) | |
5342 | print_ldst_list (gcse_file); | |
5343 | } | |
5344 | ||
5345 | /* This routine will take an expression which we are replacing with | |
5346 | a reaching register, and update any stores that are needed if | |
5347 | that expression is in the ld_motion list. Stores are updated by | |
a98ebe2e | 5348 | copying their SRC to the reaching register, and then storing |
a13d4ebf AM |
5349 | the reaching register into the store location. These keeps the |
5350 | correct value in the reaching register for the loads. */ | |
5351 | ||
5352 | static void | |
1d088dee | 5353 | update_ld_motion_stores (struct expr * expr) |
a13d4ebf AM |
5354 | { |
5355 | struct ls_expr * mem_ptr; | |
5356 | ||
5357 | if ((mem_ptr = find_rtx_in_ldst (expr->expr))) | |
5358 | { | |
589005ff KH |
5359 | /* We can try to find just the REACHED stores, but is shouldn't |
5360 | matter to set the reaching reg everywhere... some might be | |
a13d4ebf AM |
5361 | dead and should be eliminated later. */ |
5362 | ||
4d3eb89a HPN |
5363 | /* We replace (set mem expr) with (set reg expr) (set mem reg) |
5364 | where reg is the reaching reg used in the load. We checked in | |
5365 | compute_ld_motion_mems that we can replace (set mem expr) with | |
5366 | (set reg expr) in that insn. */ | |
a13d4ebf | 5367 | rtx list = mem_ptr->stores; |
589005ff | 5368 | |
a13d4ebf AM |
5369 | for ( ; list != NULL_RTX; list = XEXP (list, 1)) |
5370 | { | |
5371 | rtx insn = XEXP (list, 0); | |
5372 | rtx pat = PATTERN (insn); | |
5373 | rtx src = SET_SRC (pat); | |
5374 | rtx reg = expr->reaching_reg; | |
c57718d3 | 5375 | rtx copy, new; |
a13d4ebf AM |
5376 | |
5377 | /* If we've already copied it, continue. */ | |
5378 | if (expr->reaching_reg == src) | |
5379 | continue; | |
589005ff | 5380 | |
a13d4ebf AM |
5381 | if (gcse_file) |
5382 | { | |
5383 | fprintf (gcse_file, "PRE: store updated with reaching reg "); | |
5384 | print_rtl (gcse_file, expr->reaching_reg); | |
5385 | fprintf (gcse_file, ":\n "); | |
5386 | print_inline_rtx (gcse_file, insn, 8); | |
5387 | fprintf (gcse_file, "\n"); | |
5388 | } | |
589005ff | 5389 | |
47a3dae1 | 5390 | copy = gen_move_insn ( reg, copy_rtx (SET_SRC (pat))); |
c57718d3 RK |
5391 | new = emit_insn_before (copy, insn); |
5392 | record_one_set (REGNO (reg), new); | |
a13d4ebf AM |
5393 | SET_SRC (pat) = reg; |
5394 | ||
5395 | /* un-recognize this pattern since it's probably different now. */ | |
5396 | INSN_CODE (insn) = -1; | |
5397 | gcse_create_count++; | |
5398 | } | |
5399 | } | |
5400 | } | |
5401 | \f | |
5402 | /* Store motion code. */ | |
5403 | ||
47a3dae1 ZD |
5404 | #define ANTIC_STORE_LIST(x) ((x)->loads) |
5405 | #define AVAIL_STORE_LIST(x) ((x)->stores) | |
5406 | #define LAST_AVAIL_CHECK_FAILURE(x) ((x)->reaching_reg) | |
5407 | ||
589005ff | 5408 | /* This is used to communicate the target bitvector we want to use in the |
aaa4ca30 | 5409 | reg_set_info routine when called via the note_stores mechanism. */ |
47a3dae1 ZD |
5410 | static int * regvec; |
5411 | ||
5412 | /* And current insn, for the same routine. */ | |
5413 | static rtx compute_store_table_current_insn; | |
aaa4ca30 | 5414 | |
a13d4ebf AM |
5415 | /* Used in computing the reverse edge graph bit vectors. */ |
5416 | static sbitmap * st_antloc; | |
5417 | ||
5418 | /* Global holding the number of store expressions we are dealing with. */ | |
5419 | static int num_stores; | |
5420 | ||
01c43039 RE |
5421 | /* Checks to set if we need to mark a register set. Called from |
5422 | note_stores. */ | |
a13d4ebf | 5423 | |
aaa4ca30 | 5424 | static void |
1d088dee | 5425 | reg_set_info (rtx dest, rtx setter ATTRIBUTE_UNUSED, |
01c43039 | 5426 | void *data) |
a13d4ebf | 5427 | { |
01c43039 RE |
5428 | sbitmap bb_reg = data; |
5429 | ||
aaa4ca30 AJ |
5430 | if (GET_CODE (dest) == SUBREG) |
5431 | dest = SUBREG_REG (dest); | |
adfcce61 | 5432 | |
7b1b4aed | 5433 | if (REG_P (dest)) |
01c43039 RE |
5434 | { |
5435 | regvec[REGNO (dest)] = INSN_UID (compute_store_table_current_insn); | |
5436 | if (bb_reg) | |
5437 | SET_BIT (bb_reg, REGNO (dest)); | |
5438 | } | |
5439 | } | |
5440 | ||
5441 | /* Clear any mark that says that this insn sets dest. Called from | |
5442 | note_stores. */ | |
5443 | ||
5444 | static void | |
5445 | reg_clear_last_set (rtx dest, rtx setter ATTRIBUTE_UNUSED, | |
5446 | void *data) | |
5447 | { | |
5448 | int *dead_vec = data; | |
5449 | ||
5450 | if (GET_CODE (dest) == SUBREG) | |
5451 | dest = SUBREG_REG (dest); | |
5452 | ||
7b1b4aed | 5453 | if (REG_P (dest) && |
01c43039 RE |
5454 | dead_vec[REGNO (dest)] == INSN_UID (compute_store_table_current_insn)) |
5455 | dead_vec[REGNO (dest)] = 0; | |
a13d4ebf AM |
5456 | } |
5457 | ||
47a3dae1 ZD |
5458 | /* Return zero if some of the registers in list X are killed |
5459 | due to set of registers in bitmap REGS_SET. */ | |
1d088dee | 5460 | |
47a3dae1 | 5461 | static bool |
1d088dee | 5462 | store_ops_ok (rtx x, int *regs_set) |
47a3dae1 ZD |
5463 | { |
5464 | rtx reg; | |
5465 | ||
5466 | for (; x; x = XEXP (x, 1)) | |
5467 | { | |
5468 | reg = XEXP (x, 0); | |
5469 | if (regs_set[REGNO(reg)]) | |
1d088dee | 5470 | return false; |
47a3dae1 | 5471 | } |
a13d4ebf | 5472 | |
47a3dae1 ZD |
5473 | return true; |
5474 | } | |
5475 | ||
5476 | /* Returns a list of registers mentioned in X. */ | |
5477 | static rtx | |
1d088dee | 5478 | extract_mentioned_regs (rtx x) |
47a3dae1 ZD |
5479 | { |
5480 | return extract_mentioned_regs_helper (x, NULL_RTX); | |
5481 | } | |
5482 | ||
5483 | /* Helper for extract_mentioned_regs; ACCUM is used to accumulate used | |
5484 | registers. */ | |
5485 | static rtx | |
1d088dee | 5486 | extract_mentioned_regs_helper (rtx x, rtx accum) |
a13d4ebf AM |
5487 | { |
5488 | int i; | |
5489 | enum rtx_code code; | |
5490 | const char * fmt; | |
5491 | ||
5492 | /* Repeat is used to turn tail-recursion into iteration. */ | |
5493 | repeat: | |
5494 | ||
5495 | if (x == 0) | |
47a3dae1 | 5496 | return accum; |
a13d4ebf AM |
5497 | |
5498 | code = GET_CODE (x); | |
5499 | switch (code) | |
5500 | { | |
5501 | case REG: | |
47a3dae1 | 5502 | return alloc_EXPR_LIST (0, x, accum); |
a13d4ebf AM |
5503 | |
5504 | case MEM: | |
5505 | x = XEXP (x, 0); | |
5506 | goto repeat; | |
5507 | ||
5508 | case PRE_DEC: | |
5509 | case PRE_INC: | |
5510 | case POST_DEC: | |
5511 | case POST_INC: | |
47a3dae1 | 5512 | /* We do not run this function with arguments having side effects. */ |
282899df | 5513 | gcc_unreachable (); |
a13d4ebf AM |
5514 | |
5515 | case PC: | |
5516 | case CC0: /*FIXME*/ | |
5517 | case CONST: | |
5518 | case CONST_INT: | |
5519 | case CONST_DOUBLE: | |
69ef87e2 | 5520 | case CONST_VECTOR: |
a13d4ebf AM |
5521 | case SYMBOL_REF: |
5522 | case LABEL_REF: | |
5523 | case ADDR_VEC: | |
5524 | case ADDR_DIFF_VEC: | |
47a3dae1 | 5525 | return accum; |
a13d4ebf AM |
5526 | |
5527 | default: | |
5528 | break; | |
5529 | } | |
5530 | ||
5531 | i = GET_RTX_LENGTH (code) - 1; | |
5532 | fmt = GET_RTX_FORMAT (code); | |
589005ff | 5533 | |
a13d4ebf AM |
5534 | for (; i >= 0; i--) |
5535 | { | |
5536 | if (fmt[i] == 'e') | |
5537 | { | |
5538 | rtx tem = XEXP (x, i); | |
5539 | ||
5540 | /* If we are about to do the last recursive call | |
47a3dae1 | 5541 | needed at this level, change it into iteration. */ |
a13d4ebf AM |
5542 | if (i == 0) |
5543 | { | |
5544 | x = tem; | |
5545 | goto repeat; | |
5546 | } | |
589005ff | 5547 | |
47a3dae1 | 5548 | accum = extract_mentioned_regs_helper (tem, accum); |
a13d4ebf AM |
5549 | } |
5550 | else if (fmt[i] == 'E') | |
5551 | { | |
5552 | int j; | |
589005ff | 5553 | |
a13d4ebf | 5554 | for (j = 0; j < XVECLEN (x, i); j++) |
47a3dae1 | 5555 | accum = extract_mentioned_regs_helper (XVECEXP (x, i, j), accum); |
a13d4ebf AM |
5556 | } |
5557 | } | |
5558 | ||
47a3dae1 | 5559 | return accum; |
a13d4ebf AM |
5560 | } |
5561 | ||
47a3dae1 ZD |
5562 | /* Determine whether INSN is MEM store pattern that we will consider moving. |
5563 | REGS_SET_BEFORE is bitmap of registers set before (and including) the | |
5564 | current insn, REGS_SET_AFTER is bitmap of registers set after (and | |
5565 | including) the insn in this basic block. We must be passing through BB from | |
5566 | head to end, as we are using this fact to speed things up. | |
1d088dee | 5567 | |
47a3dae1 ZD |
5568 | The results are stored this way: |
5569 | ||
5570 | -- the first anticipatable expression is added into ANTIC_STORE_LIST | |
5571 | -- if the processed expression is not anticipatable, NULL_RTX is added | |
5572 | there instead, so that we can use it as indicator that no further | |
5573 | expression of this type may be anticipatable | |
5574 | -- if the expression is available, it is added as head of AVAIL_STORE_LIST; | |
5575 | consequently, all of them but this head are dead and may be deleted. | |
5576 | -- if the expression is not available, the insn due to that it fails to be | |
5577 | available is stored in reaching_reg. | |
5578 | ||
5579 | The things are complicated a bit by fact that there already may be stores | |
5580 | to the same MEM from other blocks; also caller must take care of the | |
e0bb17a8 | 5581 | necessary cleanup of the temporary markers after end of the basic block. |
47a3dae1 | 5582 | */ |
a13d4ebf AM |
5583 | |
5584 | static void | |
1d088dee | 5585 | find_moveable_store (rtx insn, int *regs_set_before, int *regs_set_after) |
a13d4ebf AM |
5586 | { |
5587 | struct ls_expr * ptr; | |
47a3dae1 ZD |
5588 | rtx dest, set, tmp; |
5589 | int check_anticipatable, check_available; | |
5590 | basic_block bb = BLOCK_FOR_INSN (insn); | |
a13d4ebf | 5591 | |
47a3dae1 ZD |
5592 | set = single_set (insn); |
5593 | if (!set) | |
a13d4ebf AM |
5594 | return; |
5595 | ||
47a3dae1 | 5596 | dest = SET_DEST (set); |
589005ff | 5597 | |
7b1b4aed | 5598 | if (! MEM_P (dest) || MEM_VOLATILE_P (dest) |
a13d4ebf | 5599 | || GET_MODE (dest) == BLKmode) |
aaa4ca30 AJ |
5600 | return; |
5601 | ||
47a3dae1 ZD |
5602 | if (side_effects_p (dest)) |
5603 | return; | |
aaa4ca30 | 5604 | |
47a3dae1 ZD |
5605 | /* If we are handling exceptions, we must be careful with memory references |
5606 | that may trap. If we are not, the behavior is undefined, so we may just | |
5607 | continue. */ | |
94f24ddc | 5608 | if (flag_non_call_exceptions && may_trap_p (dest)) |
47a3dae1 | 5609 | return; |
1d088dee | 5610 | |
c2e2375e UW |
5611 | /* Even if the destination cannot trap, the source may. In this case we'd |
5612 | need to handle updating the REG_EH_REGION note. */ | |
5613 | if (find_reg_note (insn, REG_EH_REGION, NULL_RTX)) | |
5614 | return; | |
5615 | ||
a13d4ebf | 5616 | ptr = ldst_entry (dest); |
47a3dae1 ZD |
5617 | if (!ptr->pattern_regs) |
5618 | ptr->pattern_regs = extract_mentioned_regs (dest); | |
5619 | ||
5620 | /* Do not check for anticipatability if we either found one anticipatable | |
5621 | store already, or tested for one and found out that it was killed. */ | |
5622 | check_anticipatable = 0; | |
5623 | if (!ANTIC_STORE_LIST (ptr)) | |
5624 | check_anticipatable = 1; | |
5625 | else | |
5626 | { | |
5627 | tmp = XEXP (ANTIC_STORE_LIST (ptr), 0); | |
5628 | if (tmp != NULL_RTX | |
5629 | && BLOCK_FOR_INSN (tmp) != bb) | |
5630 | check_anticipatable = 1; | |
5631 | } | |
5632 | if (check_anticipatable) | |
5633 | { | |
5634 | if (store_killed_before (dest, ptr->pattern_regs, insn, bb, regs_set_before)) | |
5635 | tmp = NULL_RTX; | |
5636 | else | |
5637 | tmp = insn; | |
5638 | ANTIC_STORE_LIST (ptr) = alloc_INSN_LIST (tmp, | |
5639 | ANTIC_STORE_LIST (ptr)); | |
5640 | } | |
a13d4ebf | 5641 | |
e0bb17a8 | 5642 | /* It is not necessary to check whether store is available if we did |
47a3dae1 ZD |
5643 | it successfully before; if we failed before, do not bother to check |
5644 | until we reach the insn that caused us to fail. */ | |
5645 | check_available = 0; | |
5646 | if (!AVAIL_STORE_LIST (ptr)) | |
5647 | check_available = 1; | |
5648 | else | |
5649 | { | |
5650 | tmp = XEXP (AVAIL_STORE_LIST (ptr), 0); | |
5651 | if (BLOCK_FOR_INSN (tmp) != bb) | |
5652 | check_available = 1; | |
5653 | } | |
5654 | if (check_available) | |
5655 | { | |
5656 | /* Check that we have already reached the insn at that the check | |
5657 | failed last time. */ | |
5658 | if (LAST_AVAIL_CHECK_FAILURE (ptr)) | |
5659 | { | |
a813c111 | 5660 | for (tmp = BB_END (bb); |
47a3dae1 ZD |
5661 | tmp != insn && tmp != LAST_AVAIL_CHECK_FAILURE (ptr); |
5662 | tmp = PREV_INSN (tmp)) | |
5663 | continue; | |
5664 | if (tmp == insn) | |
5665 | check_available = 0; | |
5666 | } | |
5667 | else | |
5668 | check_available = store_killed_after (dest, ptr->pattern_regs, insn, | |
5669 | bb, regs_set_after, | |
5670 | &LAST_AVAIL_CHECK_FAILURE (ptr)); | |
5671 | } | |
5672 | if (!check_available) | |
5673 | AVAIL_STORE_LIST (ptr) = alloc_INSN_LIST (insn, AVAIL_STORE_LIST (ptr)); | |
5674 | } | |
1d088dee | 5675 | |
47a3dae1 | 5676 | /* Find available and anticipatable stores. */ |
a13d4ebf AM |
5677 | |
5678 | static int | |
1d088dee | 5679 | compute_store_table (void) |
a13d4ebf | 5680 | { |
e0082a72 ZD |
5681 | int ret; |
5682 | basic_block bb; | |
aaa4ca30 | 5683 | unsigned regno; |
47a3dae1 ZD |
5684 | rtx insn, pat, tmp; |
5685 | int *last_set_in, *already_set; | |
5686 | struct ls_expr * ptr, **prev_next_ptr_ptr; | |
aaa4ca30 | 5687 | |
a13d4ebf AM |
5688 | max_gcse_regno = max_reg_num (); |
5689 | ||
703ad42b | 5690 | reg_set_in_block = sbitmap_vector_alloc (last_basic_block, |
aaa4ca30 | 5691 | max_gcse_regno); |
d55bc081 | 5692 | sbitmap_vector_zero (reg_set_in_block, last_basic_block); |
a13d4ebf | 5693 | pre_ldst_mems = 0; |
01c43039 | 5694 | last_set_in = xcalloc (max_gcse_regno, sizeof (int)); |
47a3dae1 | 5695 | already_set = xmalloc (sizeof (int) * max_gcse_regno); |
aaa4ca30 | 5696 | |
a13d4ebf | 5697 | /* Find all the stores we care about. */ |
e0082a72 | 5698 | FOR_EACH_BB (bb) |
a13d4ebf | 5699 | { |
47a3dae1 | 5700 | /* First compute the registers set in this block. */ |
47a3dae1 ZD |
5701 | regvec = last_set_in; |
5702 | ||
eb232f4e | 5703 | FOR_BB_INSNS (bb, insn) |
47a3dae1 ZD |
5704 | { |
5705 | if (! INSN_P (insn)) | |
5706 | continue; | |
5707 | ||
7b1b4aed | 5708 | if (CALL_P (insn)) |
47a3dae1 | 5709 | { |
47a3dae1 | 5710 | for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++) |
6e14af16 | 5711 | if (TEST_HARD_REG_BIT (regs_invalidated_by_call, regno)) |
01c43039 RE |
5712 | { |
5713 | last_set_in[regno] = INSN_UID (insn); | |
5714 | SET_BIT (reg_set_in_block[bb->index], regno); | |
5715 | } | |
47a3dae1 ZD |
5716 | } |
5717 | ||
5718 | pat = PATTERN (insn); | |
5719 | compute_store_table_current_insn = insn; | |
01c43039 | 5720 | note_stores (pat, reg_set_info, reg_set_in_block[bb->index]); |
47a3dae1 ZD |
5721 | } |
5722 | ||
47a3dae1 ZD |
5723 | /* Now find the stores. */ |
5724 | memset (already_set, 0, sizeof (int) * max_gcse_regno); | |
5725 | regvec = already_set; | |
eb232f4e | 5726 | FOR_BB_INSNS (bb, insn) |
a13d4ebf | 5727 | { |
19652adf | 5728 | if (! INSN_P (insn)) |
a13d4ebf AM |
5729 | continue; |
5730 | ||
7b1b4aed | 5731 | if (CALL_P (insn)) |
aaa4ca30 AJ |
5732 | { |
5733 | for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++) | |
6e14af16 | 5734 | if (TEST_HARD_REG_BIT (regs_invalidated_by_call, regno)) |
47a3dae1 | 5735 | already_set[regno] = 1; |
aaa4ca30 | 5736 | } |
589005ff | 5737 | |
a13d4ebf | 5738 | pat = PATTERN (insn); |
aaa4ca30 | 5739 | note_stores (pat, reg_set_info, NULL); |
589005ff | 5740 | |
a13d4ebf | 5741 | /* Now that we've marked regs, look for stores. */ |
47a3dae1 ZD |
5742 | find_moveable_store (insn, already_set, last_set_in); |
5743 | ||
5744 | /* Unmark regs that are no longer set. */ | |
01c43039 RE |
5745 | compute_store_table_current_insn = insn; |
5746 | note_stores (pat, reg_clear_last_set, last_set_in); | |
7b1b4aed | 5747 | if (CALL_P (insn)) |
01c43039 | 5748 | { |
01c43039 | 5749 | for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++) |
6e14af16 | 5750 | if (TEST_HARD_REG_BIT (regs_invalidated_by_call, regno) |
01c43039 RE |
5751 | && last_set_in[regno] == INSN_UID (insn)) |
5752 | last_set_in[regno] = 0; | |
5753 | } | |
47a3dae1 ZD |
5754 | } |
5755 | ||
01c43039 RE |
5756 | #ifdef ENABLE_CHECKING |
5757 | /* last_set_in should now be all-zero. */ | |
5758 | for (regno = 0; regno < max_gcse_regno; regno++) | |
282899df | 5759 | gcc_assert (!last_set_in[regno]); |
01c43039 RE |
5760 | #endif |
5761 | ||
47a3dae1 ZD |
5762 | /* Clear temporary marks. */ |
5763 | for (ptr = first_ls_expr (); ptr != NULL; ptr = next_ls_expr (ptr)) | |
5764 | { | |
5765 | LAST_AVAIL_CHECK_FAILURE(ptr) = NULL_RTX; | |
5766 | if (ANTIC_STORE_LIST (ptr) | |
5767 | && (tmp = XEXP (ANTIC_STORE_LIST (ptr), 0)) == NULL_RTX) | |
5768 | ANTIC_STORE_LIST (ptr) = XEXP (ANTIC_STORE_LIST (ptr), 1); | |
5769 | } | |
5770 | } | |
5771 | ||
5772 | /* Remove the stores that are not available anywhere, as there will | |
5773 | be no opportunity to optimize them. */ | |
5774 | for (ptr = pre_ldst_mems, prev_next_ptr_ptr = &pre_ldst_mems; | |
5775 | ptr != NULL; | |
5776 | ptr = *prev_next_ptr_ptr) | |
5777 | { | |
5778 | if (!AVAIL_STORE_LIST (ptr)) | |
5779 | { | |
5780 | *prev_next_ptr_ptr = ptr->next; | |
5781 | free_ldst_entry (ptr); | |
a13d4ebf | 5782 | } |
47a3dae1 ZD |
5783 | else |
5784 | prev_next_ptr_ptr = &ptr->next; | |
a13d4ebf AM |
5785 | } |
5786 | ||
5787 | ret = enumerate_ldsts (); | |
589005ff | 5788 | |
a13d4ebf AM |
5789 | if (gcse_file) |
5790 | { | |
47a3dae1 | 5791 | fprintf (gcse_file, "ST_avail and ST_antic (shown under loads..)\n"); |
a13d4ebf AM |
5792 | print_ldst_list (gcse_file); |
5793 | } | |
589005ff | 5794 | |
47a3dae1 ZD |
5795 | free (last_set_in); |
5796 | free (already_set); | |
a13d4ebf AM |
5797 | return ret; |
5798 | } | |
5799 | ||
3b14e3af ZD |
5800 | /* Check to see if the load X is aliased with STORE_PATTERN. |
5801 | AFTER is true if we are checking the case when STORE_PATTERN occurs | |
5802 | after the X. */ | |
a13d4ebf | 5803 | |
47a3dae1 | 5804 | static bool |
3b14e3af | 5805 | load_kills_store (rtx x, rtx store_pattern, int after) |
a13d4ebf | 5806 | { |
3b14e3af ZD |
5807 | if (after) |
5808 | return anti_dependence (x, store_pattern); | |
5809 | else | |
5810 | return true_dependence (store_pattern, GET_MODE (store_pattern), x, | |
5811 | rtx_addr_varies_p); | |
a13d4ebf AM |
5812 | } |
5813 | ||
589005ff | 5814 | /* Go through the entire insn X, looking for any loads which might alias |
3b14e3af ZD |
5815 | STORE_PATTERN. Return true if found. |
5816 | AFTER is true if we are checking the case when STORE_PATTERN occurs | |
5817 | after the insn X. */ | |
a13d4ebf | 5818 | |
47a3dae1 | 5819 | static bool |
3b14e3af | 5820 | find_loads (rtx x, rtx store_pattern, int after) |
a13d4ebf AM |
5821 | { |
5822 | const char * fmt; | |
8e42ace1 | 5823 | int i, j; |
47a3dae1 | 5824 | int ret = false; |
a13d4ebf | 5825 | |
24a28584 | 5826 | if (!x) |
47a3dae1 | 5827 | return false; |
24a28584 | 5828 | |
589005ff | 5829 | if (GET_CODE (x) == SET) |
a13d4ebf AM |
5830 | x = SET_SRC (x); |
5831 | ||
7b1b4aed | 5832 | if (MEM_P (x)) |
a13d4ebf | 5833 | { |
3b14e3af | 5834 | if (load_kills_store (x, store_pattern, after)) |
47a3dae1 | 5835 | return true; |
a13d4ebf AM |
5836 | } |
5837 | ||
5838 | /* Recursively process the insn. */ | |
5839 | fmt = GET_RTX_FORMAT (GET_CODE (x)); | |
589005ff | 5840 | |
a13d4ebf AM |
5841 | for (i = GET_RTX_LENGTH (GET_CODE (x)) - 1; i >= 0 && !ret; i--) |
5842 | { | |
5843 | if (fmt[i] == 'e') | |
3b14e3af | 5844 | ret |= find_loads (XEXP (x, i), store_pattern, after); |
a13d4ebf AM |
5845 | else if (fmt[i] == 'E') |
5846 | for (j = XVECLEN (x, i) - 1; j >= 0; j--) | |
3b14e3af | 5847 | ret |= find_loads (XVECEXP (x, i, j), store_pattern, after); |
a13d4ebf AM |
5848 | } |
5849 | return ret; | |
5850 | } | |
5851 | ||
589005ff | 5852 | /* Check if INSN kills the store pattern X (is aliased with it). |
3b14e3af | 5853 | AFTER is true if we are checking the case when store X occurs |
3f117656 | 5854 | after the insn. Return true if it does. */ |
a13d4ebf | 5855 | |
47a3dae1 | 5856 | static bool |
3b14e3af | 5857 | store_killed_in_insn (rtx x, rtx x_regs, rtx insn, int after) |
a13d4ebf | 5858 | { |
d088acea | 5859 | rtx reg, base, note; |
94f24ddc | 5860 | |
735e8085 | 5861 | if (!INSN_P (insn)) |
47a3dae1 | 5862 | return false; |
589005ff | 5863 | |
7b1b4aed | 5864 | if (CALL_P (insn)) |
a13d4ebf | 5865 | { |
1218665b JJ |
5866 | /* A normal or pure call might read from pattern, |
5867 | but a const call will not. */ | |
47a3dae1 ZD |
5868 | if (! CONST_OR_PURE_CALL_P (insn) || pure_call_p (insn)) |
5869 | return true; | |
5870 | ||
94f24ddc ZD |
5871 | /* But even a const call reads its parameters. Check whether the |
5872 | base of some of registers used in mem is stack pointer. */ | |
5873 | for (reg = x_regs; reg; reg = XEXP (reg, 1)) | |
5874 | { | |
bc083e18 | 5875 | base = find_base_term (XEXP (reg, 0)); |
94f24ddc ZD |
5876 | if (!base |
5877 | || (GET_CODE (base) == ADDRESS | |
5878 | && GET_MODE (base) == Pmode | |
5879 | && XEXP (base, 0) == stack_pointer_rtx)) | |
5880 | return true; | |
5881 | } | |
47a3dae1 ZD |
5882 | |
5883 | return false; | |
a13d4ebf | 5884 | } |
589005ff | 5885 | |
a13d4ebf AM |
5886 | if (GET_CODE (PATTERN (insn)) == SET) |
5887 | { | |
5888 | rtx pat = PATTERN (insn); | |
3b14e3af ZD |
5889 | rtx dest = SET_DEST (pat); |
5890 | ||
46d096a3 | 5891 | if (GET_CODE (dest) == ZERO_EXTRACT) |
3b14e3af ZD |
5892 | dest = XEXP (dest, 0); |
5893 | ||
a13d4ebf | 5894 | /* Check for memory stores to aliased objects. */ |
7b1b4aed | 5895 | if (MEM_P (dest) |
3b14e3af ZD |
5896 | && !expr_equiv_p (dest, x)) |
5897 | { | |
5898 | if (after) | |
5899 | { | |
5900 | if (output_dependence (dest, x)) | |
5901 | return true; | |
5902 | } | |
5903 | else | |
5904 | { | |
5905 | if (output_dependence (x, dest)) | |
5906 | return true; | |
5907 | } | |
5908 | } | |
d088acea ZD |
5909 | if (find_loads (SET_SRC (pat), x, after)) |
5910 | return true; | |
a13d4ebf | 5911 | } |
d088acea ZD |
5912 | else if (find_loads (PATTERN (insn), x, after)) |
5913 | return true; | |
5914 | ||
5915 | /* If this insn has a REG_EQUAL or REG_EQUIV note referencing a memory | |
5916 | location aliased with X, then this insn kills X. */ | |
5917 | note = find_reg_equal_equiv_note (insn); | |
5918 | if (! note) | |
5919 | return false; | |
5920 | note = XEXP (note, 0); | |
5921 | ||
5922 | /* However, if the note represents a must alias rather than a may | |
5923 | alias relationship, then it does not kill X. */ | |
5924 | if (expr_equiv_p (note, x)) | |
5925 | return false; | |
5926 | ||
5927 | /* See if there are any aliased loads in the note. */ | |
5928 | return find_loads (note, x, after); | |
a13d4ebf AM |
5929 | } |
5930 | ||
47a3dae1 ZD |
5931 | /* Returns true if the expression X is loaded or clobbered on or after INSN |
5932 | within basic block BB. REGS_SET_AFTER is bitmap of registers set in | |
5933 | or after the insn. X_REGS is list of registers mentioned in X. If the store | |
5934 | is killed, return the last insn in that it occurs in FAIL_INSN. */ | |
a13d4ebf | 5935 | |
47a3dae1 | 5936 | static bool |
1d088dee AJ |
5937 | store_killed_after (rtx x, rtx x_regs, rtx insn, basic_block bb, |
5938 | int *regs_set_after, rtx *fail_insn) | |
a13d4ebf | 5939 | { |
a813c111 | 5940 | rtx last = BB_END (bb), act; |
aaa4ca30 | 5941 | |
47a3dae1 | 5942 | if (!store_ops_ok (x_regs, regs_set_after)) |
1d088dee | 5943 | { |
47a3dae1 ZD |
5944 | /* We do not know where it will happen. */ |
5945 | if (fail_insn) | |
5946 | *fail_insn = NULL_RTX; | |
5947 | return true; | |
5948 | } | |
a13d4ebf | 5949 | |
47a3dae1 ZD |
5950 | /* Scan from the end, so that fail_insn is determined correctly. */ |
5951 | for (act = last; act != PREV_INSN (insn); act = PREV_INSN (act)) | |
3b14e3af | 5952 | if (store_killed_in_insn (x, x_regs, act, false)) |
47a3dae1 ZD |
5953 | { |
5954 | if (fail_insn) | |
5955 | *fail_insn = act; | |
5956 | return true; | |
5957 | } | |
589005ff | 5958 | |
47a3dae1 | 5959 | return false; |
a13d4ebf | 5960 | } |
1d088dee | 5961 | |
47a3dae1 ZD |
5962 | /* Returns true if the expression X is loaded or clobbered on or before INSN |
5963 | within basic block BB. X_REGS is list of registers mentioned in X. | |
5964 | REGS_SET_BEFORE is bitmap of registers set before or in this insn. */ | |
5965 | static bool | |
1d088dee AJ |
5966 | store_killed_before (rtx x, rtx x_regs, rtx insn, basic_block bb, |
5967 | int *regs_set_before) | |
a13d4ebf | 5968 | { |
a813c111 | 5969 | rtx first = BB_HEAD (bb); |
a13d4ebf | 5970 | |
47a3dae1 ZD |
5971 | if (!store_ops_ok (x_regs, regs_set_before)) |
5972 | return true; | |
a13d4ebf | 5973 | |
47a3dae1 | 5974 | for ( ; insn != PREV_INSN (first); insn = PREV_INSN (insn)) |
3b14e3af | 5975 | if (store_killed_in_insn (x, x_regs, insn, true)) |
47a3dae1 | 5976 | return true; |
589005ff | 5977 | |
47a3dae1 | 5978 | return false; |
a13d4ebf | 5979 | } |
1d088dee | 5980 | |
47a3dae1 ZD |
5981 | /* Fill in available, anticipatable, transparent and kill vectors in |
5982 | STORE_DATA, based on lists of available and anticipatable stores. */ | |
a13d4ebf | 5983 | static void |
1d088dee | 5984 | build_store_vectors (void) |
a13d4ebf | 5985 | { |
47a3dae1 ZD |
5986 | basic_block bb; |
5987 | int *regs_set_in_block; | |
a13d4ebf AM |
5988 | rtx insn, st; |
5989 | struct ls_expr * ptr; | |
47a3dae1 | 5990 | unsigned regno; |
a13d4ebf AM |
5991 | |
5992 | /* Build the gen_vector. This is any store in the table which is not killed | |
5993 | by aliasing later in its block. */ | |
703ad42b | 5994 | ae_gen = sbitmap_vector_alloc (last_basic_block, num_stores); |
d55bc081 | 5995 | sbitmap_vector_zero (ae_gen, last_basic_block); |
a13d4ebf | 5996 | |
703ad42b | 5997 | st_antloc = sbitmap_vector_alloc (last_basic_block, num_stores); |
d55bc081 | 5998 | sbitmap_vector_zero (st_antloc, last_basic_block); |
aaa4ca30 | 5999 | |
a13d4ebf | 6000 | for (ptr = first_ls_expr (); ptr != NULL; ptr = next_ls_expr (ptr)) |
589005ff | 6001 | { |
47a3dae1 | 6002 | for (st = AVAIL_STORE_LIST (ptr); st != NULL; st = XEXP (st, 1)) |
a13d4ebf AM |
6003 | { |
6004 | insn = XEXP (st, 0); | |
e2d2ed72 | 6005 | bb = BLOCK_FOR_INSN (insn); |
589005ff | 6006 | |
47a3dae1 ZD |
6007 | /* If we've already seen an available expression in this block, |
6008 | we can delete this one (It occurs earlier in the block). We'll | |
6009 | copy the SRC expression to an unused register in case there | |
6010 | are any side effects. */ | |
6011 | if (TEST_BIT (ae_gen[bb->index], ptr->index)) | |
a13d4ebf | 6012 | { |
47a3dae1 ZD |
6013 | rtx r = gen_reg_rtx (GET_MODE (ptr->pattern)); |
6014 | if (gcse_file) | |
6015 | fprintf (gcse_file, "Removing redundant store:\n"); | |
d088acea | 6016 | replace_store_insn (r, XEXP (st, 0), bb, ptr); |
47a3dae1 | 6017 | continue; |
a13d4ebf | 6018 | } |
47a3dae1 | 6019 | SET_BIT (ae_gen[bb->index], ptr->index); |
a13d4ebf | 6020 | } |
589005ff | 6021 | |
47a3dae1 ZD |
6022 | for (st = ANTIC_STORE_LIST (ptr); st != NULL; st = XEXP (st, 1)) |
6023 | { | |
6024 | insn = XEXP (st, 0); | |
6025 | bb = BLOCK_FOR_INSN (insn); | |
6026 | SET_BIT (st_antloc[bb->index], ptr->index); | |
6027 | } | |
a13d4ebf | 6028 | } |
589005ff | 6029 | |
703ad42b | 6030 | ae_kill = sbitmap_vector_alloc (last_basic_block, num_stores); |
d55bc081 | 6031 | sbitmap_vector_zero (ae_kill, last_basic_block); |
a13d4ebf | 6032 | |
703ad42b | 6033 | transp = sbitmap_vector_alloc (last_basic_block, num_stores); |
d55bc081 | 6034 | sbitmap_vector_zero (transp, last_basic_block); |
47a3dae1 | 6035 | regs_set_in_block = xmalloc (sizeof (int) * max_gcse_regno); |
a13d4ebf | 6036 | |
47a3dae1 ZD |
6037 | FOR_EACH_BB (bb) |
6038 | { | |
6039 | for (regno = 0; regno < max_gcse_regno; regno++) | |
6040 | regs_set_in_block[regno] = TEST_BIT (reg_set_in_block[bb->index], regno); | |
6041 | ||
6042 | for (ptr = first_ls_expr (); ptr != NULL; ptr = next_ls_expr (ptr)) | |
6043 | { | |
a813c111 | 6044 | if (store_killed_after (ptr->pattern, ptr->pattern_regs, BB_HEAD (bb), |
47a3dae1 ZD |
6045 | bb, regs_set_in_block, NULL)) |
6046 | { | |
e0bb17a8 | 6047 | /* It should not be necessary to consider the expression |
47a3dae1 ZD |
6048 | killed if it is both anticipatable and available. */ |
6049 | if (!TEST_BIT (st_antloc[bb->index], ptr->index) | |
6050 | || !TEST_BIT (ae_gen[bb->index], ptr->index)) | |
6051 | SET_BIT (ae_kill[bb->index], ptr->index); | |
1d088dee AJ |
6052 | } |
6053 | else | |
6054 | SET_BIT (transp[bb->index], ptr->index); | |
6055 | } | |
47a3dae1 ZD |
6056 | } |
6057 | ||
6058 | free (regs_set_in_block); | |
aaa4ca30 | 6059 | |
589005ff | 6060 | if (gcse_file) |
aaa4ca30 | 6061 | { |
d55bc081 ZD |
6062 | dump_sbitmap_vector (gcse_file, "st_antloc", "", st_antloc, last_basic_block); |
6063 | dump_sbitmap_vector (gcse_file, "st_kill", "", ae_kill, last_basic_block); | |
6064 | dump_sbitmap_vector (gcse_file, "Transpt", "", transp, last_basic_block); | |
6065 | dump_sbitmap_vector (gcse_file, "st_avloc", "", ae_gen, last_basic_block); | |
a13d4ebf AM |
6066 | } |
6067 | } | |
6068 | ||
fbe5a4a6 | 6069 | /* Insert an instruction at the beginning of a basic block, and update |
a813c111 | 6070 | the BB_HEAD if needed. */ |
a13d4ebf | 6071 | |
589005ff | 6072 | static void |
1d088dee | 6073 | insert_insn_start_bb (rtx insn, basic_block bb) |
a13d4ebf AM |
6074 | { |
6075 | /* Insert at start of successor block. */ | |
a813c111 SB |
6076 | rtx prev = PREV_INSN (BB_HEAD (bb)); |
6077 | rtx before = BB_HEAD (bb); | |
a13d4ebf AM |
6078 | while (before != 0) |
6079 | { | |
7b1b4aed SB |
6080 | if (! LABEL_P (before) |
6081 | && (! NOTE_P (before) | |
a13d4ebf AM |
6082 | || NOTE_LINE_NUMBER (before) != NOTE_INSN_BASIC_BLOCK)) |
6083 | break; | |
6084 | prev = before; | |
a813c111 | 6085 | if (prev == BB_END (bb)) |
a13d4ebf AM |
6086 | break; |
6087 | before = NEXT_INSN (before); | |
6088 | } | |
6089 | ||
a7102479 | 6090 | insn = emit_insn_after_noloc (insn, prev); |
a13d4ebf | 6091 | |
a13d4ebf AM |
6092 | if (gcse_file) |
6093 | { | |
6094 | fprintf (gcse_file, "STORE_MOTION insert store at start of BB %d:\n", | |
0b17ab2f | 6095 | bb->index); |
a13d4ebf AM |
6096 | print_inline_rtx (gcse_file, insn, 6); |
6097 | fprintf (gcse_file, "\n"); | |
6098 | } | |
6099 | } | |
6100 | ||
6101 | /* This routine will insert a store on an edge. EXPR is the ldst entry for | |
cc2902df | 6102 | the memory reference, and E is the edge to insert it on. Returns nonzero |
a13d4ebf AM |
6103 | if an edge insertion was performed. */ |
6104 | ||
6105 | static int | |
1d088dee | 6106 | insert_store (struct ls_expr * expr, edge e) |
a13d4ebf AM |
6107 | { |
6108 | rtx reg, insn; | |
e2d2ed72 | 6109 | basic_block bb; |
a13d4ebf | 6110 | edge tmp; |
628f6a4e | 6111 | edge_iterator ei; |
a13d4ebf AM |
6112 | |
6113 | /* We did all the deleted before this insert, so if we didn't delete a | |
6114 | store, then we haven't set the reaching reg yet either. */ | |
6115 | if (expr->reaching_reg == NULL_RTX) | |
6116 | return 0; | |
6117 | ||
a0c8285b JH |
6118 | if (e->flags & EDGE_FAKE) |
6119 | return 0; | |
6120 | ||
a13d4ebf | 6121 | reg = expr->reaching_reg; |
47a3dae1 | 6122 | insn = gen_move_insn (copy_rtx (expr->pattern), reg); |
589005ff | 6123 | |
a13d4ebf AM |
6124 | /* If we are inserting this expression on ALL predecessor edges of a BB, |
6125 | insert it at the start of the BB, and reset the insert bits on the other | |
ff7cc307 | 6126 | edges so we don't try to insert it on the other edges. */ |
e2d2ed72 | 6127 | bb = e->dest; |
628f6a4e | 6128 | FOR_EACH_EDGE (tmp, ei, e->dest->preds) |
3f2eae23 | 6129 | if (!(tmp->flags & EDGE_FAKE)) |
a0c8285b JH |
6130 | { |
6131 | int index = EDGE_INDEX (edge_list, tmp->src, tmp->dest); | |
282899df NS |
6132 | |
6133 | gcc_assert (index != EDGE_INDEX_NO_EDGE); | |
a0c8285b JH |
6134 | if (! TEST_BIT (pre_insert_map[index], expr->index)) |
6135 | break; | |
6136 | } | |
a13d4ebf AM |
6137 | |
6138 | /* If tmp is NULL, we found an insertion on every edge, blank the | |
6139 | insertion vector for these edges, and insert at the start of the BB. */ | |
e2d2ed72 | 6140 | if (!tmp && bb != EXIT_BLOCK_PTR) |
a13d4ebf | 6141 | { |
628f6a4e | 6142 | FOR_EACH_EDGE (tmp, ei, e->dest->preds) |
a13d4ebf AM |
6143 | { |
6144 | int index = EDGE_INDEX (edge_list, tmp->src, tmp->dest); | |
6145 | RESET_BIT (pre_insert_map[index], expr->index); | |
6146 | } | |
6147 | insert_insn_start_bb (insn, bb); | |
6148 | return 0; | |
6149 | } | |
589005ff | 6150 | |
b16aa8a5 RK |
6151 | /* We can't put stores in the front of blocks pointed to by abnormal |
6152 | edges since that may put a store where one didn't used to be. */ | |
6153 | gcc_assert (!(e->flags & EDGE_ABNORMAL)); | |
a13d4ebf AM |
6154 | |
6155 | insert_insn_on_edge (insn, e); | |
589005ff | 6156 | |
a13d4ebf AM |
6157 | if (gcse_file) |
6158 | { | |
6159 | fprintf (gcse_file, "STORE_MOTION insert insn on edge (%d, %d):\n", | |
0b17ab2f | 6160 | e->src->index, e->dest->index); |
a13d4ebf AM |
6161 | print_inline_rtx (gcse_file, insn, 6); |
6162 | fprintf (gcse_file, "\n"); | |
6163 | } | |
589005ff | 6164 | |
a13d4ebf AM |
6165 | return 1; |
6166 | } | |
6167 | ||
d088acea ZD |
6168 | /* Remove any REG_EQUAL or REG_EQUIV notes containing a reference to the |
6169 | memory location in SMEXPR set in basic block BB. | |
6170 | ||
6171 | This could be rather expensive. */ | |
6172 | ||
6173 | static void | |
6174 | remove_reachable_equiv_notes (basic_block bb, struct ls_expr *smexpr) | |
6175 | { | |
628f6a4e BE |
6176 | edge_iterator *stack, ei; |
6177 | int sp; | |
6178 | edge act; | |
d088acea | 6179 | sbitmap visited = sbitmap_alloc (last_basic_block); |
d088acea ZD |
6180 | rtx last, insn, note; |
6181 | rtx mem = smexpr->pattern; | |
6182 | ||
628f6a4e BE |
6183 | stack = xmalloc (sizeof (edge_iterator) * n_basic_blocks); |
6184 | sp = 0; | |
6185 | ei = ei_start (bb->succs); | |
6186 | ||
d088acea | 6187 | sbitmap_zero (visited); |
d088acea | 6188 | |
f76ccf60 | 6189 | act = (EDGE_COUNT (ei_container (ei)) > 0 ? EDGE_I (ei_container (ei), 0) : NULL); |
d088acea ZD |
6190 | while (1) |
6191 | { | |
6192 | if (!act) | |
6193 | { | |
628f6a4e | 6194 | if (!sp) |
d088acea ZD |
6195 | { |
6196 | free (stack); | |
6197 | sbitmap_free (visited); | |
6198 | return; | |
6199 | } | |
628f6a4e | 6200 | act = ei_edge (stack[--sp]); |
d088acea ZD |
6201 | } |
6202 | bb = act->dest; | |
7b1b4aed | 6203 | |
d088acea | 6204 | if (bb == EXIT_BLOCK_PTR |
d1c6a401 | 6205 | || TEST_BIT (visited, bb->index)) |
d088acea | 6206 | { |
628f6a4e BE |
6207 | if (!ei_end_p (ei)) |
6208 | ei_next (&ei); | |
6209 | act = (! ei_end_p (ei)) ? ei_edge (ei) : NULL; | |
d088acea ZD |
6210 | continue; |
6211 | } | |
6212 | SET_BIT (visited, bb->index); | |
6213 | ||
6214 | if (TEST_BIT (st_antloc[bb->index], smexpr->index)) | |
6215 | { | |
6216 | for (last = ANTIC_STORE_LIST (smexpr); | |
6217 | BLOCK_FOR_INSN (XEXP (last, 0)) != bb; | |
6218 | last = XEXP (last, 1)) | |
6219 | continue; | |
6220 | last = XEXP (last, 0); | |
6221 | } | |
6222 | else | |
a813c111 | 6223 | last = NEXT_INSN (BB_END (bb)); |
7b1b4aed | 6224 | |
a813c111 | 6225 | for (insn = BB_HEAD (bb); insn != last; insn = NEXT_INSN (insn)) |
d088acea ZD |
6226 | if (INSN_P (insn)) |
6227 | { | |
6228 | note = find_reg_equal_equiv_note (insn); | |
6229 | if (!note || !expr_equiv_p (XEXP (note, 0), mem)) | |
6230 | continue; | |
6231 | ||
6232 | if (gcse_file) | |
6233 | fprintf (gcse_file, "STORE_MOTION drop REG_EQUAL note at insn %d:\n", | |
6234 | INSN_UID (insn)); | |
6235 | remove_note (insn, note); | |
6236 | } | |
628f6a4e BE |
6237 | |
6238 | if (!ei_end_p (ei)) | |
6239 | ei_next (&ei); | |
6240 | act = (! ei_end_p (ei)) ? ei_edge (ei) : NULL; | |
6241 | ||
6242 | if (EDGE_COUNT (bb->succs) > 0) | |
d088acea ZD |
6243 | { |
6244 | if (act) | |
628f6a4e BE |
6245 | stack[sp++] = ei; |
6246 | ei = ei_start (bb->succs); | |
f76ccf60 | 6247 | act = (EDGE_COUNT (ei_container (ei)) > 0 ? EDGE_I (ei_container (ei), 0) : NULL); |
d088acea ZD |
6248 | } |
6249 | } | |
6250 | } | |
6251 | ||
a13d4ebf AM |
6252 | /* This routine will replace a store with a SET to a specified register. */ |
6253 | ||
6254 | static void | |
d088acea | 6255 | replace_store_insn (rtx reg, rtx del, basic_block bb, struct ls_expr *smexpr) |
a13d4ebf | 6256 | { |
d7fe1183 | 6257 | rtx insn, mem, note, set, ptr, pair; |
589005ff | 6258 | |
d088acea | 6259 | mem = smexpr->pattern; |
9a318d30 | 6260 | insn = gen_move_insn (reg, SET_SRC (single_set (del))); |
a13d4ebf | 6261 | insn = emit_insn_after (insn, del); |
589005ff | 6262 | |
a13d4ebf AM |
6263 | if (gcse_file) |
6264 | { | |
589005ff | 6265 | fprintf (gcse_file, |
0b17ab2f | 6266 | "STORE_MOTION delete insn in BB %d:\n ", bb->index); |
a13d4ebf | 6267 | print_inline_rtx (gcse_file, del, 6); |
8e42ace1 | 6268 | fprintf (gcse_file, "\nSTORE MOTION replaced with insn:\n "); |
a13d4ebf | 6269 | print_inline_rtx (gcse_file, insn, 6); |
8e42ace1 | 6270 | fprintf (gcse_file, "\n"); |
a13d4ebf | 6271 | } |
589005ff | 6272 | |
d088acea ZD |
6273 | for (ptr = ANTIC_STORE_LIST (smexpr); ptr; ptr = XEXP (ptr, 1)) |
6274 | if (XEXP (ptr, 0) == del) | |
6275 | { | |
6276 | XEXP (ptr, 0) = insn; | |
6277 | break; | |
6278 | } | |
d7fe1183 ZD |
6279 | |
6280 | /* Move the notes from the deleted insn to its replacement, and patch | |
6281 | up the LIBCALL notes. */ | |
6282 | REG_NOTES (insn) = REG_NOTES (del); | |
6283 | ||
6284 | note = find_reg_note (insn, REG_RETVAL, NULL_RTX); | |
6285 | if (note) | |
6286 | { | |
6287 | pair = XEXP (note, 0); | |
6288 | note = find_reg_note (pair, REG_LIBCALL, NULL_RTX); | |
6289 | XEXP (note, 0) = insn; | |
6290 | } | |
6291 | note = find_reg_note (insn, REG_LIBCALL, NULL_RTX); | |
6292 | if (note) | |
6293 | { | |
6294 | pair = XEXP (note, 0); | |
6295 | note = find_reg_note (pair, REG_RETVAL, NULL_RTX); | |
6296 | XEXP (note, 0) = insn; | |
6297 | } | |
6298 | ||
49ce134f | 6299 | delete_insn (del); |
d088acea ZD |
6300 | |
6301 | /* Now we must handle REG_EQUAL notes whose contents is equal to the mem; | |
6302 | they are no longer accurate provided that they are reached by this | |
6303 | definition, so drop them. */ | |
a813c111 | 6304 | for (; insn != NEXT_INSN (BB_END (bb)); insn = NEXT_INSN (insn)) |
d088acea ZD |
6305 | if (INSN_P (insn)) |
6306 | { | |
6307 | set = single_set (insn); | |
6308 | if (!set) | |
6309 | continue; | |
6310 | if (expr_equiv_p (SET_DEST (set), mem)) | |
6311 | return; | |
6312 | note = find_reg_equal_equiv_note (insn); | |
6313 | if (!note || !expr_equiv_p (XEXP (note, 0), mem)) | |
6314 | continue; | |
6315 | ||
6316 | if (gcse_file) | |
6317 | fprintf (gcse_file, "STORE_MOTION drop REG_EQUAL note at insn %d:\n", | |
6318 | INSN_UID (insn)); | |
6319 | remove_note (insn, note); | |
6320 | } | |
6321 | remove_reachable_equiv_notes (bb, smexpr); | |
a13d4ebf AM |
6322 | } |
6323 | ||
6324 | ||
6325 | /* Delete a store, but copy the value that would have been stored into | |
6326 | the reaching_reg for later storing. */ | |
6327 | ||
6328 | static void | |
1d088dee | 6329 | delete_store (struct ls_expr * expr, basic_block bb) |
a13d4ebf AM |
6330 | { |
6331 | rtx reg, i, del; | |
6332 | ||
6333 | if (expr->reaching_reg == NULL_RTX) | |
6334 | expr->reaching_reg = gen_reg_rtx (GET_MODE (expr->pattern)); | |
a13d4ebf | 6335 | |
a13d4ebf | 6336 | reg = expr->reaching_reg; |
589005ff | 6337 | |
a13d4ebf AM |
6338 | for (i = AVAIL_STORE_LIST (expr); i; i = XEXP (i, 1)) |
6339 | { | |
6340 | del = XEXP (i, 0); | |
e2d2ed72 | 6341 | if (BLOCK_FOR_INSN (del) == bb) |
a13d4ebf | 6342 | { |
589005ff | 6343 | /* We know there is only one since we deleted redundant |
a13d4ebf | 6344 | ones during the available computation. */ |
d088acea | 6345 | replace_store_insn (reg, del, bb, expr); |
a13d4ebf AM |
6346 | break; |
6347 | } | |
6348 | } | |
6349 | } | |
6350 | ||
6351 | /* Free memory used by store motion. */ | |
6352 | ||
589005ff | 6353 | static void |
1d088dee | 6354 | free_store_memory (void) |
a13d4ebf AM |
6355 | { |
6356 | free_ldst_mems (); | |
589005ff | 6357 | |
a13d4ebf | 6358 | if (ae_gen) |
5a660bff | 6359 | sbitmap_vector_free (ae_gen); |
a13d4ebf | 6360 | if (ae_kill) |
5a660bff | 6361 | sbitmap_vector_free (ae_kill); |
a13d4ebf | 6362 | if (transp) |
5a660bff | 6363 | sbitmap_vector_free (transp); |
a13d4ebf | 6364 | if (st_antloc) |
5a660bff | 6365 | sbitmap_vector_free (st_antloc); |
a13d4ebf | 6366 | if (pre_insert_map) |
5a660bff | 6367 | sbitmap_vector_free (pre_insert_map); |
a13d4ebf | 6368 | if (pre_delete_map) |
5a660bff | 6369 | sbitmap_vector_free (pre_delete_map); |
aaa4ca30 AJ |
6370 | if (reg_set_in_block) |
6371 | sbitmap_vector_free (reg_set_in_block); | |
589005ff | 6372 | |
a13d4ebf AM |
6373 | ae_gen = ae_kill = transp = st_antloc = NULL; |
6374 | pre_insert_map = pre_delete_map = reg_set_in_block = NULL; | |
6375 | } | |
6376 | ||
6377 | /* Perform store motion. Much like gcse, except we move expressions the | |
6378 | other way by looking at the flowgraph in reverse. */ | |
6379 | ||
6380 | static void | |
1d088dee | 6381 | store_motion (void) |
a13d4ebf | 6382 | { |
e0082a72 | 6383 | basic_block bb; |
0b17ab2f | 6384 | int x; |
a13d4ebf | 6385 | struct ls_expr * ptr; |
adfcce61 | 6386 | int update_flow = 0; |
aaa4ca30 | 6387 | |
a13d4ebf AM |
6388 | if (gcse_file) |
6389 | { | |
6390 | fprintf (gcse_file, "before store motion\n"); | |
6391 | print_rtl (gcse_file, get_insns ()); | |
6392 | } | |
6393 | ||
a13d4ebf | 6394 | init_alias_analysis (); |
aaa4ca30 | 6395 | |
47a3dae1 | 6396 | /* Find all the available and anticipatable stores. */ |
a13d4ebf AM |
6397 | num_stores = compute_store_table (); |
6398 | if (num_stores == 0) | |
6399 | { | |
aaa4ca30 | 6400 | sbitmap_vector_free (reg_set_in_block); |
a13d4ebf AM |
6401 | end_alias_analysis (); |
6402 | return; | |
6403 | } | |
6404 | ||
47a3dae1 | 6405 | /* Now compute kill & transp vectors. */ |
a13d4ebf | 6406 | build_store_vectors (); |
47a3dae1 | 6407 | add_noreturn_fake_exit_edges (); |
2a868ea4 | 6408 | connect_infinite_loops_to_exit (); |
a13d4ebf | 6409 | |
589005ff KH |
6410 | edge_list = pre_edge_rev_lcm (gcse_file, num_stores, transp, ae_gen, |
6411 | st_antloc, ae_kill, &pre_insert_map, | |
a13d4ebf AM |
6412 | &pre_delete_map); |
6413 | ||
6414 | /* Now we want to insert the new stores which are going to be needed. */ | |
6415 | for (ptr = first_ls_expr (); ptr != NULL; ptr = next_ls_expr (ptr)) | |
6416 | { | |
b16aa8a5 RK |
6417 | /* If any of the edges we have above are abnormal, we can't move this |
6418 | store. */ | |
6419 | for (x = NUM_EDGES (edge_list) - 1; x >= 0; x--) | |
6420 | if (TEST_BIT (pre_insert_map[x], ptr->index) | |
6421 | && (INDEX_EDGE (edge_list, x)->flags & EDGE_ABNORMAL)) | |
6422 | break; | |
6423 | ||
6424 | if (x >= 0) | |
6425 | { | |
6426 | if (gcse_file != NULL) | |
6427 | fprintf (gcse_file, | |
6428 | "Can't replace store %d: abnormal edge from %d to %d\n", | |
6429 | ptr->index, INDEX_EDGE (edge_list, x)->src->index, | |
6430 | INDEX_EDGE (edge_list, x)->dest->index); | |
6431 | continue; | |
6432 | } | |
6433 | ||
6434 | /* Now we want to insert the new stores which are going to be needed. */ | |
6435 | ||
e0082a72 ZD |
6436 | FOR_EACH_BB (bb) |
6437 | if (TEST_BIT (pre_delete_map[bb->index], ptr->index)) | |
6438 | delete_store (ptr, bb); | |
a13d4ebf | 6439 | |
0b17ab2f RH |
6440 | for (x = 0; x < NUM_EDGES (edge_list); x++) |
6441 | if (TEST_BIT (pre_insert_map[x], ptr->index)) | |
6442 | update_flow |= insert_store (ptr, INDEX_EDGE (edge_list, x)); | |
a13d4ebf AM |
6443 | } |
6444 | ||
6445 | if (update_flow) | |
6446 | commit_edge_insertions (); | |
aaa4ca30 | 6447 | |
a13d4ebf AM |
6448 | free_store_memory (); |
6449 | free_edge_list (edge_list); | |
6809cbf9 | 6450 | remove_fake_exit_edges (); |
a13d4ebf AM |
6451 | end_alias_analysis (); |
6452 | } | |
e2500fed | 6453 | |
a0134312 RS |
6454 | \f |
6455 | /* Entry point for jump bypassing optimization pass. */ | |
6456 | ||
6457 | int | |
1d088dee | 6458 | bypass_jumps (FILE *file) |
a0134312 RS |
6459 | { |
6460 | int changed; | |
6461 | ||
6462 | /* We do not construct an accurate cfg in functions which call | |
6463 | setjmp, so just punt to be safe. */ | |
6464 | if (current_function_calls_setjmp) | |
6465 | return 0; | |
6466 | ||
6467 | /* For calling dump_foo fns from gdb. */ | |
6468 | debug_stderr = stderr; | |
6469 | gcse_file = file; | |
6470 | ||
6471 | /* Identify the basic block information for this function, including | |
6472 | successors and predecessors. */ | |
6473 | max_gcse_regno = max_reg_num (); | |
6474 | ||
6475 | if (file) | |
6476 | dump_flow_info (file); | |
6477 | ||
6614fd40 | 6478 | /* Return if there's nothing to do, or it is too expensive. */ |
d128effb | 6479 | if (n_basic_blocks <= 1 || is_too_expensive (_ ("jump bypassing disabled"))) |
a0134312 RS |
6480 | return 0; |
6481 | ||
a0134312 RS |
6482 | gcc_obstack_init (&gcse_obstack); |
6483 | bytes_used = 0; | |
6484 | ||
6485 | /* We need alias. */ | |
6486 | init_alias_analysis (); | |
6487 | ||
6488 | /* Record where pseudo-registers are set. This data is kept accurate | |
6489 | during each pass. ??? We could also record hard-reg information here | |
6490 | [since it's unchanging], however it is currently done during hash table | |
6491 | computation. | |
6492 | ||
6493 | It may be tempting to compute MEM set information here too, but MEM sets | |
6494 | will be subject to code motion one day and thus we need to compute | |
6495 | information about memory sets when we build the hash tables. */ | |
6496 | ||
6497 | alloc_reg_set_mem (max_gcse_regno); | |
eb232f4e | 6498 | compute_sets (); |
a0134312 RS |
6499 | |
6500 | max_gcse_regno = max_reg_num (); | |
eb232f4e SB |
6501 | alloc_gcse_mem (); |
6502 | changed = one_cprop_pass (MAX_GCSE_PASSES + 2, true, true); | |
a0134312 RS |
6503 | free_gcse_mem (); |
6504 | ||
6505 | if (file) | |
6506 | { | |
6507 | fprintf (file, "BYPASS of %s: %d basic blocks, ", | |
faed5cc3 | 6508 | current_function_name (), n_basic_blocks); |
a0134312 RS |
6509 | fprintf (file, "%d bytes\n\n", bytes_used); |
6510 | } | |
6511 | ||
6512 | obstack_free (&gcse_obstack, NULL); | |
6513 | free_reg_set_mem (); | |
6514 | ||
6515 | /* We are finished with alias. */ | |
6516 | end_alias_analysis (); | |
6517 | allocate_reg_info (max_reg_num (), FALSE, FALSE); | |
6518 | ||
6519 | return changed; | |
6520 | } | |
6521 | ||
d128effb NS |
6522 | /* Return true if the graph is too expensive to optimize. PASS is the |
6523 | optimization about to be performed. */ | |
6524 | ||
6525 | static bool | |
6526 | is_too_expensive (const char *pass) | |
6527 | { | |
6528 | /* Trying to perform global optimizations on flow graphs which have | |
6529 | a high connectivity will take a long time and is unlikely to be | |
6530 | particularly useful. | |
7b1b4aed | 6531 | |
d128effb NS |
6532 | In normal circumstances a cfg should have about twice as many |
6533 | edges as blocks. But we do not want to punish small functions | |
6534 | which have a couple switch statements. Rather than simply | |
6535 | threshold the number of blocks, uses something with a more | |
6536 | graceful degradation. */ | |
6537 | if (n_edges > 20000 + n_basic_blocks * 4) | |
6538 | { | |
44c21c7f DD |
6539 | warning (OPT_Wdisabled_optimization, |
6540 | "%s: %d basic blocks and %d edges/basic block", | |
6541 | pass, n_basic_blocks, n_edges / n_basic_blocks); | |
7b1b4aed | 6542 | |
d128effb NS |
6543 | return true; |
6544 | } | |
6545 | ||
6546 | /* If allocating memory for the cprop bitmap would take up too much | |
6547 | storage it's better just to disable the optimization. */ | |
6548 | if ((n_basic_blocks | |
6549 | * SBITMAP_SET_SIZE (max_reg_num ()) | |
6550 | * sizeof (SBITMAP_ELT_TYPE)) > MAX_GCSE_MEMORY) | |
6551 | { | |
44c21c7f DD |
6552 | warning (OPT_Wdisabled_optimization, |
6553 | "%s: %d basic blocks and %d registers", | |
6554 | pass, n_basic_blocks, max_reg_num ()); | |
d128effb NS |
6555 | |
6556 | return true; | |
6557 | } | |
6558 | ||
6559 | return false; | |
6560 | } | |
6561 | ||
e2500fed | 6562 | #include "gt-gcse.h" |