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058e97ec 1/* IRA allocation based on graph coloring.
8d9254fc 2 Copyright (C) 2006-2020 Free Software Foundation, Inc.
058e97ec
VM
3 Contributed by Vladimir Makarov <vmakarov@redhat.com>.
4
5This file is part of GCC.
6
7GCC is free software; you can redistribute it and/or modify it under
8the terms of the GNU General Public License as published by the Free
9Software Foundation; either version 3, or (at your option) any later
10version.
11
12GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13WARRANTY; without even the implied warranty of MERCHANTABILITY or
14FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
15for more details.
16
17You should have received a copy of the GNU General Public License
18along with GCC; see the file COPYING3. If not see
19<http://www.gnu.org/licenses/>. */
20
21#include "config.h"
22#include "system.h"
23#include "coretypes.h"
c7131fb2 24#include "backend.h"
957060b5 25#include "target.h"
058e97ec 26#include "rtl.h"
957060b5
AM
27#include "tree.h"
28#include "predict.h"
c7131fb2 29#include "df.h"
4d0cdd0c 30#include "memmodel.h"
058e97ec 31#include "tm_p.h"
957060b5 32#include "insn-config.h"
058e97ec 33#include "regs.h"
957060b5
AM
34#include "ira.h"
35#include "ira-int.h"
058e97ec 36#include "reload.h"
c7131fb2 37#include "cfgloop.h"
058e97ec 38
27508f5f 39typedef struct allocno_hard_regs *allocno_hard_regs_t;
1756cb66
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40
41/* The structure contains information about hard registers can be
27508f5f 42 assigned to allocnos. Usually it is allocno profitable hard
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43 registers but in some cases this set can be a bit different. Major
44 reason of the difference is a requirement to use hard register sets
45 that form a tree or a forest (set of trees), i.e. hard register set
46 of a node should contain hard register sets of its subnodes. */
27508f5f 47struct allocno_hard_regs
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48{
49 /* Hard registers can be assigned to an allocno. */
50 HARD_REG_SET set;
51 /* Overall (spilling) cost of all allocnos with given register
52 set. */
a9243bfc 53 int64_t cost;
1756cb66
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54};
55
27508f5f 56typedef struct allocno_hard_regs_node *allocno_hard_regs_node_t;
1756cb66 57
27508f5f 58/* A node representing allocno hard registers. Such nodes form a
1756cb66 59 forest (set of trees). Each subnode of given node in the forest
27508f5f 60 refers for hard register set (usually allocno profitable hard
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61 register set) which is a subset of one referred from given
62 node. */
27508f5f 63struct allocno_hard_regs_node
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64{
65 /* Set up number of the node in preorder traversing of the forest. */
66 int preorder_num;
67 /* Used for different calculation like finding conflict size of an
68 allocno. */
69 int check;
70 /* Used for calculation of conflict size of an allocno. The
27508f5f 71 conflict size of the allocno is maximal number of given allocno
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72 hard registers needed for allocation of the conflicting allocnos.
73 Given allocno is trivially colored if this number plus the number
74 of hard registers needed for given allocno is not greater than
75 the number of given allocno hard register set. */
76 int conflict_size;
77 /* The number of hard registers given by member hard_regs. */
78 int hard_regs_num;
79 /* The following member is used to form the final forest. */
80 bool used_p;
81 /* Pointer to the corresponding profitable hard registers. */
27508f5f 82 allocno_hard_regs_t hard_regs;
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83 /* Parent, first subnode, previous and next node with the same
84 parent in the forest. */
27508f5f 85 allocno_hard_regs_node_t parent, first, prev, next;
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86};
87
3b6d1699
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88/* Info about changing hard reg costs of an allocno. */
89struct update_cost_record
90{
91 /* Hard regno for which we changed the cost. */
92 int hard_regno;
93 /* Divisor used when we changed the cost of HARD_REGNO. */
94 int divisor;
95 /* Next record for given allocno. */
96 struct update_cost_record *next;
97};
98
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99/* To decrease footprint of ira_allocno structure we store all data
100 needed only for coloring in the following structure. */
101struct allocno_color_data
102{
103 /* TRUE value means that the allocno was not removed yet from the
df3e3493 104 conflicting graph during coloring. */
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105 unsigned int in_graph_p : 1;
106 /* TRUE if it is put on the stack to make other allocnos
107 colorable. */
108 unsigned int may_be_spilled_p : 1;
27508f5f 109 /* TRUE if the allocno is trivially colorable. */
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110 unsigned int colorable_p : 1;
111 /* Number of hard registers of the allocno class really
112 available for the allocno allocation. It is number of the
113 profitable hard regs. */
114 int available_regs_num;
8c679205
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115 /* Sum of frequencies of hard register preferences of all
116 conflicting allocnos which are not the coloring stack yet. */
117 int conflict_allocno_hard_prefs;
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118 /* Allocnos in a bucket (used in coloring) chained by the following
119 two members. */
120 ira_allocno_t next_bucket_allocno;
121 ira_allocno_t prev_bucket_allocno;
122 /* Used for temporary purposes. */
123 int temp;
27508f5f
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124 /* Used to exclude repeated processing. */
125 int last_process;
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126 /* Profitable hard regs available for this pseudo allocation. It
127 means that the set excludes unavailable hard regs and hard regs
128 conflicting with given pseudo. They should be of the allocno
129 class. */
130 HARD_REG_SET profitable_hard_regs;
27508f5f
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131 /* The allocno hard registers node. */
132 allocno_hard_regs_node_t hard_regs_node;
133 /* Array of structures allocno_hard_regs_subnode representing
134 given allocno hard registers node (the 1st element in the array)
135 and all its subnodes in the tree (forest) of allocno hard
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136 register nodes (see comments above). */
137 int hard_regs_subnodes_start;
2b9c63a2 138 /* The length of the previous array. */
1756cb66 139 int hard_regs_subnodes_num;
3b6d1699
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140 /* Records about updating allocno hard reg costs from copies. If
141 the allocno did not get expected hard register, these records are
142 used to restore original hard reg costs of allocnos connected to
143 this allocno by copies. */
144 struct update_cost_record *update_cost_records;
bf08fb16
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145 /* Threads. We collect allocnos connected by copies into threads
146 and try to assign hard regs to allocnos by threads. */
147 /* Allocno representing all thread. */
148 ira_allocno_t first_thread_allocno;
149 /* Allocnos in thread forms a cycle list through the following
150 member. */
151 ira_allocno_t next_thread_allocno;
152 /* All thread frequency. Defined only for first thread allocno. */
153 int thread_freq;
897a7308
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154 /* Sum of frequencies of hard register preferences of the allocno. */
155 int hard_reg_prefs;
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156};
157
158/* See above. */
27508f5f 159typedef struct allocno_color_data *allocno_color_data_t;
1756cb66 160
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161/* Container for storing allocno data concerning coloring. */
162static allocno_color_data_t allocno_color_data;
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163
164/* Macro to access the data concerning coloring. */
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165#define ALLOCNO_COLOR_DATA(a) ((allocno_color_data_t) ALLOCNO_ADD_DATA (a))
166
167/* Used for finding allocno colorability to exclude repeated allocno
168 processing and for updating preferencing to exclude repeated
169 allocno processing during assignment. */
170static int curr_allocno_process;
1756cb66 171
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172/* This file contains code for regional graph coloring, spill/restore
173 code placement optimization, and code helping the reload pass to do
174 a better job. */
175
176/* Bitmap of allocnos which should be colored. */
177static bitmap coloring_allocno_bitmap;
178
179/* Bitmap of allocnos which should be taken into account during
180 coloring. In general case it contains allocnos from
181 coloring_allocno_bitmap plus other already colored conflicting
182 allocnos. */
183static bitmap consideration_allocno_bitmap;
184
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185/* All allocnos sorted according their priorities. */
186static ira_allocno_t *sorted_allocnos;
187
188/* Vec representing the stack of allocnos used during coloring. */
9771b263 189static vec<ira_allocno_t> allocno_stack_vec;
058e97ec 190
71af27d2
OH
191/* Helper for qsort comparison callbacks - return a positive integer if
192 X > Y, or a negative value otherwise. Use a conditional expression
193 instead of a difference computation to insulate from possible overflow
194 issues, e.g. X - Y < 0 for some X > 0 and Y < 0. */
195#define SORTGT(x,y) (((x) > (y)) ? 1 : -1)
196
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197\f
198
27508f5f 199/* Definition of vector of allocno hard registers. */
fe82cdfb 200
27508f5f 201/* Vector of unique allocno hard registers. */
9771b263 202static vec<allocno_hard_regs_t> allocno_hard_regs_vec;
1756cb66 203
8d67ee55 204struct allocno_hard_regs_hasher : nofree_ptr_hash <allocno_hard_regs>
1756cb66 205{
67f58944
TS
206 static inline hashval_t hash (const allocno_hard_regs *);
207 static inline bool equal (const allocno_hard_regs *,
208 const allocno_hard_regs *);
4a8fb1a1 209};
1756cb66 210
4a8fb1a1
LC
211/* Returns hash value for allocno hard registers V. */
212inline hashval_t
67f58944 213allocno_hard_regs_hasher::hash (const allocno_hard_regs *hv)
4a8fb1a1 214{
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215 return iterative_hash (&hv->set, sizeof (HARD_REG_SET), 0);
216}
217
27508f5f 218/* Compares allocno hard registers V1 and V2. */
4a8fb1a1 219inline bool
67f58944
TS
220allocno_hard_regs_hasher::equal (const allocno_hard_regs *hv1,
221 const allocno_hard_regs *hv2)
1756cb66 222{
a8579651 223 return hv1->set == hv2->set;
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224}
225
27508f5f 226/* Hash table of unique allocno hard registers. */
c203e8a7 227static hash_table<allocno_hard_regs_hasher> *allocno_hard_regs_htab;
1756cb66 228
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229/* Return allocno hard registers in the hash table equal to HV. */
230static allocno_hard_regs_t
231find_hard_regs (allocno_hard_regs_t hv)
1756cb66 232{
c203e8a7 233 return allocno_hard_regs_htab->find (hv);
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234}
235
236/* Insert allocno hard registers HV in the hash table (if it is not
237 there yet) and return the value which in the table. */
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238static allocno_hard_regs_t
239insert_hard_regs (allocno_hard_regs_t hv)
1756cb66 240{
c203e8a7 241 allocno_hard_regs **slot = allocno_hard_regs_htab->find_slot (hv, INSERT);
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242
243 if (*slot == NULL)
244 *slot = hv;
4a8fb1a1 245 return *slot;
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246}
247
27508f5f 248/* Initialize data concerning allocno hard registers. */
1756cb66 249static void
27508f5f 250init_allocno_hard_regs (void)
1756cb66 251{
9771b263 252 allocno_hard_regs_vec.create (200);
c203e8a7
TS
253 allocno_hard_regs_htab
254 = new hash_table<allocno_hard_regs_hasher> (200);
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255}
256
27508f5f 257/* Add (or update info about) allocno hard registers with SET and
1756cb66 258 COST. */
27508f5f 259static allocno_hard_regs_t
a9243bfc 260add_allocno_hard_regs (HARD_REG_SET set, int64_t cost)
1756cb66 261{
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262 struct allocno_hard_regs temp;
263 allocno_hard_regs_t hv;
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264
265 gcc_assert (! hard_reg_set_empty_p (set));
6576d245 266 temp.set = set;
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267 if ((hv = find_hard_regs (&temp)) != NULL)
268 hv->cost += cost;
269 else
270 {
27508f5f
VM
271 hv = ((struct allocno_hard_regs *)
272 ira_allocate (sizeof (struct allocno_hard_regs)));
6576d245 273 hv->set = set;
1756cb66 274 hv->cost = cost;
9771b263 275 allocno_hard_regs_vec.safe_push (hv);
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276 insert_hard_regs (hv);
277 }
278 return hv;
279}
280
281/* Finalize data concerning allocno hard registers. */
282static void
27508f5f 283finish_allocno_hard_regs (void)
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284{
285 int i;
27508f5f 286 allocno_hard_regs_t hv;
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287
288 for (i = 0;
9771b263 289 allocno_hard_regs_vec.iterate (i, &hv);
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290 i++)
291 ira_free (hv);
c203e8a7
TS
292 delete allocno_hard_regs_htab;
293 allocno_hard_regs_htab = NULL;
9771b263 294 allocno_hard_regs_vec.release ();
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295}
296
297/* Sort hard regs according to their frequency of usage. */
298static int
27508f5f 299allocno_hard_regs_compare (const void *v1p, const void *v2p)
1756cb66 300{
27508f5f
VM
301 allocno_hard_regs_t hv1 = *(const allocno_hard_regs_t *) v1p;
302 allocno_hard_regs_t hv2 = *(const allocno_hard_regs_t *) v2p;
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303
304 if (hv2->cost > hv1->cost)
305 return 1;
306 else if (hv2->cost < hv1->cost)
307 return -1;
5804f627 308 return SORTGT (allocno_hard_regs_hasher::hash(hv2), allocno_hard_regs_hasher::hash(hv1));
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309}
310
311\f
312
313/* Used for finding a common ancestor of two allocno hard registers
314 nodes in the forest. We use the current value of
315 'node_check_tick' to mark all nodes from one node to the top and
316 then walking up from another node until we find a marked node.
317
318 It is also used to figure out allocno colorability as a mark that
319 we already reset value of member 'conflict_size' for the forest
320 node corresponding to the processed allocno. */
321static int node_check_tick;
322
323/* Roots of the forest containing hard register sets can be assigned
27508f5f
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324 to allocnos. */
325static allocno_hard_regs_node_t hard_regs_roots;
1756cb66 326
27508f5f 327/* Definition of vector of allocno hard register nodes. */
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328
329/* Vector used to create the forest. */
9771b263 330static vec<allocno_hard_regs_node_t> hard_regs_node_vec;
1756cb66 331
27508f5f 332/* Create and return allocno hard registers node containing allocno
1756cb66 333 hard registers HV. */
27508f5f
VM
334static allocno_hard_regs_node_t
335create_new_allocno_hard_regs_node (allocno_hard_regs_t hv)
1756cb66 336{
27508f5f 337 allocno_hard_regs_node_t new_node;
1756cb66 338
27508f5f
VM
339 new_node = ((struct allocno_hard_regs_node *)
340 ira_allocate (sizeof (struct allocno_hard_regs_node)));
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341 new_node->check = 0;
342 new_node->hard_regs = hv;
343 new_node->hard_regs_num = hard_reg_set_size (hv->set);
344 new_node->first = NULL;
345 new_node->used_p = false;
346 return new_node;
347}
348
27508f5f 349/* Add allocno hard registers node NEW_NODE to the forest on its level
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350 given by ROOTS. */
351static void
27508f5f
VM
352add_new_allocno_hard_regs_node_to_forest (allocno_hard_regs_node_t *roots,
353 allocno_hard_regs_node_t new_node)
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VM
354{
355 new_node->next = *roots;
356 if (new_node->next != NULL)
357 new_node->next->prev = new_node;
358 new_node->prev = NULL;
359 *roots = new_node;
360}
361
27508f5f 362/* Add allocno hard registers HV (or its best approximation if it is
1756cb66
VM
363 not possible) to the forest on its level given by ROOTS. */
364static void
27508f5f
VM
365add_allocno_hard_regs_to_forest (allocno_hard_regs_node_t *roots,
366 allocno_hard_regs_t hv)
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VM
367{
368 unsigned int i, start;
27508f5f 369 allocno_hard_regs_node_t node, prev, new_node;
1756cb66 370 HARD_REG_SET temp_set;
27508f5f 371 allocno_hard_regs_t hv2;
1756cb66 372
9771b263 373 start = hard_regs_node_vec.length ();
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VM
374 for (node = *roots; node != NULL; node = node->next)
375 {
a8579651 376 if (hv->set == node->hard_regs->set)
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VM
377 return;
378 if (hard_reg_set_subset_p (hv->set, node->hard_regs->set))
379 {
27508f5f 380 add_allocno_hard_regs_to_forest (&node->first, hv);
1756cb66
VM
381 return;
382 }
383 if (hard_reg_set_subset_p (node->hard_regs->set, hv->set))
9771b263 384 hard_regs_node_vec.safe_push (node);
1756cb66
VM
385 else if (hard_reg_set_intersect_p (hv->set, node->hard_regs->set))
386 {
dc333d8f 387 temp_set = hv->set & node->hard_regs->set;
27508f5f
VM
388 hv2 = add_allocno_hard_regs (temp_set, hv->cost);
389 add_allocno_hard_regs_to_forest (&node->first, hv2);
1756cb66
VM
390 }
391 }
9771b263 392 if (hard_regs_node_vec.length ()
1756cb66
VM
393 > start + 1)
394 {
395 /* Create a new node which contains nodes in hard_regs_node_vec. */
396 CLEAR_HARD_REG_SET (temp_set);
397 for (i = start;
9771b263 398 i < hard_regs_node_vec.length ();
1756cb66
VM
399 i++)
400 {
9771b263 401 node = hard_regs_node_vec[i];
44942965 402 temp_set |= node->hard_regs->set;
1756cb66 403 }
27508f5f
VM
404 hv = add_allocno_hard_regs (temp_set, hv->cost);
405 new_node = create_new_allocno_hard_regs_node (hv);
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VM
406 prev = NULL;
407 for (i = start;
9771b263 408 i < hard_regs_node_vec.length ();
1756cb66
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409 i++)
410 {
9771b263 411 node = hard_regs_node_vec[i];
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412 if (node->prev == NULL)
413 *roots = node->next;
414 else
415 node->prev->next = node->next;
416 if (node->next != NULL)
417 node->next->prev = node->prev;
418 if (prev == NULL)
419 new_node->first = node;
420 else
421 prev->next = node;
422 node->prev = prev;
423 node->next = NULL;
424 prev = node;
425 }
27508f5f 426 add_new_allocno_hard_regs_node_to_forest (roots, new_node);
1756cb66 427 }
9771b263 428 hard_regs_node_vec.truncate (start);
1756cb66
VM
429}
430
27508f5f 431/* Add allocno hard registers nodes starting with the forest level
1756cb66
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432 given by FIRST which contains biggest set inside SET. */
433static void
27508f5f 434collect_allocno_hard_regs_cover (allocno_hard_regs_node_t first,
1756cb66
VM
435 HARD_REG_SET set)
436{
27508f5f 437 allocno_hard_regs_node_t node;
1756cb66
VM
438
439 ira_assert (first != NULL);
440 for (node = first; node != NULL; node = node->next)
441 if (hard_reg_set_subset_p (node->hard_regs->set, set))
9771b263 442 hard_regs_node_vec.safe_push (node);
1756cb66 443 else if (hard_reg_set_intersect_p (set, node->hard_regs->set))
27508f5f 444 collect_allocno_hard_regs_cover (node->first, set);
1756cb66
VM
445}
446
27508f5f 447/* Set up field parent as PARENT in all allocno hard registers nodes
1756cb66
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448 in forest given by FIRST. */
449static void
27508f5f
VM
450setup_allocno_hard_regs_nodes_parent (allocno_hard_regs_node_t first,
451 allocno_hard_regs_node_t parent)
1756cb66 452{
27508f5f 453 allocno_hard_regs_node_t node;
1756cb66
VM
454
455 for (node = first; node != NULL; node = node->next)
456 {
457 node->parent = parent;
27508f5f 458 setup_allocno_hard_regs_nodes_parent (node->first, node);
1756cb66
VM
459 }
460}
461
27508f5f 462/* Return allocno hard registers node which is a first common ancestor
1756cb66 463 node of FIRST and SECOND in the forest. */
27508f5f
VM
464static allocno_hard_regs_node_t
465first_common_ancestor_node (allocno_hard_regs_node_t first,
466 allocno_hard_regs_node_t second)
1756cb66 467{
27508f5f 468 allocno_hard_regs_node_t node;
1756cb66
VM
469
470 node_check_tick++;
471 for (node = first; node != NULL; node = node->parent)
472 node->check = node_check_tick;
473 for (node = second; node != NULL; node = node->parent)
474 if (node->check == node_check_tick)
475 return node;
476 return first_common_ancestor_node (second, first);
477}
478
479/* Print hard reg set SET to F. */
480static void
481print_hard_reg_set (FILE *f, HARD_REG_SET set, bool new_line_p)
482{
a5e3dd5d 483 int i, start, end;
1756cb66 484
a5e3dd5d 485 for (start = end = -1, i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1756cb66 486 {
a5e3dd5d
HPN
487 bool reg_included = TEST_HARD_REG_BIT (set, i);
488
489 if (reg_included)
1756cb66 490 {
a5e3dd5d 491 if (start == -1)
1756cb66 492 start = i;
a5e3dd5d 493 end = i;
1756cb66 494 }
a5e3dd5d 495 if (start >= 0 && (!reg_included || i == FIRST_PSEUDO_REGISTER - 1))
1756cb66 496 {
a5e3dd5d 497 if (start == end)
1756cb66 498 fprintf (f, " %d", start);
a5e3dd5d
HPN
499 else if (start == end + 1)
500 fprintf (f, " %d %d", start, end);
1756cb66 501 else
a5e3dd5d 502 fprintf (f, " %d-%d", start, end);
1756cb66
VM
503 start = -1;
504 }
505 }
506 if (new_line_p)
507 fprintf (f, "\n");
508}
509
27508f5f 510/* Print allocno hard register subforest given by ROOTS and its LEVEL
1756cb66
VM
511 to F. */
512static void
27508f5f 513print_hard_regs_subforest (FILE *f, allocno_hard_regs_node_t roots,
1756cb66
VM
514 int level)
515{
516 int i;
27508f5f 517 allocno_hard_regs_node_t node;
1756cb66
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518
519 for (node = roots; node != NULL; node = node->next)
520 {
521 fprintf (f, " ");
522 for (i = 0; i < level * 2; i++)
523 fprintf (f, " ");
524 fprintf (f, "%d:(", node->preorder_num);
525 print_hard_reg_set (f, node->hard_regs->set, false);
16998094 526 fprintf (f, ")@%" PRId64"\n", node->hard_regs->cost);
1756cb66
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527 print_hard_regs_subforest (f, node->first, level + 1);
528 }
529}
530
27508f5f 531/* Print the allocno hard register forest to F. */
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532static void
533print_hard_regs_forest (FILE *f)
534{
535 fprintf (f, " Hard reg set forest:\n");
536 print_hard_regs_subforest (f, hard_regs_roots, 1);
537}
538
27508f5f 539/* Print the allocno hard register forest to stderr. */
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540void
541ira_debug_hard_regs_forest (void)
542{
543 print_hard_regs_forest (stderr);
544}
545
27508f5f 546/* Remove unused allocno hard registers nodes from forest given by its
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547 *ROOTS. */
548static void
27508f5f 549remove_unused_allocno_hard_regs_nodes (allocno_hard_regs_node_t *roots)
1756cb66 550{
27508f5f 551 allocno_hard_regs_node_t node, prev, next, last;
1756cb66
VM
552
553 for (prev = NULL, node = *roots; node != NULL; node = next)
554 {
555 next = node->next;
556 if (node->used_p)
557 {
27508f5f 558 remove_unused_allocno_hard_regs_nodes (&node->first);
1756cb66
VM
559 prev = node;
560 }
561 else
562 {
563 for (last = node->first;
564 last != NULL && last->next != NULL;
565 last = last->next)
566 ;
567 if (last != NULL)
568 {
569 if (prev == NULL)
570 *roots = node->first;
571 else
572 prev->next = node->first;
573 if (next != NULL)
574 next->prev = last;
575 last->next = next;
576 next = node->first;
577 }
578 else
579 {
580 if (prev == NULL)
581 *roots = next;
582 else
583 prev->next = next;
584 if (next != NULL)
585 next->prev = prev;
586 }
587 ira_free (node);
588 }
589 }
590}
591
27508f5f 592/* Set up fields preorder_num starting with START_NUM in all allocno
1756cb66
VM
593 hard registers nodes in forest given by FIRST. Return biggest set
594 PREORDER_NUM increased by 1. */
595static int
27508f5f
VM
596enumerate_allocno_hard_regs_nodes (allocno_hard_regs_node_t first,
597 allocno_hard_regs_node_t parent,
598 int start_num)
1756cb66 599{
27508f5f 600 allocno_hard_regs_node_t node;
1756cb66
VM
601
602 for (node = first; node != NULL; node = node->next)
603 {
604 node->preorder_num = start_num++;
605 node->parent = parent;
27508f5f
VM
606 start_num = enumerate_allocno_hard_regs_nodes (node->first, node,
607 start_num);
1756cb66
VM
608 }
609 return start_num;
610}
611
27508f5f
VM
612/* Number of allocno hard registers nodes in the forest. */
613static int allocno_hard_regs_nodes_num;
1756cb66 614
27508f5f
VM
615/* Table preorder number of allocno hard registers node in the forest
616 -> the allocno hard registers node. */
617static allocno_hard_regs_node_t *allocno_hard_regs_nodes;
1756cb66
VM
618
619/* See below. */
27508f5f 620typedef struct allocno_hard_regs_subnode *allocno_hard_regs_subnode_t;
1756cb66
VM
621
622/* The structure is used to describes all subnodes (not only immediate
27508f5f 623 ones) in the mentioned above tree for given allocno hard register
1756cb66
VM
624 node. The usage of such data accelerates calculation of
625 colorability of given allocno. */
27508f5f 626struct allocno_hard_regs_subnode
1756cb66
VM
627{
628 /* The conflict size of conflicting allocnos whose hard register
629 sets are equal sets (plus supersets if given node is given
27508f5f 630 allocno hard registers node) of one in the given node. */
1756cb66
VM
631 int left_conflict_size;
632 /* The summary conflict size of conflicting allocnos whose hard
633 register sets are strict subsets of one in the given node.
634 Overall conflict size is
635 left_conflict_subnodes_size
636 + MIN (max_node_impact - left_conflict_subnodes_size,
637 left_conflict_size)
638 */
639 short left_conflict_subnodes_size;
640 short max_node_impact;
641};
642
27508f5f
VM
643/* Container for hard regs subnodes of all allocnos. */
644static allocno_hard_regs_subnode_t allocno_hard_regs_subnodes;
1756cb66 645
27508f5f
VM
646/* Table (preorder number of allocno hard registers node in the
647 forest, preorder number of allocno hard registers subnode) -> index
1756cb66
VM
648 of the subnode relative to the node. -1 if it is not a
649 subnode. */
27508f5f 650static int *allocno_hard_regs_subnode_index;
1756cb66 651
27508f5f
VM
652/* Setup arrays ALLOCNO_HARD_REGS_NODES and
653 ALLOCNO_HARD_REGS_SUBNODE_INDEX. */
1756cb66 654static void
27508f5f 655setup_allocno_hard_regs_subnode_index (allocno_hard_regs_node_t first)
1756cb66 656{
27508f5f 657 allocno_hard_regs_node_t node, parent;
1756cb66
VM
658 int index;
659
660 for (node = first; node != NULL; node = node->next)
661 {
27508f5f 662 allocno_hard_regs_nodes[node->preorder_num] = node;
1756cb66
VM
663 for (parent = node; parent != NULL; parent = parent->parent)
664 {
27508f5f
VM
665 index = parent->preorder_num * allocno_hard_regs_nodes_num;
666 allocno_hard_regs_subnode_index[index + node->preorder_num]
1756cb66
VM
667 = node->preorder_num - parent->preorder_num;
668 }
27508f5f 669 setup_allocno_hard_regs_subnode_index (node->first);
1756cb66
VM
670 }
671}
672
27508f5f 673/* Count all allocno hard registers nodes in tree ROOT. */
1756cb66 674static int
27508f5f 675get_allocno_hard_regs_subnodes_num (allocno_hard_regs_node_t root)
1756cb66
VM
676{
677 int len = 1;
678
679 for (root = root->first; root != NULL; root = root->next)
27508f5f 680 len += get_allocno_hard_regs_subnodes_num (root);
1756cb66
VM
681 return len;
682}
683
27508f5f 684/* Build the forest of allocno hard registers nodes and assign each
1756cb66
VM
685 allocno a node from the forest. */
686static void
27508f5f 687form_allocno_hard_regs_nodes_forest (void)
1756cb66
VM
688{
689 unsigned int i, j, size, len;
27508f5f 690 int start;
1756cb66 691 ira_allocno_t a;
27508f5f 692 allocno_hard_regs_t hv;
1756cb66
VM
693 bitmap_iterator bi;
694 HARD_REG_SET temp;
27508f5f
VM
695 allocno_hard_regs_node_t node, allocno_hard_regs_node;
696 allocno_color_data_t allocno_data;
1756cb66
VM
697
698 node_check_tick = 0;
27508f5f 699 init_allocno_hard_regs ();
1756cb66 700 hard_regs_roots = NULL;
9771b263 701 hard_regs_node_vec.create (100);
1756cb66
VM
702 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
703 if (! TEST_HARD_REG_BIT (ira_no_alloc_regs, i))
704 {
705 CLEAR_HARD_REG_SET (temp);
706 SET_HARD_REG_BIT (temp, i);
27508f5f
VM
707 hv = add_allocno_hard_regs (temp, 0);
708 node = create_new_allocno_hard_regs_node (hv);
709 add_new_allocno_hard_regs_node_to_forest (&hard_regs_roots, node);
1756cb66 710 }
9771b263 711 start = allocno_hard_regs_vec.length ();
1756cb66
VM
712 EXECUTE_IF_SET_IN_BITMAP (coloring_allocno_bitmap, 0, i, bi)
713 {
714 a = ira_allocnos[i];
27508f5f
VM
715 allocno_data = ALLOCNO_COLOR_DATA (a);
716
717 if (hard_reg_set_empty_p (allocno_data->profitable_hard_regs))
718 continue;
719 hv = (add_allocno_hard_regs
720 (allocno_data->profitable_hard_regs,
721 ALLOCNO_MEMORY_COST (a) - ALLOCNO_CLASS_COST (a)));
1756cb66 722 }
d15e5131 723 temp = ~ira_no_alloc_regs;
27508f5f 724 add_allocno_hard_regs (temp, 0);
9771b263
DN
725 qsort (allocno_hard_regs_vec.address () + start,
726 allocno_hard_regs_vec.length () - start,
27508f5f 727 sizeof (allocno_hard_regs_t), allocno_hard_regs_compare);
1756cb66 728 for (i = start;
9771b263 729 allocno_hard_regs_vec.iterate (i, &hv);
1756cb66
VM
730 i++)
731 {
27508f5f 732 add_allocno_hard_regs_to_forest (&hard_regs_roots, hv);
9771b263 733 ira_assert (hard_regs_node_vec.length () == 0);
1756cb66
VM
734 }
735 /* We need to set up parent fields for right work of
736 first_common_ancestor_node. */
27508f5f 737 setup_allocno_hard_regs_nodes_parent (hard_regs_roots, NULL);
1756cb66
VM
738 EXECUTE_IF_SET_IN_BITMAP (coloring_allocno_bitmap, 0, i, bi)
739 {
740 a = ira_allocnos[i];
27508f5f
VM
741 allocno_data = ALLOCNO_COLOR_DATA (a);
742 if (hard_reg_set_empty_p (allocno_data->profitable_hard_regs))
743 continue;
9771b263 744 hard_regs_node_vec.truncate (0);
27508f5f
VM
745 collect_allocno_hard_regs_cover (hard_regs_roots,
746 allocno_data->profitable_hard_regs);
747 allocno_hard_regs_node = NULL;
9771b263 748 for (j = 0; hard_regs_node_vec.iterate (j, &node); j++)
27508f5f
VM
749 allocno_hard_regs_node
750 = (j == 0
751 ? node
752 : first_common_ancestor_node (node, allocno_hard_regs_node));
753 /* That is a temporary storage. */
754 allocno_hard_regs_node->used_p = true;
755 allocno_data->hard_regs_node = allocno_hard_regs_node;
1756cb66
VM
756 }
757 ira_assert (hard_regs_roots->next == NULL);
758 hard_regs_roots->used_p = true;
27508f5f
VM
759 remove_unused_allocno_hard_regs_nodes (&hard_regs_roots);
760 allocno_hard_regs_nodes_num
761 = enumerate_allocno_hard_regs_nodes (hard_regs_roots, NULL, 0);
762 allocno_hard_regs_nodes
763 = ((allocno_hard_regs_node_t *)
764 ira_allocate (allocno_hard_regs_nodes_num
765 * sizeof (allocno_hard_regs_node_t)));
766 size = allocno_hard_regs_nodes_num * allocno_hard_regs_nodes_num;
767 allocno_hard_regs_subnode_index
1756cb66
VM
768 = (int *) ira_allocate (size * sizeof (int));
769 for (i = 0; i < size; i++)
27508f5f
VM
770 allocno_hard_regs_subnode_index[i] = -1;
771 setup_allocno_hard_regs_subnode_index (hard_regs_roots);
1756cb66
VM
772 start = 0;
773 EXECUTE_IF_SET_IN_BITMAP (coloring_allocno_bitmap, 0, i, bi)
774 {
775 a = ira_allocnos[i];
27508f5f
VM
776 allocno_data = ALLOCNO_COLOR_DATA (a);
777 if (hard_reg_set_empty_p (allocno_data->profitable_hard_regs))
778 continue;
779 len = get_allocno_hard_regs_subnodes_num (allocno_data->hard_regs_node);
780 allocno_data->hard_regs_subnodes_start = start;
781 allocno_data->hard_regs_subnodes_num = len;
782 start += len;
1756cb66 783 }
27508f5f
VM
784 allocno_hard_regs_subnodes
785 = ((allocno_hard_regs_subnode_t)
786 ira_allocate (sizeof (struct allocno_hard_regs_subnode) * start));
9771b263 787 hard_regs_node_vec.release ();
1756cb66
VM
788}
789
27508f5f 790/* Free tree of allocno hard registers nodes given by its ROOT. */
1756cb66 791static void
27508f5f 792finish_allocno_hard_regs_nodes_tree (allocno_hard_regs_node_t root)
1756cb66 793{
27508f5f 794 allocno_hard_regs_node_t child, next;
1756cb66
VM
795
796 for (child = root->first; child != NULL; child = next)
797 {
798 next = child->next;
27508f5f 799 finish_allocno_hard_regs_nodes_tree (child);
1756cb66
VM
800 }
801 ira_free (root);
802}
803
27508f5f 804/* Finish work with the forest of allocno hard registers nodes. */
1756cb66 805static void
27508f5f 806finish_allocno_hard_regs_nodes_forest (void)
1756cb66 807{
27508f5f 808 allocno_hard_regs_node_t node, next;
1756cb66 809
27508f5f 810 ira_free (allocno_hard_regs_subnodes);
1756cb66
VM
811 for (node = hard_regs_roots; node != NULL; node = next)
812 {
813 next = node->next;
27508f5f 814 finish_allocno_hard_regs_nodes_tree (node);
1756cb66 815 }
27508f5f
VM
816 ira_free (allocno_hard_regs_nodes);
817 ira_free (allocno_hard_regs_subnode_index);
818 finish_allocno_hard_regs ();
1756cb66
VM
819}
820
821/* Set up left conflict sizes and left conflict subnodes sizes of hard
822 registers subnodes of allocno A. Return TRUE if allocno A is
823 trivially colorable. */
3553f0bb 824static bool
1756cb66 825setup_left_conflict_sizes_p (ira_allocno_t a)
3553f0bb 826{
27508f5f
VM
827 int i, k, nobj, start;
828 int conflict_size, left_conflict_subnodes_size, node_preorder_num;
1756cb66 829 allocno_color_data_t data;
27508f5f
VM
830 HARD_REG_SET profitable_hard_regs;
831 allocno_hard_regs_subnode_t subnodes;
832 allocno_hard_regs_node_t node;
833 HARD_REG_SET node_set;
ac0ab4f7 834
1756cb66 835 nobj = ALLOCNO_NUM_OBJECTS (a);
1756cb66 836 data = ALLOCNO_COLOR_DATA (a);
27508f5f 837 subnodes = allocno_hard_regs_subnodes + data->hard_regs_subnodes_start;
6576d245 838 profitable_hard_regs = data->profitable_hard_regs;
27508f5f
VM
839 node = data->hard_regs_node;
840 node_preorder_num = node->preorder_num;
6576d245 841 node_set = node->hard_regs->set;
27508f5f 842 node_check_tick++;
1756cb66
VM
843 for (k = 0; k < nobj; k++)
844 {
1756cb66
VM
845 ira_object_t obj = ALLOCNO_OBJECT (a, k);
846 ira_object_t conflict_obj;
847 ira_object_conflict_iterator oci;
1756cb66 848
1756cb66
VM
849 FOR_EACH_OBJECT_CONFLICT (obj, conflict_obj, oci)
850 {
851 int size;
852 ira_allocno_t conflict_a = OBJECT_ALLOCNO (conflict_obj);
27508f5f 853 allocno_hard_regs_node_t conflict_node, temp_node;
1756cb66 854 HARD_REG_SET conflict_node_set;
27508f5f 855 allocno_color_data_t conflict_data;
1756cb66 856
27508f5f 857 conflict_data = ALLOCNO_COLOR_DATA (conflict_a);
1756cb66
VM
858 if (! ALLOCNO_COLOR_DATA (conflict_a)->in_graph_p
859 || ! hard_reg_set_intersect_p (profitable_hard_regs,
27508f5f 860 conflict_data
1756cb66
VM
861 ->profitable_hard_regs))
862 continue;
27508f5f 863 conflict_node = conflict_data->hard_regs_node;
6576d245 864 conflict_node_set = conflict_node->hard_regs->set;
1756cb66
VM
865 if (hard_reg_set_subset_p (node_set, conflict_node_set))
866 temp_node = node;
867 else
868 {
869 ira_assert (hard_reg_set_subset_p (conflict_node_set, node_set));
870 temp_node = conflict_node;
871 }
872 if (temp_node->check != node_check_tick)
873 {
874 temp_node->check = node_check_tick;
875 temp_node->conflict_size = 0;
876 }
877 size = (ira_reg_class_max_nregs
878 [ALLOCNO_CLASS (conflict_a)][ALLOCNO_MODE (conflict_a)]);
879 if (ALLOCNO_NUM_OBJECTS (conflict_a) > 1)
880 /* We will deal with the subwords individually. */
881 size = 1;
882 temp_node->conflict_size += size;
883 }
27508f5f
VM
884 }
885 for (i = 0; i < data->hard_regs_subnodes_num; i++)
886 {
887 allocno_hard_regs_node_t temp_node;
888
889 temp_node = allocno_hard_regs_nodes[i + node_preorder_num];
890 ira_assert (temp_node->preorder_num == i + node_preorder_num);
891 subnodes[i].left_conflict_size = (temp_node->check != node_check_tick
892 ? 0 : temp_node->conflict_size);
893 if (hard_reg_set_subset_p (temp_node->hard_regs->set,
894 profitable_hard_regs))
895 subnodes[i].max_node_impact = temp_node->hard_regs_num;
896 else
1756cb66 897 {
27508f5f
VM
898 HARD_REG_SET temp_set;
899 int j, n, hard_regno;
900 enum reg_class aclass;
901
dc333d8f 902 temp_set = temp_node->hard_regs->set & profitable_hard_regs;
27508f5f
VM
903 aclass = ALLOCNO_CLASS (a);
904 for (n = 0, j = ira_class_hard_regs_num[aclass] - 1; j >= 0; j--)
1756cb66 905 {
27508f5f
VM
906 hard_regno = ira_class_hard_regs[aclass][j];
907 if (TEST_HARD_REG_BIT (temp_set, hard_regno))
908 n++;
1756cb66 909 }
27508f5f 910 subnodes[i].max_node_impact = n;
1756cb66 911 }
27508f5f
VM
912 subnodes[i].left_conflict_subnodes_size = 0;
913 }
914 start = node_preorder_num * allocno_hard_regs_nodes_num;
6e3957da 915 for (i = data->hard_regs_subnodes_num - 1; i > 0; i--)
27508f5f
VM
916 {
917 int size, parent_i;
918 allocno_hard_regs_node_t parent;
919
920 size = (subnodes[i].left_conflict_subnodes_size
921 + MIN (subnodes[i].max_node_impact
922 - subnodes[i].left_conflict_subnodes_size,
923 subnodes[i].left_conflict_size));
924 parent = allocno_hard_regs_nodes[i + node_preorder_num]->parent;
6e3957da 925 gcc_checking_assert(parent);
27508f5f
VM
926 parent_i
927 = allocno_hard_regs_subnode_index[start + parent->preorder_num];
6e3957da 928 gcc_checking_assert(parent_i >= 0);
27508f5f 929 subnodes[parent_i].left_conflict_subnodes_size += size;
1756cb66 930 }
27508f5f
VM
931 left_conflict_subnodes_size = subnodes[0].left_conflict_subnodes_size;
932 conflict_size
32721b2c
ZZ
933 = (left_conflict_subnodes_size
934 + MIN (subnodes[0].max_node_impact - left_conflict_subnodes_size,
935 subnodes[0].left_conflict_size));
1756cb66
VM
936 conflict_size += ira_reg_class_max_nregs[ALLOCNO_CLASS (a)][ALLOCNO_MODE (a)];
937 data->colorable_p = conflict_size <= data->available_regs_num;
938 return data->colorable_p;
939}
ac0ab4f7 940
1756cb66 941/* Update left conflict sizes of hard registers subnodes of allocno A
27508f5f
VM
942 after removing allocno REMOVED_A with SIZE from the conflict graph.
943 Return TRUE if A is trivially colorable. */
1756cb66
VM
944static bool
945update_left_conflict_sizes_p (ira_allocno_t a,
27508f5f 946 ira_allocno_t removed_a, int size)
1756cb66 947{
27508f5f 948 int i, conflict_size, before_conflict_size, diff, start;
1756cb66 949 int node_preorder_num, parent_i;
27508f5f
VM
950 allocno_hard_regs_node_t node, removed_node, parent;
951 allocno_hard_regs_subnode_t subnodes;
1756cb66 952 allocno_color_data_t data = ALLOCNO_COLOR_DATA (a);
1756cb66
VM
953
954 ira_assert (! data->colorable_p);
27508f5f
VM
955 node = data->hard_regs_node;
956 node_preorder_num = node->preorder_num;
957 removed_node = ALLOCNO_COLOR_DATA (removed_a)->hard_regs_node;
958 ira_assert (hard_reg_set_subset_p (removed_node->hard_regs->set,
959 node->hard_regs->set)
960 || hard_reg_set_subset_p (node->hard_regs->set,
961 removed_node->hard_regs->set));
962 start = node_preorder_num * allocno_hard_regs_nodes_num;
963 i = allocno_hard_regs_subnode_index[start + removed_node->preorder_num];
964 if (i < 0)
965 i = 0;
966 subnodes = allocno_hard_regs_subnodes + data->hard_regs_subnodes_start;
967 before_conflict_size
968 = (subnodes[i].left_conflict_subnodes_size
969 + MIN (subnodes[i].max_node_impact
970 - subnodes[i].left_conflict_subnodes_size,
971 subnodes[i].left_conflict_size));
972 subnodes[i].left_conflict_size -= size;
973 for (;;)
ac0ab4f7 974 {
27508f5f
VM
975 conflict_size
976 = (subnodes[i].left_conflict_subnodes_size
977 + MIN (subnodes[i].max_node_impact
978 - subnodes[i].left_conflict_subnodes_size,
979 subnodes[i].left_conflict_size));
980 if ((diff = before_conflict_size - conflict_size) == 0)
981 break;
982 ira_assert (conflict_size < before_conflict_size);
983 parent = allocno_hard_regs_nodes[i + node_preorder_num]->parent;
984 if (parent == NULL)
985 break;
986 parent_i
987 = allocno_hard_regs_subnode_index[start + parent->preorder_num];
988 if (parent_i < 0)
989 break;
990 i = parent_i;
1756cb66
VM
991 before_conflict_size
992 = (subnodes[i].left_conflict_subnodes_size
993 + MIN (subnodes[i].max_node_impact
994 - subnodes[i].left_conflict_subnodes_size,
995 subnodes[i].left_conflict_size));
27508f5f 996 subnodes[i].left_conflict_subnodes_size -= diff;
ac0ab4f7 997 }
27508f5f
VM
998 if (i != 0
999 || (conflict_size
1000 + ira_reg_class_max_nregs[ALLOCNO_CLASS (a)][ALLOCNO_MODE (a)]
1001 > data->available_regs_num))
1002 return false;
1003 data->colorable_p = true;
1004 return true;
3553f0bb
VM
1005}
1006
27508f5f 1007/* Return true if allocno A has empty profitable hard regs. */
3553f0bb 1008static bool
1756cb66 1009empty_profitable_hard_regs (ira_allocno_t a)
3553f0bb 1010{
27508f5f 1011 allocno_color_data_t data = ALLOCNO_COLOR_DATA (a);
1756cb66 1012
27508f5f 1013 return hard_reg_set_empty_p (data->profitable_hard_regs);
3553f0bb
VM
1014}
1015
1756cb66
VM
1016/* Set up profitable hard registers for each allocno being
1017 colored. */
1018static void
1019setup_profitable_hard_regs (void)
1020{
1021 unsigned int i;
1022 int j, k, nobj, hard_regno, nregs, class_size;
1023 ira_allocno_t a;
1024 bitmap_iterator bi;
1025 enum reg_class aclass;
ef4bddc2 1026 machine_mode mode;
27508f5f 1027 allocno_color_data_t data;
1756cb66 1028
8d189b3f
VM
1029 /* Initial set up from allocno classes and explicitly conflicting
1030 hard regs. */
1756cb66
VM
1031 EXECUTE_IF_SET_IN_BITMAP (coloring_allocno_bitmap, 0, i, bi)
1032 {
1033 a = ira_allocnos[i];
1034 if ((aclass = ALLOCNO_CLASS (a)) == NO_REGS)
1035 continue;
27508f5f
VM
1036 data = ALLOCNO_COLOR_DATA (a);
1037 if (ALLOCNO_UPDATED_HARD_REG_COSTS (a) == NULL
b81a2f0d
VM
1038 && ALLOCNO_CLASS_COST (a) > ALLOCNO_MEMORY_COST (a)
1039 /* Do not empty profitable regs for static chain pointer
1040 pseudo when non-local goto is used. */
1041 && ! non_spilled_static_chain_regno_p (ALLOCNO_REGNO (a)))
27508f5f
VM
1042 CLEAR_HARD_REG_SET (data->profitable_hard_regs);
1043 else
1756cb66 1044 {
a2c19e93 1045 mode = ALLOCNO_MODE (a);
6576d245
RS
1046 data->profitable_hard_regs
1047 = ira_useful_class_mode_regs[aclass][mode];
27508f5f
VM
1048 nobj = ALLOCNO_NUM_OBJECTS (a);
1049 for (k = 0; k < nobj; k++)
1756cb66 1050 {
27508f5f
VM
1051 ira_object_t obj = ALLOCNO_OBJECT (a, k);
1052
d15e5131
RS
1053 data->profitable_hard_regs
1054 &= ~OBJECT_TOTAL_CONFLICT_HARD_REGS (obj);
1756cb66
VM
1055 }
1056 }
1057 }
8d189b3f 1058 /* Exclude hard regs already assigned for conflicting objects. */
1756cb66
VM
1059 EXECUTE_IF_SET_IN_BITMAP (consideration_allocno_bitmap, 0, i, bi)
1060 {
1061 a = ira_allocnos[i];
1062 if ((aclass = ALLOCNO_CLASS (a)) == NO_REGS
1063 || ! ALLOCNO_ASSIGNED_P (a)
1064 || (hard_regno = ALLOCNO_HARD_REGNO (a)) < 0)
1065 continue;
1066 mode = ALLOCNO_MODE (a);
ad474626 1067 nregs = hard_regno_nregs (hard_regno, mode);
1756cb66
VM
1068 nobj = ALLOCNO_NUM_OBJECTS (a);
1069 for (k = 0; k < nobj; k++)
1070 {
1071 ira_object_t obj = ALLOCNO_OBJECT (a, k);
1072 ira_object_t conflict_obj;
1073 ira_object_conflict_iterator oci;
1074
1075 FOR_EACH_OBJECT_CONFLICT (obj, conflict_obj, oci)
1076 {
27508f5f
VM
1077 ira_allocno_t conflict_a = OBJECT_ALLOCNO (conflict_obj);
1078
1079 /* We can process the conflict allocno repeatedly with
1080 the same result. */
1756cb66
VM
1081 if (nregs == nobj && nregs > 1)
1082 {
1083 int num = OBJECT_SUBWORD (conflict_obj);
1084
2805e6c0 1085 if (REG_WORDS_BIG_ENDIAN)
1756cb66 1086 CLEAR_HARD_REG_BIT
27508f5f 1087 (ALLOCNO_COLOR_DATA (conflict_a)->profitable_hard_regs,
1756cb66
VM
1088 hard_regno + nobj - num - 1);
1089 else
1090 CLEAR_HARD_REG_BIT
27508f5f 1091 (ALLOCNO_COLOR_DATA (conflict_a)->profitable_hard_regs,
1756cb66
VM
1092 hard_regno + num);
1093 }
1094 else
d15e5131
RS
1095 ALLOCNO_COLOR_DATA (conflict_a)->profitable_hard_regs
1096 &= ~ira_reg_mode_hard_regset[hard_regno][mode];
1756cb66
VM
1097 }
1098 }
1099 }
8d189b3f 1100 /* Exclude too costly hard regs. */
1756cb66
VM
1101 EXECUTE_IF_SET_IN_BITMAP (coloring_allocno_bitmap, 0, i, bi)
1102 {
1103 int min_cost = INT_MAX;
1104 int *costs;
1105
1106 a = ira_allocnos[i];
1107 if ((aclass = ALLOCNO_CLASS (a)) == NO_REGS
1108 || empty_profitable_hard_regs (a))
1109 continue;
27508f5f 1110 data = ALLOCNO_COLOR_DATA (a);
27508f5f
VM
1111 if ((costs = ALLOCNO_UPDATED_HARD_REG_COSTS (a)) != NULL
1112 || (costs = ALLOCNO_HARD_REG_COSTS (a)) != NULL)
1756cb66 1113 {
27508f5f
VM
1114 class_size = ira_class_hard_regs_num[aclass];
1115 for (j = 0; j < class_size; j++)
1756cb66 1116 {
27508f5f
VM
1117 hard_regno = ira_class_hard_regs[aclass][j];
1118 if (! TEST_HARD_REG_BIT (data->profitable_hard_regs,
1119 hard_regno))
1120 continue;
b81a2f0d
VM
1121 if (ALLOCNO_UPDATED_MEMORY_COST (a) < costs[j]
1122 /* Do not remove HARD_REGNO for static chain pointer
1123 pseudo when non-local goto is used. */
1124 && ! non_spilled_static_chain_regno_p (ALLOCNO_REGNO (a)))
27508f5f
VM
1125 CLEAR_HARD_REG_BIT (data->profitable_hard_regs,
1126 hard_regno);
1127 else if (min_cost > costs[j])
1128 min_cost = costs[j];
1756cb66 1129 }
1756cb66 1130 }
27508f5f 1131 else if (ALLOCNO_UPDATED_MEMORY_COST (a)
b81a2f0d
VM
1132 < ALLOCNO_UPDATED_CLASS_COST (a)
1133 /* Do not empty profitable regs for static chain
1134 pointer pseudo when non-local goto is used. */
1135 && ! non_spilled_static_chain_regno_p (ALLOCNO_REGNO (a)))
27508f5f 1136 CLEAR_HARD_REG_SET (data->profitable_hard_regs);
1756cb66
VM
1137 if (ALLOCNO_UPDATED_CLASS_COST (a) > min_cost)
1138 ALLOCNO_UPDATED_CLASS_COST (a) = min_cost;
1139 }
1140}
3553f0bb
VM
1141
1142\f
1143
058e97ec
VM
1144/* This page contains functions used to choose hard registers for
1145 allocnos. */
1146
3b6d1699 1147/* Pool for update cost records. */
fb0b2914 1148static object_allocator<update_cost_record> update_cost_record_pool
fcb87c50 1149 ("update cost records");
3b6d1699
VM
1150
1151/* Return new update cost record with given params. */
1152static struct update_cost_record *
1153get_update_cost_record (int hard_regno, int divisor,
1154 struct update_cost_record *next)
1155{
1156 struct update_cost_record *record;
1157
8b17d27f 1158 record = update_cost_record_pool.allocate ();
3b6d1699
VM
1159 record->hard_regno = hard_regno;
1160 record->divisor = divisor;
1161 record->next = next;
1162 return record;
1163}
1164
1165/* Free memory for all records in LIST. */
1166static void
1167free_update_cost_record_list (struct update_cost_record *list)
1168{
1169 struct update_cost_record *next;
1170
1171 while (list != NULL)
1172 {
1173 next = list->next;
8b17d27f 1174 update_cost_record_pool.remove (list);
3b6d1699
VM
1175 list = next;
1176 }
1177}
1178
1179/* Free memory allocated for all update cost records. */
1180static void
1181finish_update_cost_records (void)
1182{
8b17d27f 1183 update_cost_record_pool.release ();
3b6d1699
VM
1184}
1185
058e97ec
VM
1186/* Array whose element value is TRUE if the corresponding hard
1187 register was already allocated for an allocno. */
1188static bool allocated_hardreg_p[FIRST_PSEUDO_REGISTER];
1189
f754734f 1190/* Describes one element in a queue of allocnos whose costs need to be
1756cb66
VM
1191 updated. Each allocno in the queue is known to have an allocno
1192 class. */
f35bf7a9
RS
1193struct update_cost_queue_elem
1194{
f754734f
RS
1195 /* This element is in the queue iff CHECK == update_cost_check. */
1196 int check;
1197
1198 /* COST_HOP_DIVISOR**N, where N is the length of the shortest path
1199 connecting this allocno to the one being allocated. */
1200 int divisor;
1201
3133bed5
VM
1202 /* Allocno from which we started chaining costs of connected
1203 allocnos. */
1204 ira_allocno_t start;
1205
df3e3493 1206 /* Allocno from which we are chaining costs of connected allocnos.
3b6d1699
VM
1207 It is used not go back in graph of allocnos connected by
1208 copies. */
1209 ira_allocno_t from;
1210
f754734f
RS
1211 /* The next allocno in the queue, or null if this is the last element. */
1212 ira_allocno_t next;
1213};
1214
1215/* The first element in a queue of allocnos whose copy costs need to be
1216 updated. Null if the queue is empty. */
1217static ira_allocno_t update_cost_queue;
1218
1219/* The last element in the queue described by update_cost_queue.
1220 Not valid if update_cost_queue is null. */
1221static struct update_cost_queue_elem *update_cost_queue_tail;
1222
1223/* A pool of elements in the queue described by update_cost_queue.
1224 Elements are indexed by ALLOCNO_NUM. */
1225static struct update_cost_queue_elem *update_cost_queue_elems;
058e97ec 1226
3b6d1699 1227/* The current value of update_costs_from_copies call count. */
058e97ec
VM
1228static int update_cost_check;
1229
1230/* Allocate and initialize data necessary for function
c73ccc80 1231 update_costs_from_copies. */
058e97ec
VM
1232static void
1233initiate_cost_update (void)
1234{
f754734f
RS
1235 size_t size;
1236
1237 size = ira_allocnos_num * sizeof (struct update_cost_queue_elem);
1238 update_cost_queue_elems
1239 = (struct update_cost_queue_elem *) ira_allocate (size);
1240 memset (update_cost_queue_elems, 0, size);
058e97ec
VM
1241 update_cost_check = 0;
1242}
1243
3b6d1699 1244/* Deallocate data used by function update_costs_from_copies. */
058e97ec
VM
1245static void
1246finish_cost_update (void)
1247{
0eeb2240 1248 ira_free (update_cost_queue_elems);
3b6d1699 1249 finish_update_cost_records ();
058e97ec
VM
1250}
1251
a7f32992
VM
1252/* When we traverse allocnos to update hard register costs, the cost
1253 divisor will be multiplied by the following macro value for each
1254 hop from given allocno to directly connected allocnos. */
1255#define COST_HOP_DIVISOR 4
1256
f754734f 1257/* Start a new cost-updating pass. */
058e97ec 1258static void
f754734f 1259start_update_cost (void)
058e97ec 1260{
f754734f
RS
1261 update_cost_check++;
1262 update_cost_queue = NULL;
1263}
058e97ec 1264
3133bed5 1265/* Add (ALLOCNO, START, FROM, DIVISOR) to the end of update_cost_queue, unless
1756cb66 1266 ALLOCNO is already in the queue, or has NO_REGS class. */
f754734f 1267static inline void
3133bed5
VM
1268queue_update_cost (ira_allocno_t allocno, ira_allocno_t start,
1269 ira_allocno_t from, int divisor)
f754734f
RS
1270{
1271 struct update_cost_queue_elem *elem;
1272
1273 elem = &update_cost_queue_elems[ALLOCNO_NUM (allocno)];
1274 if (elem->check != update_cost_check
1756cb66 1275 && ALLOCNO_CLASS (allocno) != NO_REGS)
058e97ec 1276 {
f754734f 1277 elem->check = update_cost_check;
3133bed5 1278 elem->start = start;
3b6d1699 1279 elem->from = from;
f754734f
RS
1280 elem->divisor = divisor;
1281 elem->next = NULL;
1282 if (update_cost_queue == NULL)
1283 update_cost_queue = allocno;
058e97ec 1284 else
f754734f
RS
1285 update_cost_queue_tail->next = allocno;
1286 update_cost_queue_tail = elem;
058e97ec
VM
1287 }
1288}
1289
3b6d1699 1290/* Try to remove the first element from update_cost_queue. Return
3133bed5
VM
1291 false if the queue was empty, otherwise make (*ALLOCNO, *START,
1292 *FROM, *DIVISOR) describe the removed element. */
f754734f 1293static inline bool
3133bed5
VM
1294get_next_update_cost (ira_allocno_t *allocno, ira_allocno_t *start,
1295 ira_allocno_t *from, int *divisor)
058e97ec 1296{
f754734f
RS
1297 struct update_cost_queue_elem *elem;
1298
1299 if (update_cost_queue == NULL)
1300 return false;
1301
1302 *allocno = update_cost_queue;
1303 elem = &update_cost_queue_elems[ALLOCNO_NUM (*allocno)];
3133bed5 1304 *start = elem->start;
3b6d1699 1305 *from = elem->from;
f754734f
RS
1306 *divisor = elem->divisor;
1307 update_cost_queue = elem->next;
1308 return true;
058e97ec
VM
1309}
1310
86f0bef3
VM
1311/* Increase costs of HARD_REGNO by UPDATE_COST and conflict cost by
1312 UPDATE_CONFLICT_COST for ALLOCNO. Return true if we really
1313 modified the cost. */
3b6d1699 1314static bool
86f0bef3
VM
1315update_allocno_cost (ira_allocno_t allocno, int hard_regno,
1316 int update_cost, int update_conflict_cost)
3b6d1699
VM
1317{
1318 int i;
1319 enum reg_class aclass = ALLOCNO_CLASS (allocno);
1320
1321 i = ira_class_hard_reg_index[aclass][hard_regno];
1322 if (i < 0)
1323 return false;
1324 ira_allocate_and_set_or_copy_costs
1325 (&ALLOCNO_UPDATED_HARD_REG_COSTS (allocno), aclass,
1326 ALLOCNO_UPDATED_CLASS_COST (allocno),
1327 ALLOCNO_HARD_REG_COSTS (allocno));
1328 ira_allocate_and_set_or_copy_costs
1329 (&ALLOCNO_UPDATED_CONFLICT_HARD_REG_COSTS (allocno),
1330 aclass, 0, ALLOCNO_CONFLICT_HARD_REG_COSTS (allocno));
1331 ALLOCNO_UPDATED_HARD_REG_COSTS (allocno)[i] += update_cost;
86f0bef3 1332 ALLOCNO_UPDATED_CONFLICT_HARD_REG_COSTS (allocno)[i] += update_conflict_cost;
3b6d1699
VM
1333 return true;
1334}
1335
3133bed5
VM
1336/* Return TRUE if allocnos A1 and A2 conflicts. Here we are
1337 interesting only in conflicts of allocnos with intersected allocno
1338 classes. */
1339static bool
1340allocnos_conflict_p (ira_allocno_t a1, ira_allocno_t a2)
1341{
1342 ira_object_t obj, conflict_obj;
1343 ira_object_conflict_iterator oci;
1344 int word, nwords = ALLOCNO_NUM_OBJECTS (a1);
1345
1346 for (word = 0; word < nwords; word++)
1347 {
1348 obj = ALLOCNO_OBJECT (a1, word);
1349 /* Take preferences of conflicting allocnos into account. */
1350 FOR_EACH_OBJECT_CONFLICT (obj, conflict_obj, oci)
1351 if (OBJECT_ALLOCNO (conflict_obj) == a2)
1352 return true;
1353 }
1354 return false;
1355}
1356
3b6d1699
VM
1357/* Update (decrease if DECR_P) HARD_REGNO cost of allocnos connected
1358 by copies to ALLOCNO to increase chances to remove some copies as
74dc179a
VM
1359 the result of subsequent assignment. Update conflict costs.
1360 Record cost updates if RECORD_P is true. */
a7f32992 1361static void
3b6d1699 1362update_costs_from_allocno (ira_allocno_t allocno, int hard_regno,
74dc179a 1363 int divisor, bool decr_p, bool record_p)
a7f32992 1364{
86f0bef3 1365 int cost, update_cost, update_conflict_cost;
ef4bddc2 1366 machine_mode mode;
1756cb66 1367 enum reg_class rclass, aclass;
3133bed5 1368 ira_allocno_t another_allocno, start = allocno, from = NULL;
a7f32992
VM
1369 ira_copy_t cp, next_cp;
1370
f754734f 1371 rclass = REGNO_REG_CLASS (hard_regno);
f754734f 1372 do
a7f32992 1373 {
f754734f 1374 mode = ALLOCNO_MODE (allocno);
1756cb66 1375 ira_init_register_move_cost_if_necessary (mode);
f754734f 1376 for (cp = ALLOCNO_COPIES (allocno); cp != NULL; cp = next_cp)
a7f32992 1377 {
f754734f 1378 if (cp->first == allocno)
a7f32992 1379 {
f754734f
RS
1380 next_cp = cp->next_first_allocno_copy;
1381 another_allocno = cp->second;
1382 }
1383 else if (cp->second == allocno)
1384 {
1385 next_cp = cp->next_second_allocno_copy;
1386 another_allocno = cp->first;
a7f32992 1387 }
f754734f
RS
1388 else
1389 gcc_unreachable ();
1390
3133bed5 1391 if (another_allocno == from
74dc179a
VM
1392 || (ALLOCNO_COLOR_DATA (another_allocno) != NULL
1393 && (ALLOCNO_COLOR_DATA (allocno)->first_thread_allocno
1394 != ALLOCNO_COLOR_DATA (another_allocno)->first_thread_allocno)))
3b6d1699
VM
1395 continue;
1396
1756cb66
VM
1397 aclass = ALLOCNO_CLASS (another_allocno);
1398 if (! TEST_HARD_REG_BIT (reg_class_contents[aclass],
6042d1dd 1399 hard_regno)
f754734f
RS
1400 || ALLOCNO_ASSIGNED_P (another_allocno))
1401 continue;
1402
b3ad445f
RS
1403 /* If we have different modes use the smallest one. It is
1404 a sub-register move. It is hard to predict what LRA
1405 will reload (the pseudo or its sub-register) but LRA
1406 will try to minimize the data movement. Also for some
1407 register classes bigger modes might be invalid,
1408 e.g. DImode for AREG on x86. For such cases the
1409 register move cost will be maximal. */
1410 mode = narrower_subreg_mode (mode, ALLOCNO_MODE (cp->second));
0046f8d7 1411 ira_init_register_move_cost_if_necessary (mode);
e2323a2b 1412
f754734f 1413 cost = (cp->second == allocno
1756cb66
VM
1414 ? ira_register_move_cost[mode][rclass][aclass]
1415 : ira_register_move_cost[mode][aclass][rclass]);
f754734f
RS
1416 if (decr_p)
1417 cost = -cost;
1418
3133bed5 1419 update_cost = cp->freq * cost / divisor;
74dc179a 1420 update_conflict_cost = update_cost;
86f0bef3 1421
74dc179a
VM
1422 if (internal_flag_ira_verbose > 5 && ira_dump_file != NULL)
1423 fprintf (ira_dump_file,
1424 " a%dr%d (hr%d): update cost by %d, conflict cost by %d\n",
1425 ALLOCNO_NUM (another_allocno), ALLOCNO_REGNO (another_allocno),
1426 hard_regno, update_cost, update_conflict_cost);
f754734f
RS
1427 if (update_cost == 0)
1428 continue;
1429
86f0bef3
VM
1430 if (! update_allocno_cost (another_allocno, hard_regno,
1431 update_cost, update_conflict_cost))
1756cb66 1432 continue;
3133bed5
VM
1433 queue_update_cost (another_allocno, start, allocno,
1434 divisor * COST_HOP_DIVISOR);
3b6d1699
VM
1435 if (record_p && ALLOCNO_COLOR_DATA (another_allocno) != NULL)
1436 ALLOCNO_COLOR_DATA (another_allocno)->update_cost_records
1437 = get_update_cost_record (hard_regno, divisor,
1438 ALLOCNO_COLOR_DATA (another_allocno)
1439 ->update_cost_records);
a7f32992 1440 }
a7f32992 1441 }
3133bed5 1442 while (get_next_update_cost (&allocno, &start, &from, &divisor));
3b6d1699
VM
1443}
1444
1445/* Decrease preferred ALLOCNO hard register costs and costs of
1446 allocnos connected to ALLOCNO through copy. */
1447static void
1448update_costs_from_prefs (ira_allocno_t allocno)
1449{
1450 ira_pref_t pref;
1451
1452 start_update_cost ();
1453 for (pref = ALLOCNO_PREFS (allocno); pref != NULL; pref = pref->next_pref)
74dc179a
VM
1454 {
1455 if (internal_flag_ira_verbose > 5 && ira_dump_file != NULL)
1456 fprintf (ira_dump_file, " Start updating from pref of hr%d for a%dr%d:\n",
1457 pref->hard_regno, ALLOCNO_NUM (allocno), ALLOCNO_REGNO (allocno));
1458 update_costs_from_allocno (allocno, pref->hard_regno,
1459 COST_HOP_DIVISOR, true, true);
1460 }
3b6d1699
VM
1461}
1462
1463/* Update (decrease if DECR_P) the cost of allocnos connected to
1464 ALLOCNO through copies to increase chances to remove some copies as
1465 the result of subsequent assignment. ALLOCNO was just assigned to
c73ccc80 1466 a hard register. Record cost updates if RECORD_P is true. */
3b6d1699 1467static void
c73ccc80 1468update_costs_from_copies (ira_allocno_t allocno, bool decr_p, bool record_p)
3b6d1699
VM
1469{
1470 int hard_regno;
1471
1472 hard_regno = ALLOCNO_HARD_REGNO (allocno);
1473 ira_assert (hard_regno >= 0 && ALLOCNO_CLASS (allocno) != NO_REGS);
1474 start_update_cost ();
74dc179a
VM
1475 if (internal_flag_ira_verbose > 5 && ira_dump_file != NULL)
1476 fprintf (ira_dump_file, " Start updating from a%dr%d by copies:\n",
1477 ALLOCNO_NUM (allocno), ALLOCNO_REGNO (allocno));
1478 update_costs_from_allocno (allocno, hard_regno, 1, decr_p, record_p);
3b6d1699
VM
1479}
1480
8c679205
VM
1481/* Update conflict_allocno_hard_prefs of allocnos conflicting with
1482 ALLOCNO. */
1483static void
1484update_conflict_allocno_hard_prefs (ira_allocno_t allocno)
1485{
1486 int l, nr = ALLOCNO_NUM_OBJECTS (allocno);
1487
1488 for (l = 0; l < nr; l++)
1489 {
1490 ira_object_t conflict_obj, obj = ALLOCNO_OBJECT (allocno, l);
1491 ira_object_conflict_iterator oci;
1492
1493 FOR_EACH_OBJECT_CONFLICT (obj, conflict_obj, oci)
1494 {
1495 ira_allocno_t conflict_a = OBJECT_ALLOCNO (conflict_obj);
1496 allocno_color_data_t conflict_data = ALLOCNO_COLOR_DATA (conflict_a);
1497 ira_pref_t pref;
1498
1499 if (!(hard_reg_set_intersect_p
1500 (ALLOCNO_COLOR_DATA (allocno)->profitable_hard_regs,
1501 conflict_data->profitable_hard_regs)))
1502 continue;
1503 for (pref = ALLOCNO_PREFS (allocno);
1504 pref != NULL;
1505 pref = pref->next_pref)
1506 conflict_data->conflict_allocno_hard_prefs += pref->freq;
1507 }
1508 }
1509}
1510
3b6d1699
VM
1511/* Restore costs of allocnos connected to ALLOCNO by copies as it was
1512 before updating costs of these allocnos from given allocno. This
1513 is a wise thing to do as if given allocno did not get an expected
1514 hard reg, using smaller cost of the hard reg for allocnos connected
1515 by copies to given allocno becomes actually misleading. Free all
1516 update cost records for ALLOCNO as we don't need them anymore. */
1517static void
1518restore_costs_from_copies (ira_allocno_t allocno)
1519{
1520 struct update_cost_record *records, *curr;
1521
1522 if (ALLOCNO_COLOR_DATA (allocno) == NULL)
1523 return;
1524 records = ALLOCNO_COLOR_DATA (allocno)->update_cost_records;
1525 start_update_cost ();
74dc179a
VM
1526 if (internal_flag_ira_verbose > 5 && ira_dump_file != NULL)
1527 fprintf (ira_dump_file, " Start restoring from a%dr%d:\n",
1528 ALLOCNO_NUM (allocno), ALLOCNO_REGNO (allocno));
3b6d1699
VM
1529 for (curr = records; curr != NULL; curr = curr->next)
1530 update_costs_from_allocno (allocno, curr->hard_regno,
74dc179a 1531 curr->divisor, true, false);
3b6d1699
VM
1532 free_update_cost_record_list (records);
1533 ALLOCNO_COLOR_DATA (allocno)->update_cost_records = NULL;
f754734f
RS
1534}
1535
7db7ed3c 1536/* This function updates COSTS (decrease if DECR_P) for hard_registers
1756cb66 1537 of ACLASS by conflict costs of the unassigned allocnos
7db7ed3c
VM
1538 connected by copies with allocnos in update_cost_queue. This
1539 update increases chances to remove some copies. */
f754734f 1540static void
1756cb66 1541update_conflict_hard_regno_costs (int *costs, enum reg_class aclass,
7db7ed3c 1542 bool decr_p)
f754734f
RS
1543{
1544 int i, cost, class_size, freq, mult, div, divisor;
7db7ed3c 1545 int index, hard_regno;
f754734f
RS
1546 int *conflict_costs;
1547 bool cont_p;
1756cb66 1548 enum reg_class another_aclass;
3133bed5 1549 ira_allocno_t allocno, another_allocno, start, from;
f754734f
RS
1550 ira_copy_t cp, next_cp;
1551
3133bed5 1552 while (get_next_update_cost (&allocno, &start, &from, &divisor))
f754734f
RS
1553 for (cp = ALLOCNO_COPIES (allocno); cp != NULL; cp = next_cp)
1554 {
1555 if (cp->first == allocno)
1556 {
1557 next_cp = cp->next_first_allocno_copy;
1558 another_allocno = cp->second;
1559 }
1560 else if (cp->second == allocno)
1561 {
1562 next_cp = cp->next_second_allocno_copy;
1563 another_allocno = cp->first;
1564 }
1565 else
1566 gcc_unreachable ();
3b6d1699 1567
3133bed5
VM
1568 if (another_allocno == from
1569 || allocnos_conflict_p (another_allocno, start))
3b6d1699
VM
1570 continue;
1571
1756cb66
VM
1572 another_aclass = ALLOCNO_CLASS (another_allocno);
1573 if (! ira_reg_classes_intersect_p[aclass][another_aclass]
f754734f 1574 || ALLOCNO_ASSIGNED_P (another_allocno)
1756cb66 1575 || ALLOCNO_COLOR_DATA (another_allocno)->may_be_spilled_p)
f754734f 1576 continue;
1756cb66 1577 class_size = ira_class_hard_regs_num[another_aclass];
f754734f
RS
1578 ira_allocate_and_copy_costs
1579 (&ALLOCNO_UPDATED_CONFLICT_HARD_REG_COSTS (another_allocno),
1756cb66 1580 another_aclass, ALLOCNO_CONFLICT_HARD_REG_COSTS (another_allocno));
f754734f
RS
1581 conflict_costs
1582 = ALLOCNO_UPDATED_CONFLICT_HARD_REG_COSTS (another_allocno);
1583 if (conflict_costs == NULL)
1584 cont_p = true;
1585 else
1586 {
1587 mult = cp->freq;
1588 freq = ALLOCNO_FREQ (another_allocno);
1589 if (freq == 0)
1590 freq = 1;
1591 div = freq * divisor;
1592 cont_p = false;
1593 for (i = class_size - 1; i >= 0; i--)
1594 {
1756cb66 1595 hard_regno = ira_class_hard_regs[another_aclass][i];
7db7ed3c 1596 ira_assert (hard_regno >= 0);
1756cb66 1597 index = ira_class_hard_reg_index[aclass][hard_regno];
7db7ed3c
VM
1598 if (index < 0)
1599 continue;
7879aabe 1600 cost = (int) (((int64_t) conflict_costs [i] * mult) / div);
f754734f
RS
1601 if (cost == 0)
1602 continue;
1603 cont_p = true;
1604 if (decr_p)
1605 cost = -cost;
7db7ed3c 1606 costs[index] += cost;
f754734f
RS
1607 }
1608 }
1609 /* Probably 5 hops will be enough. */
1610 if (cont_p
1611 && divisor <= (COST_HOP_DIVISOR
1612 * COST_HOP_DIVISOR
1613 * COST_HOP_DIVISOR
1614 * COST_HOP_DIVISOR))
3133bed5 1615 queue_update_cost (another_allocno, start, from, divisor * COST_HOP_DIVISOR);
f754734f 1616 }
a7f32992
VM
1617}
1618
27508f5f
VM
1619/* Set up conflicting (through CONFLICT_REGS) for each object of
1620 allocno A and the start allocno profitable regs (through
1621 START_PROFITABLE_REGS). Remember that the start profitable regs
67914693 1622 exclude hard regs which cannot hold value of mode of allocno A.
27508f5f
VM
1623 This covers mostly cases when multi-register value should be
1624 aligned. */
1756cb66 1625static inline void
27508f5f
VM
1626get_conflict_and_start_profitable_regs (ira_allocno_t a, bool retry_p,
1627 HARD_REG_SET *conflict_regs,
1628 HARD_REG_SET *start_profitable_regs)
1756cb66
VM
1629{
1630 int i, nwords;
1631 ira_object_t obj;
1632
1633 nwords = ALLOCNO_NUM_OBJECTS (a);
1634 for (i = 0; i < nwords; i++)
1635 {
1636 obj = ALLOCNO_OBJECT (a, i);
6576d245 1637 conflict_regs[i] = OBJECT_TOTAL_CONFLICT_HARD_REGS (obj);
1756cb66 1638 }
27508f5f 1639 if (retry_p)
d15e5131
RS
1640 *start_profitable_regs
1641 = (reg_class_contents[ALLOCNO_CLASS (a)]
1642 &~ (ira_prohibited_class_mode_regs
1643 [ALLOCNO_CLASS (a)][ALLOCNO_MODE (a)]));
27508f5f 1644 else
6576d245 1645 *start_profitable_regs = ALLOCNO_COLOR_DATA (a)->profitable_hard_regs;
1756cb66
VM
1646}
1647
27508f5f
VM
1648/* Return true if HARD_REGNO is ok for assigning to allocno A with
1649 PROFITABLE_REGS and whose objects have CONFLICT_REGS. */
1756cb66
VM
1650static inline bool
1651check_hard_reg_p (ira_allocno_t a, int hard_regno,
27508f5f 1652 HARD_REG_SET *conflict_regs, HARD_REG_SET profitable_regs)
1756cb66
VM
1653{
1654 int j, nwords, nregs;
8d189b3f 1655 enum reg_class aclass;
ef4bddc2 1656 machine_mode mode;
1756cb66 1657
8d189b3f
VM
1658 aclass = ALLOCNO_CLASS (a);
1659 mode = ALLOCNO_MODE (a);
1660 if (TEST_HARD_REG_BIT (ira_prohibited_class_mode_regs[aclass][mode],
1661 hard_regno))
1662 return false;
27508f5f
VM
1663 /* Checking only profitable hard regs. */
1664 if (! TEST_HARD_REG_BIT (profitable_regs, hard_regno))
1665 return false;
ad474626 1666 nregs = hard_regno_nregs (hard_regno, mode);
1756cb66
VM
1667 nwords = ALLOCNO_NUM_OBJECTS (a);
1668 for (j = 0; j < nregs; j++)
1669 {
1670 int k;
1671 int set_to_test_start = 0, set_to_test_end = nwords;
1672
1673 if (nregs == nwords)
1674 {
2805e6c0 1675 if (REG_WORDS_BIG_ENDIAN)
1756cb66
VM
1676 set_to_test_start = nwords - j - 1;
1677 else
1678 set_to_test_start = j;
1679 set_to_test_end = set_to_test_start + 1;
1680 }
1681 for (k = set_to_test_start; k < set_to_test_end; k++)
27508f5f 1682 if (TEST_HARD_REG_BIT (conflict_regs[k], hard_regno + j))
1756cb66
VM
1683 break;
1684 if (k != set_to_test_end)
1685 break;
1686 }
1687 return j == nregs;
1688}
9181a6e5
VM
1689
1690/* Return number of registers needed to be saved and restored at
1691 function prologue/epilogue if we allocate HARD_REGNO to hold value
1692 of MODE. */
1693static int
ef4bddc2 1694calculate_saved_nregs (int hard_regno, machine_mode mode)
9181a6e5
VM
1695{
1696 int i;
1697 int nregs = 0;
1698
1699 ira_assert (hard_regno >= 0);
ad474626 1700 for (i = hard_regno_nregs (hard_regno, mode) - 1; i >= 0; i--)
9181a6e5 1701 if (!allocated_hardreg_p[hard_regno + i]
6c476222 1702 && !crtl->abi->clobbers_full_reg_p (hard_regno + i)
9181a6e5
VM
1703 && !LOCAL_REGNO (hard_regno + i))
1704 nregs++;
1705 return nregs;
1706}
1756cb66 1707
22b0982c
VM
1708/* Choose a hard register for allocno A. If RETRY_P is TRUE, it means
1709 that the function called from function
1756cb66
VM
1710 `ira_reassign_conflict_allocnos' and `allocno_reload_assign'. In
1711 this case some allocno data are not defined or updated and we
1712 should not touch these data. The function returns true if we
1713 managed to assign a hard register to the allocno.
1714
1715 To assign a hard register, first of all we calculate all conflict
1716 hard registers which can come from conflicting allocnos with
1717 already assigned hard registers. After that we find first free
1718 hard register with the minimal cost. During hard register cost
1719 calculation we take conflict hard register costs into account to
1720 give a chance for conflicting allocnos to get a better hard
1721 register in the future.
1722
1723 If the best hard register cost is bigger than cost of memory usage
1724 for the allocno, we don't assign a hard register to given allocno
1725 at all.
1726
1727 If we assign a hard register to the allocno, we update costs of the
1728 hard register for allocnos connected by copies to improve a chance
1729 to coalesce insns represented by the copies when we assign hard
1730 registers to the allocnos connected by the copies. */
058e97ec 1731static bool
22b0982c 1732assign_hard_reg (ira_allocno_t a, bool retry_p)
058e97ec 1733{
27508f5f 1734 HARD_REG_SET conflicting_regs[2], profitable_hard_regs;
fbddb81d 1735 int i, j, hard_regno, best_hard_regno, class_size;
22b0982c 1736 int cost, mem_cost, min_cost, full_cost, min_full_cost, nwords, word;
058e97ec 1737 int *a_costs;
1756cb66 1738 enum reg_class aclass;
ef4bddc2 1739 machine_mode mode;
058e97ec 1740 static int costs[FIRST_PSEUDO_REGISTER], full_costs[FIRST_PSEUDO_REGISTER];
fbddb81d 1741 int saved_nregs;
a5c011cd
MP
1742 enum reg_class rclass;
1743 int add_cost;
058e97ec
VM
1744#ifdef STACK_REGS
1745 bool no_stack_reg_p;
1746#endif
1747
22b0982c 1748 ira_assert (! ALLOCNO_ASSIGNED_P (a));
27508f5f
VM
1749 get_conflict_and_start_profitable_regs (a, retry_p,
1750 conflicting_regs,
1751 &profitable_hard_regs);
1756cb66
VM
1752 aclass = ALLOCNO_CLASS (a);
1753 class_size = ira_class_hard_regs_num[aclass];
058e97ec
VM
1754 best_hard_regno = -1;
1755 memset (full_costs, 0, sizeof (int) * class_size);
1756 mem_cost = 0;
058e97ec
VM
1757 memset (costs, 0, sizeof (int) * class_size);
1758 memset (full_costs, 0, sizeof (int) * class_size);
1759#ifdef STACK_REGS
1760 no_stack_reg_p = false;
1761#endif
1756cb66
VM
1762 if (! retry_p)
1763 start_update_cost ();
22b0982c
VM
1764 mem_cost += ALLOCNO_UPDATED_MEMORY_COST (a);
1765
1766 ira_allocate_and_copy_costs (&ALLOCNO_UPDATED_HARD_REG_COSTS (a),
1756cb66 1767 aclass, ALLOCNO_HARD_REG_COSTS (a));
22b0982c 1768 a_costs = ALLOCNO_UPDATED_HARD_REG_COSTS (a);
058e97ec 1769#ifdef STACK_REGS
22b0982c 1770 no_stack_reg_p = no_stack_reg_p || ALLOCNO_TOTAL_NO_STACK_REG_P (a);
058e97ec 1771#endif
1756cb66 1772 cost = ALLOCNO_UPDATED_CLASS_COST (a);
22b0982c
VM
1773 for (i = 0; i < class_size; i++)
1774 if (a_costs != NULL)
1775 {
1776 costs[i] += a_costs[i];
1777 full_costs[i] += a_costs[i];
1778 }
1779 else
1780 {
1781 costs[i] += cost;
1782 full_costs[i] += cost;
1783 }
1756cb66 1784 nwords = ALLOCNO_NUM_OBJECTS (a);
27508f5f 1785 curr_allocno_process++;
22b0982c
VM
1786 for (word = 0; word < nwords; word++)
1787 {
1788 ira_object_t conflict_obj;
1789 ira_object_t obj = ALLOCNO_OBJECT (a, word);
1790 ira_object_conflict_iterator oci;
1791
22b0982c
VM
1792 /* Take preferences of conflicting allocnos into account. */
1793 FOR_EACH_OBJECT_CONFLICT (obj, conflict_obj, oci)
1756cb66 1794 {
22b0982c 1795 ira_allocno_t conflict_a = OBJECT_ALLOCNO (conflict_obj);
1756cb66 1796 enum reg_class conflict_aclass;
4ef20c29 1797 allocno_color_data_t data = ALLOCNO_COLOR_DATA (conflict_a);
1756cb66 1798
22b0982c
VM
1799 /* Reload can give another class so we need to check all
1800 allocnos. */
1756cb66 1801 if (!retry_p
06fbce66
ZZ
1802 && ((!ALLOCNO_ASSIGNED_P (conflict_a)
1803 || ALLOCNO_HARD_REGNO (conflict_a) < 0)
1804 && !(hard_reg_set_intersect_p
1805 (profitable_hard_regs,
1806 ALLOCNO_COLOR_DATA
1807 (conflict_a)->profitable_hard_regs))))
1808 {
1809 /* All conflict allocnos are in consideration bitmap
1810 when retry_p is false. It might change in future and
1811 if it happens the assert will be broken. It means
1812 the code should be modified for the new
1813 assumptions. */
1814 ira_assert (bitmap_bit_p (consideration_allocno_bitmap,
1815 ALLOCNO_NUM (conflict_a)));
1816 continue;
1817 }
1756cb66 1818 conflict_aclass = ALLOCNO_CLASS (conflict_a);
22b0982c 1819 ira_assert (ira_reg_classes_intersect_p
1756cb66 1820 [aclass][conflict_aclass]);
22b0982c 1821 if (ALLOCNO_ASSIGNED_P (conflict_a))
fa86d337 1822 {
22b0982c
VM
1823 hard_regno = ALLOCNO_HARD_REGNO (conflict_a);
1824 if (hard_regno >= 0
b8faca75
VM
1825 && (ira_hard_reg_set_intersection_p
1826 (hard_regno, ALLOCNO_MODE (conflict_a),
1827 reg_class_contents[aclass])))
fa86d337 1828 {
22b0982c 1829 int n_objects = ALLOCNO_NUM_OBJECTS (conflict_a);
4648deb4 1830 int conflict_nregs;
1756cb66 1831
4648deb4 1832 mode = ALLOCNO_MODE (conflict_a);
ad474626 1833 conflict_nregs = hard_regno_nregs (hard_regno, mode);
22b0982c 1834 if (conflict_nregs == n_objects && conflict_nregs > 1)
fa86d337 1835 {
22b0982c 1836 int num = OBJECT_SUBWORD (conflict_obj);
ac0ab4f7 1837
2805e6c0 1838 if (REG_WORDS_BIG_ENDIAN)
22b0982c
VM
1839 SET_HARD_REG_BIT (conflicting_regs[word],
1840 hard_regno + n_objects - num - 1);
1841 else
1842 SET_HARD_REG_BIT (conflicting_regs[word],
1843 hard_regno + num);
ac0ab4f7 1844 }
22b0982c 1845 else
44942965
RS
1846 conflicting_regs[word]
1847 |= ira_reg_mode_hard_regset[hard_regno][mode];
27508f5f 1848 if (hard_reg_set_subset_p (profitable_hard_regs,
22b0982c
VM
1849 conflicting_regs[word]))
1850 goto fail;
fa86d337
BS
1851 }
1852 }
1756cb66 1853 else if (! retry_p
27508f5f
VM
1854 && ! ALLOCNO_COLOR_DATA (conflict_a)->may_be_spilled_p
1855 /* Don't process the conflict allocno twice. */
1856 && (ALLOCNO_COLOR_DATA (conflict_a)->last_process
1857 != curr_allocno_process))
22b0982c
VM
1858 {
1859 int k, *conflict_costs;
1860
27508f5f
VM
1861 ALLOCNO_COLOR_DATA (conflict_a)->last_process
1862 = curr_allocno_process;
22b0982c
VM
1863 ira_allocate_and_copy_costs
1864 (&ALLOCNO_UPDATED_CONFLICT_HARD_REG_COSTS (conflict_a),
1756cb66 1865 conflict_aclass,
22b0982c
VM
1866 ALLOCNO_CONFLICT_HARD_REG_COSTS (conflict_a));
1867 conflict_costs
1868 = ALLOCNO_UPDATED_CONFLICT_HARD_REG_COSTS (conflict_a);
1869 if (conflict_costs != NULL)
1870 for (j = class_size - 1; j >= 0; j--)
1871 {
1756cb66 1872 hard_regno = ira_class_hard_regs[aclass][j];
22b0982c 1873 ira_assert (hard_regno >= 0);
1756cb66 1874 k = ira_class_hard_reg_index[conflict_aclass][hard_regno];
4ef20c29
ZC
1875 if (k < 0
1876 /* If HARD_REGNO is not available for CONFLICT_A,
1877 the conflict would be ignored, since HARD_REGNO
1878 will never be assigned to CONFLICT_A. */
1879 || !TEST_HARD_REG_BIT (data->profitable_hard_regs,
1880 hard_regno))
22b0982c
VM
1881 continue;
1882 full_costs[j] -= conflict_costs[k];
1883 }
3133bed5 1884 queue_update_cost (conflict_a, conflict_a, NULL, COST_HOP_DIVISOR);
22b0982c 1885 }
fa86d337 1886 }
058e97ec 1887 }
1756cb66
VM
1888 if (! retry_p)
1889 /* Take into account preferences of allocnos connected by copies to
1890 the conflict allocnos. */
1891 update_conflict_hard_regno_costs (full_costs, aclass, true);
f754734f 1892
a7f32992
VM
1893 /* Take preferences of allocnos connected by copies into
1894 account. */
1756cb66
VM
1895 if (! retry_p)
1896 {
1897 start_update_cost ();
3133bed5 1898 queue_update_cost (a, a, NULL, COST_HOP_DIVISOR);
1756cb66
VM
1899 update_conflict_hard_regno_costs (full_costs, aclass, false);
1900 }
058e97ec
VM
1901 min_cost = min_full_cost = INT_MAX;
1902 /* We don't care about giving callee saved registers to allocnos no
1903 living through calls because call clobbered registers are
1904 allocated first (it is usual practice to put them first in
1905 REG_ALLOC_ORDER). */
1756cb66 1906 mode = ALLOCNO_MODE (a);
058e97ec
VM
1907 for (i = 0; i < class_size; i++)
1908 {
1756cb66 1909 hard_regno = ira_class_hard_regs[aclass][i];
058e97ec
VM
1910#ifdef STACK_REGS
1911 if (no_stack_reg_p
1912 && FIRST_STACK_REG <= hard_regno && hard_regno <= LAST_STACK_REG)
1913 continue;
1914#endif
1756cb66
VM
1915 if (! check_hard_reg_p (a, hard_regno,
1916 conflicting_regs, profitable_hard_regs))
058e97ec
VM
1917 continue;
1918 cost = costs[i];
1919 full_cost = full_costs[i];
ed15c598 1920 if (!HONOR_REG_ALLOC_ORDER)
058e97ec 1921 {
ed15c598
KC
1922 if ((saved_nregs = calculate_saved_nregs (hard_regno, mode)) != 0)
1923 /* We need to save/restore the hard register in
1924 epilogue/prologue. Therefore we increase the cost. */
1925 {
1926 rclass = REGNO_REG_CLASS (hard_regno);
1927 add_cost = ((ira_memory_move_cost[mode][rclass][0]
1928 + ira_memory_move_cost[mode][rclass][1])
ad474626
RS
1929 * saved_nregs / hard_regno_nregs (hard_regno,
1930 mode) - 1);
ed15c598
KC
1931 cost += add_cost;
1932 full_cost += add_cost;
1933 }
058e97ec
VM
1934 }
1935 if (min_cost > cost)
1936 min_cost = cost;
5dc1390b 1937 if (min_full_cost > full_cost)
058e97ec
VM
1938 {
1939 min_full_cost = full_cost;
1940 best_hard_regno = hard_regno;
1941 ira_assert (hard_regno >= 0);
1942 }
3133bed5
VM
1943 if (internal_flag_ira_verbose > 5 && ira_dump_file != NULL)
1944 fprintf (ira_dump_file, "(%d=%d,%d) ", hard_regno, cost, full_cost);
058e97ec 1945 }
74dc179a
VM
1946 if (internal_flag_ira_verbose > 5 && ira_dump_file != NULL)
1947 fprintf (ira_dump_file, "\n");
b81a2f0d
VM
1948 if (min_full_cost > mem_cost
1949 /* Do not spill static chain pointer pseudo when non-local goto
1950 is used. */
1951 && ! non_spilled_static_chain_regno_p (ALLOCNO_REGNO (a)))
058e97ec
VM
1952 {
1953 if (! retry_p && internal_flag_ira_verbose > 3 && ira_dump_file != NULL)
1954 fprintf (ira_dump_file, "(memory is more profitable %d vs %d) ",
1955 mem_cost, min_full_cost);
1956 best_hard_regno = -1;
1957 }
1958 fail:
058e97ec 1959 if (best_hard_regno >= 0)
9181a6e5 1960 {
ad474626 1961 for (i = hard_regno_nregs (best_hard_regno, mode) - 1; i >= 0; i--)
34672f15 1962 allocated_hardreg_p[best_hard_regno + i] = true;
9181a6e5 1963 }
c73ccc80
VM
1964 if (! retry_p)
1965 restore_costs_from_copies (a);
22b0982c
VM
1966 ALLOCNO_HARD_REGNO (a) = best_hard_regno;
1967 ALLOCNO_ASSIGNED_P (a) = true;
1968 if (best_hard_regno >= 0)
c73ccc80 1969 update_costs_from_copies (a, true, ! retry_p);
1756cb66 1970 ira_assert (ALLOCNO_CLASS (a) == aclass);
2b9c63a2 1971 /* We don't need updated costs anymore. */
22b0982c 1972 ira_free_allocno_updated_costs (a);
058e97ec
VM
1973 return best_hard_regno >= 0;
1974}
1975
1976\f
1977
bf08fb16
VM
1978/* An array used to sort copies. */
1979static ira_copy_t *sorted_copies;
1980
0550a77b
VM
1981/* If allocno A is a cap, return non-cap allocno from which A is
1982 created. Otherwise, return A. */
1983static ira_allocno_t
1984get_cap_member (ira_allocno_t a)
1985{
1986 ira_allocno_t member;
1987
1988 while ((member = ALLOCNO_CAP_MEMBER (a)) != NULL)
1989 a = member;
1990 return a;
1991}
1992
bf08fb16
VM
1993/* Return TRUE if live ranges of allocnos A1 and A2 intersect. It is
1994 used to find a conflict for new allocnos or allocnos with the
1995 different allocno classes. */
1996static bool
1997allocnos_conflict_by_live_ranges_p (ira_allocno_t a1, ira_allocno_t a2)
1998{
1999 rtx reg1, reg2;
2000 int i, j;
2001 int n1 = ALLOCNO_NUM_OBJECTS (a1);
2002 int n2 = ALLOCNO_NUM_OBJECTS (a2);
2003
2004 if (a1 == a2)
2005 return false;
2006 reg1 = regno_reg_rtx[ALLOCNO_REGNO (a1)];
2007 reg2 = regno_reg_rtx[ALLOCNO_REGNO (a2)];
2008 if (reg1 != NULL && reg2 != NULL
2009 && ORIGINAL_REGNO (reg1) == ORIGINAL_REGNO (reg2))
2010 return false;
2011
0550a77b
VM
2012 /* We don't keep live ranges for caps because they can be quite big.
2013 Use ranges of non-cap allocno from which caps are created. */
2014 a1 = get_cap_member (a1);
2015 a2 = get_cap_member (a2);
bf08fb16
VM
2016 for (i = 0; i < n1; i++)
2017 {
2018 ira_object_t c1 = ALLOCNO_OBJECT (a1, i);
2019
2020 for (j = 0; j < n2; j++)
2021 {
2022 ira_object_t c2 = ALLOCNO_OBJECT (a2, j);
2023
2024 if (ira_live_ranges_intersect_p (OBJECT_LIVE_RANGES (c1),
2025 OBJECT_LIVE_RANGES (c2)))
2026 return true;
2027 }
2028 }
2029 return false;
2030}
2031
2032/* The function is used to sort copies according to their execution
2033 frequencies. */
2034static int
2035copy_freq_compare_func (const void *v1p, const void *v2p)
2036{
2037 ira_copy_t cp1 = *(const ira_copy_t *) v1p, cp2 = *(const ira_copy_t *) v2p;
2038 int pri1, pri2;
2039
2040 pri1 = cp1->freq;
2041 pri2 = cp2->freq;
2042 if (pri2 - pri1)
2043 return pri2 - pri1;
2044
df3e3493 2045 /* If frequencies are equal, sort by copies, so that the results of
bf08fb16
VM
2046 qsort leave nothing to chance. */
2047 return cp1->num - cp2->num;
2048}
2049
2050\f
2051
2052/* Return true if any allocno from thread of A1 conflicts with any
2053 allocno from thread A2. */
2054static bool
2055allocno_thread_conflict_p (ira_allocno_t a1, ira_allocno_t a2)
2056{
2057 ira_allocno_t a, conflict_a;
2058
2059 for (a = ALLOCNO_COLOR_DATA (a2)->next_thread_allocno;;
2060 a = ALLOCNO_COLOR_DATA (a)->next_thread_allocno)
2061 {
2062 for (conflict_a = ALLOCNO_COLOR_DATA (a1)->next_thread_allocno;;
2063 conflict_a = ALLOCNO_COLOR_DATA (conflict_a)->next_thread_allocno)
2064 {
2065 if (allocnos_conflict_by_live_ranges_p (a, conflict_a))
2066 return true;
2067 if (conflict_a == a1)
2068 break;
2069 }
2070 if (a == a2)
2071 break;
2072 }
2073 return false;
2074}
2075
2076/* Merge two threads given correspondingly by their first allocnos T1
2077 and T2 (more accurately merging T2 into T1). */
2078static void
2079merge_threads (ira_allocno_t t1, ira_allocno_t t2)
2080{
2081 ira_allocno_t a, next, last;
2082
2083 gcc_assert (t1 != t2
2084 && ALLOCNO_COLOR_DATA (t1)->first_thread_allocno == t1
2085 && ALLOCNO_COLOR_DATA (t2)->first_thread_allocno == t2);
2086 for (last = t2, a = ALLOCNO_COLOR_DATA (t2)->next_thread_allocno;;
2087 a = ALLOCNO_COLOR_DATA (a)->next_thread_allocno)
2088 {
2089 ALLOCNO_COLOR_DATA (a)->first_thread_allocno = t1;
2090 if (a == t2)
2091 break;
2092 last = a;
2093 }
2094 next = ALLOCNO_COLOR_DATA (t1)->next_thread_allocno;
2095 ALLOCNO_COLOR_DATA (t1)->next_thread_allocno = t2;
2096 ALLOCNO_COLOR_DATA (last)->next_thread_allocno = next;
2097 ALLOCNO_COLOR_DATA (t1)->thread_freq += ALLOCNO_COLOR_DATA (t2)->thread_freq;
2098}
2099
df3e3493 2100/* Create threads by processing CP_NUM copies from sorted copies. We
bf08fb16
VM
2101 process the most expensive copies first. */
2102static void
2103form_threads_from_copies (int cp_num)
2104{
2105 ira_allocno_t a, thread1, thread2;
2106 ira_copy_t cp;
2107 int i, n;
2108
2109 qsort (sorted_copies, cp_num, sizeof (ira_copy_t), copy_freq_compare_func);
2110 /* Form threads processing copies, most frequently executed
2111 first. */
2112 for (; cp_num != 0;)
2113 {
2114 for (i = 0; i < cp_num; i++)
2115 {
2116 cp = sorted_copies[i];
2117 thread1 = ALLOCNO_COLOR_DATA (cp->first)->first_thread_allocno;
2118 thread2 = ALLOCNO_COLOR_DATA (cp->second)->first_thread_allocno;
2119 if (thread1 == thread2)
2120 continue;
2121 if (! allocno_thread_conflict_p (thread1, thread2))
2122 {
2123 if (internal_flag_ira_verbose > 3 && ira_dump_file != NULL)
2124 fprintf
2125 (ira_dump_file,
74dc179a 2126 " Forming thread by copy %d:a%dr%d-a%dr%d (freq=%d):\n",
bf08fb16
VM
2127 cp->num, ALLOCNO_NUM (cp->first), ALLOCNO_REGNO (cp->first),
2128 ALLOCNO_NUM (cp->second), ALLOCNO_REGNO (cp->second),
2129 cp->freq);
2130 merge_threads (thread1, thread2);
2131 if (internal_flag_ira_verbose > 3 && ira_dump_file != NULL)
2132 {
2133 thread1 = ALLOCNO_COLOR_DATA (thread1)->first_thread_allocno;
74dc179a 2134 fprintf (ira_dump_file, " Result (freq=%d): a%dr%d(%d)",
bf08fb16
VM
2135 ALLOCNO_COLOR_DATA (thread1)->thread_freq,
2136 ALLOCNO_NUM (thread1), ALLOCNO_REGNO (thread1),
2137 ALLOCNO_FREQ (thread1));
2138 for (a = ALLOCNO_COLOR_DATA (thread1)->next_thread_allocno;
2139 a != thread1;
2140 a = ALLOCNO_COLOR_DATA (a)->next_thread_allocno)
2141 fprintf (ira_dump_file, " a%dr%d(%d)",
2142 ALLOCNO_NUM (a), ALLOCNO_REGNO (a),
2143 ALLOCNO_FREQ (a));
2144 fprintf (ira_dump_file, "\n");
2145 }
2146 i++;
2147 break;
2148 }
2149 }
2150 /* Collect the rest of copies. */
2151 for (n = 0; i < cp_num; i++)
2152 {
2153 cp = sorted_copies[i];
2154 if (ALLOCNO_COLOR_DATA (cp->first)->first_thread_allocno
2155 != ALLOCNO_COLOR_DATA (cp->second)->first_thread_allocno)
2156 sorted_copies[n++] = cp;
2157 }
2158 cp_num = n;
2159 }
2160}
2161
2162/* Create threads by processing copies of all alocnos from BUCKET. We
2163 process the most expensive copies first. */
2164static void
2165form_threads_from_bucket (ira_allocno_t bucket)
2166{
2167 ira_allocno_t a;
2168 ira_copy_t cp, next_cp;
2169 int cp_num = 0;
2170
2171 for (a = bucket; a != NULL; a = ALLOCNO_COLOR_DATA (a)->next_bucket_allocno)
2172 {
2173 for (cp = ALLOCNO_COPIES (a); cp != NULL; cp = next_cp)
2174 {
2175 if (cp->first == a)
2176 {
2177 next_cp = cp->next_first_allocno_copy;
2178 sorted_copies[cp_num++] = cp;
2179 }
2180 else if (cp->second == a)
2181 next_cp = cp->next_second_allocno_copy;
2182 else
2183 gcc_unreachable ();
2184 }
2185 }
2186 form_threads_from_copies (cp_num);
2187}
2188
2189/* Create threads by processing copies of colorable allocno A. We
2190 process most expensive copies first. */
2191static void
2192form_threads_from_colorable_allocno (ira_allocno_t a)
2193{
2194 ira_allocno_t another_a;
2195 ira_copy_t cp, next_cp;
2196 int cp_num = 0;
2197
74dc179a
VM
2198 if (internal_flag_ira_verbose > 3 && ira_dump_file != NULL)
2199 fprintf (ira_dump_file, " Forming thread from allocno a%dr%d:\n",
2200 ALLOCNO_NUM (a), ALLOCNO_REGNO (a));
bf08fb16
VM
2201 for (cp = ALLOCNO_COPIES (a); cp != NULL; cp = next_cp)
2202 {
2203 if (cp->first == a)
2204 {
2205 next_cp = cp->next_first_allocno_copy;
2206 another_a = cp->second;
2207 }
2208 else if (cp->second == a)
2209 {
2210 next_cp = cp->next_second_allocno_copy;
2211 another_a = cp->first;
2212 }
2213 else
2214 gcc_unreachable ();
2215 if ((! ALLOCNO_COLOR_DATA (another_a)->in_graph_p
2216 && !ALLOCNO_COLOR_DATA (another_a)->may_be_spilled_p)
2217 || ALLOCNO_COLOR_DATA (another_a)->colorable_p)
2218 sorted_copies[cp_num++] = cp;
2219 }
2220 form_threads_from_copies (cp_num);
2221}
2222
2223/* Form initial threads which contain only one allocno. */
2224static void
2225init_allocno_threads (void)
2226{
2227 ira_allocno_t a;
2228 unsigned int j;
2229 bitmap_iterator bi;
897a7308 2230 ira_pref_t pref;
bf08fb16
VM
2231
2232 EXECUTE_IF_SET_IN_BITMAP (consideration_allocno_bitmap, 0, j, bi)
2233 {
2234 a = ira_allocnos[j];
2235 /* Set up initial thread data: */
2236 ALLOCNO_COLOR_DATA (a)->first_thread_allocno
2237 = ALLOCNO_COLOR_DATA (a)->next_thread_allocno = a;
2238 ALLOCNO_COLOR_DATA (a)->thread_freq = ALLOCNO_FREQ (a);
897a7308
VM
2239 ALLOCNO_COLOR_DATA (a)->hard_reg_prefs = 0;
2240 for (pref = ALLOCNO_PREFS (a); pref != NULL; pref = pref->next_pref)
2241 ALLOCNO_COLOR_DATA (a)->hard_reg_prefs += pref->freq;
bf08fb16
VM
2242 }
2243}
2244
2245\f
2246
058e97ec
VM
2247/* This page contains the allocator based on the Chaitin-Briggs algorithm. */
2248
2249/* Bucket of allocnos that can colored currently without spilling. */
2250static ira_allocno_t colorable_allocno_bucket;
2251
2252/* Bucket of allocnos that might be not colored currently without
2253 spilling. */
2254static ira_allocno_t uncolorable_allocno_bucket;
2255
1756cb66
VM
2256/* The current number of allocnos in the uncolorable_bucket. */
2257static int uncolorable_allocnos_num;
058e97ec 2258
30ea859e
VM
2259/* Return the current spill priority of allocno A. The less the
2260 number, the more preferable the allocno for spilling. */
1756cb66 2261static inline int
30ea859e
VM
2262allocno_spill_priority (ira_allocno_t a)
2263{
1756cb66
VM
2264 allocno_color_data_t data = ALLOCNO_COLOR_DATA (a);
2265
2266 return (data->temp
2267 / (ALLOCNO_EXCESS_PRESSURE_POINTS_NUM (a)
2268 * ira_reg_class_max_nregs[ALLOCNO_CLASS (a)][ALLOCNO_MODE (a)]
30ea859e
VM
2269 + 1));
2270}
2271
1756cb66 2272/* Add allocno A to bucket *BUCKET_PTR. A should be not in a bucket
058e97ec
VM
2273 before the call. */
2274static void
1756cb66 2275add_allocno_to_bucket (ira_allocno_t a, ira_allocno_t *bucket_ptr)
058e97ec 2276{
1756cb66
VM
2277 ira_allocno_t first_a;
2278 allocno_color_data_t data;
058e97ec
VM
2279
2280 if (bucket_ptr == &uncolorable_allocno_bucket
1756cb66 2281 && ALLOCNO_CLASS (a) != NO_REGS)
058e97ec 2282 {
1756cb66
VM
2283 uncolorable_allocnos_num++;
2284 ira_assert (uncolorable_allocnos_num > 0);
058e97ec 2285 }
1756cb66
VM
2286 first_a = *bucket_ptr;
2287 data = ALLOCNO_COLOR_DATA (a);
2288 data->next_bucket_allocno = first_a;
2289 data->prev_bucket_allocno = NULL;
2290 if (first_a != NULL)
2291 ALLOCNO_COLOR_DATA (first_a)->prev_bucket_allocno = a;
2292 *bucket_ptr = a;
058e97ec
VM
2293}
2294
058e97ec
VM
2295/* Compare two allocnos to define which allocno should be pushed first
2296 into the coloring stack. If the return is a negative number, the
2297 allocno given by the first parameter will be pushed first. In this
2298 case such allocno has less priority than the second one and the
2299 hard register will be assigned to it after assignment to the second
2300 one. As the result of such assignment order, the second allocno
2301 has a better chance to get the best hard register. */
2302static int
2303bucket_allocno_compare_func (const void *v1p, const void *v2p)
2304{
2305 ira_allocno_t a1 = *(const ira_allocno_t *) v1p;
2306 ira_allocno_t a2 = *(const ira_allocno_t *) v2p;
8c679205 2307 int diff, freq1, freq2, a1_num, a2_num, pref1, pref2;
bf08fb16
VM
2308 ira_allocno_t t1 = ALLOCNO_COLOR_DATA (a1)->first_thread_allocno;
2309 ira_allocno_t t2 = ALLOCNO_COLOR_DATA (a2)->first_thread_allocno;
9c3b0346
VM
2310 int cl1 = ALLOCNO_CLASS (a1), cl2 = ALLOCNO_CLASS (a2);
2311
bf08fb16
VM
2312 freq1 = ALLOCNO_COLOR_DATA (t1)->thread_freq;
2313 freq2 = ALLOCNO_COLOR_DATA (t2)->thread_freq;
2314 if ((diff = freq1 - freq2) != 0)
2315 return diff;
2316
2317 if ((diff = ALLOCNO_NUM (t2) - ALLOCNO_NUM (t1)) != 0)
2318 return diff;
2319
9c3b0346
VM
2320 /* Push pseudos requiring less hard registers first. It means that
2321 we will assign pseudos requiring more hard registers first
2322 avoiding creation small holes in free hard register file into
67914693 2323 which the pseudos requiring more hard registers cannot fit. */
9c3b0346
VM
2324 if ((diff = (ira_reg_class_max_nregs[cl1][ALLOCNO_MODE (a1)]
2325 - ira_reg_class_max_nregs[cl2][ALLOCNO_MODE (a2)])) != 0)
058e97ec 2326 return diff;
bf08fb16
VM
2327
2328 freq1 = ALLOCNO_FREQ (a1);
2329 freq2 = ALLOCNO_FREQ (a2);
2330 if ((diff = freq1 - freq2) != 0)
058e97ec 2331 return diff;
bf08fb16 2332
1756cb66
VM
2333 a1_num = ALLOCNO_COLOR_DATA (a1)->available_regs_num;
2334 a2_num = ALLOCNO_COLOR_DATA (a2)->available_regs_num;
2335 if ((diff = a2_num - a1_num) != 0)
99710245 2336 return diff;
3133bed5
VM
2337 /* Push allocnos with minimal conflict_allocno_hard_prefs first. */
2338 pref1 = ALLOCNO_COLOR_DATA (a1)->conflict_allocno_hard_prefs;
2339 pref2 = ALLOCNO_COLOR_DATA (a2)->conflict_allocno_hard_prefs;
2340 if ((diff = pref1 - pref2) != 0)
2341 return diff;
058e97ec
VM
2342 return ALLOCNO_NUM (a2) - ALLOCNO_NUM (a1);
2343}
2344
2345/* Sort bucket *BUCKET_PTR and return the result through
2346 BUCKET_PTR. */
2347static void
1756cb66
VM
2348sort_bucket (ira_allocno_t *bucket_ptr,
2349 int (*compare_func) (const void *, const void *))
058e97ec
VM
2350{
2351 ira_allocno_t a, head;
2352 int n;
2353
1756cb66
VM
2354 for (n = 0, a = *bucket_ptr;
2355 a != NULL;
2356 a = ALLOCNO_COLOR_DATA (a)->next_bucket_allocno)
058e97ec
VM
2357 sorted_allocnos[n++] = a;
2358 if (n <= 1)
2359 return;
1756cb66 2360 qsort (sorted_allocnos, n, sizeof (ira_allocno_t), compare_func);
058e97ec
VM
2361 head = NULL;
2362 for (n--; n >= 0; n--)
2363 {
2364 a = sorted_allocnos[n];
1756cb66
VM
2365 ALLOCNO_COLOR_DATA (a)->next_bucket_allocno = head;
2366 ALLOCNO_COLOR_DATA (a)->prev_bucket_allocno = NULL;
058e97ec 2367 if (head != NULL)
1756cb66 2368 ALLOCNO_COLOR_DATA (head)->prev_bucket_allocno = a;
058e97ec
VM
2369 head = a;
2370 }
2371 *bucket_ptr = head;
2372}
2373
bf08fb16 2374/* Add ALLOCNO to colorable bucket maintaining the order according
058e97ec
VM
2375 their priority. ALLOCNO should be not in a bucket before the
2376 call. */
2377static void
bf08fb16 2378add_allocno_to_ordered_colorable_bucket (ira_allocno_t allocno)
058e97ec
VM
2379{
2380 ira_allocno_t before, after;
058e97ec 2381
bf08fb16
VM
2382 form_threads_from_colorable_allocno (allocno);
2383 for (before = colorable_allocno_bucket, after = NULL;
058e97ec 2384 before != NULL;
1756cb66
VM
2385 after = before,
2386 before = ALLOCNO_COLOR_DATA (before)->next_bucket_allocno)
058e97ec
VM
2387 if (bucket_allocno_compare_func (&allocno, &before) < 0)
2388 break;
1756cb66
VM
2389 ALLOCNO_COLOR_DATA (allocno)->next_bucket_allocno = before;
2390 ALLOCNO_COLOR_DATA (allocno)->prev_bucket_allocno = after;
058e97ec 2391 if (after == NULL)
bf08fb16 2392 colorable_allocno_bucket = allocno;
058e97ec 2393 else
1756cb66 2394 ALLOCNO_COLOR_DATA (after)->next_bucket_allocno = allocno;
058e97ec 2395 if (before != NULL)
1756cb66 2396 ALLOCNO_COLOR_DATA (before)->prev_bucket_allocno = allocno;
058e97ec
VM
2397}
2398
2399/* Delete ALLOCNO from bucket *BUCKET_PTR. It should be there before
2400 the call. */
2401static void
2402delete_allocno_from_bucket (ira_allocno_t allocno, ira_allocno_t *bucket_ptr)
2403{
2404 ira_allocno_t prev_allocno, next_allocno;
058e97ec
VM
2405
2406 if (bucket_ptr == &uncolorable_allocno_bucket
1756cb66 2407 && ALLOCNO_CLASS (allocno) != NO_REGS)
058e97ec 2408 {
1756cb66
VM
2409 uncolorable_allocnos_num--;
2410 ira_assert (uncolorable_allocnos_num >= 0);
058e97ec 2411 }
1756cb66
VM
2412 prev_allocno = ALLOCNO_COLOR_DATA (allocno)->prev_bucket_allocno;
2413 next_allocno = ALLOCNO_COLOR_DATA (allocno)->next_bucket_allocno;
058e97ec 2414 if (prev_allocno != NULL)
1756cb66 2415 ALLOCNO_COLOR_DATA (prev_allocno)->next_bucket_allocno = next_allocno;
058e97ec
VM
2416 else
2417 {
2418 ira_assert (*bucket_ptr == allocno);
2419 *bucket_ptr = next_allocno;
2420 }
2421 if (next_allocno != NULL)
1756cb66 2422 ALLOCNO_COLOR_DATA (next_allocno)->prev_bucket_allocno = prev_allocno;
058e97ec
VM
2423}
2424
22b0982c 2425/* Put allocno A onto the coloring stack without removing it from its
058e97ec
VM
2426 bucket. Pushing allocno to the coloring stack can result in moving
2427 conflicting allocnos from the uncolorable bucket to the colorable
8c679205
VM
2428 one. Update conflict_allocno_hard_prefs of the conflicting
2429 allocnos which are not on stack yet. */
058e97ec 2430static void
22b0982c 2431push_allocno_to_stack (ira_allocno_t a)
058e97ec 2432{
1756cb66
VM
2433 enum reg_class aclass;
2434 allocno_color_data_t data, conflict_data;
2435 int size, i, n = ALLOCNO_NUM_OBJECTS (a);
2436
2437 data = ALLOCNO_COLOR_DATA (a);
2438 data->in_graph_p = false;
9771b263 2439 allocno_stack_vec.safe_push (a);
1756cb66
VM
2440 aclass = ALLOCNO_CLASS (a);
2441 if (aclass == NO_REGS)
058e97ec 2442 return;
1756cb66
VM
2443 size = ira_reg_class_max_nregs[aclass][ALLOCNO_MODE (a)];
2444 if (n > 1)
ac0ab4f7
BS
2445 {
2446 /* We will deal with the subwords individually. */
22b0982c 2447 gcc_assert (size == ALLOCNO_NUM_OBJECTS (a));
ac0ab4f7
BS
2448 size = 1;
2449 }
22b0982c 2450 for (i = 0; i < n; i++)
058e97ec 2451 {
22b0982c 2452 ira_object_t obj = ALLOCNO_OBJECT (a, i);
22b0982c
VM
2453 ira_object_t conflict_obj;
2454 ira_object_conflict_iterator oci;
2455
2456 FOR_EACH_OBJECT_CONFLICT (obj, conflict_obj, oci)
548a6322 2457 {
22b0982c 2458 ira_allocno_t conflict_a = OBJECT_ALLOCNO (conflict_obj);
8c679205
VM
2459 ira_pref_t pref;
2460
1756cb66 2461 conflict_data = ALLOCNO_COLOR_DATA (conflict_a);
8c679205 2462 if (! conflict_data->in_graph_p
1756cb66
VM
2463 || ALLOCNO_ASSIGNED_P (conflict_a)
2464 || !(hard_reg_set_intersect_p
27508f5f
VM
2465 (ALLOCNO_COLOR_DATA (a)->profitable_hard_regs,
2466 conflict_data->profitable_hard_regs)))
22b0982c 2467 continue;
8c679205
VM
2468 for (pref = ALLOCNO_PREFS (a); pref != NULL; pref = pref->next_pref)
2469 conflict_data->conflict_allocno_hard_prefs -= pref->freq;
2470 if (conflict_data->colorable_p)
2471 continue;
1756cb66
VM
2472 ira_assert (bitmap_bit_p (coloring_allocno_bitmap,
2473 ALLOCNO_NUM (conflict_a)));
27508f5f 2474 if (update_left_conflict_sizes_p (conflict_a, a, size))
22b0982c
VM
2475 {
2476 delete_allocno_from_bucket
27508f5f 2477 (conflict_a, &uncolorable_allocno_bucket);
bf08fb16 2478 add_allocno_to_ordered_colorable_bucket (conflict_a);
1756cb66
VM
2479 if (internal_flag_ira_verbose > 4 && ira_dump_file != NULL)
2480 {
2481 fprintf (ira_dump_file, " Making");
2482 ira_print_expanded_allocno (conflict_a);
2483 fprintf (ira_dump_file, " colorable\n");
2484 }
548a6322 2485 }
1756cb66 2486
548a6322 2487 }
058e97ec
VM
2488 }
2489}
2490
2491/* Put ALLOCNO onto the coloring stack and remove it from its bucket.
2492 The allocno is in the colorable bucket if COLORABLE_P is TRUE. */
2493static void
2494remove_allocno_from_bucket_and_push (ira_allocno_t allocno, bool colorable_p)
2495{
058e97ec
VM
2496 if (colorable_p)
2497 delete_allocno_from_bucket (allocno, &colorable_allocno_bucket);
2498 else
2499 delete_allocno_from_bucket (allocno, &uncolorable_allocno_bucket);
2500 if (internal_flag_ira_verbose > 3 && ira_dump_file != NULL)
2501 {
2502 fprintf (ira_dump_file, " Pushing");
22b0982c 2503 ira_print_expanded_allocno (allocno);
30ea859e 2504 if (colorable_p)
1756cb66
VM
2505 fprintf (ira_dump_file, "(cost %d)\n",
2506 ALLOCNO_COLOR_DATA (allocno)->temp);
30ea859e
VM
2507 else
2508 fprintf (ira_dump_file, "(potential spill: %spri=%d, cost=%d)\n",
2509 ALLOCNO_BAD_SPILL_P (allocno) ? "bad spill, " : "",
1756cb66
VM
2510 allocno_spill_priority (allocno),
2511 ALLOCNO_COLOR_DATA (allocno)->temp);
2512 }
058e97ec 2513 if (! colorable_p)
1756cb66 2514 ALLOCNO_COLOR_DATA (allocno)->may_be_spilled_p = true;
548a6322 2515 push_allocno_to_stack (allocno);
058e97ec
VM
2516}
2517
2518/* Put all allocnos from colorable bucket onto the coloring stack. */
2519static void
2520push_only_colorable (void)
2521{
74dc179a
VM
2522 if (internal_flag_ira_verbose > 3 && ira_dump_file != NULL)
2523 fprintf (ira_dump_file, " Forming thread from colorable bucket:\n");
bf08fb16 2524 form_threads_from_bucket (colorable_allocno_bucket);
74dc179a
VM
2525 for (ira_allocno_t a = colorable_allocno_bucket;
2526 a != NULL;
2527 a = ALLOCNO_COLOR_DATA (a)->next_bucket_allocno)
2528 update_costs_from_prefs (a);
1756cb66 2529 sort_bucket (&colorable_allocno_bucket, bucket_allocno_compare_func);
058e97ec
VM
2530 for (;colorable_allocno_bucket != NULL;)
2531 remove_allocno_from_bucket_and_push (colorable_allocno_bucket, true);
2532}
2533
058e97ec 2534/* Return the frequency of exit edges (if EXIT_P) or entry from/to the
b8698a0f 2535 loop given by its LOOP_NODE. */
058e97ec
VM
2536int
2537ira_loop_edge_freq (ira_loop_tree_node_t loop_node, int regno, bool exit_p)
2538{
2539 int freq, i;
2540 edge_iterator ei;
2541 edge e;
9771b263 2542 vec<edge> edges;
058e97ec 2543
2608d841 2544 ira_assert (current_loops != NULL && loop_node->loop != NULL
058e97ec
VM
2545 && (regno < 0 || regno >= FIRST_PSEUDO_REGISTER));
2546 freq = 0;
2547 if (! exit_p)
2548 {
2549 FOR_EACH_EDGE (e, ei, loop_node->loop->header->preds)
2550 if (e->src != loop_node->loop->latch
2551 && (regno < 0
bf744527
SB
2552 || (bitmap_bit_p (df_get_live_out (e->src), regno)
2553 && bitmap_bit_p (df_get_live_in (e->dest), regno))))
058e97ec
VM
2554 freq += EDGE_FREQUENCY (e);
2555 }
2556 else
2557 {
2558 edges = get_loop_exit_edges (loop_node->loop);
9771b263 2559 FOR_EACH_VEC_ELT (edges, i, e)
058e97ec 2560 if (regno < 0
bf744527
SB
2561 || (bitmap_bit_p (df_get_live_out (e->src), regno)
2562 && bitmap_bit_p (df_get_live_in (e->dest), regno)))
058e97ec 2563 freq += EDGE_FREQUENCY (e);
9771b263 2564 edges.release ();
058e97ec
VM
2565 }
2566
2567 return REG_FREQ_FROM_EDGE_FREQ (freq);
2568}
2569
2570/* Calculate and return the cost of putting allocno A into memory. */
2571static int
2572calculate_allocno_spill_cost (ira_allocno_t a)
2573{
2574 int regno, cost;
ef4bddc2 2575 machine_mode mode;
058e97ec
VM
2576 enum reg_class rclass;
2577 ira_allocno_t parent_allocno;
2578 ira_loop_tree_node_t parent_node, loop_node;
2579
2580 regno = ALLOCNO_REGNO (a);
1756cb66 2581 cost = ALLOCNO_UPDATED_MEMORY_COST (a) - ALLOCNO_UPDATED_CLASS_COST (a);
058e97ec
VM
2582 if (ALLOCNO_CAP (a) != NULL)
2583 return cost;
2584 loop_node = ALLOCNO_LOOP_TREE_NODE (a);
2585 if ((parent_node = loop_node->parent) == NULL)
2586 return cost;
2587 if ((parent_allocno = parent_node->regno_allocno_map[regno]) == NULL)
2588 return cost;
2589 mode = ALLOCNO_MODE (a);
1756cb66 2590 rclass = ALLOCNO_CLASS (a);
058e97ec
VM
2591 if (ALLOCNO_HARD_REGNO (parent_allocno) < 0)
2592 cost -= (ira_memory_move_cost[mode][rclass][0]
2593 * ira_loop_edge_freq (loop_node, regno, true)
2594 + ira_memory_move_cost[mode][rclass][1]
2595 * ira_loop_edge_freq (loop_node, regno, false));
2596 else
1756cb66
VM
2597 {
2598 ira_init_register_move_cost_if_necessary (mode);
2599 cost += ((ira_memory_move_cost[mode][rclass][1]
2600 * ira_loop_edge_freq (loop_node, regno, true)
2601 + ira_memory_move_cost[mode][rclass][0]
2602 * ira_loop_edge_freq (loop_node, regno, false))
2603 - (ira_register_move_cost[mode][rclass][rclass]
2604 * (ira_loop_edge_freq (loop_node, regno, false)
2605 + ira_loop_edge_freq (loop_node, regno, true))));
2606 }
058e97ec
VM
2607 return cost;
2608}
2609
1756cb66
VM
2610/* Used for sorting allocnos for spilling. */
2611static inline int
2612allocno_spill_priority_compare (ira_allocno_t a1, ira_allocno_t a2)
058e97ec
VM
2613{
2614 int pri1, pri2, diff;
b8698a0f 2615
b81a2f0d
VM
2616 /* Avoid spilling static chain pointer pseudo when non-local goto is
2617 used. */
2618 if (non_spilled_static_chain_regno_p (ALLOCNO_REGNO (a1)))
2619 return 1;
2620 else if (non_spilled_static_chain_regno_p (ALLOCNO_REGNO (a2)))
2621 return -1;
1756cb66
VM
2622 if (ALLOCNO_BAD_SPILL_P (a1) && ! ALLOCNO_BAD_SPILL_P (a2))
2623 return 1;
2624 if (ALLOCNO_BAD_SPILL_P (a2) && ! ALLOCNO_BAD_SPILL_P (a1))
2625 return -1;
2626 pri1 = allocno_spill_priority (a1);
2627 pri2 = allocno_spill_priority (a2);
058e97ec
VM
2628 if ((diff = pri1 - pri2) != 0)
2629 return diff;
1756cb66
VM
2630 if ((diff
2631 = ALLOCNO_COLOR_DATA (a1)->temp - ALLOCNO_COLOR_DATA (a2)->temp) != 0)
058e97ec
VM
2632 return diff;
2633 return ALLOCNO_NUM (a1) - ALLOCNO_NUM (a2);
2634}
2635
1756cb66
VM
2636/* Used for sorting allocnos for spilling. */
2637static int
2638allocno_spill_sort_compare (const void *v1p, const void *v2p)
99710245 2639{
1756cb66
VM
2640 ira_allocno_t p1 = *(const ira_allocno_t *) v1p;
2641 ira_allocno_t p2 = *(const ira_allocno_t *) v2p;
99710245 2642
1756cb66 2643 return allocno_spill_priority_compare (p1, p2);
058e97ec
VM
2644}
2645
2646/* Push allocnos to the coloring stack. The order of allocnos in the
1756cb66
VM
2647 stack defines the order for the subsequent coloring. */
2648static void
2649push_allocnos_to_stack (void)
2650{
2651 ira_allocno_t a;
2652 int cost;
2653
2654 /* Calculate uncolorable allocno spill costs. */
2655 for (a = uncolorable_allocno_bucket;
2656 a != NULL;
2657 a = ALLOCNO_COLOR_DATA (a)->next_bucket_allocno)
2658 if (ALLOCNO_CLASS (a) != NO_REGS)
2659 {
2660 cost = calculate_allocno_spill_cost (a);
2661 /* ??? Remove cost of copies between the coalesced
2662 allocnos. */
2663 ALLOCNO_COLOR_DATA (a)->temp = cost;
2664 }
2665 sort_bucket (&uncolorable_allocno_bucket, allocno_spill_sort_compare);
2666 for (;;)
2667 {
2668 push_only_colorable ();
2669 a = uncolorable_allocno_bucket;
2670 if (a == NULL)
2671 break;
2672 remove_allocno_from_bucket_and_push (a, false);
058e97ec
VM
2673 }
2674 ira_assert (colorable_allocno_bucket == NULL
2675 && uncolorable_allocno_bucket == NULL);
1756cb66 2676 ira_assert (uncolorable_allocnos_num == 0);
058e97ec
VM
2677}
2678
2679/* Pop the coloring stack and assign hard registers to the popped
2680 allocnos. */
2681static void
2682pop_allocnos_from_stack (void)
2683{
2684 ira_allocno_t allocno;
1756cb66 2685 enum reg_class aclass;
058e97ec 2686
9771b263 2687 for (;allocno_stack_vec.length () != 0;)
058e97ec 2688 {
9771b263 2689 allocno = allocno_stack_vec.pop ();
1756cb66 2690 aclass = ALLOCNO_CLASS (allocno);
058e97ec
VM
2691 if (internal_flag_ira_verbose > 3 && ira_dump_file != NULL)
2692 {
2693 fprintf (ira_dump_file, " Popping");
22b0982c 2694 ira_print_expanded_allocno (allocno);
058e97ec
VM
2695 fprintf (ira_dump_file, " -- ");
2696 }
1756cb66 2697 if (aclass == NO_REGS)
058e97ec
VM
2698 {
2699 ALLOCNO_HARD_REGNO (allocno) = -1;
2700 ALLOCNO_ASSIGNED_P (allocno) = true;
2701 ira_assert (ALLOCNO_UPDATED_HARD_REG_COSTS (allocno) == NULL);
2702 ira_assert
2703 (ALLOCNO_UPDATED_CONFLICT_HARD_REG_COSTS (allocno) == NULL);
2704 if (internal_flag_ira_verbose > 3 && ira_dump_file != NULL)
2705 fprintf (ira_dump_file, "assign memory\n");
2706 }
2707 else if (assign_hard_reg (allocno, false))
2708 {
2709 if (internal_flag_ira_verbose > 3 && ira_dump_file != NULL)
74dc179a 2710 fprintf (ira_dump_file, " assign reg %d\n",
058e97ec
VM
2711 ALLOCNO_HARD_REGNO (allocno));
2712 }
2713 else if (ALLOCNO_ASSIGNED_P (allocno))
2714 {
2715 if (internal_flag_ira_verbose > 3 && ira_dump_file != NULL)
3b6d1699
VM
2716 fprintf (ira_dump_file, "spill%s\n",
2717 ALLOCNO_COLOR_DATA (allocno)->may_be_spilled_p
2718 ? "" : "!");
058e97ec 2719 }
1756cb66 2720 ALLOCNO_COLOR_DATA (allocno)->in_graph_p = true;
ac0ab4f7
BS
2721 }
2722}
2723
22b0982c 2724/* Set up number of available hard registers for allocno A. */
058e97ec 2725static void
22b0982c 2726setup_allocno_available_regs_num (ira_allocno_t a)
058e97ec 2727{
27508f5f 2728 int i, n, hard_regno, hard_regs_num, nwords;
1756cb66 2729 enum reg_class aclass;
1756cb66 2730 allocno_color_data_t data;
058e97ec 2731
1756cb66
VM
2732 aclass = ALLOCNO_CLASS (a);
2733 data = ALLOCNO_COLOR_DATA (a);
2734 data->available_regs_num = 0;
2735 if (aclass == NO_REGS)
058e97ec 2736 return;
1756cb66 2737 hard_regs_num = ira_class_hard_regs_num[aclass];
1756cb66 2738 nwords = ALLOCNO_NUM_OBJECTS (a);
058e97ec 2739 for (n = 0, i = hard_regs_num - 1; i >= 0; i--)
478ab26d 2740 {
1756cb66 2741 hard_regno = ira_class_hard_regs[aclass][i];
27508f5f
VM
2742 /* Checking only profitable hard regs. */
2743 if (TEST_HARD_REG_BIT (data->profitable_hard_regs, hard_regno))
478ab26d
VM
2744 n++;
2745 }
1756cb66
VM
2746 data->available_regs_num = n;
2747 if (internal_flag_ira_verbose <= 2 || ira_dump_file == NULL)
2748 return;
2749 fprintf
2750 (ira_dump_file,
27508f5f 2751 " Allocno a%dr%d of %s(%d) has %d avail. regs ",
1756cb66
VM
2752 ALLOCNO_NUM (a), ALLOCNO_REGNO (a),
2753 reg_class_names[aclass], ira_class_hard_regs_num[aclass], n);
27508f5f
VM
2754 print_hard_reg_set (ira_dump_file, data->profitable_hard_regs, false);
2755 fprintf (ira_dump_file, ", %snode: ",
a8579651 2756 data->profitable_hard_regs == data->hard_regs_node->hard_regs->set
27508f5f
VM
2757 ? "" : "^");
2758 print_hard_reg_set (ira_dump_file,
2759 data->hard_regs_node->hard_regs->set, false);
1756cb66 2760 for (i = 0; i < nwords; i++)
22b0982c 2761 {
1756cb66 2762 ira_object_t obj = ALLOCNO_OBJECT (a, i);
ac0ab4f7 2763
1756cb66 2764 if (nwords != 1)
22b0982c 2765 {
1756cb66
VM
2766 if (i != 0)
2767 fprintf (ira_dump_file, ", ");
2768 fprintf (ira_dump_file, " obj %d", i);
22b0982c 2769 }
1756cb66
VM
2770 fprintf (ira_dump_file, " (confl regs = ");
2771 print_hard_reg_set (ira_dump_file, OBJECT_TOTAL_CONFLICT_HARD_REGS (obj),
2772 false);
27508f5f 2773 fprintf (ira_dump_file, ")");
22b0982c 2774 }
1756cb66 2775 fprintf (ira_dump_file, "\n");
058e97ec
VM
2776}
2777
2778/* Put ALLOCNO in a bucket corresponding to its number and size of its
2779 conflicting allocnos and hard registers. */
2780static void
2781put_allocno_into_bucket (ira_allocno_t allocno)
2782{
1756cb66 2783 ALLOCNO_COLOR_DATA (allocno)->in_graph_p = true;
058e97ec 2784 setup_allocno_available_regs_num (allocno);
1756cb66 2785 if (setup_left_conflict_sizes_p (allocno))
548a6322 2786 add_allocno_to_bucket (allocno, &colorable_allocno_bucket);
058e97ec 2787 else
548a6322 2788 add_allocno_to_bucket (allocno, &uncolorable_allocno_bucket);
058e97ec
VM
2789}
2790
22b0982c
VM
2791/* Map: allocno number -> allocno priority. */
2792static int *allocno_priorities;
058e97ec 2793
22b0982c
VM
2794/* Set up priorities for N allocnos in array
2795 CONSIDERATION_ALLOCNOS. */
058e97ec 2796static void
22b0982c 2797setup_allocno_priorities (ira_allocno_t *consideration_allocnos, int n)
058e97ec 2798{
22b0982c
VM
2799 int i, length, nrefs, priority, max_priority, mult;
2800 ira_allocno_t a;
058e97ec 2801
22b0982c
VM
2802 max_priority = 0;
2803 for (i = 0; i < n; i++)
7db7ed3c
VM
2804 {
2805 a = consideration_allocnos[i];
2806 nrefs = ALLOCNO_NREFS (a);
2807 ira_assert (nrefs >= 0);
2808 mult = floor_log2 (ALLOCNO_NREFS (a)) + 1;
2809 ira_assert (mult >= 0);
2810 allocno_priorities[ALLOCNO_NUM (a)]
2811 = priority
2812 = (mult
1756cb66
VM
2813 * (ALLOCNO_MEMORY_COST (a) - ALLOCNO_CLASS_COST (a))
2814 * ira_reg_class_max_nregs[ALLOCNO_CLASS (a)][ALLOCNO_MODE (a)]);
7db7ed3c
VM
2815 if (priority < 0)
2816 priority = -priority;
2817 if (max_priority < priority)
2818 max_priority = priority;
2819 }
2820 mult = max_priority == 0 ? 1 : INT_MAX / max_priority;
2821 for (i = 0; i < n; i++)
2822 {
2823 a = consideration_allocnos[i];
2824 length = ALLOCNO_EXCESS_PRESSURE_POINTS_NUM (a);
ac0ab4f7
BS
2825 if (ALLOCNO_NUM_OBJECTS (a) > 1)
2826 length /= ALLOCNO_NUM_OBJECTS (a);
7db7ed3c
VM
2827 if (length <= 0)
2828 length = 1;
2829 allocno_priorities[ALLOCNO_NUM (a)]
2830 = allocno_priorities[ALLOCNO_NUM (a)] * mult / length;
2831 }
2832}
2833
1756cb66
VM
2834/* Sort allocnos according to the profit of usage of a hard register
2835 instead of memory for them. */
2836static int
2837allocno_cost_compare_func (const void *v1p, const void *v2p)
2838{
2839 ira_allocno_t p1 = *(const ira_allocno_t *) v1p;
2840 ira_allocno_t p2 = *(const ira_allocno_t *) v2p;
2841 int c1, c2;
2842
2843 c1 = ALLOCNO_UPDATED_MEMORY_COST (p1) - ALLOCNO_UPDATED_CLASS_COST (p1);
2844 c2 = ALLOCNO_UPDATED_MEMORY_COST (p2) - ALLOCNO_UPDATED_CLASS_COST (p2);
2845 if (c1 - c2)
2846 return c1 - c2;
2847
2848 /* If regs are equally good, sort by allocno numbers, so that the
2849 results of qsort leave nothing to chance. */
2850 return ALLOCNO_NUM (p1) - ALLOCNO_NUM (p2);
2851}
2852
da178d56
VM
2853/* Return savings on removed copies when ALLOCNO is assigned to
2854 HARD_REGNO. */
2855static int
2856allocno_copy_cost_saving (ira_allocno_t allocno, int hard_regno)
2857{
2858 int cost = 0;
b8506a8a 2859 machine_mode allocno_mode = ALLOCNO_MODE (allocno);
da178d56
VM
2860 enum reg_class rclass;
2861 ira_copy_t cp, next_cp;
2862
2863 rclass = REGNO_REG_CLASS (hard_regno);
c4b1942c
VM
2864 if (ira_reg_class_max_nregs[rclass][allocno_mode]
2865 > ira_class_hard_regs_num[rclass])
2866 /* For the above condition the cost can be wrong. Use the allocno
2867 class in this case. */
2868 rclass = ALLOCNO_CLASS (allocno);
da178d56
VM
2869 for (cp = ALLOCNO_COPIES (allocno); cp != NULL; cp = next_cp)
2870 {
2871 if (cp->first == allocno)
2872 {
2873 next_cp = cp->next_first_allocno_copy;
2874 if (ALLOCNO_HARD_REGNO (cp->second) != hard_regno)
2875 continue;
2876 }
2877 else if (cp->second == allocno)
2878 {
2879 next_cp = cp->next_second_allocno_copy;
2880 if (ALLOCNO_HARD_REGNO (cp->first) != hard_regno)
2881 continue;
2882 }
2883 else
2884 gcc_unreachable ();
11f2ce1f 2885 ira_init_register_move_cost_if_necessary (allocno_mode);
c4b1942c 2886 cost += cp->freq * ira_register_move_cost[allocno_mode][rclass][rclass];
da178d56
VM
2887 }
2888 return cost;
2889}
2890
1756cb66
VM
2891/* We used Chaitin-Briggs coloring to assign as many pseudos as
2892 possible to hard registers. Let us try to improve allocation with
2893 cost point of view. This function improves the allocation by
2894 spilling some allocnos and assigning the freed hard registers to
2895 other allocnos if it decreases the overall allocation cost. */
2896static void
2897improve_allocation (void)
2898{
2899 unsigned int i;
2900 int j, k, n, hregno, conflict_hregno, base_cost, class_size, word, nwords;
2901 int check, spill_cost, min_cost, nregs, conflict_nregs, r, best;
2902 bool try_p;
2903 enum reg_class aclass;
ef4bddc2 2904 machine_mode mode;
1756cb66
VM
2905 int *allocno_costs;
2906 int costs[FIRST_PSEUDO_REGISTER];
27508f5f 2907 HARD_REG_SET conflicting_regs[2], profitable_hard_regs;
1756cb66
VM
2908 ira_allocno_t a;
2909 bitmap_iterator bi;
2910
b81a2f0d
VM
2911 /* Don't bother to optimize the code with static chain pointer and
2912 non-local goto in order not to spill the chain pointer
2913 pseudo. */
2914 if (cfun->static_chain_decl && crtl->has_nonlocal_goto)
2915 return;
1756cb66
VM
2916 /* Clear counts used to process conflicting allocnos only once for
2917 each allocno. */
2918 EXECUTE_IF_SET_IN_BITMAP (coloring_allocno_bitmap, 0, i, bi)
2919 ALLOCNO_COLOR_DATA (ira_allocnos[i])->temp = 0;
2920 check = n = 0;
2921 /* Process each allocno and try to assign a hard register to it by
2922 spilling some its conflicting allocnos. */
2923 EXECUTE_IF_SET_IN_BITMAP (coloring_allocno_bitmap, 0, i, bi)
2924 {
2925 a = ira_allocnos[i];
2926 ALLOCNO_COLOR_DATA (a)->temp = 0;
2927 if (empty_profitable_hard_regs (a))
2928 continue;
2929 check++;
2930 aclass = ALLOCNO_CLASS (a);
da178d56 2931 allocno_costs = ALLOCNO_HARD_REG_COSTS (a);
1756cb66
VM
2932 if ((hregno = ALLOCNO_HARD_REGNO (a)) < 0)
2933 base_cost = ALLOCNO_UPDATED_MEMORY_COST (a);
2934 else if (allocno_costs == NULL)
2935 /* It means that assigning a hard register is not profitable
2936 (we don't waste memory for hard register costs in this
2937 case). */
2938 continue;
2939 else
da178d56
VM
2940 base_cost = (allocno_costs[ira_class_hard_reg_index[aclass][hregno]]
2941 - allocno_copy_cost_saving (a, hregno));
1756cb66 2942 try_p = false;
27508f5f
VM
2943 get_conflict_and_start_profitable_regs (a, false,
2944 conflicting_regs,
2945 &profitable_hard_regs);
1756cb66
VM
2946 class_size = ira_class_hard_regs_num[aclass];
2947 /* Set up cost improvement for usage of each profitable hard
2948 register for allocno A. */
2949 for (j = 0; j < class_size; j++)
2950 {
2951 hregno = ira_class_hard_regs[aclass][j];
2952 if (! check_hard_reg_p (a, hregno,
2953 conflicting_regs, profitable_hard_regs))
2954 continue;
2955 ira_assert (ira_class_hard_reg_index[aclass][hregno] == j);
2956 k = allocno_costs == NULL ? 0 : j;
2957 costs[hregno] = (allocno_costs == NULL
2958 ? ALLOCNO_UPDATED_CLASS_COST (a) : allocno_costs[k]);
da178d56 2959 costs[hregno] -= allocno_copy_cost_saving (a, hregno);
1756cb66
VM
2960 costs[hregno] -= base_cost;
2961 if (costs[hregno] < 0)
2962 try_p = true;
2963 }
2964 if (! try_p)
2965 /* There is no chance to improve the allocation cost by
2966 assigning hard register to allocno A even without spilling
2967 conflicting allocnos. */
2968 continue;
2969 mode = ALLOCNO_MODE (a);
2970 nwords = ALLOCNO_NUM_OBJECTS (a);
2971 /* Process each allocno conflicting with A and update the cost
2972 improvement for profitable hard registers of A. To use a
2973 hard register for A we need to spill some conflicting
2974 allocnos and that creates penalty for the cost
2975 improvement. */
2976 for (word = 0; word < nwords; word++)
2977 {
2978 ira_object_t conflict_obj;
2979 ira_object_t obj = ALLOCNO_OBJECT (a, word);
2980 ira_object_conflict_iterator oci;
2981
2982 FOR_EACH_OBJECT_CONFLICT (obj, conflict_obj, oci)
2983 {
2984 ira_allocno_t conflict_a = OBJECT_ALLOCNO (conflict_obj);
2985
2986 if (ALLOCNO_COLOR_DATA (conflict_a)->temp == check)
2987 /* We already processed this conflicting allocno
2988 because we processed earlier another object of the
2989 conflicting allocno. */
2990 continue;
2991 ALLOCNO_COLOR_DATA (conflict_a)->temp = check;
2992 if ((conflict_hregno = ALLOCNO_HARD_REGNO (conflict_a)) < 0)
2993 continue;
2994 spill_cost = ALLOCNO_UPDATED_MEMORY_COST (conflict_a);
2995 k = (ira_class_hard_reg_index
2996 [ALLOCNO_CLASS (conflict_a)][conflict_hregno]);
2997 ira_assert (k >= 0);
da178d56 2998 if ((allocno_costs = ALLOCNO_HARD_REG_COSTS (conflict_a))
1756cb66
VM
2999 != NULL)
3000 spill_cost -= allocno_costs[k];
1756cb66
VM
3001 else
3002 spill_cost -= ALLOCNO_UPDATED_CLASS_COST (conflict_a);
da178d56
VM
3003 spill_cost
3004 += allocno_copy_cost_saving (conflict_a, conflict_hregno);
ad474626
RS
3005 conflict_nregs = hard_regno_nregs (conflict_hregno,
3006 ALLOCNO_MODE (conflict_a));
1756cb66 3007 for (r = conflict_hregno;
4edd6298 3008 r >= 0 && (int) end_hard_regno (mode, r) > conflict_hregno;
1756cb66
VM
3009 r--)
3010 if (check_hard_reg_p (a, r,
3011 conflicting_regs, profitable_hard_regs))
3012 costs[r] += spill_cost;
3013 for (r = conflict_hregno + 1;
3014 r < conflict_hregno + conflict_nregs;
3015 r++)
3016 if (check_hard_reg_p (a, r,
3017 conflicting_regs, profitable_hard_regs))
3018 costs[r] += spill_cost;
3019 }
3020 }
3021 min_cost = INT_MAX;
3022 best = -1;
3023 /* Now we choose hard register for A which results in highest
3024 allocation cost improvement. */
3025 for (j = 0; j < class_size; j++)
3026 {
3027 hregno = ira_class_hard_regs[aclass][j];
3028 if (check_hard_reg_p (a, hregno,
3029 conflicting_regs, profitable_hard_regs)
3030 && min_cost > costs[hregno])
3031 {
3032 best = hregno;
3033 min_cost = costs[hregno];
3034 }
3035 }
3036 if (min_cost >= 0)
3037 /* We are in a situation when assigning any hard register to A
3038 by spilling some conflicting allocnos does not improve the
3039 allocation cost. */
3040 continue;
ad474626 3041 nregs = hard_regno_nregs (best, mode);
1756cb66
VM
3042 /* Now spill conflicting allocnos which contain a hard register
3043 of A when we assign the best chosen hard register to it. */
3044 for (word = 0; word < nwords; word++)
3045 {
3046 ira_object_t conflict_obj;
3047 ira_object_t obj = ALLOCNO_OBJECT (a, word);
3048 ira_object_conflict_iterator oci;
3049
3050 FOR_EACH_OBJECT_CONFLICT (obj, conflict_obj, oci)
3051 {
3052 ira_allocno_t conflict_a = OBJECT_ALLOCNO (conflict_obj);
3053
3054 if ((conflict_hregno = ALLOCNO_HARD_REGNO (conflict_a)) < 0)
3055 continue;
ad474626
RS
3056 conflict_nregs = hard_regno_nregs (conflict_hregno,
3057 ALLOCNO_MODE (conflict_a));
1756cb66
VM
3058 if (best + nregs <= conflict_hregno
3059 || conflict_hregno + conflict_nregs <= best)
3060 /* No intersection. */
3061 continue;
3062 ALLOCNO_HARD_REGNO (conflict_a) = -1;
3063 sorted_allocnos[n++] = conflict_a;
3064 if (internal_flag_ira_verbose > 2 && ira_dump_file != NULL)
3065 fprintf (ira_dump_file, "Spilling a%dr%d for a%dr%d\n",
3066 ALLOCNO_NUM (conflict_a), ALLOCNO_REGNO (conflict_a),
3067 ALLOCNO_NUM (a), ALLOCNO_REGNO (a));
3068 }
3069 }
3070 /* Assign the best chosen hard register to A. */
3071 ALLOCNO_HARD_REGNO (a) = best;
3072 if (internal_flag_ira_verbose > 2 && ira_dump_file != NULL)
3073 fprintf (ira_dump_file, "Assigning %d to a%dr%d\n",
3074 best, ALLOCNO_NUM (a), ALLOCNO_REGNO (a));
3075 }
3076 if (n == 0)
3077 return;
3078 /* We spilled some allocnos to assign their hard registers to other
3079 allocnos. The spilled allocnos are now in array
3080 'sorted_allocnos'. There is still a possibility that some of the
3081 spilled allocnos can get hard registers. So let us try assign
3082 them hard registers again (just a reminder -- function
3083 'assign_hard_reg' assigns hard registers only if it is possible
3084 and profitable). We process the spilled allocnos with biggest
3085 benefit to get hard register first -- see function
3086 'allocno_cost_compare_func'. */
3087 qsort (sorted_allocnos, n, sizeof (ira_allocno_t),
3088 allocno_cost_compare_func);
3089 for (j = 0; j < n; j++)
3090 {
3091 a = sorted_allocnos[j];
3092 ALLOCNO_ASSIGNED_P (a) = false;
3093 if (internal_flag_ira_verbose > 3 && ira_dump_file != NULL)
3094 {
3095 fprintf (ira_dump_file, " ");
3096 ira_print_expanded_allocno (a);
3097 fprintf (ira_dump_file, " -- ");
3098 }
3099 if (assign_hard_reg (a, false))
3100 {
3101 if (internal_flag_ira_verbose > 3 && ira_dump_file != NULL)
3102 fprintf (ira_dump_file, "assign hard reg %d\n",
3103 ALLOCNO_HARD_REGNO (a));
3104 }
3105 else
3106 {
3107 if (internal_flag_ira_verbose > 3 && ira_dump_file != NULL)
3108 fprintf (ira_dump_file, "assign memory\n");
3109 }
3110 }
3111}
3112
aeb9f7cf 3113/* Sort allocnos according to their priorities. */
7db7ed3c
VM
3114static int
3115allocno_priority_compare_func (const void *v1p, const void *v2p)
3116{
3117 ira_allocno_t a1 = *(const ira_allocno_t *) v1p;
3118 ira_allocno_t a2 = *(const ira_allocno_t *) v2p;
158ec018 3119 int pri1, pri2, diff;
7db7ed3c 3120
b81a2f0d
VM
3121 /* Assign hard reg to static chain pointer pseudo first when
3122 non-local goto is used. */
158ec018
AM
3123 if ((diff = (non_spilled_static_chain_regno_p (ALLOCNO_REGNO (a2))
3124 - non_spilled_static_chain_regno_p (ALLOCNO_REGNO (a1)))) != 0)
3125 return diff;
7db7ed3c
VM
3126 pri1 = allocno_priorities[ALLOCNO_NUM (a1)];
3127 pri2 = allocno_priorities[ALLOCNO_NUM (a2)];
71af27d2
OH
3128 if (pri2 != pri1)
3129 return SORTGT (pri2, pri1);
7db7ed3c
VM
3130
3131 /* If regs are equally good, sort by allocnos, so that the results of
3132 qsort leave nothing to chance. */
3133 return ALLOCNO_NUM (a1) - ALLOCNO_NUM (a2);
3134}
3135
058e97ec
VM
3136/* Chaitin-Briggs coloring for allocnos in COLORING_ALLOCNO_BITMAP
3137 taking into account allocnos in CONSIDERATION_ALLOCNO_BITMAP. */
3138static void
3139color_allocnos (void)
3140{
7db7ed3c 3141 unsigned int i, n;
058e97ec
VM
3142 bitmap_iterator bi;
3143 ira_allocno_t a;
3144
76763a6d 3145 setup_profitable_hard_regs ();
3b6d1699
VM
3146 EXECUTE_IF_SET_IN_BITMAP (coloring_allocno_bitmap, 0, i, bi)
3147 {
3b6d1699
VM
3148 allocno_color_data_t data;
3149 ira_pref_t pref, next_pref;
3150
3151 a = ira_allocnos[i];
3b6d1699 3152 data = ALLOCNO_COLOR_DATA (a);
8c679205 3153 data->conflict_allocno_hard_prefs = 0;
3b6d1699
VM
3154 for (pref = ALLOCNO_PREFS (a); pref != NULL; pref = next_pref)
3155 {
3156 next_pref = pref->next_pref;
3157 if (! ira_hard_reg_in_set_p (pref->hard_regno,
3158 ALLOCNO_MODE (a),
3159 data->profitable_hard_regs))
3160 ira_remove_pref (pref);
3161 }
3162 }
8c679205 3163
7db7ed3c 3164 if (flag_ira_algorithm == IRA_ALGORITHM_PRIORITY)
058e97ec 3165 {
7db7ed3c
VM
3166 n = 0;
3167 EXECUTE_IF_SET_IN_BITMAP (coloring_allocno_bitmap, 0, i, bi)
058e97ec 3168 {
7db7ed3c 3169 a = ira_allocnos[i];
1756cb66 3170 if (ALLOCNO_CLASS (a) == NO_REGS)
058e97ec 3171 {
7db7ed3c
VM
3172 ALLOCNO_HARD_REGNO (a) = -1;
3173 ALLOCNO_ASSIGNED_P (a) = true;
3174 ira_assert (ALLOCNO_UPDATED_HARD_REG_COSTS (a) == NULL);
3175 ira_assert (ALLOCNO_UPDATED_CONFLICT_HARD_REG_COSTS (a) == NULL);
3176 if (internal_flag_ira_verbose > 3 && ira_dump_file != NULL)
3177 {
3178 fprintf (ira_dump_file, " Spill");
22b0982c 3179 ira_print_expanded_allocno (a);
7db7ed3c
VM
3180 fprintf (ira_dump_file, "\n");
3181 }
3182 continue;
058e97ec 3183 }
7db7ed3c
VM
3184 sorted_allocnos[n++] = a;
3185 }
3186 if (n != 0)
3187 {
3188 setup_allocno_priorities (sorted_allocnos, n);
3189 qsort (sorted_allocnos, n, sizeof (ira_allocno_t),
3190 allocno_priority_compare_func);
3191 for (i = 0; i < n; i++)
3192 {
3193 a = sorted_allocnos[i];
3194 if (internal_flag_ira_verbose > 3 && ira_dump_file != NULL)
3195 {
3196 fprintf (ira_dump_file, " ");
22b0982c 3197 ira_print_expanded_allocno (a);
7db7ed3c
VM
3198 fprintf (ira_dump_file, " -- ");
3199 }
3200 if (assign_hard_reg (a, false))
3201 {
3202 if (internal_flag_ira_verbose > 3 && ira_dump_file != NULL)
3203 fprintf (ira_dump_file, "assign hard reg %d\n",
3204 ALLOCNO_HARD_REGNO (a));
3205 }
3206 else
3207 {
3208 if (internal_flag_ira_verbose > 3 && ira_dump_file != NULL)
3209 fprintf (ira_dump_file, "assign memory\n");
3210 }
3211 }
3212 }
3213 }
3214 else
3215 {
27508f5f 3216 form_allocno_hard_regs_nodes_forest ();
1756cb66
VM
3217 if (internal_flag_ira_verbose > 2 && ira_dump_file != NULL)
3218 print_hard_regs_forest (ira_dump_file);
7db7ed3c
VM
3219 EXECUTE_IF_SET_IN_BITMAP (coloring_allocno_bitmap, 0, i, bi)
3220 {
3221 a = ira_allocnos[i];
1756cb66 3222 if (ALLOCNO_CLASS (a) != NO_REGS && ! empty_profitable_hard_regs (a))
3b6d1699
VM
3223 {
3224 ALLOCNO_COLOR_DATA (a)->in_graph_p = true;
8c679205 3225 update_conflict_allocno_hard_prefs (a);
3b6d1699 3226 }
1756cb66 3227 else
7db7ed3c
VM
3228 {
3229 ALLOCNO_HARD_REGNO (a) = -1;
3230 ALLOCNO_ASSIGNED_P (a) = true;
1756cb66
VM
3231 /* We don't need updated costs anymore. */
3232 ira_free_allocno_updated_costs (a);
7db7ed3c
VM
3233 if (internal_flag_ira_verbose > 3 && ira_dump_file != NULL)
3234 {
3235 fprintf (ira_dump_file, " Spill");
22b0982c 3236 ira_print_expanded_allocno (a);
7db7ed3c
VM
3237 fprintf (ira_dump_file, "\n");
3238 }
7db7ed3c 3239 }
1756cb66
VM
3240 }
3241 /* Put the allocnos into the corresponding buckets. */
3242 colorable_allocno_bucket = NULL;
3243 uncolorable_allocno_bucket = NULL;
3244 EXECUTE_IF_SET_IN_BITMAP (coloring_allocno_bitmap, 0, i, bi)
3245 {
3246 a = ira_allocnos[i];
3247 if (ALLOCNO_COLOR_DATA (a)->in_graph_p)
3248 put_allocno_into_bucket (a);
058e97ec 3249 }
7db7ed3c
VM
3250 push_allocnos_to_stack ();
3251 pop_allocnos_from_stack ();
27508f5f 3252 finish_allocno_hard_regs_nodes_forest ();
058e97ec 3253 }
1756cb66 3254 improve_allocation ();
058e97ec
VM
3255}
3256
3257\f
3258
2b9c63a2 3259/* Output information about the loop given by its LOOP_TREE_NODE. */
058e97ec
VM
3260static void
3261print_loop_title (ira_loop_tree_node_t loop_tree_node)
3262{
3263 unsigned int j;
3264 bitmap_iterator bi;
ea1c67e6
VM
3265 ira_loop_tree_node_t subloop_node, dest_loop_node;
3266 edge e;
3267 edge_iterator ei;
058e97ec 3268
2608d841
VM
3269 if (loop_tree_node->parent == NULL)
3270 fprintf (ira_dump_file,
3271 "\n Loop 0 (parent -1, header bb%d, depth 0)\n bbs:",
3272 NUM_FIXED_BLOCKS);
3273 else
3274 {
3275 ira_assert (current_loops != NULL && loop_tree_node->loop != NULL);
3276 fprintf (ira_dump_file,
3277 "\n Loop %d (parent %d, header bb%d, depth %d)\n bbs:",
3278 loop_tree_node->loop_num, loop_tree_node->parent->loop_num,
3279 loop_tree_node->loop->header->index,
3280 loop_depth (loop_tree_node->loop));
3281 }
ea1c67e6
VM
3282 for (subloop_node = loop_tree_node->children;
3283 subloop_node != NULL;
3284 subloop_node = subloop_node->next)
3285 if (subloop_node->bb != NULL)
3286 {
3287 fprintf (ira_dump_file, " %d", subloop_node->bb->index);
3288 FOR_EACH_EDGE (e, ei, subloop_node->bb->succs)
fefa31b5 3289 if (e->dest != EXIT_BLOCK_PTR_FOR_FN (cfun)
ea1c67e6
VM
3290 && ((dest_loop_node = IRA_BB_NODE (e->dest)->parent)
3291 != loop_tree_node))
3292 fprintf (ira_dump_file, "(->%d:l%d)",
2608d841 3293 e->dest->index, dest_loop_node->loop_num);
ea1c67e6
VM
3294 }
3295 fprintf (ira_dump_file, "\n all:");
49d988e7 3296 EXECUTE_IF_SET_IN_BITMAP (loop_tree_node->all_allocnos, 0, j, bi)
058e97ec
VM
3297 fprintf (ira_dump_file, " %dr%d", j, ALLOCNO_REGNO (ira_allocnos[j]));
3298 fprintf (ira_dump_file, "\n modified regnos:");
3299 EXECUTE_IF_SET_IN_BITMAP (loop_tree_node->modified_regnos, 0, j, bi)
3300 fprintf (ira_dump_file, " %d", j);
3301 fprintf (ira_dump_file, "\n border:");
3302 EXECUTE_IF_SET_IN_BITMAP (loop_tree_node->border_allocnos, 0, j, bi)
3303 fprintf (ira_dump_file, " %dr%d", j, ALLOCNO_REGNO (ira_allocnos[j]));
3304 fprintf (ira_dump_file, "\n Pressure:");
1756cb66 3305 for (j = 0; (int) j < ira_pressure_classes_num; j++)
058e97ec 3306 {
1756cb66 3307 enum reg_class pclass;
b8698a0f 3308
1756cb66
VM
3309 pclass = ira_pressure_classes[j];
3310 if (loop_tree_node->reg_pressure[pclass] == 0)
058e97ec 3311 continue;
1756cb66
VM
3312 fprintf (ira_dump_file, " %s=%d", reg_class_names[pclass],
3313 loop_tree_node->reg_pressure[pclass]);
058e97ec
VM
3314 }
3315 fprintf (ira_dump_file, "\n");
3316}
3317
3318/* Color the allocnos inside loop (in the extreme case it can be all
3319 of the function) given the corresponding LOOP_TREE_NODE. The
3320 function is called for each loop during top-down traverse of the
3321 loop tree. */
3322static void
3323color_pass (ira_loop_tree_node_t loop_tree_node)
3324{
27508f5f 3325 int regno, hard_regno, index = -1, n;
058e97ec
VM
3326 int cost, exit_freq, enter_freq;
3327 unsigned int j;
3328 bitmap_iterator bi;
ef4bddc2 3329 machine_mode mode;
1756cb66 3330 enum reg_class rclass, aclass, pclass;
058e97ec
VM
3331 ira_allocno_t a, subloop_allocno;
3332 ira_loop_tree_node_t subloop_node;
3333
3334 ira_assert (loop_tree_node->bb == NULL);
3335 if (internal_flag_ira_verbose > 1 && ira_dump_file != NULL)
3336 print_loop_title (loop_tree_node);
3337
49d988e7 3338 bitmap_copy (coloring_allocno_bitmap, loop_tree_node->all_allocnos);
058e97ec 3339 bitmap_copy (consideration_allocno_bitmap, coloring_allocno_bitmap);
27508f5f 3340 n = 0;
1756cb66
VM
3341 EXECUTE_IF_SET_IN_BITMAP (consideration_allocno_bitmap, 0, j, bi)
3342 {
3343 a = ira_allocnos[j];
3344 n++;
1756cb66
VM
3345 if (! ALLOCNO_ASSIGNED_P (a))
3346 continue;
3347 bitmap_clear_bit (coloring_allocno_bitmap, ALLOCNO_NUM (a));
3348 }
3349 allocno_color_data
3350 = (allocno_color_data_t) ira_allocate (sizeof (struct allocno_color_data)
3351 * n);
3352 memset (allocno_color_data, 0, sizeof (struct allocno_color_data) * n);
27508f5f
VM
3353 curr_allocno_process = 0;
3354 n = 0;
058e97ec
VM
3355 EXECUTE_IF_SET_IN_BITMAP (consideration_allocno_bitmap, 0, j, bi)
3356 {
3357 a = ira_allocnos[j];
1756cb66
VM
3358 ALLOCNO_ADD_DATA (a) = allocno_color_data + n;
3359 n++;
058e97ec 3360 }
bf08fb16 3361 init_allocno_threads ();
058e97ec
VM
3362 /* Color all mentioned allocnos including transparent ones. */
3363 color_allocnos ();
3364 /* Process caps. They are processed just once. */
7db7ed3c
VM
3365 if (flag_ira_region == IRA_REGION_MIXED
3366 || flag_ira_region == IRA_REGION_ALL)
49d988e7 3367 EXECUTE_IF_SET_IN_BITMAP (loop_tree_node->all_allocnos, 0, j, bi)
058e97ec
VM
3368 {
3369 a = ira_allocnos[j];
3370 if (ALLOCNO_CAP_MEMBER (a) == NULL)
3371 continue;
3372 /* Remove from processing in the next loop. */
3373 bitmap_clear_bit (consideration_allocno_bitmap, j);
1756cb66
VM
3374 rclass = ALLOCNO_CLASS (a);
3375 pclass = ira_pressure_class_translate[rclass];
7db7ed3c 3376 if (flag_ira_region == IRA_REGION_MIXED
1756cb66 3377 && (loop_tree_node->reg_pressure[pclass]
f508f827 3378 <= ira_class_hard_regs_num[pclass]))
058e97ec
VM
3379 {
3380 mode = ALLOCNO_MODE (a);
3381 hard_regno = ALLOCNO_HARD_REGNO (a);
3382 if (hard_regno >= 0)
3383 {
3384 index = ira_class_hard_reg_index[rclass][hard_regno];
3385 ira_assert (index >= 0);
3386 }
3387 regno = ALLOCNO_REGNO (a);
3388 subloop_allocno = ALLOCNO_CAP_MEMBER (a);
3389 subloop_node = ALLOCNO_LOOP_TREE_NODE (subloop_allocno);
3390 ira_assert (!ALLOCNO_ASSIGNED_P (subloop_allocno));
3391 ALLOCNO_HARD_REGNO (subloop_allocno) = hard_regno;
3392 ALLOCNO_ASSIGNED_P (subloop_allocno) = true;
3393 if (hard_regno >= 0)
c73ccc80 3394 update_costs_from_copies (subloop_allocno, true, true);
2b9c63a2 3395 /* We don't need updated costs anymore. */
058e97ec
VM
3396 ira_free_allocno_updated_costs (subloop_allocno);
3397 }
3398 }
3399 /* Update costs of the corresponding allocnos (not caps) in the
3400 subloops. */
3401 for (subloop_node = loop_tree_node->subloops;
3402 subloop_node != NULL;
3403 subloop_node = subloop_node->subloop_next)
3404 {
3405 ira_assert (subloop_node->bb == NULL);
3406 EXECUTE_IF_SET_IN_BITMAP (consideration_allocno_bitmap, 0, j, bi)
3407 {
3408 a = ira_allocnos[j];
3409 ira_assert (ALLOCNO_CAP_MEMBER (a) == NULL);
3410 mode = ALLOCNO_MODE (a);
1756cb66
VM
3411 rclass = ALLOCNO_CLASS (a);
3412 pclass = ira_pressure_class_translate[rclass];
058e97ec 3413 hard_regno = ALLOCNO_HARD_REGNO (a);
7db7ed3c 3414 /* Use hard register class here. ??? */
058e97ec
VM
3415 if (hard_regno >= 0)
3416 {
3417 index = ira_class_hard_reg_index[rclass][hard_regno];
3418 ira_assert (index >= 0);
3419 }
3420 regno = ALLOCNO_REGNO (a);
3421 /* ??? conflict costs */
3422 subloop_allocno = subloop_node->regno_allocno_map[regno];
3423 if (subloop_allocno == NULL
3424 || ALLOCNO_CAP (subloop_allocno) != NULL)
3425 continue;
1756cb66 3426 ira_assert (ALLOCNO_CLASS (subloop_allocno) == rclass);
49d988e7
VM
3427 ira_assert (bitmap_bit_p (subloop_node->all_allocnos,
3428 ALLOCNO_NUM (subloop_allocno)));
bcb21886
KY
3429 if ((flag_ira_region == IRA_REGION_MIXED
3430 && (loop_tree_node->reg_pressure[pclass]
3431 <= ira_class_hard_regs_num[pclass]))
3432 || (pic_offset_table_rtx != NULL
3c20c9bc
VM
3433 && regno == (int) REGNO (pic_offset_table_rtx))
3434 /* Avoid overlapped multi-registers. Moves between them
3435 might result in wrong code generation. */
3436 || (hard_regno >= 0
3437 && ira_reg_class_max_nregs[pclass][mode] > 1))
058e97ec
VM
3438 {
3439 if (! ALLOCNO_ASSIGNED_P (subloop_allocno))
3440 {
3441 ALLOCNO_HARD_REGNO (subloop_allocno) = hard_regno;
3442 ALLOCNO_ASSIGNED_P (subloop_allocno) = true;
3443 if (hard_regno >= 0)
c73ccc80 3444 update_costs_from_copies (subloop_allocno, true, true);
2b9c63a2 3445 /* We don't need updated costs anymore. */
058e97ec
VM
3446 ira_free_allocno_updated_costs (subloop_allocno);
3447 }
3448 continue;
3449 }
3450 exit_freq = ira_loop_edge_freq (subloop_node, regno, true);
3451 enter_freq = ira_loop_edge_freq (subloop_node, regno, false);
3452 ira_assert (regno < ira_reg_equiv_len);
55a2c322 3453 if (ira_equiv_no_lvalue_p (regno))
058e97ec
VM
3454 {
3455 if (! ALLOCNO_ASSIGNED_P (subloop_allocno))
3456 {
3457 ALLOCNO_HARD_REGNO (subloop_allocno) = hard_regno;
3458 ALLOCNO_ASSIGNED_P (subloop_allocno) = true;
3459 if (hard_regno >= 0)
c73ccc80 3460 update_costs_from_copies (subloop_allocno, true, true);
2b9c63a2 3461 /* We don't need updated costs anymore. */
058e97ec
VM
3462 ira_free_allocno_updated_costs (subloop_allocno);
3463 }
3464 }
3465 else if (hard_regno < 0)
3466 {
3467 ALLOCNO_UPDATED_MEMORY_COST (subloop_allocno)
3468 -= ((ira_memory_move_cost[mode][rclass][1] * enter_freq)
3469 + (ira_memory_move_cost[mode][rclass][0] * exit_freq));
3470 }
3471 else
3472 {
1756cb66
VM
3473 aclass = ALLOCNO_CLASS (subloop_allocno);
3474 ira_init_register_move_cost_if_necessary (mode);
3475 cost = (ira_register_move_cost[mode][rclass][rclass]
058e97ec 3476 * (exit_freq + enter_freq));
cb1ca6ac 3477 ira_allocate_and_set_or_copy_costs
1756cb66
VM
3478 (&ALLOCNO_UPDATED_HARD_REG_COSTS (subloop_allocno), aclass,
3479 ALLOCNO_UPDATED_CLASS_COST (subloop_allocno),
cb1ca6ac
VM
3480 ALLOCNO_HARD_REG_COSTS (subloop_allocno));
3481 ira_allocate_and_set_or_copy_costs
3482 (&ALLOCNO_UPDATED_CONFLICT_HARD_REG_COSTS (subloop_allocno),
1756cb66 3483 aclass, 0, ALLOCNO_CONFLICT_HARD_REG_COSTS (subloop_allocno));
cb1ca6ac
VM
3484 ALLOCNO_UPDATED_HARD_REG_COSTS (subloop_allocno)[index] -= cost;
3485 ALLOCNO_UPDATED_CONFLICT_HARD_REG_COSTS (subloop_allocno)[index]
058e97ec 3486 -= cost;
1756cb66 3487 if (ALLOCNO_UPDATED_CLASS_COST (subloop_allocno)
cb1ca6ac 3488 > ALLOCNO_UPDATED_HARD_REG_COSTS (subloop_allocno)[index])
1756cb66 3489 ALLOCNO_UPDATED_CLASS_COST (subloop_allocno)
cb1ca6ac 3490 = ALLOCNO_UPDATED_HARD_REG_COSTS (subloop_allocno)[index];
058e97ec
VM
3491 ALLOCNO_UPDATED_MEMORY_COST (subloop_allocno)
3492 += (ira_memory_move_cost[mode][rclass][0] * enter_freq
3493 + ira_memory_move_cost[mode][rclass][1] * exit_freq);
058e97ec
VM
3494 }
3495 }
3496 }
1756cb66 3497 ira_free (allocno_color_data);
bf08fb16 3498 EXECUTE_IF_SET_IN_BITMAP (consideration_allocno_bitmap, 0, j, bi)
1756cb66
VM
3499 {
3500 a = ira_allocnos[j];
3501 ALLOCNO_ADD_DATA (a) = NULL;
1756cb66 3502 }
058e97ec
VM
3503}
3504
3505/* Initialize the common data for coloring and calls functions to do
3506 Chaitin-Briggs and regional coloring. */
3507static void
3508do_coloring (void)
3509{
3510 coloring_allocno_bitmap = ira_allocate_bitmap ();
058e97ec
VM
3511 if (internal_flag_ira_verbose > 0 && ira_dump_file != NULL)
3512 fprintf (ira_dump_file, "\n**** Allocnos coloring:\n\n");
b8698a0f 3513
058e97ec
VM
3514 ira_traverse_loop_tree (false, ira_loop_tree_root, color_pass, NULL);
3515
3516 if (internal_flag_ira_verbose > 1 && ira_dump_file != NULL)
3517 ira_print_disposition (ira_dump_file);
3518
058e97ec 3519 ira_free_bitmap (coloring_allocno_bitmap);
058e97ec
VM
3520}
3521
3522\f
3523
3524/* Move spill/restore code, which are to be generated in ira-emit.c,
3525 to less frequent points (if it is profitable) by reassigning some
3526 allocnos (in loop with subloops containing in another loop) to
3527 memory which results in longer live-range where the corresponding
3528 pseudo-registers will be in memory. */
3529static void
3530move_spill_restore (void)
3531{
3532 int cost, regno, hard_regno, hard_regno2, index;
3533 bool changed_p;
3534 int enter_freq, exit_freq;
ef4bddc2 3535 machine_mode mode;
058e97ec
VM
3536 enum reg_class rclass;
3537 ira_allocno_t a, parent_allocno, subloop_allocno;
3538 ira_loop_tree_node_t parent, loop_node, subloop_node;
3539 ira_allocno_iterator ai;
3540
3541 for (;;)
3542 {
3543 changed_p = false;
3544 if (internal_flag_ira_verbose > 0 && ira_dump_file != NULL)
3545 fprintf (ira_dump_file, "New iteration of spill/restore move\n");
3546 FOR_EACH_ALLOCNO (a, ai)
3547 {
3548 regno = ALLOCNO_REGNO (a);
3549 loop_node = ALLOCNO_LOOP_TREE_NODE (a);
3550 if (ALLOCNO_CAP_MEMBER (a) != NULL
3551 || ALLOCNO_CAP (a) != NULL
3552 || (hard_regno = ALLOCNO_HARD_REGNO (a)) < 0
3553 || loop_node->children == NULL
3554 /* don't do the optimization because it can create
3555 copies and the reload pass can spill the allocno set
3556 by copy although the allocno will not get memory
3557 slot. */
55a2c322 3558 || ira_equiv_no_lvalue_p (regno)
b81a2f0d
VM
3559 || !bitmap_bit_p (loop_node->border_allocnos, ALLOCNO_NUM (a))
3560 /* Do not spill static chain pointer pseudo when
3561 non-local goto is used. */
3562 || non_spilled_static_chain_regno_p (regno))
058e97ec
VM
3563 continue;
3564 mode = ALLOCNO_MODE (a);
1756cb66 3565 rclass = ALLOCNO_CLASS (a);
058e97ec
VM
3566 index = ira_class_hard_reg_index[rclass][hard_regno];
3567 ira_assert (index >= 0);
3568 cost = (ALLOCNO_MEMORY_COST (a)
3569 - (ALLOCNO_HARD_REG_COSTS (a) == NULL
1756cb66 3570 ? ALLOCNO_CLASS_COST (a)
058e97ec 3571 : ALLOCNO_HARD_REG_COSTS (a)[index]));
1756cb66 3572 ira_init_register_move_cost_if_necessary (mode);
058e97ec
VM
3573 for (subloop_node = loop_node->subloops;
3574 subloop_node != NULL;
3575 subloop_node = subloop_node->subloop_next)
3576 {
3577 ira_assert (subloop_node->bb == NULL);
3578 subloop_allocno = subloop_node->regno_allocno_map[regno];
3579 if (subloop_allocno == NULL)
3580 continue;
1756cb66 3581 ira_assert (rclass == ALLOCNO_CLASS (subloop_allocno));
058e97ec
VM
3582 /* We have accumulated cost. To get the real cost of
3583 allocno usage in the loop we should subtract costs of
3584 the subloop allocnos. */
3585 cost -= (ALLOCNO_MEMORY_COST (subloop_allocno)
3586 - (ALLOCNO_HARD_REG_COSTS (subloop_allocno) == NULL
1756cb66 3587 ? ALLOCNO_CLASS_COST (subloop_allocno)
058e97ec
VM
3588 : ALLOCNO_HARD_REG_COSTS (subloop_allocno)[index]));
3589 exit_freq = ira_loop_edge_freq (subloop_node, regno, true);
3590 enter_freq = ira_loop_edge_freq (subloop_node, regno, false);
3591 if ((hard_regno2 = ALLOCNO_HARD_REGNO (subloop_allocno)) < 0)
3592 cost -= (ira_memory_move_cost[mode][rclass][0] * exit_freq
3593 + ira_memory_move_cost[mode][rclass][1] * enter_freq);
3594 else
3595 {
3596 cost
3597 += (ira_memory_move_cost[mode][rclass][0] * exit_freq
3598 + ira_memory_move_cost[mode][rclass][1] * enter_freq);
3599 if (hard_regno2 != hard_regno)
1756cb66 3600 cost -= (ira_register_move_cost[mode][rclass][rclass]
058e97ec
VM
3601 * (exit_freq + enter_freq));
3602 }
3603 }
3604 if ((parent = loop_node->parent) != NULL
3605 && (parent_allocno = parent->regno_allocno_map[regno]) != NULL)
3606 {
1756cb66 3607 ira_assert (rclass == ALLOCNO_CLASS (parent_allocno));
058e97ec
VM
3608 exit_freq = ira_loop_edge_freq (loop_node, regno, true);
3609 enter_freq = ira_loop_edge_freq (loop_node, regno, false);
3610 if ((hard_regno2 = ALLOCNO_HARD_REGNO (parent_allocno)) < 0)
3611 cost -= (ira_memory_move_cost[mode][rclass][0] * exit_freq
3612 + ira_memory_move_cost[mode][rclass][1] * enter_freq);
3613 else
3614 {
3615 cost
3616 += (ira_memory_move_cost[mode][rclass][1] * exit_freq
3617 + ira_memory_move_cost[mode][rclass][0] * enter_freq);
3618 if (hard_regno2 != hard_regno)
1756cb66 3619 cost -= (ira_register_move_cost[mode][rclass][rclass]
058e97ec
VM
3620 * (exit_freq + enter_freq));
3621 }
3622 }
3623 if (cost < 0)
3624 {
3625 ALLOCNO_HARD_REGNO (a) = -1;
3626 if (internal_flag_ira_verbose > 3 && ira_dump_file != NULL)
3627 {
3628 fprintf
3629 (ira_dump_file,
3630 " Moving spill/restore for a%dr%d up from loop %d",
2608d841 3631 ALLOCNO_NUM (a), regno, loop_node->loop_num);
058e97ec
VM
3632 fprintf (ira_dump_file, " - profit %d\n", -cost);
3633 }
3634 changed_p = true;
3635 }
3636 }
3637 if (! changed_p)
3638 break;
3639 }
3640}
3641
3642\f
3643
3644/* Update current hard reg costs and current conflict hard reg costs
3645 for allocno A. It is done by processing its copies containing
3646 other allocnos already assigned. */
3647static void
3648update_curr_costs (ira_allocno_t a)
3649{
3650 int i, hard_regno, cost;
ef4bddc2 3651 machine_mode mode;
1756cb66 3652 enum reg_class aclass, rclass;
058e97ec
VM
3653 ira_allocno_t another_a;
3654 ira_copy_t cp, next_cp;
3655
bdf0eb06 3656 ira_free_allocno_updated_costs (a);
058e97ec 3657 ira_assert (! ALLOCNO_ASSIGNED_P (a));
1756cb66
VM
3658 aclass = ALLOCNO_CLASS (a);
3659 if (aclass == NO_REGS)
058e97ec
VM
3660 return;
3661 mode = ALLOCNO_MODE (a);
1756cb66 3662 ira_init_register_move_cost_if_necessary (mode);
058e97ec
VM
3663 for (cp = ALLOCNO_COPIES (a); cp != NULL; cp = next_cp)
3664 {
3665 if (cp->first == a)
3666 {
3667 next_cp = cp->next_first_allocno_copy;
3668 another_a = cp->second;
3669 }
3670 else if (cp->second == a)
3671 {
3672 next_cp = cp->next_second_allocno_copy;
3673 another_a = cp->first;
3674 }
3675 else
3676 gcc_unreachable ();
1756cb66 3677 if (! ira_reg_classes_intersect_p[aclass][ALLOCNO_CLASS (another_a)]
058e97ec
VM
3678 || ! ALLOCNO_ASSIGNED_P (another_a)
3679 || (hard_regno = ALLOCNO_HARD_REGNO (another_a)) < 0)
3680 continue;
3681 rclass = REGNO_REG_CLASS (hard_regno);
1756cb66 3682 i = ira_class_hard_reg_index[aclass][hard_regno];
7db7ed3c
VM
3683 if (i < 0)
3684 continue;
058e97ec 3685 cost = (cp->first == a
1756cb66
VM
3686 ? ira_register_move_cost[mode][rclass][aclass]
3687 : ira_register_move_cost[mode][aclass][rclass]);
058e97ec 3688 ira_allocate_and_set_or_copy_costs
1756cb66 3689 (&ALLOCNO_UPDATED_HARD_REG_COSTS (a), aclass, ALLOCNO_CLASS_COST (a),
058e97ec
VM
3690 ALLOCNO_HARD_REG_COSTS (a));
3691 ira_allocate_and_set_or_copy_costs
3692 (&ALLOCNO_UPDATED_CONFLICT_HARD_REG_COSTS (a),
1756cb66 3693 aclass, 0, ALLOCNO_CONFLICT_HARD_REG_COSTS (a));
058e97ec
VM
3694 ALLOCNO_UPDATED_HARD_REG_COSTS (a)[i] -= cp->freq * cost;
3695 ALLOCNO_UPDATED_CONFLICT_HARD_REG_COSTS (a)[i] -= cp->freq * cost;
3696 }
3697}
3698
058e97ec
VM
3699/* Try to assign hard registers to the unassigned allocnos and
3700 allocnos conflicting with them or conflicting with allocnos whose
3701 regno >= START_REGNO. The function is called after ira_flattening,
3702 so more allocnos (including ones created in ira-emit.c) will have a
3703 chance to get a hard register. We use simple assignment algorithm
3704 based on priorities. */
3705void
3706ira_reassign_conflict_allocnos (int start_regno)
3707{
3708 int i, allocnos_to_color_num;
fa86d337 3709 ira_allocno_t a;
1756cb66 3710 enum reg_class aclass;
058e97ec
VM
3711 bitmap allocnos_to_color;
3712 ira_allocno_iterator ai;
3713
3714 allocnos_to_color = ira_allocate_bitmap ();
3715 allocnos_to_color_num = 0;
3716 FOR_EACH_ALLOCNO (a, ai)
3717 {
ac0ab4f7 3718 int n = ALLOCNO_NUM_OBJECTS (a);
fa86d337 3719
058e97ec
VM
3720 if (! ALLOCNO_ASSIGNED_P (a)
3721 && ! bitmap_bit_p (allocnos_to_color, ALLOCNO_NUM (a)))
3722 {
1756cb66 3723 if (ALLOCNO_CLASS (a) != NO_REGS)
058e97ec
VM
3724 sorted_allocnos[allocnos_to_color_num++] = a;
3725 else
3726 {
3727 ALLOCNO_ASSIGNED_P (a) = true;
3728 ALLOCNO_HARD_REGNO (a) = -1;
3729 ira_assert (ALLOCNO_UPDATED_HARD_REG_COSTS (a) == NULL);
3730 ira_assert (ALLOCNO_UPDATED_CONFLICT_HARD_REG_COSTS (a) == NULL);
3731 }
3732 bitmap_set_bit (allocnos_to_color, ALLOCNO_NUM (a));
3733 }
3734 if (ALLOCNO_REGNO (a) < start_regno
1756cb66 3735 || (aclass = ALLOCNO_CLASS (a)) == NO_REGS)
058e97ec 3736 continue;
ac0ab4f7 3737 for (i = 0; i < n; i++)
058e97ec 3738 {
ac0ab4f7
BS
3739 ira_object_t obj = ALLOCNO_OBJECT (a, i);
3740 ira_object_t conflict_obj;
3741 ira_object_conflict_iterator oci;
1756cb66 3742
ac0ab4f7
BS
3743 FOR_EACH_OBJECT_CONFLICT (obj, conflict_obj, oci)
3744 {
3745 ira_allocno_t conflict_a = OBJECT_ALLOCNO (conflict_obj);
1756cb66 3746
ac0ab4f7 3747 ira_assert (ira_reg_classes_intersect_p
1756cb66 3748 [aclass][ALLOCNO_CLASS (conflict_a)]);
fcaa4ca4 3749 if (!bitmap_set_bit (allocnos_to_color, ALLOCNO_NUM (conflict_a)))
ac0ab4f7 3750 continue;
ac0ab4f7
BS
3751 sorted_allocnos[allocnos_to_color_num++] = conflict_a;
3752 }
058e97ec
VM
3753 }
3754 }
3755 ira_free_bitmap (allocnos_to_color);
3756 if (allocnos_to_color_num > 1)
3757 {
1ae64b0f 3758 setup_allocno_priorities (sorted_allocnos, allocnos_to_color_num);
058e97ec
VM
3759 qsort (sorted_allocnos, allocnos_to_color_num, sizeof (ira_allocno_t),
3760 allocno_priority_compare_func);
3761 }
3762 for (i = 0; i < allocnos_to_color_num; i++)
3763 {
3764 a = sorted_allocnos[i];
3765 ALLOCNO_ASSIGNED_P (a) = false;
058e97ec
VM
3766 update_curr_costs (a);
3767 }
3768 for (i = 0; i < allocnos_to_color_num; i++)
3769 {
3770 a = sorted_allocnos[i];
3771 if (assign_hard_reg (a, true))
3772 {
3773 if (internal_flag_ira_verbose > 3 && ira_dump_file != NULL)
3774 fprintf
3775 (ira_dump_file,
3776 " Secondary allocation: assign hard reg %d to reg %d\n",
3777 ALLOCNO_HARD_REGNO (a), ALLOCNO_REGNO (a));
3778 }
3779 }
3780}
3781
3782\f
3783
1756cb66
VM
3784/* This page contains functions used to find conflicts using allocno
3785 live ranges. */
3786
1756cb66
VM
3787#ifdef ENABLE_IRA_CHECKING
3788
3789/* Return TRUE if live ranges of pseudo-registers REGNO1 and REGNO2
3790 intersect. This should be used when there is only one region.
3791 Currently this is used during reload. */
3792static bool
3793conflict_by_live_ranges_p (int regno1, int regno2)
3794{
3795 ira_allocno_t a1, a2;
3796
3797 ira_assert (regno1 >= FIRST_PSEUDO_REGISTER
3798 && regno2 >= FIRST_PSEUDO_REGISTER);
df3e3493 3799 /* Reg info calculated by dataflow infrastructure can be different
1756cb66
VM
3800 from one calculated by regclass. */
3801 if ((a1 = ira_loop_tree_root->regno_allocno_map[regno1]) == NULL
3802 || (a2 = ira_loop_tree_root->regno_allocno_map[regno2]) == NULL)
3803 return false;
3804 return allocnos_conflict_by_live_ranges_p (a1, a2);
3805}
3806
3807#endif
3808
3809\f
3810
058e97ec
VM
3811/* This page contains code to coalesce memory stack slots used by
3812 spilled allocnos. This results in smaller stack frame, better data
3813 locality, and in smaller code for some architectures like
3814 x86/x86_64 where insn size depends on address displacement value.
3815 On the other hand, it can worsen insn scheduling after the RA but
3816 in practice it is less important than smaller stack frames. */
3817
22b0982c
VM
3818/* TRUE if we coalesced some allocnos. In other words, if we got
3819 loops formed by members first_coalesced_allocno and
3820 next_coalesced_allocno containing more one allocno. */
3821static bool allocno_coalesced_p;
3822
3823/* Bitmap used to prevent a repeated allocno processing because of
3824 coalescing. */
3825static bitmap processed_coalesced_allocno_bitmap;
3826
1756cb66
VM
3827/* See below. */
3828typedef struct coalesce_data *coalesce_data_t;
3829
3830/* To decrease footprint of ira_allocno structure we store all data
3831 needed only for coalescing in the following structure. */
3832struct coalesce_data
3833{
3834 /* Coalesced allocnos form a cyclic list. One allocno given by
3835 FIRST represents all coalesced allocnos. The
3836 list is chained by NEXT. */
3837 ira_allocno_t first;
3838 ira_allocno_t next;
3839 int temp;
3840};
3841
3842/* Container for storing allocno data concerning coalescing. */
3843static coalesce_data_t allocno_coalesce_data;
3844
3845/* Macro to access the data concerning coalescing. */
3846#define ALLOCNO_COALESCE_DATA(a) ((coalesce_data_t) ALLOCNO_ADD_DATA (a))
3847
22b0982c
VM
3848/* Merge two sets of coalesced allocnos given correspondingly by
3849 allocnos A1 and A2 (more accurately merging A2 set into A1
3850 set). */
3851static void
3852merge_allocnos (ira_allocno_t a1, ira_allocno_t a2)
3853{
3854 ira_allocno_t a, first, last, next;
3855
1756cb66
VM
3856 first = ALLOCNO_COALESCE_DATA (a1)->first;
3857 a = ALLOCNO_COALESCE_DATA (a2)->first;
3858 if (first == a)
22b0982c 3859 return;
1756cb66
VM
3860 for (last = a2, a = ALLOCNO_COALESCE_DATA (a2)->next;;
3861 a = ALLOCNO_COALESCE_DATA (a)->next)
22b0982c 3862 {
1756cb66 3863 ALLOCNO_COALESCE_DATA (a)->first = first;
22b0982c
VM
3864 if (a == a2)
3865 break;
3866 last = a;
3867 }
1756cb66
VM
3868 next = allocno_coalesce_data[ALLOCNO_NUM (first)].next;
3869 allocno_coalesce_data[ALLOCNO_NUM (first)].next = a2;
3870 allocno_coalesce_data[ALLOCNO_NUM (last)].next = next;
22b0982c
VM
3871}
3872
1756cb66
VM
3873/* Return TRUE if there are conflicting allocnos from two sets of
3874 coalesced allocnos given correspondingly by allocnos A1 and A2. We
3875 use live ranges to find conflicts because conflicts are represented
3876 only for allocnos of the same allocno class and during the reload
3877 pass we coalesce allocnos for sharing stack memory slots. */
22b0982c
VM
3878static bool
3879coalesced_allocno_conflict_p (ira_allocno_t a1, ira_allocno_t a2)
3880{
1756cb66 3881 ira_allocno_t a, conflict_a;
22b0982c 3882
22b0982c
VM
3883 if (allocno_coalesced_p)
3884 {
1756cb66
VM
3885 bitmap_clear (processed_coalesced_allocno_bitmap);
3886 for (a = ALLOCNO_COALESCE_DATA (a1)->next;;
3887 a = ALLOCNO_COALESCE_DATA (a)->next)
22b0982c 3888 {
1756cb66 3889 bitmap_set_bit (processed_coalesced_allocno_bitmap, ALLOCNO_NUM (a));
22b0982c
VM
3890 if (a == a1)
3891 break;
3892 }
3893 }
1756cb66
VM
3894 for (a = ALLOCNO_COALESCE_DATA (a2)->next;;
3895 a = ALLOCNO_COALESCE_DATA (a)->next)
22b0982c 3896 {
1756cb66
VM
3897 for (conflict_a = ALLOCNO_COALESCE_DATA (a1)->next;;
3898 conflict_a = ALLOCNO_COALESCE_DATA (conflict_a)->next)
22b0982c 3899 {
1756cb66 3900 if (allocnos_conflict_by_live_ranges_p (a, conflict_a))
22b0982c 3901 return true;
1756cb66 3902 if (conflict_a == a1)
22b0982c
VM
3903 break;
3904 }
22b0982c
VM
3905 if (a == a2)
3906 break;
3907 }
3908 return false;
3909}
3910
3911/* The major function for aggressive allocno coalescing. We coalesce
3912 only spilled allocnos. If some allocnos have been coalesced, we
3913 set up flag allocno_coalesced_p. */
3914static void
3915coalesce_allocnos (void)
3916{
3917 ira_allocno_t a;
bf08fb16 3918 ira_copy_t cp, next_cp;
22b0982c
VM
3919 unsigned int j;
3920 int i, n, cp_num, regno;
3921 bitmap_iterator bi;
3922
22b0982c
VM
3923 cp_num = 0;
3924 /* Collect copies. */
3925 EXECUTE_IF_SET_IN_BITMAP (coloring_allocno_bitmap, 0, j, bi)
3926 {
3927 a = ira_allocnos[j];
3928 regno = ALLOCNO_REGNO (a);
3929 if (! ALLOCNO_ASSIGNED_P (a) || ALLOCNO_HARD_REGNO (a) >= 0
55a2c322 3930 || ira_equiv_no_lvalue_p (regno))
22b0982c
VM
3931 continue;
3932 for (cp = ALLOCNO_COPIES (a); cp != NULL; cp = next_cp)
3933 {
3934 if (cp->first == a)
3935 {
3936 next_cp = cp->next_first_allocno_copy;
3937 regno = ALLOCNO_REGNO (cp->second);
3938 /* For priority coloring we coalesce allocnos only with
1756cb66 3939 the same allocno class not with intersected allocno
22b0982c
VM
3940 classes as it were possible. It is done for
3941 simplicity. */
3942 if ((cp->insn != NULL || cp->constraint_p)
3943 && ALLOCNO_ASSIGNED_P (cp->second)
3944 && ALLOCNO_HARD_REGNO (cp->second) < 0
55a2c322 3945 && ! ira_equiv_no_lvalue_p (regno))
22b0982c
VM
3946 sorted_copies[cp_num++] = cp;
3947 }
3948 else if (cp->second == a)
3949 next_cp = cp->next_second_allocno_copy;
3950 else
3951 gcc_unreachable ();
3952 }
3953 }
3954 qsort (sorted_copies, cp_num, sizeof (ira_copy_t), copy_freq_compare_func);
3955 /* Coalesced copies, most frequently executed first. */
3956 for (; cp_num != 0;)
3957 {
3958 for (i = 0; i < cp_num; i++)
3959 {
3960 cp = sorted_copies[i];
3961 if (! coalesced_allocno_conflict_p (cp->first, cp->second))
3962 {
3963 allocno_coalesced_p = true;
3964 if (internal_flag_ira_verbose > 3 && ira_dump_file != NULL)
3965 fprintf
3966 (ira_dump_file,
3967 " Coalescing copy %d:a%dr%d-a%dr%d (freq=%d)\n",
3968 cp->num, ALLOCNO_NUM (cp->first), ALLOCNO_REGNO (cp->first),
3969 ALLOCNO_NUM (cp->second), ALLOCNO_REGNO (cp->second),
3970 cp->freq);
3971 merge_allocnos (cp->first, cp->second);
3972 i++;
3973 break;
3974 }
3975 }
3976 /* Collect the rest of copies. */
3977 for (n = 0; i < cp_num; i++)
3978 {
3979 cp = sorted_copies[i];
1756cb66
VM
3980 if (allocno_coalesce_data[ALLOCNO_NUM (cp->first)].first
3981 != allocno_coalesce_data[ALLOCNO_NUM (cp->second)].first)
22b0982c
VM
3982 sorted_copies[n++] = cp;
3983 }
3984 cp_num = n;
3985 }
22b0982c
VM
3986}
3987
058e97ec
VM
3988/* Usage cost and order number of coalesced allocno set to which
3989 given pseudo register belongs to. */
3990static int *regno_coalesced_allocno_cost;
3991static int *regno_coalesced_allocno_num;
3992
3993/* Sort pseudos according frequencies of coalesced allocno sets they
3994 belong to (putting most frequently ones first), and according to
3995 coalesced allocno set order numbers. */
3996static int
3997coalesced_pseudo_reg_freq_compare (const void *v1p, const void *v2p)
3998{
3999 const int regno1 = *(const int *) v1p;
4000 const int regno2 = *(const int *) v2p;
4001 int diff;
4002
4003 if ((diff = (regno_coalesced_allocno_cost[regno2]
4004 - regno_coalesced_allocno_cost[regno1])) != 0)
4005 return diff;
4006 if ((diff = (regno_coalesced_allocno_num[regno1]
4007 - regno_coalesced_allocno_num[regno2])) != 0)
4008 return diff;
4009 return regno1 - regno2;
4010}
4011
4012/* Widest width in which each pseudo reg is referred to (via subreg).
4013 It is used for sorting pseudo registers. */
bd5a2c67 4014static machine_mode *regno_max_ref_mode;
058e97ec 4015
058e97ec
VM
4016/* Sort pseudos according their slot numbers (putting ones with
4017 smaller numbers first, or last when the frame pointer is not
4018 needed). */
4019static int
4020coalesced_pseudo_reg_slot_compare (const void *v1p, const void *v2p)
4021{
4022 const int regno1 = *(const int *) v1p;
4023 const int regno2 = *(const int *) v2p;
4024 ira_allocno_t a1 = ira_regno_allocno_map[regno1];
4025 ira_allocno_t a2 = ira_regno_allocno_map[regno2];
4026 int diff, slot_num1, slot_num2;
bd5a2c67 4027 machine_mode mode1, mode2;
058e97ec
VM
4028
4029 if (a1 == NULL || ALLOCNO_HARD_REGNO (a1) >= 0)
4030 {
4031 if (a2 == NULL || ALLOCNO_HARD_REGNO (a2) >= 0)
004a6ce8 4032 return regno1 - regno2;
058e97ec
VM
4033 return 1;
4034 }
4035 else if (a2 == NULL || ALLOCNO_HARD_REGNO (a2) >= 0)
4036 return -1;
4037 slot_num1 = -ALLOCNO_HARD_REGNO (a1);
4038 slot_num2 = -ALLOCNO_HARD_REGNO (a2);
4039 if ((diff = slot_num1 - slot_num2) != 0)
4040 return (frame_pointer_needed
e0bf0dc2 4041 || (!FRAME_GROWS_DOWNWARD) == STACK_GROWS_DOWNWARD ? diff : -diff);
bd5a2c67
RS
4042 mode1 = wider_subreg_mode (PSEUDO_REGNO_MODE (regno1),
4043 regno_max_ref_mode[regno1]);
4044 mode2 = wider_subreg_mode (PSEUDO_REGNO_MODE (regno2),
4045 regno_max_ref_mode[regno2]);
cf098191
RS
4046 if ((diff = compare_sizes_for_sort (GET_MODE_SIZE (mode2),
4047 GET_MODE_SIZE (mode1))) != 0)
058e97ec 4048 return diff;
004a6ce8 4049 return regno1 - regno2;
058e97ec
VM
4050}
4051
4052/* Setup REGNO_COALESCED_ALLOCNO_COST and REGNO_COALESCED_ALLOCNO_NUM
4053 for coalesced allocno sets containing allocnos with their regnos
4054 given in array PSEUDO_REGNOS of length N. */
4055static void
4056setup_coalesced_allocno_costs_and_nums (int *pseudo_regnos, int n)
4057{
4058 int i, num, regno, cost;
4059 ira_allocno_t allocno, a;
4060
4061 for (num = i = 0; i < n; i++)
4062 {
4063 regno = pseudo_regnos[i];
4064 allocno = ira_regno_allocno_map[regno];
4065 if (allocno == NULL)
4066 {
4067 regno_coalesced_allocno_cost[regno] = 0;
4068 regno_coalesced_allocno_num[regno] = ++num;
4069 continue;
4070 }
1756cb66 4071 if (ALLOCNO_COALESCE_DATA (allocno)->first != allocno)
058e97ec
VM
4072 continue;
4073 num++;
1756cb66
VM
4074 for (cost = 0, a = ALLOCNO_COALESCE_DATA (allocno)->next;;
4075 a = ALLOCNO_COALESCE_DATA (a)->next)
058e97ec
VM
4076 {
4077 cost += ALLOCNO_FREQ (a);
4078 if (a == allocno)
4079 break;
4080 }
1756cb66
VM
4081 for (a = ALLOCNO_COALESCE_DATA (allocno)->next;;
4082 a = ALLOCNO_COALESCE_DATA (a)->next)
058e97ec
VM
4083 {
4084 regno_coalesced_allocno_num[ALLOCNO_REGNO (a)] = num;
4085 regno_coalesced_allocno_cost[ALLOCNO_REGNO (a)] = cost;
4086 if (a == allocno)
4087 break;
4088 }
4089 }
4090}
4091
4092/* Collect spilled allocnos representing coalesced allocno sets (the
4093 first coalesced allocno). The collected allocnos are returned
4094 through array SPILLED_COALESCED_ALLOCNOS. The function returns the
4095 number of the collected allocnos. The allocnos are given by their
4096 regnos in array PSEUDO_REGNOS of length N. */
4097static int
4098collect_spilled_coalesced_allocnos (int *pseudo_regnos, int n,
4099 ira_allocno_t *spilled_coalesced_allocnos)
4100{
4101 int i, num, regno;
4102 ira_allocno_t allocno;
4103
4104 for (num = i = 0; i < n; i++)
4105 {
4106 regno = pseudo_regnos[i];
4107 allocno = ira_regno_allocno_map[regno];
4108 if (allocno == NULL || ALLOCNO_HARD_REGNO (allocno) >= 0
1756cb66 4109 || ALLOCNO_COALESCE_DATA (allocno)->first != allocno)
058e97ec
VM
4110 continue;
4111 spilled_coalesced_allocnos[num++] = allocno;
4112 }
4113 return num;
4114}
4115
3553f0bb
VM
4116/* Array of live ranges of size IRA_ALLOCNOS_NUM. Live range for
4117 given slot contains live ranges of coalesced allocnos assigned to
4118 given slot. */
b14151b5 4119static live_range_t *slot_coalesced_allocnos_live_ranges;
b15a7ae6 4120
3553f0bb
VM
4121/* Return TRUE if coalesced allocnos represented by ALLOCNO has live
4122 ranges intersected with live ranges of coalesced allocnos assigned
4123 to slot with number N. */
b15a7ae6 4124static bool
3553f0bb 4125slot_coalesced_allocno_live_ranges_intersect_p (ira_allocno_t allocno, int n)
b15a7ae6 4126{
b15a7ae6 4127 ira_allocno_t a;
b15a7ae6 4128
1756cb66
VM
4129 for (a = ALLOCNO_COALESCE_DATA (allocno)->next;;
4130 a = ALLOCNO_COALESCE_DATA (a)->next)
b15a7ae6 4131 {
ac0ab4f7
BS
4132 int i;
4133 int nr = ALLOCNO_NUM_OBJECTS (a);
0550a77b 4134 gcc_assert (ALLOCNO_CAP_MEMBER (a) == NULL);
ac0ab4f7
BS
4135 for (i = 0; i < nr; i++)
4136 {
4137 ira_object_t obj = ALLOCNO_OBJECT (a, i);
1756cb66
VM
4138
4139 if (ira_live_ranges_intersect_p
4140 (slot_coalesced_allocnos_live_ranges[n],
4141 OBJECT_LIVE_RANGES (obj)))
ac0ab4f7
BS
4142 return true;
4143 }
b15a7ae6
VM
4144 if (a == allocno)
4145 break;
4146 }
4147 return false;
4148}
4149
3553f0bb
VM
4150/* Update live ranges of slot to which coalesced allocnos represented
4151 by ALLOCNO were assigned. */
b15a7ae6 4152static void
3553f0bb 4153setup_slot_coalesced_allocno_live_ranges (ira_allocno_t allocno)
b15a7ae6 4154{
ac0ab4f7 4155 int i, n;
b15a7ae6 4156 ira_allocno_t a;
b14151b5 4157 live_range_t r;
b15a7ae6 4158
1756cb66
VM
4159 n = ALLOCNO_COALESCE_DATA (allocno)->temp;
4160 for (a = ALLOCNO_COALESCE_DATA (allocno)->next;;
4161 a = ALLOCNO_COALESCE_DATA (a)->next)
b15a7ae6 4162 {
ac0ab4f7 4163 int nr = ALLOCNO_NUM_OBJECTS (a);
0550a77b 4164 gcc_assert (ALLOCNO_CAP_MEMBER (a) == NULL);
ac0ab4f7
BS
4165 for (i = 0; i < nr; i++)
4166 {
4167 ira_object_t obj = ALLOCNO_OBJECT (a, i);
1756cb66 4168
ac0ab4f7
BS
4169 r = ira_copy_live_range_list (OBJECT_LIVE_RANGES (obj));
4170 slot_coalesced_allocnos_live_ranges[n]
4171 = ira_merge_live_ranges
1756cb66 4172 (slot_coalesced_allocnos_live_ranges[n], r);
ac0ab4f7 4173 }
b15a7ae6
VM
4174 if (a == allocno)
4175 break;
4176 }
4177}
4178
058e97ec
VM
4179/* We have coalesced allocnos involving in copies. Coalesce allocnos
4180 further in order to share the same memory stack slot. Allocnos
4181 representing sets of allocnos coalesced before the call are given
4182 in array SPILLED_COALESCED_ALLOCNOS of length NUM. Return TRUE if
4183 some allocnos were coalesced in the function. */
4184static bool
4185coalesce_spill_slots (ira_allocno_t *spilled_coalesced_allocnos, int num)
4186{
3553f0bb 4187 int i, j, n, last_coalesced_allocno_num;
058e97ec
VM
4188 ira_allocno_t allocno, a;
4189 bool merged_p = false;
1240d76e 4190 bitmap set_jump_crosses = regstat_get_setjmp_crosses ();
058e97ec 4191
3553f0bb 4192 slot_coalesced_allocnos_live_ranges
b14151b5 4193 = (live_range_t *) ira_allocate (sizeof (live_range_t) * ira_allocnos_num);
3553f0bb 4194 memset (slot_coalesced_allocnos_live_ranges, 0,
b14151b5 4195 sizeof (live_range_t) * ira_allocnos_num);
b15a7ae6 4196 last_coalesced_allocno_num = 0;
058e97ec
VM
4197 /* Coalesce non-conflicting spilled allocnos preferring most
4198 frequently used. */
4199 for (i = 0; i < num; i++)
4200 {
4201 allocno = spilled_coalesced_allocnos[i];
1756cb66 4202 if (ALLOCNO_COALESCE_DATA (allocno)->first != allocno
1240d76e 4203 || bitmap_bit_p (set_jump_crosses, ALLOCNO_REGNO (allocno))
55a2c322 4204 || ira_equiv_no_lvalue_p (ALLOCNO_REGNO (allocno)))
058e97ec
VM
4205 continue;
4206 for (j = 0; j < i; j++)
4207 {
4208 a = spilled_coalesced_allocnos[j];
1756cb66
VM
4209 n = ALLOCNO_COALESCE_DATA (a)->temp;
4210 if (ALLOCNO_COALESCE_DATA (a)->first == a
1240d76e 4211 && ! bitmap_bit_p (set_jump_crosses, ALLOCNO_REGNO (a))
55a2c322 4212 && ! ira_equiv_no_lvalue_p (ALLOCNO_REGNO (a))
3553f0bb 4213 && ! slot_coalesced_allocno_live_ranges_intersect_p (allocno, n))
b15a7ae6
VM
4214 break;
4215 }
4216 if (j >= i)
4217 {
4218 /* No coalescing: set up number for coalesced allocnos
4219 represented by ALLOCNO. */
1756cb66 4220 ALLOCNO_COALESCE_DATA (allocno)->temp = last_coalesced_allocno_num++;
3553f0bb 4221 setup_slot_coalesced_allocno_live_ranges (allocno);
b15a7ae6
VM
4222 }
4223 else
4224 {
058e97ec
VM
4225 allocno_coalesced_p = true;
4226 merged_p = true;
4227 if (internal_flag_ira_verbose > 3 && ira_dump_file != NULL)
4228 fprintf (ira_dump_file,
4229 " Coalescing spilled allocnos a%dr%d->a%dr%d\n",
4230 ALLOCNO_NUM (allocno), ALLOCNO_REGNO (allocno),
4231 ALLOCNO_NUM (a), ALLOCNO_REGNO (a));
1756cb66
VM
4232 ALLOCNO_COALESCE_DATA (allocno)->temp
4233 = ALLOCNO_COALESCE_DATA (a)->temp;
3553f0bb 4234 setup_slot_coalesced_allocno_live_ranges (allocno);
058e97ec 4235 merge_allocnos (a, allocno);
1756cb66 4236 ira_assert (ALLOCNO_COALESCE_DATA (a)->first == a);
058e97ec
VM
4237 }
4238 }
3553f0bb 4239 for (i = 0; i < ira_allocnos_num; i++)
9140d27b 4240 ira_finish_live_range_list (slot_coalesced_allocnos_live_ranges[i]);
3553f0bb 4241 ira_free (slot_coalesced_allocnos_live_ranges);
058e97ec
VM
4242 return merged_p;
4243}
4244
4245/* Sort pseudo-register numbers in array PSEUDO_REGNOS of length N for
4246 subsequent assigning stack slots to them in the reload pass. To do
4247 this we coalesce spilled allocnos first to decrease the number of
4248 memory-memory move insns. This function is called by the
4249 reload. */
4250void
4251ira_sort_regnos_for_alter_reg (int *pseudo_regnos, int n,
bd5a2c67 4252 machine_mode *reg_max_ref_mode)
058e97ec
VM
4253{
4254 int max_regno = max_reg_num ();
4255 int i, regno, num, slot_num;
4256 ira_allocno_t allocno, a;
4257 ira_allocno_iterator ai;
4258 ira_allocno_t *spilled_coalesced_allocnos;
4259
9994ad20
KC
4260 ira_assert (! ira_use_lra_p);
4261
058e97ec
VM
4262 /* Set up allocnos can be coalesced. */
4263 coloring_allocno_bitmap = ira_allocate_bitmap ();
4264 for (i = 0; i < n; i++)
4265 {
4266 regno = pseudo_regnos[i];
4267 allocno = ira_regno_allocno_map[regno];
4268 if (allocno != NULL)
1756cb66 4269 bitmap_set_bit (coloring_allocno_bitmap, ALLOCNO_NUM (allocno));
058e97ec
VM
4270 }
4271 allocno_coalesced_p = false;
22b0982c 4272 processed_coalesced_allocno_bitmap = ira_allocate_bitmap ();
1756cb66
VM
4273 allocno_coalesce_data
4274 = (coalesce_data_t) ira_allocate (sizeof (struct coalesce_data)
4275 * ira_allocnos_num);
4276 /* Initialize coalesce data for allocnos. */
4277 FOR_EACH_ALLOCNO (a, ai)
4278 {
4279 ALLOCNO_ADD_DATA (a) = allocno_coalesce_data + ALLOCNO_NUM (a);
4280 ALLOCNO_COALESCE_DATA (a)->first = a;
4281 ALLOCNO_COALESCE_DATA (a)->next = a;
4282 }
22b0982c 4283 coalesce_allocnos ();
058e97ec
VM
4284 ira_free_bitmap (coloring_allocno_bitmap);
4285 regno_coalesced_allocno_cost
4286 = (int *) ira_allocate (max_regno * sizeof (int));
4287 regno_coalesced_allocno_num
4288 = (int *) ira_allocate (max_regno * sizeof (int));
4289 memset (regno_coalesced_allocno_num, 0, max_regno * sizeof (int));
4290 setup_coalesced_allocno_costs_and_nums (pseudo_regnos, n);
4291 /* Sort regnos according frequencies of the corresponding coalesced
4292 allocno sets. */
4293 qsort (pseudo_regnos, n, sizeof (int), coalesced_pseudo_reg_freq_compare);
4294 spilled_coalesced_allocnos
4295 = (ira_allocno_t *) ira_allocate (ira_allocnos_num
4296 * sizeof (ira_allocno_t));
4297 /* Collect allocnos representing the spilled coalesced allocno
4298 sets. */
4299 num = collect_spilled_coalesced_allocnos (pseudo_regnos, n,
4300 spilled_coalesced_allocnos);
4301 if (flag_ira_share_spill_slots
4302 && coalesce_spill_slots (spilled_coalesced_allocnos, num))
4303 {
4304 setup_coalesced_allocno_costs_and_nums (pseudo_regnos, n);
4305 qsort (pseudo_regnos, n, sizeof (int),
4306 coalesced_pseudo_reg_freq_compare);
4307 num = collect_spilled_coalesced_allocnos (pseudo_regnos, n,
4308 spilled_coalesced_allocnos);
4309 }
4310 ira_free_bitmap (processed_coalesced_allocno_bitmap);
4311 allocno_coalesced_p = false;
4312 /* Assign stack slot numbers to spilled allocno sets, use smaller
4313 numbers for most frequently used coalesced allocnos. -1 is
4314 reserved for dynamic search of stack slots for pseudos spilled by
4315 the reload. */
4316 slot_num = 1;
4317 for (i = 0; i < num; i++)
4318 {
4319 allocno = spilled_coalesced_allocnos[i];
1756cb66 4320 if (ALLOCNO_COALESCE_DATA (allocno)->first != allocno
058e97ec 4321 || ALLOCNO_HARD_REGNO (allocno) >= 0
55a2c322 4322 || ira_equiv_no_lvalue_p (ALLOCNO_REGNO (allocno)))
058e97ec
VM
4323 continue;
4324 if (internal_flag_ira_verbose > 3 && ira_dump_file != NULL)
4325 fprintf (ira_dump_file, " Slot %d (freq,size):", slot_num);
4326 slot_num++;
1756cb66
VM
4327 for (a = ALLOCNO_COALESCE_DATA (allocno)->next;;
4328 a = ALLOCNO_COALESCE_DATA (a)->next)
058e97ec
VM
4329 {
4330 ira_assert (ALLOCNO_HARD_REGNO (a) < 0);
4331 ALLOCNO_HARD_REGNO (a) = -slot_num;
4332 if (internal_flag_ira_verbose > 3 && ira_dump_file != NULL)
bd5a2c67
RS
4333 {
4334 machine_mode mode = wider_subreg_mode
4335 (PSEUDO_REGNO_MODE (ALLOCNO_REGNO (a)),
4336 reg_max_ref_mode[ALLOCNO_REGNO (a)]);
cf098191
RS
4337 fprintf (ira_dump_file, " a%dr%d(%d,",
4338 ALLOCNO_NUM (a), ALLOCNO_REGNO (a), ALLOCNO_FREQ (a));
4339 print_dec (GET_MODE_SIZE (mode), ira_dump_file, SIGNED);
4340 fprintf (ira_dump_file, ")\n");
bd5a2c67 4341 }
b8698a0f 4342
058e97ec
VM
4343 if (a == allocno)
4344 break;
4345 }
4346 if (internal_flag_ira_verbose > 3 && ira_dump_file != NULL)
4347 fprintf (ira_dump_file, "\n");
4348 }
4349 ira_spilled_reg_stack_slots_num = slot_num - 1;
4350 ira_free (spilled_coalesced_allocnos);
4351 /* Sort regnos according the slot numbers. */
bd5a2c67 4352 regno_max_ref_mode = reg_max_ref_mode;
058e97ec 4353 qsort (pseudo_regnos, n, sizeof (int), coalesced_pseudo_reg_slot_compare);
058e97ec 4354 FOR_EACH_ALLOCNO (a, ai)
1756cb66
VM
4355 ALLOCNO_ADD_DATA (a) = NULL;
4356 ira_free (allocno_coalesce_data);
058e97ec
VM
4357 ira_free (regno_coalesced_allocno_num);
4358 ira_free (regno_coalesced_allocno_cost);
4359}
4360
4361\f
4362
4363/* This page contains code used by the reload pass to improve the
4364 final code. */
4365
4366/* The function is called from reload to mark changes in the
4367 allocation of REGNO made by the reload. Remember that reg_renumber
4368 reflects the change result. */
4369void
4370ira_mark_allocation_change (int regno)
4371{
4372 ira_allocno_t a = ira_regno_allocno_map[regno];
4373 int old_hard_regno, hard_regno, cost;
1756cb66 4374 enum reg_class aclass = ALLOCNO_CLASS (a);
058e97ec
VM
4375
4376 ira_assert (a != NULL);
4377 hard_regno = reg_renumber[regno];
4378 if ((old_hard_regno = ALLOCNO_HARD_REGNO (a)) == hard_regno)
4379 return;
4380 if (old_hard_regno < 0)
4381 cost = -ALLOCNO_MEMORY_COST (a);
4382 else
4383 {
1756cb66 4384 ira_assert (ira_class_hard_reg_index[aclass][old_hard_regno] >= 0);
058e97ec 4385 cost = -(ALLOCNO_HARD_REG_COSTS (a) == NULL
1756cb66 4386 ? ALLOCNO_CLASS_COST (a)
058e97ec 4387 : ALLOCNO_HARD_REG_COSTS (a)
1756cb66 4388 [ira_class_hard_reg_index[aclass][old_hard_regno]]);
c73ccc80 4389 update_costs_from_copies (a, false, false);
058e97ec
VM
4390 }
4391 ira_overall_cost -= cost;
4392 ALLOCNO_HARD_REGNO (a) = hard_regno;
4393 if (hard_regno < 0)
4394 {
4395 ALLOCNO_HARD_REGNO (a) = -1;
4396 cost += ALLOCNO_MEMORY_COST (a);
4397 }
1756cb66 4398 else if (ira_class_hard_reg_index[aclass][hard_regno] >= 0)
058e97ec
VM
4399 {
4400 cost += (ALLOCNO_HARD_REG_COSTS (a) == NULL
1756cb66 4401 ? ALLOCNO_CLASS_COST (a)
058e97ec 4402 : ALLOCNO_HARD_REG_COSTS (a)
1756cb66 4403 [ira_class_hard_reg_index[aclass][hard_regno]]);
c73ccc80 4404 update_costs_from_copies (a, true, false);
058e97ec
VM
4405 }
4406 else
4407 /* Reload changed class of the allocno. */
4408 cost = 0;
4409 ira_overall_cost += cost;
4410}
4411
4412/* This function is called when reload deletes memory-memory move. In
4413 this case we marks that the allocation of the corresponding
4414 allocnos should be not changed in future. Otherwise we risk to get
4415 a wrong code. */
4416void
4417ira_mark_memory_move_deletion (int dst_regno, int src_regno)
4418{
4419 ira_allocno_t dst = ira_regno_allocno_map[dst_regno];
4420 ira_allocno_t src = ira_regno_allocno_map[src_regno];
4421
4422 ira_assert (dst != NULL && src != NULL
4423 && ALLOCNO_HARD_REGNO (dst) < 0
4424 && ALLOCNO_HARD_REGNO (src) < 0);
4425 ALLOCNO_DONT_REASSIGN_P (dst) = true;
4426 ALLOCNO_DONT_REASSIGN_P (src) = true;
4427}
4428
4429/* Try to assign a hard register (except for FORBIDDEN_REGS) to
3631be48 4430 allocno A and return TRUE in the case of success. */
058e97ec
VM
4431static bool
4432allocno_reload_assign (ira_allocno_t a, HARD_REG_SET forbidden_regs)
4433{
4434 int hard_regno;
1756cb66 4435 enum reg_class aclass;
058e97ec 4436 int regno = ALLOCNO_REGNO (a);
ac0ab4f7
BS
4437 HARD_REG_SET saved[2];
4438 int i, n;
058e97ec 4439
ac0ab4f7
BS
4440 n = ALLOCNO_NUM_OBJECTS (a);
4441 for (i = 0; i < n; i++)
4442 {
4443 ira_object_t obj = ALLOCNO_OBJECT (a, i);
6576d245 4444 saved[i] = OBJECT_TOTAL_CONFLICT_HARD_REGS (obj);
44942965 4445 OBJECT_TOTAL_CONFLICT_HARD_REGS (obj) |= forbidden_regs;
ac0ab4f7 4446 if (! flag_caller_saves && ALLOCNO_CALLS_CROSSED_NUM (a) != 0)
6c476222 4447 OBJECT_TOTAL_CONFLICT_HARD_REGS (obj) |= ira_need_caller_save_regs (a);
ac0ab4f7 4448 }
058e97ec 4449 ALLOCNO_ASSIGNED_P (a) = false;
1756cb66 4450 aclass = ALLOCNO_CLASS (a);
058e97ec
VM
4451 update_curr_costs (a);
4452 assign_hard_reg (a, true);
4453 hard_regno = ALLOCNO_HARD_REGNO (a);
4454 reg_renumber[regno] = hard_regno;
4455 if (hard_regno < 0)
4456 ALLOCNO_HARD_REGNO (a) = -1;
4457 else
4458 {
1756cb66
VM
4459 ira_assert (ira_class_hard_reg_index[aclass][hard_regno] >= 0);
4460 ira_overall_cost
4461 -= (ALLOCNO_MEMORY_COST (a)
4462 - (ALLOCNO_HARD_REG_COSTS (a) == NULL
4463 ? ALLOCNO_CLASS_COST (a)
4464 : ALLOCNO_HARD_REG_COSTS (a)[ira_class_hard_reg_index
4465 [aclass][hard_regno]]));
3366b378 4466 if (ira_need_caller_save_p (a, hard_regno))
058e97ec
VM
4467 {
4468 ira_assert (flag_caller_saves);
4469 caller_save_needed = 1;
4470 }
4471 }
4472
4473 /* If we found a hard register, modify the RTL for the pseudo
4474 register to show the hard register, and mark the pseudo register
4475 live. */
4476 if (reg_renumber[regno] >= 0)
4477 {
4478 if (internal_flag_ira_verbose > 3 && ira_dump_file != NULL)
4479 fprintf (ira_dump_file, ": reassign to %d\n", reg_renumber[regno]);
4480 SET_REGNO (regno_reg_rtx[regno], reg_renumber[regno]);
4481 mark_home_live (regno);
4482 }
4483 else if (internal_flag_ira_verbose > 3 && ira_dump_file != NULL)
4484 fprintf (ira_dump_file, "\n");
ac0ab4f7
BS
4485 for (i = 0; i < n; i++)
4486 {
4487 ira_object_t obj = ALLOCNO_OBJECT (a, i);
6576d245 4488 OBJECT_TOTAL_CONFLICT_HARD_REGS (obj) = saved[i];
ac0ab4f7 4489 }
058e97ec
VM
4490 return reg_renumber[regno] >= 0;
4491}
4492
4493/* Sort pseudos according their usage frequencies (putting most
4494 frequently ones first). */
4495static int
4496pseudo_reg_compare (const void *v1p, const void *v2p)
4497{
4498 int regno1 = *(const int *) v1p;
4499 int regno2 = *(const int *) v2p;
4500 int diff;
4501
4502 if ((diff = REG_FREQ (regno2) - REG_FREQ (regno1)) != 0)
4503 return diff;
4504 return regno1 - regno2;
4505}
4506
4507/* Try to allocate hard registers to SPILLED_PSEUDO_REGS (there are
4508 NUM of them) or spilled pseudos conflicting with pseudos in
4509 SPILLED_PSEUDO_REGS. Return TRUE and update SPILLED, if the
4510 allocation has been changed. The function doesn't use
4511 BAD_SPILL_REGS and hard registers in PSEUDO_FORBIDDEN_REGS and
4512 PSEUDO_PREVIOUS_REGS for the corresponding pseudos. The function
4513 is called by the reload pass at the end of each reload
4514 iteration. */
4515bool
4516ira_reassign_pseudos (int *spilled_pseudo_regs, int num,
4517 HARD_REG_SET bad_spill_regs,
4518 HARD_REG_SET *pseudo_forbidden_regs,
6190446b
JL
4519 HARD_REG_SET *pseudo_previous_regs,
4520 bitmap spilled)
058e97ec 4521{
016f9d9d 4522 int i, n, regno;
058e97ec 4523 bool changed_p;
fa86d337 4524 ira_allocno_t a;
058e97ec 4525 HARD_REG_SET forbidden_regs;
6190446b
JL
4526 bitmap temp = BITMAP_ALLOC (NULL);
4527
4528 /* Add pseudos which conflict with pseudos already in
4529 SPILLED_PSEUDO_REGS to SPILLED_PSEUDO_REGS. This is preferable
4530 to allocating in two steps as some of the conflicts might have
4531 a higher priority than the pseudos passed in SPILLED_PSEUDO_REGS. */
4532 for (i = 0; i < num; i++)
4533 bitmap_set_bit (temp, spilled_pseudo_regs[i]);
4534
4535 for (i = 0, n = num; i < n; i++)
4536 {
ac0ab4f7 4537 int nr, j;
6190446b
JL
4538 int regno = spilled_pseudo_regs[i];
4539 bitmap_set_bit (temp, regno);
4540
4541 a = ira_regno_allocno_map[regno];
ac0ab4f7
BS
4542 nr = ALLOCNO_NUM_OBJECTS (a);
4543 for (j = 0; j < nr; j++)
fa86d337 4544 {
ac0ab4f7
BS
4545 ira_object_t conflict_obj;
4546 ira_object_t obj = ALLOCNO_OBJECT (a, j);
4547 ira_object_conflict_iterator oci;
4548
4549 FOR_EACH_OBJECT_CONFLICT (obj, conflict_obj, oci)
fa86d337 4550 {
ac0ab4f7
BS
4551 ira_allocno_t conflict_a = OBJECT_ALLOCNO (conflict_obj);
4552 if (ALLOCNO_HARD_REGNO (conflict_a) < 0
4553 && ! ALLOCNO_DONT_REASSIGN_P (conflict_a)
fcaa4ca4 4554 && bitmap_set_bit (temp, ALLOCNO_REGNO (conflict_a)))
ac0ab4f7
BS
4555 {
4556 spilled_pseudo_regs[num++] = ALLOCNO_REGNO (conflict_a);
ac0ab4f7
BS
4557 /* ?!? This seems wrong. */
4558 bitmap_set_bit (consideration_allocno_bitmap,
4559 ALLOCNO_NUM (conflict_a));
4560 }
fa86d337
BS
4561 }
4562 }
6190446b 4563 }
058e97ec
VM
4564
4565 if (num > 1)
4566 qsort (spilled_pseudo_regs, num, sizeof (int), pseudo_reg_compare);
4567 changed_p = false;
4568 /* Try to assign hard registers to pseudos from
4569 SPILLED_PSEUDO_REGS. */
016f9d9d 4570 for (i = 0; i < num; i++)
058e97ec
VM
4571 {
4572 regno = spilled_pseudo_regs[i];
44942965
RS
4573 forbidden_regs = (bad_spill_regs
4574 | pseudo_forbidden_regs[regno]
4575 | pseudo_previous_regs[regno]);
058e97ec
VM
4576 gcc_assert (reg_renumber[regno] < 0);
4577 a = ira_regno_allocno_map[regno];
4578 ira_mark_allocation_change (regno);
4579 ira_assert (reg_renumber[regno] < 0);
4580 if (internal_flag_ira_verbose > 3 && ira_dump_file != NULL)
4581 fprintf (ira_dump_file,
6190446b 4582 " Try Assign %d(a%d), cost=%d", regno, ALLOCNO_NUM (a),
058e97ec 4583 ALLOCNO_MEMORY_COST (a)
1756cb66 4584 - ALLOCNO_CLASS_COST (a));
058e97ec
VM
4585 allocno_reload_assign (a, forbidden_regs);
4586 if (reg_renumber[regno] >= 0)
4587 {
4588 CLEAR_REGNO_REG_SET (spilled, regno);
4589 changed_p = true;
4590 }
058e97ec 4591 }
6190446b 4592 BITMAP_FREE (temp);
058e97ec
VM
4593 return changed_p;
4594}
4595
4596/* The function is called by reload and returns already allocated
4597 stack slot (if any) for REGNO with given INHERENT_SIZE and
4598 TOTAL_SIZE. In the case of failure to find a slot which can be
4599 used for REGNO, the function returns NULL. */
4600rtx
80ce7eb4
RS
4601ira_reuse_stack_slot (int regno, poly_uint64 inherent_size,
4602 poly_uint64 total_size)
058e97ec
VM
4603{
4604 unsigned int i;
4605 int slot_num, best_slot_num;
4606 int cost, best_cost;
4607 ira_copy_t cp, next_cp;
4608 ira_allocno_t another_allocno, allocno = ira_regno_allocno_map[regno];
4609 rtx x;
4610 bitmap_iterator bi;
99b1c316 4611 class ira_spilled_reg_stack_slot *slot = NULL;
058e97ec 4612
9994ad20
KC
4613 ira_assert (! ira_use_lra_p);
4614
80ce7eb4
RS
4615 ira_assert (known_eq (inherent_size, PSEUDO_REGNO_BYTES (regno))
4616 && known_le (inherent_size, total_size)
058e97ec
VM
4617 && ALLOCNO_HARD_REGNO (allocno) < 0);
4618 if (! flag_ira_share_spill_slots)
4619 return NULL_RTX;
4620 slot_num = -ALLOCNO_HARD_REGNO (allocno) - 2;
4621 if (slot_num != -1)
4622 {
4623 slot = &ira_spilled_reg_stack_slots[slot_num];
4624 x = slot->mem;
4625 }
4626 else
4627 {
4628 best_cost = best_slot_num = -1;
4629 x = NULL_RTX;
4630 /* It means that the pseudo was spilled in the reload pass, try
4631 to reuse a slot. */
4632 for (slot_num = 0;
4633 slot_num < ira_spilled_reg_stack_slots_num;
4634 slot_num++)
4635 {
4636 slot = &ira_spilled_reg_stack_slots[slot_num];
4637 if (slot->mem == NULL_RTX)
4638 continue;
80ce7eb4
RS
4639 if (maybe_lt (slot->width, total_size)
4640 || maybe_lt (GET_MODE_SIZE (GET_MODE (slot->mem)), inherent_size))
058e97ec 4641 continue;
b8698a0f 4642
058e97ec
VM
4643 EXECUTE_IF_SET_IN_BITMAP (&slot->spilled_regs,
4644 FIRST_PSEUDO_REGISTER, i, bi)
4645 {
4646 another_allocno = ira_regno_allocno_map[i];
1756cb66
VM
4647 if (allocnos_conflict_by_live_ranges_p (allocno,
4648 another_allocno))
058e97ec
VM
4649 goto cont;
4650 }
4651 for (cost = 0, cp = ALLOCNO_COPIES (allocno);
4652 cp != NULL;
4653 cp = next_cp)
4654 {
4655 if (cp->first == allocno)
4656 {
4657 next_cp = cp->next_first_allocno_copy;
4658 another_allocno = cp->second;
4659 }
4660 else if (cp->second == allocno)
4661 {
4662 next_cp = cp->next_second_allocno_copy;
4663 another_allocno = cp->first;
4664 }
4665 else
4666 gcc_unreachable ();
4667 if (cp->insn == NULL_RTX)
4668 continue;
4669 if (bitmap_bit_p (&slot->spilled_regs,
4670 ALLOCNO_REGNO (another_allocno)))
4671 cost += cp->freq;
4672 }
4673 if (cost > best_cost)
4674 {
4675 best_cost = cost;
4676 best_slot_num = slot_num;
4677 }
4678 cont:
4679 ;
4680 }
4681 if (best_cost >= 0)
4682 {
99b96649
EB
4683 slot_num = best_slot_num;
4684 slot = &ira_spilled_reg_stack_slots[slot_num];
058e97ec
VM
4685 SET_REGNO_REG_SET (&slot->spilled_regs, regno);
4686 x = slot->mem;
99b96649 4687 ALLOCNO_HARD_REGNO (allocno) = -slot_num - 2;
058e97ec
VM
4688 }
4689 }
4690 if (x != NULL_RTX)
4691 {
80ce7eb4 4692 ira_assert (known_ge (slot->width, total_size));
f7556aae 4693#ifdef ENABLE_IRA_CHECKING
058e97ec
VM
4694 EXECUTE_IF_SET_IN_BITMAP (&slot->spilled_regs,
4695 FIRST_PSEUDO_REGISTER, i, bi)
4696 {
1756cb66 4697 ira_assert (! conflict_by_live_ranges_p (regno, i));
058e97ec 4698 }
f7556aae 4699#endif
058e97ec
VM
4700 SET_REGNO_REG_SET (&slot->spilled_regs, regno);
4701 if (internal_flag_ira_verbose > 3 && ira_dump_file)
4702 {
4703 fprintf (ira_dump_file, " Assigning %d(freq=%d) slot %d of",
4704 regno, REG_FREQ (regno), slot_num);
4705 EXECUTE_IF_SET_IN_BITMAP (&slot->spilled_regs,
4706 FIRST_PSEUDO_REGISTER, i, bi)
4707 {
4708 if ((unsigned) regno != i)
4709 fprintf (ira_dump_file, " %d", i);
4710 }
4711 fprintf (ira_dump_file, "\n");
4712 }
4713 }
4714 return x;
4715}
4716
4717/* This is called by reload every time a new stack slot X with
4718 TOTAL_SIZE was allocated for REGNO. We store this info for
4719 subsequent ira_reuse_stack_slot calls. */
4720void
80ce7eb4 4721ira_mark_new_stack_slot (rtx x, int regno, poly_uint64 total_size)
058e97ec 4722{
99b1c316 4723 class ira_spilled_reg_stack_slot *slot;
058e97ec
VM
4724 int slot_num;
4725 ira_allocno_t allocno;
4726
9994ad20
KC
4727 ira_assert (! ira_use_lra_p);
4728
80ce7eb4 4729 ira_assert (known_le (PSEUDO_REGNO_BYTES (regno), total_size));
058e97ec
VM
4730 allocno = ira_regno_allocno_map[regno];
4731 slot_num = -ALLOCNO_HARD_REGNO (allocno) - 2;
4732 if (slot_num == -1)
4733 {
4734 slot_num = ira_spilled_reg_stack_slots_num++;
4735 ALLOCNO_HARD_REGNO (allocno) = -slot_num - 2;
4736 }
4737 slot = &ira_spilled_reg_stack_slots[slot_num];
4738 INIT_REG_SET (&slot->spilled_regs);
4739 SET_REGNO_REG_SET (&slot->spilled_regs, regno);
4740 slot->mem = x;
4741 slot->width = total_size;
4742 if (internal_flag_ira_verbose > 3 && ira_dump_file)
4743 fprintf (ira_dump_file, " Assigning %d(freq=%d) a new slot %d\n",
4744 regno, REG_FREQ (regno), slot_num);
4745}
4746
4747
4748/* Return spill cost for pseudo-registers whose numbers are in array
4749 REGNOS (with a negative number as an end marker) for reload with
4750 given IN and OUT for INSN. Return also number points (through
4751 EXCESS_PRESSURE_LIVE_LENGTH) where the pseudo-register lives and
4752 the register pressure is high, number of references of the
6c476222
RS
4753 pseudo-registers (through NREFS), the number of psuedo registers
4754 whose allocated register wouldn't need saving in the prologue
4755 (through CALL_USED_COUNT), and the first hard regno occupied by the
058e97ec
VM
4756 pseudo-registers (through FIRST_HARD_REGNO). */
4757static int
8c797f81 4758calculate_spill_cost (int *regnos, rtx in, rtx out, rtx_insn *insn,
058e97ec
VM
4759 int *excess_pressure_live_length,
4760 int *nrefs, int *call_used_count, int *first_hard_regno)
4761{
6c476222 4762 int i, cost, regno, hard_regno, count, saved_cost;
058e97ec
VM
4763 bool in_p, out_p;
4764 int length;
4765 ira_allocno_t a;
4766
4767 *nrefs = 0;
4768 for (length = count = cost = i = 0;; i++)
4769 {
4770 regno = regnos[i];
4771 if (regno < 0)
4772 break;
4773 *nrefs += REG_N_REFS (regno);
4774 hard_regno = reg_renumber[regno];
4775 ira_assert (hard_regno >= 0);
4776 a = ira_regno_allocno_map[regno];
ac0ab4f7 4777 length += ALLOCNO_EXCESS_PRESSURE_POINTS_NUM (a) / ALLOCNO_NUM_OBJECTS (a);
1756cb66 4778 cost += ALLOCNO_MEMORY_COST (a) - ALLOCNO_CLASS_COST (a);
6c476222
RS
4779 if (in_hard_reg_set_p (crtl->abi->full_reg_clobbers (),
4780 ALLOCNO_MODE (a), hard_regno))
058e97ec
VM
4781 count++;
4782 in_p = in && REG_P (in) && (int) REGNO (in) == hard_regno;
4783 out_p = out && REG_P (out) && (int) REGNO (out) == hard_regno;
4784 if ((in_p || out_p)
4785 && find_regno_note (insn, REG_DEAD, hard_regno) != NULL_RTX)
4786 {
4787 saved_cost = 0;
4788 if (in_p)
4789 saved_cost += ira_memory_move_cost
1756cb66 4790 [ALLOCNO_MODE (a)][ALLOCNO_CLASS (a)][1];
058e97ec
VM
4791 if (out_p)
4792 saved_cost
4793 += ira_memory_move_cost
1756cb66 4794 [ALLOCNO_MODE (a)][ALLOCNO_CLASS (a)][0];
058e97ec
VM
4795 cost -= REG_FREQ_FROM_BB (BLOCK_FOR_INSN (insn)) * saved_cost;
4796 }
4797 }
4798 *excess_pressure_live_length = length;
4799 *call_used_count = count;
4800 hard_regno = -1;
4801 if (regnos[0] >= 0)
4802 {
4803 hard_regno = reg_renumber[regnos[0]];
4804 }
4805 *first_hard_regno = hard_regno;
4806 return cost;
4807}
4808
4809/* Return TRUE if spilling pseudo-registers whose numbers are in array
4810 REGNOS is better than spilling pseudo-registers with numbers in
4811 OTHER_REGNOS for reload with given IN and OUT for INSN. The
4812 function used by the reload pass to make better register spilling
4813 decisions. */
4814bool
4815ira_better_spill_reload_regno_p (int *regnos, int *other_regnos,
8c797f81 4816 rtx in, rtx out, rtx_insn *insn)
058e97ec
VM
4817{
4818 int cost, other_cost;
4819 int length, other_length;
4820 int nrefs, other_nrefs;
4821 int call_used_count, other_call_used_count;
4822 int hard_regno, other_hard_regno;
4823
b8698a0f 4824 cost = calculate_spill_cost (regnos, in, out, insn,
058e97ec
VM
4825 &length, &nrefs, &call_used_count, &hard_regno);
4826 other_cost = calculate_spill_cost (other_regnos, in, out, insn,
4827 &other_length, &other_nrefs,
4828 &other_call_used_count,
4829 &other_hard_regno);
4830 if (nrefs == 0 && other_nrefs != 0)
4831 return true;
4832 if (nrefs != 0 && other_nrefs == 0)
4833 return false;
4834 if (cost != other_cost)
4835 return cost < other_cost;
4836 if (length != other_length)
4837 return length > other_length;
4838#ifdef REG_ALLOC_ORDER
4839 if (hard_regno >= 0 && other_hard_regno >= 0)
4840 return (inv_reg_alloc_order[hard_regno]
4841 < inv_reg_alloc_order[other_hard_regno]);
4842#else
4843 if (call_used_count != other_call_used_count)
4844 return call_used_count > other_call_used_count;
4845#endif
4846 return false;
4847}
4848
4849\f
4850
4851/* Allocate and initialize data necessary for assign_hard_reg. */
4852void
4853ira_initiate_assign (void)
4854{
4855 sorted_allocnos
4856 = (ira_allocno_t *) ira_allocate (sizeof (ira_allocno_t)
4857 * ira_allocnos_num);
4858 consideration_allocno_bitmap = ira_allocate_bitmap ();
4859 initiate_cost_update ();
4860 allocno_priorities = (int *) ira_allocate (sizeof (int) * ira_allocnos_num);
bf08fb16
VM
4861 sorted_copies = (ira_copy_t *) ira_allocate (ira_copies_num
4862 * sizeof (ira_copy_t));
058e97ec
VM
4863}
4864
4865/* Deallocate data used by assign_hard_reg. */
4866void
4867ira_finish_assign (void)
4868{
4869 ira_free (sorted_allocnos);
4870 ira_free_bitmap (consideration_allocno_bitmap);
4871 finish_cost_update ();
4872 ira_free (allocno_priorities);
bf08fb16 4873 ira_free (sorted_copies);
058e97ec
VM
4874}
4875
4876\f
4877
4878/* Entry function doing color-based register allocation. */
cb1ca6ac
VM
4879static void
4880color (void)
058e97ec 4881{
9771b263 4882 allocno_stack_vec.create (ira_allocnos_num);
058e97ec
VM
4883 memset (allocated_hardreg_p, 0, sizeof (allocated_hardreg_p));
4884 ira_initiate_assign ();
4885 do_coloring ();
4886 ira_finish_assign ();
9771b263 4887 allocno_stack_vec.release ();
058e97ec
VM
4888 move_spill_restore ();
4889}
4890
4891\f
4892
4893/* This page contains a simple register allocator without usage of
4894 allocno conflicts. This is used for fast allocation for -O0. */
4895
4896/* Do register allocation by not using allocno conflicts. It uses
4897 only allocno live ranges. The algorithm is close to Chow's
4898 priority coloring. */
cb1ca6ac
VM
4899static void
4900fast_allocation (void)
058e97ec 4901{
159fdc39
VM
4902 int i, j, k, num, class_size, hard_regno, best_hard_regno, cost, min_cost;
4903 int *costs;
058e97ec
VM
4904#ifdef STACK_REGS
4905 bool no_stack_reg_p;
4906#endif
1756cb66 4907 enum reg_class aclass;
ef4bddc2 4908 machine_mode mode;
058e97ec
VM
4909 ira_allocno_t a;
4910 ira_allocno_iterator ai;
b14151b5 4911 live_range_t r;
058e97ec
VM
4912 HARD_REG_SET conflict_hard_regs, *used_hard_regs;
4913
058e97ec
VM
4914 sorted_allocnos = (ira_allocno_t *) ira_allocate (sizeof (ira_allocno_t)
4915 * ira_allocnos_num);
4916 num = 0;
4917 FOR_EACH_ALLOCNO (a, ai)
4918 sorted_allocnos[num++] = a;
1ae64b0f
VM
4919 allocno_priorities = (int *) ira_allocate (sizeof (int) * ira_allocnos_num);
4920 setup_allocno_priorities (sorted_allocnos, num);
4921 used_hard_regs = (HARD_REG_SET *) ira_allocate (sizeof (HARD_REG_SET)
4922 * ira_max_point);
4923 for (i = 0; i < ira_max_point; i++)
4924 CLEAR_HARD_REG_SET (used_hard_regs[i]);
311aab06 4925 qsort (sorted_allocnos, num, sizeof (ira_allocno_t),
058e97ec
VM
4926 allocno_priority_compare_func);
4927 for (i = 0; i < num; i++)
4928 {
ac0ab4f7
BS
4929 int nr, l;
4930
058e97ec 4931 a = sorted_allocnos[i];
ac0ab4f7
BS
4932 nr = ALLOCNO_NUM_OBJECTS (a);
4933 CLEAR_HARD_REG_SET (conflict_hard_regs);
4934 for (l = 0; l < nr; l++)
4935 {
4936 ira_object_t obj = ALLOCNO_OBJECT (a, l);
44942965 4937 conflict_hard_regs |= OBJECT_CONFLICT_HARD_REGS (obj);
ac0ab4f7
BS
4938 for (r = OBJECT_LIVE_RANGES (obj); r != NULL; r = r->next)
4939 for (j = r->start; j <= r->finish; j++)
44942965 4940 conflict_hard_regs |= used_hard_regs[j];
ac0ab4f7 4941 }
1756cb66 4942 aclass = ALLOCNO_CLASS (a);
6b8d9676
VM
4943 ALLOCNO_ASSIGNED_P (a) = true;
4944 ALLOCNO_HARD_REGNO (a) = -1;
1756cb66 4945 if (hard_reg_set_subset_p (reg_class_contents[aclass],
058e97ec
VM
4946 conflict_hard_regs))
4947 continue;
4948 mode = ALLOCNO_MODE (a);
4949#ifdef STACK_REGS
4950 no_stack_reg_p = ALLOCNO_NO_STACK_REG_P (a);
4951#endif
1756cb66 4952 class_size = ira_class_hard_regs_num[aclass];
159fdc39
VM
4953 costs = ALLOCNO_HARD_REG_COSTS (a);
4954 min_cost = INT_MAX;
4955 best_hard_regno = -1;
058e97ec
VM
4956 for (j = 0; j < class_size; j++)
4957 {
1756cb66 4958 hard_regno = ira_class_hard_regs[aclass][j];
058e97ec
VM
4959#ifdef STACK_REGS
4960 if (no_stack_reg_p && FIRST_STACK_REG <= hard_regno
4961 && hard_regno <= LAST_STACK_REG)
4962 continue;
4963#endif
9181a6e5 4964 if (ira_hard_reg_set_intersection_p (hard_regno, mode, conflict_hard_regs)
058e97ec 4965 || (TEST_HARD_REG_BIT
1756cb66 4966 (ira_prohibited_class_mode_regs[aclass][mode], hard_regno)))
058e97ec 4967 continue;
159fdc39
VM
4968 if (costs == NULL)
4969 {
4970 best_hard_regno = hard_regno;
4971 break;
4972 }
4973 cost = costs[j];
4974 if (min_cost > cost)
ac0ab4f7 4975 {
159fdc39
VM
4976 min_cost = cost;
4977 best_hard_regno = hard_regno;
ac0ab4f7 4978 }
159fdc39
VM
4979 }
4980 if (best_hard_regno < 0)
4981 continue;
4982 ALLOCNO_HARD_REGNO (a) = hard_regno = best_hard_regno;
4983 for (l = 0; l < nr; l++)
4984 {
4985 ira_object_t obj = ALLOCNO_OBJECT (a, l);
4986 for (r = OBJECT_LIVE_RANGES (obj); r != NULL; r = r->next)
4987 for (k = r->start; k <= r->finish; k++)
44942965 4988 used_hard_regs[k] |= ira_reg_mode_hard_regset[hard_regno][mode];
058e97ec
VM
4989 }
4990 }
4991 ira_free (sorted_allocnos);
4992 ira_free (used_hard_regs);
4993 ira_free (allocno_priorities);
4994 if (internal_flag_ira_verbose > 1 && ira_dump_file != NULL)
4995 ira_print_disposition (ira_dump_file);
4996}
cb1ca6ac
VM
4997
4998\f
4999
5000/* Entry function doing coloring. */
5001void
5002ira_color (void)
5003{
5004 ira_allocno_t a;
5005 ira_allocno_iterator ai;
5006
5007 /* Setup updated costs. */
5008 FOR_EACH_ALLOCNO (a, ai)
5009 {
5010 ALLOCNO_UPDATED_MEMORY_COST (a) = ALLOCNO_MEMORY_COST (a);
1756cb66 5011 ALLOCNO_UPDATED_CLASS_COST (a) = ALLOCNO_CLASS_COST (a);
cb1ca6ac 5012 }
311aab06 5013 if (ira_conflicts_p)
cb1ca6ac
VM
5014 color ();
5015 else
5016 fast_allocation ();
5017}