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cb20f7e8 1/* RTL-level loop invariant motion.
8d9254fc 2 Copyright (C) 2004-2020 Free Software Foundation, Inc.
cb20f7e8 3
5e962776 4This file is part of GCC.
cb20f7e8 5
5e962776
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6GCC is free software; you can redistribute it and/or modify it
7under the terms of the GNU General Public License as published by the
9dcd6f09 8Free Software Foundation; either version 3, or (at your option) any
5e962776 9later version.
cb20f7e8 10
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11GCC is distributed in the hope that it will be useful, but WITHOUT
12ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
14for more details.
cb20f7e8 15
5e962776 16You should have received a copy of the GNU General Public License
9dcd6f09
NC
17along with GCC; see the file COPYING3. If not see
18<http://www.gnu.org/licenses/>. */
5e962776
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19
20/* This implements the loop invariant motion pass. It is very simple
4a8cae83
SB
21 (no calls, no loads/stores, etc.). This should be sufficient to cleanup
22 things like address arithmetics -- other more complicated invariants should
23 be eliminated on GIMPLE either in tree-ssa-loop-im.c or in tree-ssa-pre.c.
cb20f7e8 24
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25 We proceed loop by loop -- it is simpler than trying to handle things
26 globally and should not lose much. First we inspect all sets inside loop
27 and create a dependency graph on insns (saying "to move this insn, you must
28 also move the following insns").
29
30 We then need to determine what to move. We estimate the number of registers
31 used and move as many invariants as possible while we still have enough free
32 registers. We prefer the expensive invariants.
cb20f7e8 33
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34 Then we move the selected invariants out of the loop, creating a new
35 temporaries for them if necessary. */
36
37#include "config.h"
38#include "system.h"
39#include "coretypes.h"
c7131fb2 40#include "backend.h"
957060b5 41#include "target.h"
5e962776 42#include "rtl.h"
957060b5
AM
43#include "tree.h"
44#include "cfghooks.h"
c7131fb2 45#include "df.h"
4d0cdd0c 46#include "memmodel.h"
3912d291 47#include "tm_p.h"
957060b5
AM
48#include "insn-config.h"
49#include "regs.h"
50#include "ira.h"
51#include "recog.h"
60393bbc 52#include "cfgrtl.h"
60393bbc
AM
53#include "cfgloop.h"
54#include "expr.h"
192912db 55#include "rtl-iter.h"
7ee2468b 56#include "dumpfile.h"
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57
58/* The data stored for the loop. */
59
6c1dae73 60class loop_data
5e962776 61{
6c1dae73 62public:
99b1c316 63 class loop *outermost_exit; /* The outermost exit of the loop. */
5e962776 64 bool has_call; /* True if the loop contains a call. */
1833192f 65 /* Maximal register pressure inside loop for given register class
1756cb66 66 (defined only for the pressure classes). */
1833192f
VM
67 int max_reg_pressure[N_REG_CLASSES];
68 /* Loop regs referenced and live pseudo-registers. */
69 bitmap_head regs_ref;
70 bitmap_head regs_live;
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71};
72
99b1c316 73#define LOOP_DATA(LOOP) ((class loop_data *) (LOOP)->aux)
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74
75/* The description of an use. */
76
77struct use
78{
79 rtx *pos; /* Position of the use. */
89bfd6f5 80 rtx_insn *insn; /* The insn in that the use occurs. */
1bfdbb29 81 unsigned addr_use_p; /* Whether the use occurs in an address. */
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82 struct use *next; /* Next use in the list. */
83};
84
85/* The description of a def. */
86
87struct def
88{
89 struct use *uses; /* The list of uses that are uniquely reached
90 by it. */
91 unsigned n_uses; /* Number of such uses. */
1bfdbb29 92 unsigned n_addr_uses; /* Number of uses in addresses. */
5e962776 93 unsigned invno; /* The corresponding invariant. */
5b92e189
BC
94 bool can_prop_to_addr_uses; /* True if the corresponding inv can be
95 propagated into its address uses. */
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96};
97
98/* The data stored for each invariant. */
99
100struct invariant
101{
102 /* The number of the invariant. */
103 unsigned invno;
104
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105 /* The number of the invariant with the same value. */
106 unsigned eqto;
107
e42e3d15
ZC
108 /* The number of invariants which eqto this. */
109 unsigned eqno;
110
1833192f
VM
111 /* If we moved the invariant out of the loop, the original regno
112 that contained its value. */
113 int orig_regno;
114
34e82342
RB
115 /* If we moved the invariant out of the loop, the register that contains its
116 value. */
117 rtx reg;
118
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119 /* The definition of the invariant. */
120 struct def *def;
121
122 /* The insn in that it is defined. */
89bfd6f5 123 rtx_insn *insn;
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124
125 /* Whether it is always executed. */
126 bool always_executed;
127
128 /* Whether to move the invariant. */
129 bool move;
130
1bfdbb29
PB
131 /* Whether the invariant is cheap when used as an address. */
132 bool cheap_address;
133
cb20f7e8 134 /* Cost of the invariant. */
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135 unsigned cost;
136
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137 /* Used for detecting already visited invariants during determining
138 costs of movements. */
139 unsigned stamp;
34e82342
RB
140
141 /* The invariants it depends on. */
142 bitmap depends_on;
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143};
144
1833192f 145/* Currently processed loop. */
99b1c316 146static class loop *curr_loop;
1833192f 147
6fb5fa3c
DB
148/* Table of invariants indexed by the df_ref uid field. */
149
150static unsigned int invariant_table_size = 0;
151static struct invariant ** invariant_table;
152
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ZD
153/* Entry for hash table of invariant expressions. */
154
155struct invariant_expr_entry
156{
157 /* The invariant. */
158 struct invariant *inv;
159
160 /* Its value. */
161 rtx expr;
162
163 /* Its mode. */
ef4bddc2 164 machine_mode mode;
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165
166 /* Its hash. */
167 hashval_t hash;
168};
169
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170/* The actual stamp for marking already visited invariants during determining
171 costs of movements. */
172
173static unsigned actual_stamp;
174
edd954e6
KH
175typedef struct invariant *invariant_p;
176
edd954e6 177
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178/* The invariants. */
179
9771b263 180static vec<invariant_p> invariants;
5e962776 181
6fb5fa3c 182/* Check the size of the invariant table and realloc if necessary. */
cb20f7e8 183
b8698a0f 184static void
6fb5fa3c
DB
185check_invariant_table_size (void)
186{
c3284718 187 if (invariant_table_size < DF_DEFS_TABLE_SIZE ())
6fb5fa3c
DB
188 {
189 unsigned int new_size = DF_DEFS_TABLE_SIZE () + (DF_DEFS_TABLE_SIZE () / 4);
d3bfe4de 190 invariant_table = XRESIZEVEC (struct invariant *, invariant_table, new_size);
b8698a0f 191 memset (&invariant_table[invariant_table_size], 0,
92cfe9d5 192 (new_size - invariant_table_size) * sizeof (struct invariant *));
6fb5fa3c
DB
193 invariant_table_size = new_size;
194 }
195}
cb20f7e8 196
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197/* Test for possibility of invariantness of X. */
198
199static bool
200check_maybe_invariant (rtx x)
201{
202 enum rtx_code code = GET_CODE (x);
203 int i, j;
204 const char *fmt;
205
206 switch (code)
207 {
d8116890 208 CASE_CONST_ANY:
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209 case SYMBOL_REF:
210 case CONST:
211 case LABEL_REF:
212 return true;
213
214 case PC:
215 case CC0:
216 case UNSPEC_VOLATILE:
217 case CALL:
218 return false;
219
220 case REG:
221 return true;
222
223 case MEM:
224 /* Load/store motion is done elsewhere. ??? Perhaps also add it here?
225 It should not be hard, and might be faster than "elsewhere". */
226
227 /* Just handle the most trivial case where we load from an unchanging
228 location (most importantly, pic tables). */
66f91b93 229 if (MEM_READONLY_P (x) && !MEM_VOLATILE_P (x))
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230 break;
231
232 return false;
233
234 case ASM_OPERANDS:
235 /* Don't mess with insns declared volatile. */
236 if (MEM_VOLATILE_P (x))
237 return false;
238 break;
239
240 default:
241 break;
242 }
243
244 fmt = GET_RTX_FORMAT (code);
245 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
246 {
247 if (fmt[i] == 'e')
248 {
249 if (!check_maybe_invariant (XEXP (x, i)))
250 return false;
251 }
252 else if (fmt[i] == 'E')
253 {
254 for (j = 0; j < XVECLEN (x, i); j++)
255 if (!check_maybe_invariant (XVECEXP (x, i, j)))
256 return false;
257 }
258 }
259
260 return true;
261}
262
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263/* Returns the invariant definition for USE, or NULL if USE is not
264 invariant. */
265
266static struct invariant *
57512f53 267invariant_for_use (df_ref use)
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ZD
268{
269 struct df_link *defs;
57512f53 270 df_ref def;
50e94c7e 271 basic_block bb = DF_REF_BB (use), def_bb;
1052bd54 272
57512f53 273 if (DF_REF_FLAGS (use) & DF_REF_READ_WRITE)
b6c9b9bc
ZD
274 return NULL;
275
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ZD
276 defs = DF_REF_CHAIN (use);
277 if (!defs || defs->next)
278 return NULL;
279 def = defs->ref;
6fb5fa3c 280 check_invariant_table_size ();
c3284718 281 if (!invariant_table[DF_REF_ID (def)])
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282 return NULL;
283
284 def_bb = DF_REF_BB (def);
285 if (!dominated_by_p (CDI_DOMINATORS, bb, def_bb))
286 return NULL;
c3284718 287 return invariant_table[DF_REF_ID (def)];
1052bd54
ZD
288}
289
290/* Computes hash value for invariant expression X in INSN. */
291
292static hashval_t
89bfd6f5 293hash_invariant_expr_1 (rtx_insn *insn, rtx x)
1052bd54
ZD
294{
295 enum rtx_code code = GET_CODE (x);
296 int i, j;
297 const char *fmt;
298 hashval_t val = code;
299 int do_not_record_p;
57512f53 300 df_ref use;
1052bd54
ZD
301 struct invariant *inv;
302
303 switch (code)
304 {
d8116890 305 CASE_CONST_ANY:
1052bd54
ZD
306 case SYMBOL_REF:
307 case CONST:
308 case LABEL_REF:
309 return hash_rtx (x, GET_MODE (x), &do_not_record_p, NULL, false);
310
311 case REG:
6fb5fa3c 312 use = df_find_use (insn, x);
1052bd54
ZD
313 if (!use)
314 return hash_rtx (x, GET_MODE (x), &do_not_record_p, NULL, false);
315 inv = invariant_for_use (use);
316 if (!inv)
317 return hash_rtx (x, GET_MODE (x), &do_not_record_p, NULL, false);
318
319 gcc_assert (inv->eqto != ~0u);
320 return inv->eqto;
321
322 default:
323 break;
324 }
325
326 fmt = GET_RTX_FORMAT (code);
327 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
328 {
329 if (fmt[i] == 'e')
330 val ^= hash_invariant_expr_1 (insn, XEXP (x, i));
331 else if (fmt[i] == 'E')
332 {
333 for (j = 0; j < XVECLEN (x, i); j++)
334 val ^= hash_invariant_expr_1 (insn, XVECEXP (x, i, j));
335 }
8e1409e8
ZD
336 else if (fmt[i] == 'i' || fmt[i] == 'n')
337 val ^= XINT (x, i);
91914e56
RS
338 else if (fmt[i] == 'p')
339 val ^= constant_lower_bound (SUBREG_BYTE (x));
1052bd54
ZD
340 }
341
342 return val;
343}
344
345/* Returns true if the invariant expressions E1 and E2 used in insns INSN1
346 and INSN2 have always the same value. */
347
348static bool
89bfd6f5 349invariant_expr_equal_p (rtx_insn *insn1, rtx e1, rtx_insn *insn2, rtx e2)
1052bd54
ZD
350{
351 enum rtx_code code = GET_CODE (e1);
352 int i, j;
353 const char *fmt;
57512f53 354 df_ref use1, use2;
1052bd54
ZD
355 struct invariant *inv1 = NULL, *inv2 = NULL;
356 rtx sub1, sub2;
357
358 /* If mode of only one of the operands is VOIDmode, it is not equivalent to
359 the other one. If both are VOIDmode, we rely on the caller of this
360 function to verify that their modes are the same. */
361 if (code != GET_CODE (e2) || GET_MODE (e1) != GET_MODE (e2))
362 return false;
363
364 switch (code)
365 {
d8116890 366 CASE_CONST_ANY:
1052bd54
ZD
367 case SYMBOL_REF:
368 case CONST:
369 case LABEL_REF:
370 return rtx_equal_p (e1, e2);
371
372 case REG:
6fb5fa3c
DB
373 use1 = df_find_use (insn1, e1);
374 use2 = df_find_use (insn2, e2);
1052bd54
ZD
375 if (use1)
376 inv1 = invariant_for_use (use1);
377 if (use2)
378 inv2 = invariant_for_use (use2);
379
380 if (!inv1 && !inv2)
381 return rtx_equal_p (e1, e2);
382
383 if (!inv1 || !inv2)
384 return false;
385
386 gcc_assert (inv1->eqto != ~0u);
387 gcc_assert (inv2->eqto != ~0u);
388 return inv1->eqto == inv2->eqto;
389
390 default:
391 break;
392 }
393
394 fmt = GET_RTX_FORMAT (code);
395 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
396 {
397 if (fmt[i] == 'e')
398 {
399 sub1 = XEXP (e1, i);
400 sub2 = XEXP (e2, i);
401
402 if (!invariant_expr_equal_p (insn1, sub1, insn2, sub2))
403 return false;
404 }
405
406 else if (fmt[i] == 'E')
407 {
408 if (XVECLEN (e1, i) != XVECLEN (e2, i))
409 return false;
410
411 for (j = 0; j < XVECLEN (e1, i); j++)
412 {
413 sub1 = XVECEXP (e1, i, j);
414 sub2 = XVECEXP (e2, i, j);
415
416 if (!invariant_expr_equal_p (insn1, sub1, insn2, sub2))
417 return false;
418 }
419 }
8e1409e8
ZD
420 else if (fmt[i] == 'i' || fmt[i] == 'n')
421 {
422 if (XINT (e1, i) != XINT (e2, i))
423 return false;
424 }
91914e56
RS
425 else if (fmt[i] == 'p')
426 {
427 if (maybe_ne (SUBREG_BYTE (e1), SUBREG_BYTE (e2)))
428 return false;
429 }
8e1409e8
ZD
430 /* Unhandled type of subexpression, we fail conservatively. */
431 else
432 return false;
1052bd54
ZD
433 }
434
435 return true;
436}
437
95fbe13e 438struct invariant_expr_hasher : free_ptr_hash <invariant_expr_entry>
1052bd54 439{
67f58944
TS
440 static inline hashval_t hash (const invariant_expr_entry *);
441 static inline bool equal (const invariant_expr_entry *,
442 const invariant_expr_entry *);
4a8fb1a1
LC
443};
444
445/* Returns hash value for invariant expression entry ENTRY. */
1052bd54 446
4a8fb1a1 447inline hashval_t
67f58944 448invariant_expr_hasher::hash (const invariant_expr_entry *entry)
4a8fb1a1 449{
1052bd54
ZD
450 return entry->hash;
451}
452
4a8fb1a1 453/* Compares invariant expression entries ENTRY1 and ENTRY2. */
1052bd54 454
4a8fb1a1 455inline bool
67f58944
TS
456invariant_expr_hasher::equal (const invariant_expr_entry *entry1,
457 const invariant_expr_entry *entry2)
1052bd54 458{
1052bd54
ZD
459 if (entry1->mode != entry2->mode)
460 return 0;
461
462 return invariant_expr_equal_p (entry1->inv->insn, entry1->expr,
463 entry2->inv->insn, entry2->expr);
464}
465
c203e8a7 466typedef hash_table<invariant_expr_hasher> invariant_htab_type;
4a8fb1a1 467
1052bd54
ZD
468/* Checks whether invariant with value EXPR in machine mode MODE is
469 recorded in EQ. If this is the case, return the invariant. Otherwise
470 insert INV to the table for this expression and return INV. */
471
472static struct invariant *
ef4bddc2 473find_or_insert_inv (invariant_htab_type *eq, rtx expr, machine_mode mode,
1052bd54
ZD
474 struct invariant *inv)
475{
476 hashval_t hash = hash_invariant_expr_1 (inv->insn, expr);
477 struct invariant_expr_entry *entry;
478 struct invariant_expr_entry pentry;
4a8fb1a1 479 invariant_expr_entry **slot;
1052bd54
ZD
480
481 pentry.expr = expr;
482 pentry.inv = inv;
483 pentry.mode = mode;
c203e8a7 484 slot = eq->find_slot_with_hash (&pentry, hash, INSERT);
4a8fb1a1 485 entry = *slot;
1052bd54
ZD
486
487 if (entry)
488 return entry->inv;
489
5ed6ace5 490 entry = XNEW (struct invariant_expr_entry);
1052bd54
ZD
491 entry->inv = inv;
492 entry->expr = expr;
493 entry->mode = mode;
494 entry->hash = hash;
495 *slot = entry;
496
497 return inv;
498}
499
500/* Finds invariants identical to INV and records the equivalence. EQ is the
501 hash table of the invariants. */
502
503static void
c203e8a7 504find_identical_invariants (invariant_htab_type *eq, struct invariant *inv)
1052bd54
ZD
505{
506 unsigned depno;
507 bitmap_iterator bi;
508 struct invariant *dep;
509 rtx expr, set;
ef4bddc2 510 machine_mode mode;
e42e3d15 511 struct invariant *tmp;
1052bd54
ZD
512
513 if (inv->eqto != ~0u)
514 return;
515
516 EXECUTE_IF_SET_IN_BITMAP (inv->depends_on, 0, depno, bi)
517 {
9771b263 518 dep = invariants[depno];
1052bd54
ZD
519 find_identical_invariants (eq, dep);
520 }
521
522 set = single_set (inv->insn);
523 expr = SET_SRC (set);
524 mode = GET_MODE (expr);
525 if (mode == VOIDmode)
526 mode = GET_MODE (SET_DEST (set));
e42e3d15
ZC
527
528 tmp = find_or_insert_inv (eq, expr, mode, inv);
529 inv->eqto = tmp->invno;
530
531 if (tmp->invno != inv->invno && inv->always_executed)
532 tmp->eqno++;
1052bd54
ZD
533
534 if (dump_file && inv->eqto != inv->invno)
535 fprintf (dump_file,
e755fcf5 536 "Invariant %d is equivalent to invariant %d.\n",
1052bd54
ZD
537 inv->invno, inv->eqto);
538}
539
540/* Find invariants with the same value and record the equivalences. */
541
542static void
543merge_identical_invariants (void)
544{
545 unsigned i;
546 struct invariant *inv;
c203e8a7 547 invariant_htab_type eq (invariants.length ());
1052bd54 548
9771b263 549 FOR_EACH_VEC_ELT (invariants, i, inv)
c203e8a7 550 find_identical_invariants (&eq, inv);
1052bd54
ZD
551}
552
5e962776
ZD
553/* Determines the basic blocks inside LOOP that are always executed and
554 stores their bitmap to ALWAYS_REACHED. MAY_EXIT is a bitmap of
555 basic blocks that may either exit the loop, or contain the call that
556 does not have to return. BODY is body of the loop obtained by
557 get_loop_body_in_dom_order. */
558
559static void
99b1c316 560compute_always_reached (class loop *loop, basic_block *body,
5e962776
ZD
561 bitmap may_exit, bitmap always_reached)
562{
563 unsigned i;
564
565 for (i = 0; i < loop->num_nodes; i++)
566 {
567 if (dominated_by_p (CDI_DOMINATORS, loop->latch, body[i]))
568 bitmap_set_bit (always_reached, i);
569
570 if (bitmap_bit_p (may_exit, i))
571 return;
572 }
573}
574
575/* Finds exits out of the LOOP with body BODY. Marks blocks in that we may
576 exit the loop by cfg edge to HAS_EXIT and MAY_EXIT. In MAY_EXIT
577 additionally mark blocks that may exit due to a call. */
578
579static void
99b1c316 580find_exits (class loop *loop, basic_block *body,
5e962776
ZD
581 bitmap may_exit, bitmap has_exit)
582{
583 unsigned i;
628f6a4e 584 edge_iterator ei;
5e962776 585 edge e;
99b1c316 586 class loop *outermost_exit = loop, *aexit;
5e962776 587 bool has_call = false;
89bfd6f5 588 rtx_insn *insn;
5e962776
ZD
589
590 for (i = 0; i < loop->num_nodes; i++)
591 {
592 if (body[i]->loop_father == loop)
593 {
594 FOR_BB_INSNS (body[i], insn)
595 {
4b4bf941 596 if (CALL_P (insn)
becfd6e5
KZ
597 && (RTL_LOOPING_CONST_OR_PURE_CALL_P (insn)
598 || !RTL_CONST_OR_PURE_CALL_P (insn)))
5e962776
ZD
599 {
600 has_call = true;
601 bitmap_set_bit (may_exit, i);
602 break;
603 }
604 }
605
628f6a4e 606 FOR_EACH_EDGE (e, ei, body[i]->succs)
5e962776 607 {
964ef24c
RB
608 if (! flow_bb_inside_loop_p (loop, e->dest))
609 {
610 bitmap_set_bit (may_exit, i);
611 bitmap_set_bit (has_exit, i);
612 outermost_exit = find_common_loop (outermost_exit,
613 e->dest->loop_father);
614 }
615 /* If we enter a subloop that might never terminate treat
616 it like a possible exit. */
617 if (flow_loop_nested_p (loop, e->dest->loop_father))
618 bitmap_set_bit (may_exit, i);
5e962776
ZD
619 }
620 continue;
621 }
cb20f7e8 622
5e962776
ZD
623 /* Use the data stored for the subloop to decide whether we may exit
624 through it. It is sufficient to do this for header of the loop,
625 as other basic blocks inside it must be dominated by it. */
626 if (body[i]->loop_father->header != body[i])
627 continue;
628
629 if (LOOP_DATA (body[i]->loop_father)->has_call)
630 {
631 has_call = true;
632 bitmap_set_bit (may_exit, i);
633 }
634 aexit = LOOP_DATA (body[i]->loop_father)->outermost_exit;
635 if (aexit != loop)
636 {
637 bitmap_set_bit (may_exit, i);
638 bitmap_set_bit (has_exit, i);
639
640 if (flow_loop_nested_p (aexit, outermost_exit))
641 outermost_exit = aexit;
642 }
643 }
644
1833192f
VM
645 if (loop->aux == NULL)
646 {
99b1c316 647 loop->aux = xcalloc (1, sizeof (class loop_data));
1833192f
VM
648 bitmap_initialize (&LOOP_DATA (loop)->regs_ref, &reg_obstack);
649 bitmap_initialize (&LOOP_DATA (loop)->regs_live, &reg_obstack);
650 }
5e962776
ZD
651 LOOP_DATA (loop)->outermost_exit = outermost_exit;
652 LOOP_DATA (loop)->has_call = has_call;
653}
654
655/* Check whether we may assign a value to X from a register. */
656
657static bool
658may_assign_reg_p (rtx x)
659{
bd361d85 660 return (GET_MODE (x) != VOIDmode
4b06592a 661 && GET_MODE (x) != BLKmode
bd361d85 662 && can_copy_p (GET_MODE (x))
7ee1f872
EB
663 /* Do not mess with the frame pointer adjustments that can
664 be generated e.g. by expand_builtin_setjmp_receiver. */
665 && x != frame_pointer_rtx
a7f4ccb1
SB
666 && (!REG_P (x)
667 || !HARD_REGISTER_P (x)
668 || REGNO_REG_CLASS (REGNO (x)) != NO_REGS));
5e962776
ZD
669}
670
cb20f7e8
ZD
671/* Finds definitions that may correspond to invariants in LOOP with body
672 BODY. */
5e962776
ZD
673
674static void
99b1c316 675find_defs (class loop *loop)
5e962776 676{
7b19209f
SB
677 if (dump_file)
678 {
679 fprintf (dump_file,
680 "*****starting processing of loop %d ******\n",
681 loop->num);
682 }
683
6fb5fa3c 684 df_chain_add_problem (DF_UD_CHAIN);
7b19209f 685 df_set_flags (DF_RD_PRUNE_DEAD_DEFS);
7be64667 686 df_analyze_loop (loop);
7b19209f 687 check_invariant_table_size ();
6fb5fa3c
DB
688
689 if (dump_file)
690 {
ffd640ed 691 df_dump_region (dump_file);
7b19209f
SB
692 fprintf (dump_file,
693 "*****ending processing of loop %d ******\n",
694 loop->num);
6fb5fa3c 695 }
5e962776
ZD
696}
697
698/* Creates a new invariant for definition DEF in INSN, depending on invariants
699 in DEPENDS_ON. ALWAYS_EXECUTED is true if the insn is always executed,
1052bd54
ZD
700 unless the program ends due to a function call. The newly created invariant
701 is returned. */
5e962776 702
1052bd54 703static struct invariant *
89bfd6f5 704create_new_invariant (struct def *def, rtx_insn *insn, bitmap depends_on,
5e962776
ZD
705 bool always_executed)
706{
5ed6ace5 707 struct invariant *inv = XNEW (struct invariant);
5e962776 708 rtx set = single_set (insn);
f40751dd 709 bool speed = optimize_bb_for_speed_p (BLOCK_FOR_INSN (insn));
5e962776
ZD
710
711 inv->def = def;
712 inv->always_executed = always_executed;
713 inv->depends_on = depends_on;
714
715 /* If the set is simple, usually by moving it we move the whole store out of
716 the loop. Otherwise we save only cost of the computation. */
717 if (def)
1bfdbb29 718 {
d51102f3 719 inv->cost = set_rtx_cost (set, speed);
1578e910
MM
720 /* ??? Try to determine cheapness of address computation. Unfortunately
721 the address cost is only a relative measure, we can't really compare
722 it with any absolute number, but only with other address costs.
723 But here we don't have any other addresses, so compare with a magic
724 number anyway. It has to be large enough to not regress PR33928
725 (by avoiding to move reg+8,reg+16,reg+24 invariants), but small
726 enough to not regress 410.bwaves either (by still moving reg+reg
727 invariants).
728 See http://gcc.gnu.org/ml/gcc-patches/2009-10/msg01210.html . */
315a349c
DS
729 if (SCALAR_INT_MODE_P (GET_MODE (SET_DEST (set))))
730 inv->cheap_address = address_cost (SET_SRC (set), word_mode,
731 ADDR_SPACE_GENERIC, speed) < 3;
732 else
733 inv->cheap_address = false;
1bfdbb29 734 }
5e962776 735 else
1bfdbb29 736 {
e548c9df
AM
737 inv->cost = set_src_cost (SET_SRC (set), GET_MODE (SET_DEST (set)),
738 speed);
1bfdbb29
PB
739 inv->cheap_address = false;
740 }
5e962776
ZD
741
742 inv->move = false;
1052bd54 743 inv->reg = NULL_RTX;
1833192f 744 inv->orig_regno = -1;
5e962776
ZD
745 inv->stamp = 0;
746 inv->insn = insn;
747
9771b263 748 inv->invno = invariants.length ();
1052bd54 749 inv->eqto = ~0u;
e42e3d15
ZC
750
751 /* Itself. */
752 inv->eqno = 1;
753
5e962776
ZD
754 if (def)
755 def->invno = inv->invno;
9771b263 756 invariants.safe_push (inv);
5e962776
ZD
757
758 if (dump_file)
759 {
760 fprintf (dump_file,
761 "Set in insn %d is invariant (%d), cost %d, depends on ",
762 INSN_UID (insn), inv->invno, inv->cost);
763 dump_bitmap (dump_file, inv->depends_on);
764 }
1052bd54
ZD
765
766 return inv;
5e962776
ZD
767}
768
192912db
BC
769/* Return a canonical version of X for the address, from the point of view,
770 that all multiplications are represented as MULT instead of the multiply
771 by a power of 2 being represented as ASHIFT.
772
773 Callers should prepare a copy of X because this function may modify it
774 in place. */
775
776static void
777canonicalize_address_mult (rtx x)
778{
779 subrtx_var_iterator::array_type array;
780 FOR_EACH_SUBRTX_VAR (iter, array, x, NONCONST)
781 {
782 rtx sub = *iter;
7c61657f
RS
783 scalar_int_mode sub_mode;
784 if (is_a <scalar_int_mode> (GET_MODE (sub), &sub_mode)
785 && GET_CODE (sub) == ASHIFT
192912db 786 && CONST_INT_P (XEXP (sub, 1))
7c61657f 787 && INTVAL (XEXP (sub, 1)) < GET_MODE_BITSIZE (sub_mode)
192912db
BC
788 && INTVAL (XEXP (sub, 1)) >= 0)
789 {
790 HOST_WIDE_INT shift = INTVAL (XEXP (sub, 1));
791 PUT_CODE (sub, MULT);
7c61657f 792 XEXP (sub, 1) = gen_int_mode (HOST_WIDE_INT_1 << shift, sub_mode);
192912db
BC
793 iter.skip_subrtxes ();
794 }
795 }
796}
797
798/* Maximum number of sub expressions in address. We set it to
799 a small integer since it's unlikely to have a complicated
800 address expression. */
801
802#define MAX_CANON_ADDR_PARTS (5)
803
804/* Collect sub expressions in address X with PLUS as the seperator.
805 Sub expressions are stored in vector ADDR_PARTS. */
806
807static void
808collect_address_parts (rtx x, vec<rtx> *addr_parts)
809{
810 subrtx_var_iterator::array_type array;
811 FOR_EACH_SUBRTX_VAR (iter, array, x, NONCONST)
812 {
813 rtx sub = *iter;
814
815 if (GET_CODE (sub) != PLUS)
816 {
817 addr_parts->safe_push (sub);
818 iter.skip_subrtxes ();
819 }
820 }
821}
822
823/* Compare function for sorting sub expressions X and Y based on
824 precedence defined for communitive operations. */
825
826static int
827compare_address_parts (const void *x, const void *y)
828{
829 const rtx *rx = (const rtx *)x;
830 const rtx *ry = (const rtx *)y;
831 int px = commutative_operand_precedence (*rx);
832 int py = commutative_operand_precedence (*ry);
833
834 return (py - px);
835}
836
837/* Return a canonical version address for X by following steps:
838 1) Rewrite ASHIFT into MULT recursively.
839 2) Divide address into sub expressions with PLUS as the
840 separator.
841 3) Sort sub expressions according to precedence defined
842 for communative operations.
843 4) Simplify CONST_INT_P sub expressions.
844 5) Create new canonicalized address and return.
845 Callers should prepare a copy of X because this function may
846 modify it in place. */
847
848static rtx
849canonicalize_address (rtx x)
850{
851 rtx res;
852 unsigned int i, j;
853 machine_mode mode = GET_MODE (x);
854 auto_vec<rtx, MAX_CANON_ADDR_PARTS> addr_parts;
855
856 /* Rewrite ASHIFT into MULT. */
857 canonicalize_address_mult (x);
858 /* Divide address into sub expressions. */
859 collect_address_parts (x, &addr_parts);
860 /* Unlikely to have very complicated address. */
861 if (addr_parts.length () < 2
862 || addr_parts.length () > MAX_CANON_ADDR_PARTS)
863 return x;
864
865 /* Sort sub expressions according to canonicalization precedence. */
866 addr_parts.qsort (compare_address_parts);
867
868 /* Simplify all constant int summary if possible. */
869 for (i = 0; i < addr_parts.length (); i++)
870 if (CONST_INT_P (addr_parts[i]))
871 break;
872
873 for (j = i + 1; j < addr_parts.length (); j++)
874 {
875 gcc_assert (CONST_INT_P (addr_parts[j]));
876 addr_parts[i] = simplify_gen_binary (PLUS, mode,
877 addr_parts[i],
878 addr_parts[j]);
879 }
880
881 /* Chain PLUS operators to the left for !CONST_INT_P sub expressions. */
882 res = addr_parts[0];
883 for (j = 1; j < i; j++)
884 res = simplify_gen_binary (PLUS, mode, res, addr_parts[j]);
885
886 /* Pickup the last CONST_INT_P sub expression. */
887 if (i < addr_parts.length ())
888 res = simplify_gen_binary (PLUS, mode, res, addr_parts[i]);
889
890 return res;
891}
892
5b92e189
BC
893/* Given invariant DEF and its address USE, check if the corresponding
894 invariant expr can be propagated into the use or not. */
895
896static bool
897inv_can_prop_to_addr_use (struct def *def, df_ref use)
898{
899 struct invariant *inv;
192912db 900 rtx *pos = DF_REF_REAL_LOC (use), def_set, use_set;
5b92e189
BC
901 rtx_insn *use_insn = DF_REF_INSN (use);
902 rtx_insn *def_insn;
903 bool ok;
904
905 inv = invariants[def->invno];
906 /* No need to check if address expression is expensive. */
907 if (!inv->cheap_address)
908 return false;
909
910 def_insn = inv->insn;
911 def_set = single_set (def_insn);
912 if (!def_set)
913 return false;
914
915 validate_unshare_change (use_insn, pos, SET_SRC (def_set), true);
916 ok = verify_changes (0);
192912db
BC
917 /* Try harder with canonicalization in address expression. */
918 if (!ok && (use_set = single_set (use_insn)) != NULL_RTX)
919 {
920 rtx src, dest, mem = NULL_RTX;
921
922 src = SET_SRC (use_set);
923 dest = SET_DEST (use_set);
924 if (MEM_P (src))
925 mem = src;
926 else if (MEM_P (dest))
927 mem = dest;
928
929 if (mem != NULL_RTX
930 && !memory_address_addr_space_p (GET_MODE (mem),
931 XEXP (mem, 0),
932 MEM_ADDR_SPACE (mem)))
933 {
934 rtx addr = canonicalize_address (copy_rtx (XEXP (mem, 0)));
935 if (memory_address_addr_space_p (GET_MODE (mem),
936 addr, MEM_ADDR_SPACE (mem)))
937 ok = true;
938 }
939 }
5b92e189
BC
940 cancel_changes (0);
941 return ok;
942}
943
5e962776
ZD
944/* Record USE at DEF. */
945
946static void
1bfdbb29 947record_use (struct def *def, df_ref use)
5e962776 948{
5ed6ace5 949 struct use *u = XNEW (struct use);
5e962776 950
1bfdbb29
PB
951 u->pos = DF_REF_REAL_LOC (use);
952 u->insn = DF_REF_INSN (use);
953 u->addr_use_p = (DF_REF_TYPE (use) == DF_REF_REG_MEM_LOAD
3e807ffc 954 || DF_REF_TYPE (use) == DF_REF_REG_MEM_STORE);
5e962776
ZD
955 u->next = def->uses;
956 def->uses = u;
957 def->n_uses++;
1bfdbb29 958 if (u->addr_use_p)
5b92e189
BC
959 {
960 /* Initialize propagation information if this is the first addr
961 use of the inv def. */
962 if (def->n_addr_uses == 0)
963 def->can_prop_to_addr_uses = true;
964
965 def->n_addr_uses++;
966 if (def->can_prop_to_addr_uses && !inv_can_prop_to_addr_use (def, use))
967 def->can_prop_to_addr_uses = false;
968 }
5e962776
ZD
969}
970
6fb5fa3c
DB
971/* Finds the invariants USE depends on and store them to the DEPENDS_ON
972 bitmap. Returns true if all dependencies of USE are known to be
b6c9b9bc 973 loop invariants, false otherwise. */
5e962776
ZD
974
975static bool
57512f53 976check_dependency (basic_block bb, df_ref use, bitmap depends_on)
5e962776 977{
57512f53 978 df_ref def;
6fb5fa3c 979 basic_block def_bb;
4d779342 980 struct df_link *defs;
5e962776 981 struct def *def_data;
1052bd54 982 struct invariant *inv;
b8698a0f 983
57512f53 984 if (DF_REF_FLAGS (use) & DF_REF_READ_WRITE)
6fb5fa3c 985 return false;
b8698a0f 986
6fb5fa3c
DB
987 defs = DF_REF_CHAIN (use);
988 if (!defs)
1a17bd35
EB
989 {
990 unsigned int regno = DF_REF_REGNO (use);
991
992 /* If this is the use of an uninitialized argument register that is
993 likely to be spilled, do not move it lest this might extend its
994 lifetime and cause reload to die. This can occur for a call to
995 a function taking complex number arguments and moving the insns
996 preparing the arguments without moving the call itself wouldn't
997 gain much in practice. */
998 if ((DF_REF_FLAGS (use) & DF_HARD_REG_LIVE)
999 && FUNCTION_ARG_REGNO_P (regno)
1000 && targetm.class_likely_spilled_p (REGNO_REG_CLASS (regno)))
1001 return false;
1002
1003 return true;
1004 }
b8698a0f 1005
6fb5fa3c
DB
1006 if (defs->next)
1007 return false;
b8698a0f 1008
6fb5fa3c
DB
1009 def = defs->ref;
1010 check_invariant_table_size ();
c3284718 1011 inv = invariant_table[DF_REF_ID (def)];
6fb5fa3c
DB
1012 if (!inv)
1013 return false;
b8698a0f 1014
6fb5fa3c
DB
1015 def_data = inv->def;
1016 gcc_assert (def_data != NULL);
b8698a0f 1017
6fb5fa3c
DB
1018 def_bb = DF_REF_BB (def);
1019 /* Note that in case bb == def_bb, we know that the definition
1020 dominates insn, because def has invariant_table[DF_REF_ID(def)]
1021 defined and we process the insns in the basic block bb
1022 sequentially. */
1023 if (!dominated_by_p (CDI_DOMINATORS, bb, def_bb))
1024 return false;
b8698a0f 1025
6fb5fa3c
DB
1026 bitmap_set_bit (depends_on, def_data->invno);
1027 return true;
1028}
1052bd54 1029
1052bd54 1030
6fb5fa3c
DB
1031/* Finds the invariants INSN depends on and store them to the DEPENDS_ON
1032 bitmap. Returns true if all dependencies of INSN are known to be
1033 loop invariants, false otherwise. */
5e962776 1034
6fb5fa3c 1035static bool
89bfd6f5 1036check_dependencies (rtx_insn *insn, bitmap depends_on)
6fb5fa3c 1037{
50e94c7e 1038 struct df_insn_info *insn_info = DF_INSN_INFO_GET (insn);
bfac633a 1039 df_ref use;
6fb5fa3c 1040 basic_block bb = BLOCK_FOR_INSN (insn);
5e962776 1041
bfac633a
RS
1042 FOR_EACH_INSN_INFO_USE (use, insn_info)
1043 if (!check_dependency (bb, use, depends_on))
6fb5fa3c 1044 return false;
bfac633a
RS
1045 FOR_EACH_INSN_INFO_EQ_USE (use, insn_info)
1046 if (!check_dependency (bb, use, depends_on))
6fb5fa3c 1047 return false;
b8698a0f 1048
5e962776
ZD
1049 return true;
1050}
1051
67914693 1052/* Pre-check candidate DEST to skip the one which cannot make a valid insn
2c97f472
ZC
1053 during move_invariant_reg. SIMPLE is to skip HARD_REGISTER. */
1054static bool
1055pre_check_invariant_p (bool simple, rtx dest)
1056{
1057 if (simple && REG_P (dest) && DF_REG_DEF_COUNT (REGNO (dest)) > 1)
1058 {
1059 df_ref use;
2c97f472
ZC
1060 unsigned int i = REGNO (dest);
1061 struct df_insn_info *insn_info;
1062 df_ref def_rec;
1063
1064 for (use = DF_REG_USE_CHAIN (i); use; use = DF_REF_NEXT_REG (use))
1065 {
e67d1102 1066 rtx_insn *ref = DF_REF_INSN (use);
2c97f472
ZC
1067 insn_info = DF_INSN_INFO_GET (ref);
1068
1069 FOR_EACH_INSN_INFO_DEF (def_rec, insn_info)
1070 if (DF_REF_REGNO (def_rec) == i)
1071 {
1072 /* Multi definitions at this stage, most likely are due to
1073 instruction constraints, which requires both read and write
1074 on the same register. Since move_invariant_reg is not
1075 powerful enough to handle such cases, just ignore the INV
1076 and leave the chance to others. */
1077 return false;
1078 }
1079 }
1080 }
1081 return true;
1082}
1083
5e962776
ZD
1084/* Finds invariant in INSN. ALWAYS_REACHED is true if the insn is always
1085 executed. ALWAYS_EXECUTED is true if the insn is always executed,
cb20f7e8 1086 unless the program ends due to a function call. */
5e962776
ZD
1087
1088static void
89bfd6f5 1089find_invariant_insn (rtx_insn *insn, bool always_reached, bool always_executed)
5e962776 1090{
57512f53 1091 df_ref ref;
5e962776
ZD
1092 struct def *def;
1093 bitmap depends_on;
1094 rtx set, dest;
1095 bool simple = true;
1052bd54 1096 struct invariant *inv;
5e962776 1097
00f70f98 1098 /* We can't move a CC0 setter without the user. */
058eb3b0 1099 if (HAVE_cc0 && sets_cc0_p (insn))
00f70f98 1100 return;
00f70f98 1101
5e962776
ZD
1102 set = single_set (insn);
1103 if (!set)
1104 return;
1105 dest = SET_DEST (set);
1106
2ca202e7 1107 if (!REG_P (dest)
5e962776
ZD
1108 || HARD_REGISTER_P (dest))
1109 simple = false;
1110
2c97f472
ZC
1111 if (!may_assign_reg_p (dest)
1112 || !pre_check_invariant_p (simple, dest)
a7f4ccb1 1113 || !check_maybe_invariant (SET_SRC (set)))
5e962776
ZD
1114 return;
1115
28749cfb
ZD
1116 /* If the insn can throw exception, we cannot move it at all without changing
1117 cfg. */
1118 if (can_throw_internal (insn))
1119 return;
5e962776 1120
28749cfb 1121 /* We cannot make trapping insn executed, unless it was executed before. */
48e8382e 1122 if (may_trap_or_fault_p (PATTERN (insn)) && !always_reached)
28749cfb 1123 return;
5e962776 1124
8bdbfff5 1125 depends_on = BITMAP_ALLOC (NULL);
cb20f7e8 1126 if (!check_dependencies (insn, depends_on))
5e962776 1127 {
8bdbfff5 1128 BITMAP_FREE (depends_on);
5e962776
ZD
1129 return;
1130 }
1131
1132 if (simple)
5ed6ace5 1133 def = XCNEW (struct def);
5e962776
ZD
1134 else
1135 def = NULL;
1136
1052bd54
ZD
1137 inv = create_new_invariant (def, insn, depends_on, always_executed);
1138
1139 if (simple)
1140 {
6fb5fa3c
DB
1141 ref = df_find_def (insn, dest);
1142 check_invariant_table_size ();
c3284718 1143 invariant_table[DF_REF_ID (ref)] = inv;
1052bd54 1144 }
5e962776
ZD
1145}
1146
cb20f7e8 1147/* Record registers used in INSN that have a unique invariant definition. */
5e962776
ZD
1148
1149static void
89bfd6f5 1150record_uses (rtx_insn *insn)
5e962776 1151{
50e94c7e 1152 struct df_insn_info *insn_info = DF_INSN_INFO_GET (insn);
bfac633a 1153 df_ref use;
1052bd54
ZD
1154 struct invariant *inv;
1155
bfac633a 1156 FOR_EACH_INSN_INFO_USE (use, insn_info)
6fb5fa3c 1157 {
6fb5fa3c
DB
1158 inv = invariant_for_use (use);
1159 if (inv)
1bfdbb29 1160 record_use (inv->def, use);
6fb5fa3c 1161 }
bfac633a 1162 FOR_EACH_INSN_INFO_EQ_USE (use, insn_info)
5e962776 1163 {
1052bd54
ZD
1164 inv = invariant_for_use (use);
1165 if (inv)
1bfdbb29 1166 record_use (inv->def, use);
5e962776
ZD
1167 }
1168}
1169
1170/* Finds invariants in INSN. ALWAYS_REACHED is true if the insn is always
1171 executed. ALWAYS_EXECUTED is true if the insn is always executed,
cb20f7e8 1172 unless the program ends due to a function call. */
5e962776
ZD
1173
1174static void
89bfd6f5 1175find_invariants_insn (rtx_insn *insn, bool always_reached, bool always_executed)
5e962776 1176{
cb20f7e8
ZD
1177 find_invariant_insn (insn, always_reached, always_executed);
1178 record_uses (insn);
5e962776
ZD
1179}
1180
1181/* Finds invariants in basic block BB. ALWAYS_REACHED is true if the
1182 basic block is always executed. ALWAYS_EXECUTED is true if the basic
1183 block is always executed, unless the program ends due to a function
cb20f7e8 1184 call. */
5e962776
ZD
1185
1186static void
cb20f7e8 1187find_invariants_bb (basic_block bb, bool always_reached, bool always_executed)
5e962776 1188{
89bfd6f5 1189 rtx_insn *insn;
5e962776
ZD
1190
1191 FOR_BB_INSNS (bb, insn)
1192 {
b5b8b0ac 1193 if (!NONDEBUG_INSN_P (insn))
5e962776
ZD
1194 continue;
1195
cb20f7e8 1196 find_invariants_insn (insn, always_reached, always_executed);
5e962776
ZD
1197
1198 if (always_reached
4b4bf941 1199 && CALL_P (insn)
becfd6e5
KZ
1200 && (RTL_LOOPING_CONST_OR_PURE_CALL_P (insn)
1201 || ! RTL_CONST_OR_PURE_CALL_P (insn)))
5e962776
ZD
1202 always_reached = false;
1203 }
1204}
1205
1206/* Finds invariants in LOOP with body BODY. ALWAYS_REACHED is the bitmap of
1207 basic blocks in BODY that are always executed. ALWAYS_EXECUTED is the
1208 bitmap of basic blocks in BODY that are always executed unless the program
cb20f7e8 1209 ends due to a function call. */
5e962776
ZD
1210
1211static void
99b1c316 1212find_invariants_body (class loop *loop, basic_block *body,
cb20f7e8 1213 bitmap always_reached, bitmap always_executed)
5e962776
ZD
1214{
1215 unsigned i;
1216
1217 for (i = 0; i < loop->num_nodes; i++)
1218 find_invariants_bb (body[i],
1219 bitmap_bit_p (always_reached, i),
cb20f7e8 1220 bitmap_bit_p (always_executed, i));
5e962776
ZD
1221}
1222
cb20f7e8 1223/* Finds invariants in LOOP. */
5e962776
ZD
1224
1225static void
99b1c316 1226find_invariants (class loop *loop)
5e962776 1227{
0e3de1d4
TS
1228 auto_bitmap may_exit;
1229 auto_bitmap always_reached;
1230 auto_bitmap has_exit;
1231 auto_bitmap always_executed;
5e962776
ZD
1232 basic_block *body = get_loop_body_in_dom_order (loop);
1233
1234 find_exits (loop, body, may_exit, has_exit);
1235 compute_always_reached (loop, body, may_exit, always_reached);
1236 compute_always_reached (loop, body, has_exit, always_executed);
1237
7be64667 1238 find_defs (loop);
cb20f7e8 1239 find_invariants_body (loop, body, always_reached, always_executed);
1052bd54 1240 merge_identical_invariants ();
5e962776 1241
5e962776
ZD
1242 free (body);
1243}
1244
1245/* Frees a list of uses USE. */
1246
1247static void
1248free_use_list (struct use *use)
1249{
1250 struct use *next;
1251
1252 for (; use; use = next)
1253 {
1254 next = use->next;
1255 free (use);
1256 }
1257}
1258
1756cb66 1259/* Return pressure class and number of hard registers (through *NREGS)
1833192f
VM
1260 for destination of INSN. */
1261static enum reg_class
89bfd6f5 1262get_pressure_class_and_nregs (rtx_insn *insn, int *nregs)
1833192f
VM
1263{
1264 rtx reg;
1756cb66 1265 enum reg_class pressure_class;
1833192f 1266 rtx set = single_set (insn);
b8698a0f 1267
1833192f
VM
1268 /* Considered invariant insns have only one set. */
1269 gcc_assert (set != NULL_RTX);
1270 reg = SET_DEST (set);
1271 if (GET_CODE (reg) == SUBREG)
1272 reg = SUBREG_REG (reg);
1273 if (MEM_P (reg))
1274 {
1275 *nregs = 0;
1756cb66 1276 pressure_class = NO_REGS;
1833192f
VM
1277 }
1278 else
1279 {
1280 if (! REG_P (reg))
1281 reg = NULL_RTX;
1282 if (reg == NULL_RTX)
1756cb66 1283 pressure_class = GENERAL_REGS;
1833192f 1284 else
1756cb66
VM
1285 {
1286 pressure_class = reg_allocno_class (REGNO (reg));
1287 pressure_class = ira_pressure_class_translate[pressure_class];
1288 }
1289 *nregs
1290 = ira_reg_class_max_nregs[pressure_class][GET_MODE (SET_SRC (set))];
1833192f 1291 }
1756cb66 1292 return pressure_class;
1833192f
VM
1293}
1294
5e962776 1295/* Calculates cost and number of registers needed for moving invariant INV
51a69168
ZC
1296 out of the loop and stores them to *COST and *REGS_NEEDED. *CL will be
1297 the REG_CLASS of INV. Return
1298 -1: if INV is invalid.
1299 0: if INV and its depends_on have same reg_class
1300 1: if INV and its depends_on have different reg_classes. */
5e962776 1301
51a69168
ZC
1302static int
1303get_inv_cost (struct invariant *inv, int *comp_cost, unsigned *regs_needed,
1304 enum reg_class *cl)
5e962776 1305{
1833192f
VM
1306 int i, acomp_cost;
1307 unsigned aregs_needed[N_REG_CLASSES];
5e962776
ZD
1308 unsigned depno;
1309 struct invariant *dep;
87c476a2 1310 bitmap_iterator bi;
51a69168 1311 int ret = 1;
5e962776 1312
1052bd54 1313 /* Find the representative of the class of the equivalent invariants. */
9771b263 1314 inv = invariants[inv->eqto];
1052bd54 1315
5e962776 1316 *comp_cost = 0;
1833192f
VM
1317 if (! flag_ira_loop_pressure)
1318 regs_needed[0] = 0;
1319 else
1320 {
1756cb66
VM
1321 for (i = 0; i < ira_pressure_classes_num; i++)
1322 regs_needed[ira_pressure_classes[i]] = 0;
1833192f
VM
1323 }
1324
5e962776
ZD
1325 if (inv->move
1326 || inv->stamp == actual_stamp)
51a69168 1327 return -1;
5e962776
ZD
1328 inv->stamp = actual_stamp;
1329
1833192f
VM
1330 if (! flag_ira_loop_pressure)
1331 regs_needed[0]++;
1332 else
1333 {
1334 int nregs;
1756cb66 1335 enum reg_class pressure_class;
1833192f 1336
1756cb66
VM
1337 pressure_class = get_pressure_class_and_nregs (inv->insn, &nregs);
1338 regs_needed[pressure_class] += nregs;
51a69168
ZC
1339 *cl = pressure_class;
1340 ret = 0;
1833192f
VM
1341 }
1342
1bfdbb29 1343 if (!inv->cheap_address
315a349c 1344 || inv->def->n_uses == 0
5b92e189
BC
1345 || inv->def->n_addr_uses < inv->def->n_uses
1346 /* Count cost if the inv can't be propagated into address uses. */
1347 || !inv->def->can_prop_to_addr_uses)
e42e3d15 1348 (*comp_cost) += inv->cost * inv->eqno;
5e962776 1349
3d8504ac
RS
1350#ifdef STACK_REGS
1351 {
1352 /* Hoisting constant pool constants into stack regs may cost more than
1353 just single register. On x87, the balance is affected both by the
c0220ea4 1354 small number of FP registers, and by its register stack organization,
3d8504ac
RS
1355 that forces us to add compensation code in and around the loop to
1356 shuffle the operands to the top of stack before use, and pop them
1357 from the stack after the loop finishes.
1358
1359 To model this effect, we increase the number of registers needed for
1360 stack registers by two: one register push, and one register pop.
1361 This usually has the effect that FP constant loads from the constant
1362 pool are not moved out of the loop.
1363
67914693 1364 Note that this also means that dependent invariants cannot be moved.
3d8504ac
RS
1365 However, the primary purpose of this pass is to move loop invariant
1366 address arithmetic out of loops, and address arithmetic that depends
1367 on floating point constants is unlikely to ever occur. */
1368 rtx set = single_set (inv->insn);
1369 if (set
1833192f
VM
1370 && IS_STACK_MODE (GET_MODE (SET_SRC (set)))
1371 && constant_pool_constant_p (SET_SRC (set)))
1372 {
1373 if (flag_ira_loop_pressure)
1756cb66 1374 regs_needed[ira_stack_reg_pressure_class] += 2;
1833192f
VM
1375 else
1376 regs_needed[0] += 2;
1377 }
3d8504ac
RS
1378 }
1379#endif
1380
87c476a2 1381 EXECUTE_IF_SET_IN_BITMAP (inv->depends_on, 0, depno, bi)
5e962776 1382 {
1833192f 1383 bool check_p;
51a69168
ZC
1384 enum reg_class dep_cl = ALL_REGS;
1385 int dep_ret;
1833192f 1386
9771b263 1387 dep = invariants[depno];
5e962776 1388
61fc05c7
ZC
1389 /* If DEP is moved out of the loop, it is not a depends_on any more. */
1390 if (dep->move)
1391 continue;
1392
51a69168 1393 dep_ret = get_inv_cost (dep, &acomp_cost, aregs_needed, &dep_cl);
5e962776 1394
1833192f
VM
1395 if (! flag_ira_loop_pressure)
1396 check_p = aregs_needed[0] != 0;
1397 else
1398 {
1756cb66
VM
1399 for (i = 0; i < ira_pressure_classes_num; i++)
1400 if (aregs_needed[ira_pressure_classes[i]] != 0)
1833192f 1401 break;
1756cb66 1402 check_p = i < ira_pressure_classes_num;
51a69168
ZC
1403
1404 if ((dep_ret == 1) || ((dep_ret == 0) && (*cl != dep_cl)))
1405 {
1406 *cl = ALL_REGS;
1407 ret = 1;
1408 }
1833192f
VM
1409 }
1410 if (check_p
5e962776
ZD
1411 /* We need to check always_executed, since if the original value of
1412 the invariant may be preserved, we may need to keep it in a
1413 separate register. TODO check whether the register has an
1414 use outside of the loop. */
1415 && dep->always_executed
1416 && !dep->def->uses->next)
1417 {
1418 /* If this is a single use, after moving the dependency we will not
1419 need a new register. */
1833192f
VM
1420 if (! flag_ira_loop_pressure)
1421 aregs_needed[0]--;
1422 else
1423 {
1424 int nregs;
1756cb66 1425 enum reg_class pressure_class;
1833192f 1426
1756cb66
VM
1427 pressure_class = get_pressure_class_and_nregs (inv->insn, &nregs);
1428 aregs_needed[pressure_class] -= nregs;
1833192f 1429 }
5e962776
ZD
1430 }
1431
1833192f
VM
1432 if (! flag_ira_loop_pressure)
1433 regs_needed[0] += aregs_needed[0];
1434 else
1435 {
1756cb66
VM
1436 for (i = 0; i < ira_pressure_classes_num; i++)
1437 regs_needed[ira_pressure_classes[i]]
1438 += aregs_needed[ira_pressure_classes[i]];
1833192f 1439 }
5e962776 1440 (*comp_cost) += acomp_cost;
87c476a2 1441 }
51a69168 1442 return ret;
5e962776
ZD
1443}
1444
1445/* Calculates gain for eliminating invariant INV. REGS_USED is the number
a154b43a
ZD
1446 of registers used in the loop, NEW_REGS is the number of new variables
1447 already added due to the invariant motion. The number of registers needed
bec922f0
SL
1448 for it is stored in *REGS_NEEDED. SPEED and CALL_P are flags passed
1449 through to estimate_reg_pressure_cost. */
5e962776
ZD
1450
1451static int
1452gain_for_invariant (struct invariant *inv, unsigned *regs_needed,
bec922f0
SL
1453 unsigned *new_regs, unsigned regs_used,
1454 bool speed, bool call_p)
5e962776
ZD
1455{
1456 int comp_cost, size_cost;
e54bd4ab
JJ
1457 /* Workaround -Wmaybe-uninitialized false positive during
1458 profiledbootstrap by initializing it. */
1459 enum reg_class cl = NO_REGS;
51a69168 1460 int ret;
5e962776 1461
5e962776
ZD
1462 actual_stamp++;
1463
51a69168 1464 ret = get_inv_cost (inv, &comp_cost, regs_needed, &cl);
1833192f
VM
1465
1466 if (! flag_ira_loop_pressure)
1467 {
1468 size_cost = (estimate_reg_pressure_cost (new_regs[0] + regs_needed[0],
bec922f0 1469 regs_used, speed, call_p)
1833192f 1470 - estimate_reg_pressure_cost (new_regs[0],
bec922f0 1471 regs_used, speed, call_p));
1833192f 1472 }
51a69168
ZC
1473 else if (ret < 0)
1474 return -1;
1475 else if ((ret == 0) && (cl == NO_REGS))
1476 /* Hoist it anyway since it does not impact register pressure. */
1477 return 1;
1833192f
VM
1478 else
1479 {
1480 int i;
1756cb66 1481 enum reg_class pressure_class;
1833192f 1482
1756cb66 1483 for (i = 0; i < ira_pressure_classes_num; i++)
1833192f 1484 {
1756cb66 1485 pressure_class = ira_pressure_classes[i];
51a69168
ZC
1486
1487 if (!reg_classes_intersect_p (pressure_class, cl))
1488 continue;
1489
1756cb66
VM
1490 if ((int) new_regs[pressure_class]
1491 + (int) regs_needed[pressure_class]
1492 + LOOP_DATA (curr_loop)->max_reg_pressure[pressure_class]
028d4092 1493 + param_ira_loop_reserved_regs
f508f827 1494 > ira_class_hard_regs_num[pressure_class])
1833192f
VM
1495 break;
1496 }
1756cb66 1497 if (i < ira_pressure_classes_num)
1833192f
VM
1498 /* There will be register pressure excess and we want not to
1499 make this loop invariant motion. All loop invariants with
1500 non-positive gains will be rejected in function
1501 find_invariants_to_move. Therefore we return the negative
1502 number here.
1503
1504 One could think that this rejects also expensive loop
1505 invariant motions and this will hurt code performance.
1506 However numerous experiments with different heuristics
1507 taking invariant cost into account did not confirm this
1508 assumption. There are possible explanations for this
1509 result:
1510 o probably all expensive invariants were already moved out
1511 of the loop by PRE and gimple invariant motion pass.
1512 o expensive invariant execution will be hidden by insn
1513 scheduling or OOO processor hardware because usually such
1514 invariants have a lot of freedom to be executed
1515 out-of-order.
1516 Another reason for ignoring invariant cost vs spilling cost
1517 heuristics is also in difficulties to evaluate accurately
1518 spill cost at this stage. */
1519 return -1;
1520 else
1521 size_cost = 0;
1522 }
5e962776
ZD
1523
1524 return comp_cost - size_cost;
1525}
1526
1527/* Finds invariant with best gain for moving. Returns the gain, stores
1528 the invariant in *BEST and number of registers needed for it to
a154b43a
ZD
1529 *REGS_NEEDED. REGS_USED is the number of registers used in the loop.
1530 NEW_REGS is the number of new variables already added due to invariant
1531 motion. */
5e962776
ZD
1532
1533static int
1534best_gain_for_invariant (struct invariant **best, unsigned *regs_needed,
bec922f0
SL
1535 unsigned *new_regs, unsigned regs_used,
1536 bool speed, bool call_p)
5e962776
ZD
1537{
1538 struct invariant *inv;
1833192f
VM
1539 int i, gain = 0, again;
1540 unsigned aregs_needed[N_REG_CLASSES], invno;
5e962776 1541
9771b263 1542 FOR_EACH_VEC_ELT (invariants, invno, inv)
5e962776 1543 {
5e962776
ZD
1544 if (inv->move)
1545 continue;
1546
1052bd54
ZD
1547 /* Only consider the "representatives" of equivalent invariants. */
1548 if (inv->eqto != inv->invno)
1549 continue;
1550
1833192f 1551 again = gain_for_invariant (inv, aregs_needed, new_regs, regs_used,
bec922f0 1552 speed, call_p);
5e962776
ZD
1553 if (again > gain)
1554 {
1555 gain = again;
1556 *best = inv;
1833192f
VM
1557 if (! flag_ira_loop_pressure)
1558 regs_needed[0] = aregs_needed[0];
1559 else
1560 {
1756cb66
VM
1561 for (i = 0; i < ira_pressure_classes_num; i++)
1562 regs_needed[ira_pressure_classes[i]]
1563 = aregs_needed[ira_pressure_classes[i]];
1833192f 1564 }
5e962776
ZD
1565 }
1566 }
1567
1568 return gain;
1569}
1570
1571/* Marks invariant INVNO and all its dependencies for moving. */
1572
1573static void
1833192f 1574set_move_mark (unsigned invno, int gain)
5e962776 1575{
9771b263 1576 struct invariant *inv = invariants[invno];
87c476a2 1577 bitmap_iterator bi;
5e962776 1578
1052bd54 1579 /* Find the representative of the class of the equivalent invariants. */
9771b263 1580 inv = invariants[inv->eqto];
1052bd54 1581
5e962776
ZD
1582 if (inv->move)
1583 return;
1584 inv->move = true;
1585
1586 if (dump_file)
1833192f
VM
1587 {
1588 if (gain >= 0)
1589 fprintf (dump_file, "Decided to move invariant %d -- gain %d\n",
1590 invno, gain);
1591 else
1592 fprintf (dump_file, "Decided to move dependent invariant %d\n",
1593 invno);
1594 };
5e962776 1595
87c476a2
ZD
1596 EXECUTE_IF_SET_IN_BITMAP (inv->depends_on, 0, invno, bi)
1597 {
1833192f 1598 set_move_mark (invno, -1);
87c476a2 1599 }
5e962776
ZD
1600}
1601
cb20f7e8 1602/* Determines which invariants to move. */
5e962776
ZD
1603
1604static void
bec922f0 1605find_invariants_to_move (bool speed, bool call_p)
5e962776 1606{
1833192f
VM
1607 int gain;
1608 unsigned i, regs_used, regs_needed[N_REG_CLASSES], new_regs[N_REG_CLASSES];
5e962776
ZD
1609 struct invariant *inv = NULL;
1610
9771b263 1611 if (!invariants.length ())
5e962776
ZD
1612 return;
1613
1833192f 1614 if (flag_ira_loop_pressure)
b8698a0f 1615 /* REGS_USED is actually never used when the flag is on. */
1833192f
VM
1616 regs_used = 0;
1617 else
1618 /* We do not really do a good job in estimating number of
1619 registers used; we put some initial bound here to stand for
1620 induction variables etc. that we do not detect. */
5e962776 1621 {
1833192f
VM
1622 unsigned int n_regs = DF_REG_SIZE (df);
1623
1624 regs_used = 2;
b8698a0f 1625
1833192f 1626 for (i = 0; i < n_regs; i++)
5e962776 1627 {
1833192f
VM
1628 if (!DF_REGNO_FIRST_DEF (i) && DF_REGNO_LAST_USE (i))
1629 {
1630 /* This is a value that is used but not changed inside loop. */
1631 regs_used++;
1632 }
5e962776
ZD
1633 }
1634 }
1635
1833192f
VM
1636 if (! flag_ira_loop_pressure)
1637 new_regs[0] = regs_needed[0] = 0;
1638 else
5e962776 1639 {
1756cb66
VM
1640 for (i = 0; (int) i < ira_pressure_classes_num; i++)
1641 new_regs[ira_pressure_classes[i]] = 0;
1833192f
VM
1642 }
1643 while ((gain = best_gain_for_invariant (&inv, regs_needed,
bec922f0
SL
1644 new_regs, regs_used,
1645 speed, call_p)) > 0)
1833192f
VM
1646 {
1647 set_move_mark (inv->invno, gain);
1648 if (! flag_ira_loop_pressure)
1649 new_regs[0] += regs_needed[0];
1650 else
1651 {
1756cb66
VM
1652 for (i = 0; (int) i < ira_pressure_classes_num; i++)
1653 new_regs[ira_pressure_classes[i]]
1654 += regs_needed[ira_pressure_classes[i]];
1833192f 1655 }
5e962776
ZD
1656 }
1657}
1658
43ba743c
EB
1659/* Replace the uses, reached by the definition of invariant INV, by REG.
1660
1661 IN_GROUP is nonzero if this is part of a group of changes that must be
1662 performed as a group. In that case, the changes will be stored. The
1663 function `apply_change_group' will validate and apply the changes. */
1664
1665static int
1666replace_uses (struct invariant *inv, rtx reg, bool in_group)
1667{
1668 /* Replace the uses we know to be dominated. It saves work for copy
1669 propagation, and also it is necessary so that dependent invariants
1670 are computed right. */
1671 if (inv->def)
1672 {
1673 struct use *use;
1674 for (use = inv->def->uses; use; use = use->next)
1675 validate_change (use->insn, use->pos, reg, true);
1676
1677 /* If we aren't part of a larger group, apply the changes now. */
1678 if (!in_group)
1679 return apply_change_group ();
1680 }
1681
1682 return 1;
1683}
1684
aa953e2f
TP
1685/* Whether invariant INV setting REG can be moved out of LOOP, at the end of
1686 the block preceding its header. */
1687
1688static bool
99b1c316 1689can_move_invariant_reg (class loop *loop, struct invariant *inv, rtx reg)
aa953e2f
TP
1690{
1691 df_ref def, use;
1692 unsigned int dest_regno, defs_in_loop_count = 0;
1693 rtx_insn *insn = inv->insn;
1694 basic_block bb = BLOCK_FOR_INSN (inv->insn);
1695
1696 /* We ignore hard register and memory access for cost and complexity reasons.
1697 Hard register are few at this stage and expensive to consider as they
1698 require building a separate data flow. Memory access would require using
1699 df_simulate_* and can_move_insns_across functions and is more complex. */
1700 if (!REG_P (reg) || HARD_REGISTER_P (reg))
1701 return false;
1702
1703 /* Check whether the set is always executed. We could omit this condition if
1704 we know that the register is unused outside of the loop, but it does not
1705 seem worth finding out. */
1706 if (!inv->always_executed)
1707 return false;
1708
1709 /* Check that all uses that would be dominated by def are already dominated
1710 by it. */
1711 dest_regno = REGNO (reg);
1712 for (use = DF_REG_USE_CHAIN (dest_regno); use; use = DF_REF_NEXT_REG (use))
1713 {
1714 rtx_insn *use_insn;
1715 basic_block use_bb;
1716
1717 use_insn = DF_REF_INSN (use);
1718 use_bb = BLOCK_FOR_INSN (use_insn);
1719
1720 /* Ignore instruction considered for moving. */
1721 if (use_insn == insn)
1722 continue;
1723
1724 /* Don't consider uses outside loop. */
1725 if (!flow_bb_inside_loop_p (loop, use_bb))
1726 continue;
1727
1728 /* Don't move if a use is not dominated by def in insn. */
1729 if (use_bb == bb && DF_INSN_LUID (insn) >= DF_INSN_LUID (use_insn))
1730 return false;
1731 if (!dominated_by_p (CDI_DOMINATORS, use_bb, bb))
1732 return false;
1733 }
1734
1735 /* Check for other defs. Any other def in the loop might reach a use
1736 currently reached by the def in insn. */
1737 for (def = DF_REG_DEF_CHAIN (dest_regno); def; def = DF_REF_NEXT_REG (def))
1738 {
1739 basic_block def_bb = DF_REF_BB (def);
1740
1741 /* Defs in exit block cannot reach a use they weren't already. */
1742 if (single_succ_p (def_bb))
1743 {
1744 basic_block def_bb_succ;
1745
1746 def_bb_succ = single_succ (def_bb);
1747 if (!flow_bb_inside_loop_p (loop, def_bb_succ))
1748 continue;
1749 }
1750
1751 if (++defs_in_loop_count > 1)
1752 return false;
1753 }
1754
1755 return true;
1756}
1757
ba946209
ZD
1758/* Move invariant INVNO out of the LOOP. Returns true if this succeeds, false
1759 otherwise. */
1760
1761static bool
99b1c316 1762move_invariant_reg (class loop *loop, unsigned invno)
5e962776 1763{
9771b263
DN
1764 struct invariant *inv = invariants[invno];
1765 struct invariant *repr = invariants[inv->eqto];
5e962776
ZD
1766 unsigned i;
1767 basic_block preheader = loop_preheader_edge (loop)->src;
90b1c344 1768 rtx reg, set, dest, note;
87c476a2 1769 bitmap_iterator bi;
43ba743c 1770 int regno = -1;
5e962776 1771
ba946209
ZD
1772 if (inv->reg)
1773 return true;
1774 if (!repr->move)
1775 return false;
43ba743c 1776
1052bd54
ZD
1777 /* If this is a representative of the class of equivalent invariants,
1778 really move the invariant. Otherwise just replace its use with
1779 the register used for the representative. */
1780 if (inv == repr)
5e962776 1781 {
1052bd54 1782 if (inv->depends_on)
5e962776 1783 {
1052bd54
ZD
1784 EXECUTE_IF_SET_IN_BITMAP (inv->depends_on, 0, i, bi)
1785 {
ba946209
ZD
1786 if (!move_invariant_reg (loop, i))
1787 goto fail;
1052bd54 1788 }
87c476a2 1789 }
5e962776 1790
aa953e2f
TP
1791 /* If possible, just move the set out of the loop. Otherwise, we
1792 need to create a temporary register. */
1052bd54 1793 set = single_set (inv->insn);
1833192f
VM
1794 reg = dest = SET_DEST (set);
1795 if (GET_CODE (reg) == SUBREG)
1796 reg = SUBREG_REG (reg);
1797 if (REG_P (reg))
1798 regno = REGNO (reg);
1799
ddd93587 1800 if (!can_move_invariant_reg (loop, inv, dest))
aa953e2f
TP
1801 {
1802 reg = gen_reg_rtx_and_attrs (dest);
1052bd54 1803
aa953e2f
TP
1804 /* Try replacing the destination by a new pseudoregister. */
1805 validate_change (inv->insn, &SET_DEST (set), reg, true);
43ba743c 1806
aa953e2f
TP
1807 /* As well as all the dominated uses. */
1808 replace_uses (inv, reg, true);
43ba743c 1809
aa953e2f
TP
1810 /* And validate all the changes. */
1811 if (!apply_change_group ())
1812 goto fail;
90b1c344 1813
aa953e2f
TP
1814 emit_insn_after (gen_move_insn (dest, reg), inv->insn);
1815 }
1816 else if (dump_file)
1817 fprintf (dump_file, "Invariant %d moved without introducing a new "
1818 "temporary register\n", invno);
90b1c344 1819 reorder_insns (inv->insn, inv->insn, BB_END (preheader));
43d56ad7 1820 df_recompute_luids (preheader);
90b1c344 1821
82fa5f8a
L
1822 /* If there is a REG_EQUAL note on the insn we just moved, and the
1823 insn is in a basic block that is not always executed or the note
1824 contains something for which we don't know the invariant status,
1825 the note may no longer be valid after we move the insn. Note that
1826 uses in REG_EQUAL notes are taken into account in the computation
1827 of invariants, so it is safe to retain the note even if it contains
1828 register references for which we know the invariant status. */
1829 if ((note = find_reg_note (inv->insn, REG_EQUAL, NULL_RTX))
1830 && (!inv->always_executed
1831 || !check_maybe_invariant (XEXP (note, 0))))
90b1c344 1832 remove_note (inv->insn, note);
b644b211
SB
1833 }
1834 else
1835 {
ba946209
ZD
1836 if (!move_invariant_reg (loop, repr->invno))
1837 goto fail;
1052bd54 1838 reg = repr->reg;
1833192f 1839 regno = repr->orig_regno;
43ba743c
EB
1840 if (!replace_uses (inv, reg, false))
1841 goto fail;
1052bd54 1842 set = single_set (inv->insn);
4d779342
DB
1843 emit_insn_after (gen_move_insn (SET_DEST (set), reg), inv->insn);
1844 delete_insn (inv->insn);
b644b211 1845 }
5e962776 1846
1052bd54 1847 inv->reg = reg;
1833192f 1848 inv->orig_regno = regno;
1052bd54 1849
ba946209
ZD
1850 return true;
1851
1852fail:
1853 /* If we failed, clear move flag, so that we do not try to move inv
1854 again. */
1855 if (dump_file)
1856 fprintf (dump_file, "Failed to move invariant %d\n", invno);
1857 inv->move = false;
1858 inv->reg = NULL_RTX;
1833192f 1859 inv->orig_regno = -1;
6fb5fa3c 1860
ba946209 1861 return false;
5e962776
ZD
1862}
1863
1864/* Move selected invariant out of the LOOP. Newly created regs are marked
cb20f7e8 1865 in TEMPORARY_REGS. */
5e962776
ZD
1866
1867static void
99b1c316 1868move_invariants (class loop *loop)
5e962776
ZD
1869{
1870 struct invariant *inv;
1871 unsigned i;
1872
9771b263 1873 FOR_EACH_VEC_ELT (invariants, i, inv)
1052bd54 1874 move_invariant_reg (loop, i);
1833192f
VM
1875 if (flag_ira_loop_pressure && resize_reg_info ())
1876 {
9771b263 1877 FOR_EACH_VEC_ELT (invariants, i, inv)
1833192f
VM
1878 if (inv->reg != NULL_RTX)
1879 {
1880 if (inv->orig_regno >= 0)
1881 setup_reg_classes (REGNO (inv->reg),
1882 reg_preferred_class (inv->orig_regno),
1883 reg_alternate_class (inv->orig_regno),
1756cb66 1884 reg_allocno_class (inv->orig_regno));
1833192f
VM
1885 else
1886 setup_reg_classes (REGNO (inv->reg),
1887 GENERAL_REGS, NO_REGS, GENERAL_REGS);
1888 }
1889 }
6541e97d
RS
1890 /* Remove the DF_UD_CHAIN problem added in find_defs before rescanning,
1891 to save a bit of compile time. */
1892 df_remove_problem (df_chain);
1893 df_process_deferred_rescans ();
5e962776
ZD
1894}
1895
1896/* Initializes invariant motion data. */
1897
1898static void
1899init_inv_motion_data (void)
1900{
1901 actual_stamp = 1;
1902
9771b263 1903 invariants.create (100);
5e962776
ZD
1904}
1905
cb20f7e8 1906/* Frees the data allocated by invariant motion. */
5e962776
ZD
1907
1908static void
cb20f7e8 1909free_inv_motion_data (void)
5e962776
ZD
1910{
1911 unsigned i;
1912 struct def *def;
1913 struct invariant *inv;
1914
6fb5fa3c
DB
1915 check_invariant_table_size ();
1916 for (i = 0; i < DF_DEFS_TABLE_SIZE (); i++)
5e962776 1917 {
6fb5fa3c
DB
1918 inv = invariant_table[i];
1919 if (inv)
1920 {
1921 def = inv->def;
1922 gcc_assert (def != NULL);
b8698a0f 1923
6fb5fa3c
DB
1924 free_use_list (def->uses);
1925 free (def);
1926 invariant_table[i] = NULL;
1927 }
5e962776
ZD
1928 }
1929
9771b263 1930 FOR_EACH_VEC_ELT (invariants, i, inv)
5e962776 1931 {
8bdbfff5 1932 BITMAP_FREE (inv->depends_on);
5e962776
ZD
1933 free (inv);
1934 }
9771b263 1935 invariants.release ();
5e962776
ZD
1936}
1937
cb20f7e8 1938/* Move the invariants out of the LOOP. */
5e962776
ZD
1939
1940static void
99b1c316 1941move_single_loop_invariants (class loop *loop)
5e962776
ZD
1942{
1943 init_inv_motion_data ();
1944
cb20f7e8 1945 find_invariants (loop);
bec922f0
SL
1946 find_invariants_to_move (optimize_loop_for_speed_p (loop),
1947 LOOP_DATA (loop)->has_call);
cb20f7e8 1948 move_invariants (loop);
5e962776 1949
cb20f7e8 1950 free_inv_motion_data ();
5e962776
ZD
1951}
1952
1953/* Releases the auxiliary data for LOOP. */
1954
1955static void
99b1c316 1956free_loop_data (class loop *loop)
5e962776 1957{
99b1c316 1958 class loop_data *data = LOOP_DATA (loop);
eb149440
RG
1959 if (!data)
1960 return;
5e962776 1961
1833192f
VM
1962 bitmap_clear (&LOOP_DATA (loop)->regs_ref);
1963 bitmap_clear (&LOOP_DATA (loop)->regs_live);
5e962776
ZD
1964 free (data);
1965 loop->aux = NULL;
1966}
1967
1833192f
VM
1968\f
1969
1970/* Registers currently living. */
1971static bitmap_head curr_regs_live;
1972
1756cb66 1973/* Current reg pressure for each pressure class. */
1833192f
VM
1974static int curr_reg_pressure[N_REG_CLASSES];
1975
1976/* Record all regs that are set in any one insn. Communication from
1977 mark_reg_{store,clobber} and global_conflicts. Asm can refer to
1978 all hard-registers. */
1979static rtx regs_set[(FIRST_PSEUDO_REGISTER > MAX_RECOG_OPERANDS
1980 ? FIRST_PSEUDO_REGISTER : MAX_RECOG_OPERANDS) * 2];
1981/* Number of regs stored in the previous array. */
1982static int n_regs_set;
1983
1756cb66 1984/* Return pressure class and number of needed hard registers (through
b8698a0f 1985 *NREGS) of register REGNO. */
1833192f 1986static enum reg_class
1756cb66 1987get_regno_pressure_class (int regno, int *nregs)
1833192f
VM
1988{
1989 if (regno >= FIRST_PSEUDO_REGISTER)
1990 {
1756cb66 1991 enum reg_class pressure_class;
1833192f 1992
1756cb66
VM
1993 pressure_class = reg_allocno_class (regno);
1994 pressure_class = ira_pressure_class_translate[pressure_class];
1995 *nregs
1996 = ira_reg_class_max_nregs[pressure_class][PSEUDO_REGNO_MODE (regno)];
1997 return pressure_class;
1833192f
VM
1998 }
1999 else if (! TEST_HARD_REG_BIT (ira_no_alloc_regs, regno)
2000 && ! TEST_HARD_REG_BIT (eliminable_regset, regno))
2001 {
2002 *nregs = 1;
1756cb66 2003 return ira_pressure_class_translate[REGNO_REG_CLASS (regno)];
1833192f
VM
2004 }
2005 else
2006 {
2007 *nregs = 0;
2008 return NO_REGS;
2009 }
2010}
2011
2012/* Increase (if INCR_P) or decrease current register pressure for
2013 register REGNO. */
2014static void
2015change_pressure (int regno, bool incr_p)
2016{
2017 int nregs;
1756cb66 2018 enum reg_class pressure_class;
1833192f 2019
1756cb66 2020 pressure_class = get_regno_pressure_class (regno, &nregs);
1833192f 2021 if (! incr_p)
1756cb66 2022 curr_reg_pressure[pressure_class] -= nregs;
1833192f
VM
2023 else
2024 {
1756cb66
VM
2025 curr_reg_pressure[pressure_class] += nregs;
2026 if (LOOP_DATA (curr_loop)->max_reg_pressure[pressure_class]
2027 < curr_reg_pressure[pressure_class])
2028 LOOP_DATA (curr_loop)->max_reg_pressure[pressure_class]
2029 = curr_reg_pressure[pressure_class];
1833192f
VM
2030 }
2031}
2032
2033/* Mark REGNO birth. */
2034static void
2035mark_regno_live (int regno)
2036{
99b1c316 2037 class loop *loop;
1833192f
VM
2038
2039 for (loop = curr_loop;
2040 loop != current_loops->tree_root;
2041 loop = loop_outer (loop))
2042 bitmap_set_bit (&LOOP_DATA (loop)->regs_live, regno);
fcaa4ca4 2043 if (!bitmap_set_bit (&curr_regs_live, regno))
1833192f 2044 return;
1833192f
VM
2045 change_pressure (regno, true);
2046}
2047
2048/* Mark REGNO death. */
2049static void
2050mark_regno_death (int regno)
2051{
fcaa4ca4 2052 if (! bitmap_clear_bit (&curr_regs_live, regno))
1833192f 2053 return;
1833192f
VM
2054 change_pressure (regno, false);
2055}
2056
2057/* Mark setting register REG. */
2058static void
2059mark_reg_store (rtx reg, const_rtx setter ATTRIBUTE_UNUSED,
2060 void *data ATTRIBUTE_UNUSED)
2061{
1833192f
VM
2062 if (GET_CODE (reg) == SUBREG)
2063 reg = SUBREG_REG (reg);
2064
2065 if (! REG_P (reg))
2066 return;
2067
2068 regs_set[n_regs_set++] = reg;
2069
53d1bae9
RS
2070 unsigned int end_regno = END_REGNO (reg);
2071 for (unsigned int regno = REGNO (reg); regno < end_regno; ++regno)
1833192f 2072 mark_regno_live (regno);
1833192f
VM
2073}
2074
2075/* Mark clobbering register REG. */
2076static void
2077mark_reg_clobber (rtx reg, const_rtx setter, void *data)
2078{
2079 if (GET_CODE (setter) == CLOBBER)
2080 mark_reg_store (reg, setter, data);
2081}
2082
2083/* Mark register REG death. */
2084static void
2085mark_reg_death (rtx reg)
2086{
53d1bae9
RS
2087 unsigned int end_regno = END_REGNO (reg);
2088 for (unsigned int regno = REGNO (reg); regno < end_regno; ++regno)
1833192f 2089 mark_regno_death (regno);
1833192f
VM
2090}
2091
2092/* Mark occurrence of registers in X for the current loop. */
2093static void
2094mark_ref_regs (rtx x)
2095{
2096 RTX_CODE code;
2097 int i;
2098 const char *fmt;
2099
2100 if (!x)
2101 return;
2102
2103 code = GET_CODE (x);
2104 if (code == REG)
2105 {
99b1c316 2106 class loop *loop;
b8698a0f 2107
1833192f
VM
2108 for (loop = curr_loop;
2109 loop != current_loops->tree_root;
2110 loop = loop_outer (loop))
2111 bitmap_set_bit (&LOOP_DATA (loop)->regs_ref, REGNO (x));
2112 return;
2113 }
2114
2115 fmt = GET_RTX_FORMAT (code);
2116 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2117 if (fmt[i] == 'e')
2118 mark_ref_regs (XEXP (x, i));
2119 else if (fmt[i] == 'E')
2120 {
2121 int j;
b8698a0f 2122
1833192f
VM
2123 for (j = 0; j < XVECLEN (x, i); j++)
2124 mark_ref_regs (XVECEXP (x, i, j));
2125 }
2126}
2127
2128/* Calculate register pressure in the loops. */
2129static void
2130calculate_loop_reg_pressure (void)
2131{
2132 int i;
2133 unsigned int j;
2134 bitmap_iterator bi;
2135 basic_block bb;
89bfd6f5
DM
2136 rtx_insn *insn;
2137 rtx link;
99b1c316 2138 class loop *loop, *parent;
1833192f 2139
f0bd40b1 2140 FOR_EACH_LOOP (loop, 0)
1833192f
VM
2141 if (loop->aux == NULL)
2142 {
99b1c316 2143 loop->aux = xcalloc (1, sizeof (class loop_data));
1833192f
VM
2144 bitmap_initialize (&LOOP_DATA (loop)->regs_ref, &reg_obstack);
2145 bitmap_initialize (&LOOP_DATA (loop)->regs_live, &reg_obstack);
2146 }
8d49e7ef 2147 ira_setup_eliminable_regset ();
1833192f 2148 bitmap_initialize (&curr_regs_live, &reg_obstack);
11cd3bed 2149 FOR_EACH_BB_FN (bb, cfun)
1833192f
VM
2150 {
2151 curr_loop = bb->loop_father;
2152 if (curr_loop == current_loops->tree_root)
2153 continue;
2154
2155 for (loop = curr_loop;
2156 loop != current_loops->tree_root;
2157 loop = loop_outer (loop))
2158 bitmap_ior_into (&LOOP_DATA (loop)->regs_live, DF_LR_IN (bb));
2159
2160 bitmap_copy (&curr_regs_live, DF_LR_IN (bb));
1756cb66
VM
2161 for (i = 0; i < ira_pressure_classes_num; i++)
2162 curr_reg_pressure[ira_pressure_classes[i]] = 0;
1833192f
VM
2163 EXECUTE_IF_SET_IN_BITMAP (&curr_regs_live, 0, j, bi)
2164 change_pressure (j, true);
2165
2166 FOR_BB_INSNS (bb, insn)
2167 {
dd8c071d 2168 if (! NONDEBUG_INSN_P (insn))
1833192f
VM
2169 continue;
2170
2171 mark_ref_regs (PATTERN (insn));
2172 n_regs_set = 0;
e8448ba5 2173 note_stores (insn, mark_reg_clobber, NULL);
b8698a0f 2174
1833192f 2175 /* Mark any registers dead after INSN as dead now. */
b8698a0f 2176
1833192f
VM
2177 for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
2178 if (REG_NOTE_KIND (link) == REG_DEAD)
2179 mark_reg_death (XEXP (link, 0));
b8698a0f 2180
1833192f
VM
2181 /* Mark any registers set in INSN as live,
2182 and mark them as conflicting with all other live regs.
2183 Clobbers are processed again, so they conflict with
2184 the registers that are set. */
b8698a0f 2185
e8448ba5 2186 note_stores (insn, mark_reg_store, NULL);
b8698a0f 2187
760edf20
TS
2188 if (AUTO_INC_DEC)
2189 for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
2190 if (REG_NOTE_KIND (link) == REG_INC)
2191 mark_reg_store (XEXP (link, 0), NULL_RTX, NULL);
2192
1833192f
VM
2193 while (n_regs_set-- > 0)
2194 {
2195 rtx note = find_regno_note (insn, REG_UNUSED,
2196 REGNO (regs_set[n_regs_set]));
2197 if (! note)
2198 continue;
b8698a0f 2199
1833192f
VM
2200 mark_reg_death (XEXP (note, 0));
2201 }
2202 }
2203 }
c0d105c6 2204 bitmap_release (&curr_regs_live);
1833192f
VM
2205 if (flag_ira_region == IRA_REGION_MIXED
2206 || flag_ira_region == IRA_REGION_ALL)
f0bd40b1 2207 FOR_EACH_LOOP (loop, 0)
1833192f
VM
2208 {
2209 EXECUTE_IF_SET_IN_BITMAP (&LOOP_DATA (loop)->regs_live, 0, j, bi)
2210 if (! bitmap_bit_p (&LOOP_DATA (loop)->regs_ref, j))
2211 {
1756cb66 2212 enum reg_class pressure_class;
1833192f
VM
2213 int nregs;
2214
1756cb66
VM
2215 pressure_class = get_regno_pressure_class (j, &nregs);
2216 LOOP_DATA (loop)->max_reg_pressure[pressure_class] -= nregs;
1833192f
VM
2217 }
2218 }
2219 if (dump_file == NULL)
2220 return;
f0bd40b1 2221 FOR_EACH_LOOP (loop, 0)
1833192f
VM
2222 {
2223 parent = loop_outer (loop);
2224 fprintf (dump_file, "\n Loop %d (parent %d, header bb%d, depth %d)\n",
2225 loop->num, (parent == NULL ? -1 : parent->num),
2226 loop->header->index, loop_depth (loop));
2227 fprintf (dump_file, "\n ref. regnos:");
2228 EXECUTE_IF_SET_IN_BITMAP (&LOOP_DATA (loop)->regs_ref, 0, j, bi)
2229 fprintf (dump_file, " %d", j);
2230 fprintf (dump_file, "\n live regnos:");
2231 EXECUTE_IF_SET_IN_BITMAP (&LOOP_DATA (loop)->regs_live, 0, j, bi)
2232 fprintf (dump_file, " %d", j);
2233 fprintf (dump_file, "\n Pressure:");
1756cb66 2234 for (i = 0; (int) i < ira_pressure_classes_num; i++)
1833192f 2235 {
1756cb66 2236 enum reg_class pressure_class;
b8698a0f 2237
1756cb66
VM
2238 pressure_class = ira_pressure_classes[i];
2239 if (LOOP_DATA (loop)->max_reg_pressure[pressure_class] == 0)
1833192f 2240 continue;
1756cb66
VM
2241 fprintf (dump_file, " %s=%d", reg_class_names[pressure_class],
2242 LOOP_DATA (loop)->max_reg_pressure[pressure_class]);
1833192f
VM
2243 }
2244 fprintf (dump_file, "\n");
2245 }
2246}
2247
2248\f
2249
d73be268 2250/* Move the invariants out of the loops. */
5e962776
ZD
2251
2252void
d73be268 2253move_loop_invariants (void)
5e962776 2254{
99b1c316 2255 class loop *loop;
cb20f7e8 2256
6541e97d
RS
2257 if (optimize == 1)
2258 df_live_add_problem ();
2259 /* ??? This is a hack. We should only need to call df_live_set_all_dirty
2260 for optimize == 1, but can_move_invariant_reg relies on DF_INSN_LUID
2261 being up-to-date. That isn't always true (even after df_analyze)
2262 because df_process_deferred_rescans doesn't necessarily cause
2263 blocks to be rescanned. */
2264 df_live_set_all_dirty ();
1833192f
VM
2265 if (flag_ira_loop_pressure)
2266 {
2267 df_analyze ();
1756cb66 2268 regstat_init_n_sets_and_refs ();
b11f0116 2269 ira_set_pseudo_classes (true, dump_file);
1833192f 2270 calculate_loop_reg_pressure ();
1756cb66 2271 regstat_free_n_sets_and_refs ();
1833192f 2272 }
6fb5fa3c 2273 df_set_flags (DF_EQ_NOTES + DF_DEFER_INSN_RESCAN);
5e962776 2274 /* Process the loops, innermost first. */
f0bd40b1 2275 FOR_EACH_LOOP (loop, LI_FROM_INNERMOST)
5e962776 2276 {
1833192f 2277 curr_loop = loop;
fc2d7303
RB
2278 /* move_single_loop_invariants for very large loops is time consuming
2279 and might need a lot of memory. For -O1 only do loop invariant
2280 motion for very small loops. */
028d4092 2281 unsigned max_bbs = param_loop_invariant_max_bbs_in_loop;
fc2d7303
RB
2282 if (optimize < 2)
2283 max_bbs /= 10;
2284 if (loop->num_nodes <= max_bbs)
b1fb9f56 2285 move_single_loop_invariants (loop);
5e962776
ZD
2286 }
2287
f0bd40b1 2288 FOR_EACH_LOOP (loop, 0)
42fd6772
ZD
2289 {
2290 free_loop_data (loop);
2291 }
5e962776 2292
1833192f
VM
2293 if (flag_ira_loop_pressure)
2294 /* There is no sense to keep this info because it was most
2295 probably outdated by subsequent passes. */
2296 free_reg_info ();
6fb5fa3c
DB
2297 free (invariant_table);
2298 invariant_table = NULL;
2299 invariant_table_size = 0;
a7f4ccb1 2300
6541e97d
RS
2301 if (optimize == 1)
2302 df_remove_problem (df_live);
2303
b2b29377 2304 checking_verify_flow_info ();
5e962776 2305}