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c6a6cdaa 1/* Code for RTL register eliminations.
fbd26352 2 Copyright (C) 2010-2019 Free Software Foundation, Inc.
c6a6cdaa 3 Contributed by Vladimir Makarov <vmakarov@redhat.com>.
4
5This file is part of GCC.
6
7GCC is free software; you can redistribute it and/or modify it under
8the terms of the GNU General Public License as published by the Free
9Software Foundation; either version 3, or (at your option) any later
10version.
11
12GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13WARRANTY; without even the implied warranty of MERCHANTABILITY or
14FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
15for more details.
16
17You should have received a copy of the GNU General Public License
18along with GCC; see the file COPYING3. If not see
19<http://www.gnu.org/licenses/>. */
20
21/* Eliminable registers (like a soft argument or frame pointer) are
22 widely used in RTL. These eliminable registers should be replaced
23 by real hard registers (like the stack pointer or hard frame
24 pointer) plus some offset. The offsets usually change whenever the
25 stack is expanded. We know the final offsets only at the very end
26 of LRA.
27
28 Within LRA, we usually keep the RTL in such a state that the
29 eliminable registers can be replaced by just the corresponding hard
30 register (without any offset). To achieve this we should add the
31 initial elimination offset at the beginning of LRA and update the
32 offsets whenever the stack is expanded. We need to do this before
33 every constraint pass because the choice of offset often affects
34 whether a particular address or memory constraint is satisfied.
35
36 We keep RTL code at most time in such state that the virtual
37 registers can be changed by just the corresponding hard registers
38 (with zero offsets) and we have the right RTL code. To achieve this
39 we should add initial offset at the beginning of LRA work and update
40 offsets after each stack expanding. But actually we update virtual
41 registers to the same virtual registers + corresponding offsets
42 before every constraint pass because it affects constraint
43 satisfaction (e.g. an address displacement became too big for some
44 target).
45
46 The final change of eliminable registers to the corresponding hard
47 registers are done at the very end of LRA when there were no change
48 in offsets anymore:
49
50 fp + 42 => sp + 42
51
52*/
53
54#include "config.h"
55#include "system.h"
56#include "coretypes.h"
9ef16211 57#include "backend.h"
7c29e30e 58#include "target.h"
c6a6cdaa 59#include "rtl.h"
7c29e30e 60#include "tree.h"
9ef16211 61#include "df.h"
ad7b10a2 62#include "memmodel.h"
c6a6cdaa 63#include "tm_p.h"
7c29e30e 64#include "optabs.h"
c6a6cdaa 65#include "regs.h"
7c29e30e 66#include "ira.h"
c6a6cdaa 67#include "recog.h"
68#include "output.h"
c6a6cdaa 69#include "rtl-error.h"
70#include "lra-int.h"
71
72/* This structure is used to record information about hard register
73 eliminations. */
251317e4 74class lra_elim_table
c6a6cdaa 75{
251317e4 76public:
c6a6cdaa 77 /* Hard register number to be eliminated. */
1a8f8886 78 int from;
c6a6cdaa 79 /* Hard register number used as replacement. */
1a8f8886 80 int to;
c6a6cdaa 81 /* Difference between values of the two hard registers above on
82 previous iteration. */
a4686d0a 83 poly_int64 previous_offset;
c6a6cdaa 84 /* Difference between the values on the current iteration. */
a4686d0a 85 poly_int64 offset;
c6a6cdaa 86 /* Nonzero if this elimination can be done. */
1a8f8886 87 bool can_eliminate;
c6a6cdaa 88 /* CAN_ELIMINATE since the last check. */
89 bool prev_can_eliminate;
90 /* REG rtx for the register to be eliminated. We cannot simply
91 compare the number since we might then spuriously replace a hard
92 register corresponding to a pseudo assigned to the reg to be
93 eliminated. */
1a8f8886 94 rtx from_rtx;
c6a6cdaa 95 /* REG rtx for the replacement. */
1a8f8886 96 rtx to_rtx;
c6a6cdaa 97};
98
99/* The elimination table. Each array entry describes one possible way
100 of eliminating a register in favor of another. If there is more
101 than one way of eliminating a particular register, the most
102 preferred should be specified first. */
2e966e2a 103static class lra_elim_table *reg_eliminate = 0;
c6a6cdaa 104
105/* This is an intermediate structure to initialize the table. It has
106 exactly the members provided by ELIMINABLE_REGS. */
107static const struct elim_table_1
108{
109 const int from;
110 const int to;
111} reg_eliminate_1[] =
112
c6a6cdaa 113 ELIMINABLE_REGS;
c6a6cdaa 114
115#define NUM_ELIMINABLE_REGS ARRAY_SIZE (reg_eliminate_1)
116
117/* Print info about elimination table to file F. */
118static void
119print_elim_table (FILE *f)
120{
2e966e2a 121 class lra_elim_table *ep;
c6a6cdaa 122
123 for (ep = reg_eliminate; ep < &reg_eliminate[NUM_ELIMINABLE_REGS]; ep++)
a4686d0a 124 {
125 fprintf (f, "%s eliminate %d to %d (offset=",
126 ep->can_eliminate ? "Can" : "Can't", ep->from, ep->to);
127 print_dec (ep->offset, f);
128 fprintf (f, ", prev_offset=");
129 print_dec (ep->previous_offset, f);
130 fprintf (f, ")\n");
131 }
c6a6cdaa 132}
133
134/* Print info about elimination table to stderr. */
135void
136lra_debug_elim_table (void)
137{
138 print_elim_table (stderr);
139}
140
141/* Setup possibility of elimination in elimination table element EP to
142 VALUE. Setup FRAME_POINTER_NEEDED if elimination from frame
143 pointer to stack pointer is not possible anymore. */
144static void
2e966e2a 145setup_can_eliminate (class lra_elim_table *ep, bool value)
c6a6cdaa 146{
147 ep->can_eliminate = ep->prev_can_eliminate = value;
148 if (! value
149 && ep->from == FRAME_POINTER_REGNUM && ep->to == STACK_POINTER_REGNUM)
150 frame_pointer_needed = 1;
8f911f37 151 if (!frame_pointer_needed)
152 REGNO_POINTER_ALIGN (HARD_FRAME_POINTER_REGNUM) = 0;
c6a6cdaa 153}
154
155/* Map: eliminable "from" register -> its current elimination,
156 or NULL if none. The elimination table may contain more than
157 one elimination for the same hard register, but this map specifies
158 the one that we are currently using. */
2e966e2a 159static class lra_elim_table *elimination_map[FIRST_PSEUDO_REGISTER];
c6a6cdaa 160
161/* When an eliminable hard register becomes not eliminable, we use the
162 following special structure to restore original offsets for the
163 register. */
2e966e2a 164static class lra_elim_table self_elim_table;
c6a6cdaa 165
166/* Offsets should be used to restore original offsets for eliminable
167 hard register which just became not eliminable. Zero,
168 otherwise. */
a4686d0a 169static poly_int64_pod self_elim_offsets[FIRST_PSEUDO_REGISTER];
c6a6cdaa 170
171/* Map: hard regno -> RTL presentation. RTL presentations of all
172 potentially eliminable hard registers are stored in the map. */
173static rtx eliminable_reg_rtx[FIRST_PSEUDO_REGISTER];
174
175/* Set up ELIMINATION_MAP of the currently used eliminations. */
176static void
177setup_elimination_map (void)
178{
179 int i;
2e966e2a 180 class lra_elim_table *ep;
c6a6cdaa 181
182 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
183 elimination_map[i] = NULL;
184 for (ep = reg_eliminate; ep < &reg_eliminate[NUM_ELIMINABLE_REGS]; ep++)
185 if (ep->can_eliminate && elimination_map[ep->from] == NULL)
186 elimination_map[ep->from] = ep;
187}
188
189\f
190
191/* Compute the sum of X and Y, making canonicalizations assumed in an
192 address, namely: sum constant integers, surround the sum of two
193 constants with a CONST, put the constant as the second operand, and
194 group the constant on the outermost sum.
195
196 This routine assumes both inputs are already in canonical form. */
197static rtx
198form_sum (rtx x, rtx y)
199{
3754d046 200 machine_mode mode = GET_MODE (x);
a4686d0a 201 poly_int64 offset;
c6a6cdaa 202
203 if (mode == VOIDmode)
204 mode = GET_MODE (y);
205
206 if (mode == VOIDmode)
207 mode = Pmode;
208
a4686d0a 209 if (poly_int_rtx_p (x, &offset))
210 return plus_constant (mode, y, offset);
211 else if (poly_int_rtx_p (y, &offset))
212 return plus_constant (mode, x, offset);
c6a6cdaa 213 else if (CONSTANT_P (x))
c586a5e3 214 std::swap (x, y);
c6a6cdaa 215
216 if (GET_CODE (x) == PLUS && CONSTANT_P (XEXP (x, 1)))
217 return form_sum (XEXP (x, 0), form_sum (XEXP (x, 1), y));
218
219 /* Note that if the operands of Y are specified in the opposite
220 order in the recursive calls below, infinite recursion will
221 occur. */
222 if (GET_CODE (y) == PLUS && CONSTANT_P (XEXP (y, 1)))
223 return form_sum (form_sum (x, XEXP (y, 0)), XEXP (y, 1));
224
225 /* If both constant, encapsulate sum. Otherwise, just form sum. A
226 constant will have been placed second. */
227 if (CONSTANT_P (x) && CONSTANT_P (y))
228 {
229 if (GET_CODE (x) == CONST)
230 x = XEXP (x, 0);
231 if (GET_CODE (y) == CONST)
232 y = XEXP (y, 0);
233
234 return gen_rtx_CONST (VOIDmode, gen_rtx_PLUS (mode, x, y));
235 }
236
237 return gen_rtx_PLUS (mode, x, y);
238}
239
240/* Return the current substitution hard register of the elimination of
241 HARD_REGNO. If HARD_REGNO is not eliminable, return itself. */
242int
243lra_get_elimination_hard_regno (int hard_regno)
244{
2e966e2a 245 class lra_elim_table *ep;
c6a6cdaa 246
247 if (hard_regno < 0 || hard_regno >= FIRST_PSEUDO_REGISTER)
248 return hard_regno;
249 if ((ep = elimination_map[hard_regno]) == NULL)
250 return hard_regno;
251 return ep->to;
252}
253
254/* Return elimination which will be used for hard reg REG, NULL
255 otherwise. */
2e966e2a 256static class lra_elim_table *
c6a6cdaa 257get_elimination (rtx reg)
258{
259 int hard_regno;
2e966e2a 260 class lra_elim_table *ep;
c6a6cdaa 261
262 lra_assert (REG_P (reg));
263 if ((hard_regno = REGNO (reg)) < 0 || hard_regno >= FIRST_PSEUDO_REGISTER)
264 return NULL;
265 if ((ep = elimination_map[hard_regno]) != NULL)
266 return ep->from_rtx != reg ? NULL : ep;
a4686d0a 267 poly_int64 offset = self_elim_offsets[hard_regno];
268 if (known_eq (offset, 0))
c6a6cdaa 269 return NULL;
270 /* This is an iteration to restore offsets just after HARD_REGNO
271 stopped to be eliminable. */
272 self_elim_table.from = self_elim_table.to = hard_regno;
273 self_elim_table.from_rtx
274 = self_elim_table.to_rtx
275 = eliminable_reg_rtx[hard_regno];
276 lra_assert (self_elim_table.from_rtx != NULL);
277 self_elim_table.offset = offset;
278 return &self_elim_table;
279}
280
a9d58e30 281/* Transform (subreg (plus reg const)) to (plus (subreg reg) const)
282 when it is possible. Return X or the transformation result if the
283 transformation is done. */
284static rtx
285move_plus_up (rtx x)
286{
287 rtx subreg_reg;
582adad1 288 machine_mode x_mode, subreg_reg_mode;
a9d58e30 289
290 if (GET_CODE (x) != SUBREG || !subreg_lowpart_p (x))
291 return x;
292 subreg_reg = SUBREG_REG (x);
293 x_mode = GET_MODE (x);
294 subreg_reg_mode = GET_MODE (subreg_reg);
d0257d43 295 if (!paradoxical_subreg_p (x)
296 && GET_CODE (subreg_reg) == PLUS
44e09bc4 297 && CONSTANT_P (XEXP (subreg_reg, 1))
298 && GET_MODE_CLASS (x_mode) == MODE_INT
299 && GET_MODE_CLASS (subreg_reg_mode) == MODE_INT)
a4a87320 300 {
301 rtx cst = simplify_subreg (x_mode, XEXP (subreg_reg, 1), subreg_reg_mode,
302 subreg_lowpart_offset (x_mode,
303 subreg_reg_mode));
304 if (cst && CONSTANT_P (cst))
66feb54c 305 return gen_rtx_PLUS (x_mode, lowpart_subreg (x_mode,
306 XEXP (subreg_reg, 0),
a4a87320 307 subreg_reg_mode), cst);
308 }
a9d58e30 309 return x;
310}
311
c6a6cdaa 312/* Scan X and replace any eliminable registers (such as fp) with a
3b3a5e5f 313 replacement (such as sp) if SUBST_P, plus an offset. The offset is
c6a6cdaa 314 a change in the offset between the eliminable register and its
315 substitution if UPDATE_P, or the full offset if FULL_P, or
3b3a5e5f 316 otherwise zero. If FULL_P, we also use the SP offsets for
497ba60f 317 elimination to SP. If UPDATE_P, use UPDATE_SP_OFFSET for updating
99535fab 318 offsets of register elimnable to SP. If UPDATE_SP_OFFSET is
319 non-zero, don't use difference of the offset and the previous
320 offset.
c6a6cdaa 321
322 MEM_MODE is the mode of an enclosing MEM. We need this to know how
323 much to adjust a register for, e.g., PRE_DEC. Also, if we are
324 inside a MEM, we are allowed to replace a sum of a hard register
325 and the constant zero with the hard register, which we cannot do
326 outside a MEM. In addition, we need to record the fact that a
327 hard register is referenced outside a MEM.
328
3b3a5e5f 329 If we make full substitution to SP for non-null INSN, add the insn
330 sp offset. */
c6a6cdaa 331rtx
3754d046 332lra_eliminate_regs_1 (rtx_insn *insn, rtx x, machine_mode mem_mode,
497ba60f 333 bool subst_p, bool update_p,
a4686d0a 334 poly_int64 update_sp_offset, bool full_p)
c6a6cdaa 335{
336 enum rtx_code code = GET_CODE (x);
2e966e2a 337 class lra_elim_table *ep;
c6a6cdaa 338 rtx new_rtx;
339 int i, j;
340 const char *fmt;
341 int copied = 0;
342
99535fab 343 lra_assert (!update_p || !full_p);
a4686d0a 344 lra_assert (known_eq (update_sp_offset, 0)
345 || (!subst_p && update_p && !full_p));
c6a6cdaa 346 if (! current_function_decl)
347 return x;
348
349 switch (code)
350 {
351 CASE_CONST_ANY:
352 case CONST:
353 case SYMBOL_REF:
354 case CODE_LABEL:
355 case PC:
356 case CC0:
357 case ASM_INPUT:
358 case ADDR_VEC:
359 case ADDR_DIFF_VEC:
360 case RETURN:
361 return x;
362
363 case REG:
364 /* First handle the case where we encounter a bare hard register
365 that is eliminable. Replace it with a PLUS. */
366 if ((ep = get_elimination (x)) != NULL)
367 {
368 rtx to = subst_p ? ep->to_rtx : ep->from_rtx;
1a8f8886 369
a4686d0a 370 if (maybe_ne (update_sp_offset, 0))
99535fab 371 {
372 if (ep->to_rtx == stack_pointer_rtx)
373 return plus_constant (Pmode, to, update_sp_offset);
374 return to;
375 }
376 else if (update_p)
377 return plus_constant (Pmode, to, ep->offset - ep->previous_offset);
c6a6cdaa 378 else if (full_p)
3b3a5e5f 379 return plus_constant (Pmode, to,
380 ep->offset
381 - (insn != NULL_RTX
382 && ep->to_rtx == stack_pointer_rtx
383 ? lra_get_insn_recog_data (insn)->sp_offset
384 : 0));
c6a6cdaa 385 else
386 return to;
387 }
388 return x;
389
390 case PLUS:
391 /* If this is the sum of an eliminable register and a constant, rework
392 the sum. */
393 if (REG_P (XEXP (x, 0)) && CONSTANT_P (XEXP (x, 1)))
394 {
395 if ((ep = get_elimination (XEXP (x, 0))) != NULL)
396 {
a4686d0a 397 poly_int64 offset, curr_offset;
c6a6cdaa 398 rtx to = subst_p ? ep->to_rtx : ep->from_rtx;
1a8f8886 399
c6a6cdaa 400 if (! update_p && ! full_p)
401 return gen_rtx_PLUS (Pmode, to, XEXP (x, 1));
99535fab 402
a4686d0a 403 if (maybe_ne (update_sp_offset, 0))
99535fab 404 offset = ep->to_rtx == stack_pointer_rtx ? update_sp_offset : 0;
405 else
406 offset = (update_p
407 ? ep->offset - ep->previous_offset : ep->offset);
3b3a5e5f 408 if (full_p && insn != NULL_RTX && ep->to_rtx == stack_pointer_rtx)
409 offset -= lra_get_insn_recog_data (insn)->sp_offset;
a4686d0a 410 if (poly_int_rtx_p (XEXP (x, 1), &curr_offset)
411 && known_eq (curr_offset, -offset))
c6a6cdaa 412 return to;
413 else
414 return gen_rtx_PLUS (Pmode, to,
415 plus_constant (Pmode,
416 XEXP (x, 1), offset));
417 }
418
419 /* If the hard register is not eliminable, we are done since
420 the other operand is a constant. */
421 return x;
422 }
423
424 /* If this is part of an address, we want to bring any constant
425 to the outermost PLUS. We will do this by doing hard
426 register replacement in our operands and seeing if a constant
427 shows up in one of them.
428
429 Note that there is no risk of modifying the structure of the
430 insn, since we only get called for its operands, thus we are
431 either modifying the address inside a MEM, or something like
432 an address operand of a load-address insn. */
433
434 {
3b3a5e5f 435 rtx new0 = lra_eliminate_regs_1 (insn, XEXP (x, 0), mem_mode,
497ba60f 436 subst_p, update_p,
437 update_sp_offset, full_p);
3b3a5e5f 438 rtx new1 = lra_eliminate_regs_1 (insn, XEXP (x, 1), mem_mode,
497ba60f 439 subst_p, update_p,
440 update_sp_offset, full_p);
c6a6cdaa 441
a9d58e30 442 new0 = move_plus_up (new0);
443 new1 = move_plus_up (new1);
c6a6cdaa 444 if (new0 != XEXP (x, 0) || new1 != XEXP (x, 1))
445 return form_sum (new0, new1);
446 }
447 return x;
448
449 case MULT:
450 /* If this is the product of an eliminable hard register and a
451 constant, apply the distribute law and move the constant out
452 so that we have (plus (mult ..) ..). This is needed in order
453 to keep load-address insns valid. This case is pathological.
454 We ignore the possibility of overflow here. */
455 if (REG_P (XEXP (x, 0)) && CONST_INT_P (XEXP (x, 1))
456 && (ep = get_elimination (XEXP (x, 0))) != NULL)
457 {
458 rtx to = subst_p ? ep->to_rtx : ep->from_rtx;
1a8f8886 459
a4686d0a 460 if (maybe_ne (update_sp_offset, 0))
99535fab 461 {
462 if (ep->to_rtx == stack_pointer_rtx)
463 return plus_constant (Pmode,
464 gen_rtx_MULT (Pmode, to, XEXP (x, 1)),
465 update_sp_offset * INTVAL (XEXP (x, 1)));
466 return gen_rtx_MULT (Pmode, to, XEXP (x, 1));
467 }
468 else if (update_p)
497ba60f 469 return plus_constant (Pmode,
470 gen_rtx_MULT (Pmode, to, XEXP (x, 1)),
99535fab 471 (ep->offset - ep->previous_offset)
497ba60f 472 * INTVAL (XEXP (x, 1)));
c6a6cdaa 473 else if (full_p)
3b3a5e5f 474 {
a4686d0a 475 poly_int64 offset = ep->offset;
3b3a5e5f 476
477 if (insn != NULL_RTX && ep->to_rtx == stack_pointer_rtx)
478 offset -= lra_get_insn_recog_data (insn)->sp_offset;
479 return
480 plus_constant (Pmode,
481 gen_rtx_MULT (Pmode, to, XEXP (x, 1)),
482 offset * INTVAL (XEXP (x, 1)));
483 }
c6a6cdaa 484 else
485 return gen_rtx_MULT (Pmode, to, XEXP (x, 1));
486 }
1a8f8886 487
e3533433 488 /* fall through */
c6a6cdaa 489
490 case CALL:
491 case COMPARE:
492 /* See comments before PLUS about handling MINUS. */
493 case MINUS:
494 case DIV: case UDIV:
495 case MOD: case UMOD:
496 case AND: case IOR: case XOR:
497 case ROTATERT: case ROTATE:
498 case ASHIFTRT: case LSHIFTRT: case ASHIFT:
499 case NE: case EQ:
500 case GE: case GT: case GEU: case GTU:
501 case LE: case LT: case LEU: case LTU:
502 {
3b3a5e5f 503 rtx new0 = lra_eliminate_regs_1 (insn, XEXP (x, 0), mem_mode,
497ba60f 504 subst_p, update_p,
505 update_sp_offset, full_p);
c6a6cdaa 506 rtx new1 = XEXP (x, 1)
3b3a5e5f 507 ? lra_eliminate_regs_1 (insn, XEXP (x, 1), mem_mode,
497ba60f 508 subst_p, update_p,
509 update_sp_offset, full_p) : 0;
c6a6cdaa 510
511 if (new0 != XEXP (x, 0) || new1 != XEXP (x, 1))
512 return gen_rtx_fmt_ee (code, GET_MODE (x), new0, new1);
513 }
514 return x;
515
516 case EXPR_LIST:
517 /* If we have something in XEXP (x, 0), the usual case,
518 eliminate it. */
519 if (XEXP (x, 0))
520 {
3b3a5e5f 521 new_rtx = lra_eliminate_regs_1 (insn, XEXP (x, 0), mem_mode,
497ba60f 522 subst_p, update_p,
523 update_sp_offset, full_p);
c6a6cdaa 524 if (new_rtx != XEXP (x, 0))
525 {
526 /* If this is a REG_DEAD note, it is not valid anymore.
527 Using the eliminated version could result in creating a
528 REG_DEAD note for the stack or frame pointer. */
529 if (REG_NOTE_KIND (x) == REG_DEAD)
530 return (XEXP (x, 1)
3b3a5e5f 531 ? lra_eliminate_regs_1 (insn, XEXP (x, 1), mem_mode,
497ba60f 532 subst_p, update_p,
533 update_sp_offset, full_p)
c6a6cdaa 534 : NULL_RTX);
535
536 x = alloc_reg_note (REG_NOTE_KIND (x), new_rtx, XEXP (x, 1));
537 }
538 }
539
e3533433 540 /* fall through */
c6a6cdaa 541
542 case INSN_LIST:
b3578ae7 543 case INT_LIST:
c6a6cdaa 544 /* Now do eliminations in the rest of the chain. If this was
545 an EXPR_LIST, this might result in allocating more memory than is
546 strictly needed, but it simplifies the code. */
547 if (XEXP (x, 1))
548 {
3b3a5e5f 549 new_rtx = lra_eliminate_regs_1 (insn, XEXP (x, 1), mem_mode,
497ba60f 550 subst_p, update_p,
551 update_sp_offset, full_p);
c6a6cdaa 552 if (new_rtx != XEXP (x, 1))
553 return
554 gen_rtx_fmt_ee (GET_CODE (x), GET_MODE (x),
555 XEXP (x, 0), new_rtx);
556 }
557 return x;
558
559 case PRE_INC:
560 case POST_INC:
561 case PRE_DEC:
562 case POST_DEC:
563 /* We do not support elimination of a register that is modified.
564 elimination_effects has already make sure that this does not
565 happen. */
566 return x;
567
568 case PRE_MODIFY:
569 case POST_MODIFY:
570 /* We do not support elimination of a hard register that is
571 modified. LRA has already make sure that this does not
572 happen. The only remaining case we need to consider here is
573 that the increment value may be an eliminable register. */
574 if (GET_CODE (XEXP (x, 1)) == PLUS
575 && XEXP (XEXP (x, 1), 0) == XEXP (x, 0))
576 {
3b3a5e5f 577 rtx new_rtx = lra_eliminate_regs_1 (insn, XEXP (XEXP (x, 1), 1),
497ba60f 578 mem_mode, subst_p, update_p,
579 update_sp_offset, full_p);
c6a6cdaa 580
581 if (new_rtx != XEXP (XEXP (x, 1), 1))
582 return gen_rtx_fmt_ee (code, GET_MODE (x), XEXP (x, 0),
583 gen_rtx_PLUS (GET_MODE (x),
584 XEXP (x, 0), new_rtx));
585 }
586 return x;
587
588 case STRICT_LOW_PART:
589 case NEG: case NOT:
590 case SIGN_EXTEND: case ZERO_EXTEND:
591 case TRUNCATE: case FLOAT_EXTEND: case FLOAT_TRUNCATE:
592 case FLOAT: case FIX:
593 case UNSIGNED_FIX: case UNSIGNED_FLOAT:
594 case ABS:
595 case SQRT:
596 case FFS:
597 case CLZ:
598 case CTZ:
599 case POPCOUNT:
600 case PARITY:
601 case BSWAP:
3b3a5e5f 602 new_rtx = lra_eliminate_regs_1 (insn, XEXP (x, 0), mem_mode,
497ba60f 603 subst_p, update_p,
604 update_sp_offset, full_p);
c6a6cdaa 605 if (new_rtx != XEXP (x, 0))
606 return gen_rtx_fmt_e (code, GET_MODE (x), new_rtx);
607 return x;
608
609 case SUBREG:
3b3a5e5f 610 new_rtx = lra_eliminate_regs_1 (insn, SUBREG_REG (x), mem_mode,
497ba60f 611 subst_p, update_p,
612 update_sp_offset, full_p);
c6a6cdaa 613
614 if (new_rtx != SUBREG_REG (x))
615 {
d0257d43 616 if (MEM_P (new_rtx) && !paradoxical_subreg_p (x))
c6a6cdaa 617 {
618 SUBREG_REG (x) = new_rtx;
619 alter_subreg (&x, false);
620 return x;
621 }
10258db7 622 else if (! subst_p)
623 {
624 /* LRA can transform subregs itself. So don't call
625 simplify_gen_subreg until LRA transformations are
626 finished. Function simplify_gen_subreg can do
627 non-trivial transformations (like truncation) which
628 might make LRA work to fail. */
629 SUBREG_REG (x) = new_rtx;
630 return x;
631 }
c6a6cdaa 632 else
afe4bda4 633 return simplify_gen_subreg (GET_MODE (x), new_rtx,
634 GET_MODE (new_rtx), SUBREG_BYTE (x));
c6a6cdaa 635 }
636
637 return x;
638
639 case MEM:
640 /* Our only special processing is to pass the mode of the MEM to our
641 recursive call and copy the flags. While we are here, handle this
642 case more efficiently. */
643 return
644 replace_equiv_address_nv
645 (x,
3b3a5e5f 646 lra_eliminate_regs_1 (insn, XEXP (x, 0), GET_MODE (x),
497ba60f 647 subst_p, update_p, update_sp_offset, full_p));
c6a6cdaa 648
649 case USE:
650 /* Handle insn_list USE that a call to a pure function may generate. */
3b3a5e5f 651 new_rtx = lra_eliminate_regs_1 (insn, XEXP (x, 0), VOIDmode,
497ba60f 652 subst_p, update_p, update_sp_offset, full_p);
c6a6cdaa 653 if (new_rtx != XEXP (x, 0))
654 return gen_rtx_USE (GET_MODE (x), new_rtx);
655 return x;
656
657 case CLOBBER:
0823eb36 658 case CLOBBER_HIGH:
c6a6cdaa 659 case SET:
660 gcc_unreachable ();
661
662 default:
663 break;
664 }
665
666 /* Process each of our operands recursively. If any have changed, make a
667 copy of the rtx. */
668 fmt = GET_RTX_FORMAT (code);
669 for (i = 0; i < GET_RTX_LENGTH (code); i++, fmt++)
670 {
671 if (*fmt == 'e')
672 {
3b3a5e5f 673 new_rtx = lra_eliminate_regs_1 (insn, XEXP (x, i), mem_mode,
497ba60f 674 subst_p, update_p,
675 update_sp_offset, full_p);
c6a6cdaa 676 if (new_rtx != XEXP (x, i) && ! copied)
677 {
678 x = shallow_copy_rtx (x);
679 copied = 1;
680 }
681 XEXP (x, i) = new_rtx;
682 }
683 else if (*fmt == 'E')
684 {
685 int copied_vec = 0;
686 for (j = 0; j < XVECLEN (x, i); j++)
687 {
3b3a5e5f 688 new_rtx = lra_eliminate_regs_1 (insn, XVECEXP (x, i, j), mem_mode,
497ba60f 689 subst_p, update_p,
690 update_sp_offset, full_p);
c6a6cdaa 691 if (new_rtx != XVECEXP (x, i, j) && ! copied_vec)
692 {
693 rtvec new_v = gen_rtvec_v (XVECLEN (x, i),
694 XVEC (x, i)->elem);
695 if (! copied)
696 {
697 x = shallow_copy_rtx (x);
698 copied = 1;
699 }
700 XVEC (x, i) = new_v;
701 copied_vec = 1;
702 }
703 XVECEXP (x, i, j) = new_rtx;
704 }
705 }
706 }
707
708 return x;
709}
710
711/* This function is used externally in subsequent passes of GCC. It
712 always does a full elimination of X. */
713rtx
3754d046 714lra_eliminate_regs (rtx x, machine_mode mem_mode,
c6a6cdaa 715 rtx insn ATTRIBUTE_UNUSED)
716{
497ba60f 717 return lra_eliminate_regs_1 (NULL, x, mem_mode, true, false, 0, true);
c6a6cdaa 718}
719
3b3a5e5f 720/* Stack pointer offset before the current insn relative to one at the
721 func start. RTL insns can change SP explicitly. We keep the
722 changes from one insn to another through this variable. */
a4686d0a 723static poly_int64 curr_sp_change;
3b3a5e5f 724
c6a6cdaa 725/* Scan rtx X for references to elimination source or target registers
726 in contexts that would prevent the elimination from happening.
727 Update the table of eliminables to reflect the changed state.
728 MEM_MODE is the mode of an enclosing MEM rtx, or VOIDmode if not
729 within a MEM. */
730static void
3754d046 731mark_not_eliminable (rtx x, machine_mode mem_mode)
c6a6cdaa 732{
733 enum rtx_code code = GET_CODE (x);
2e966e2a 734 class lra_elim_table *ep;
c6a6cdaa 735 int i, j;
736 const char *fmt;
a4686d0a 737 poly_int64 offset = 0;
c6a6cdaa 738
739 switch (code)
740 {
741 case PRE_INC:
742 case POST_INC:
743 case PRE_DEC:
744 case POST_DEC:
745 case POST_MODIFY:
746 case PRE_MODIFY:
3b3a5e5f 747 if (XEXP (x, 0) == stack_pointer_rtx
748 && ((code != PRE_MODIFY && code != POST_MODIFY)
749 || (GET_CODE (XEXP (x, 1)) == PLUS
750 && XEXP (x, 0) == XEXP (XEXP (x, 1), 0)
a4686d0a 751 && poly_int_rtx_p (XEXP (XEXP (x, 1), 1), &offset))))
3b3a5e5f 752 {
adbaa93b 753 poly_int64 size = GET_MODE_SIZE (mem_mode);
3b3a5e5f 754
755#ifdef PUSH_ROUNDING
756 /* If more bytes than MEM_MODE are pushed, account for
757 them. */
758 size = PUSH_ROUNDING (size);
759#endif
760 if (code == PRE_DEC || code == POST_DEC)
761 curr_sp_change -= size;
762 else if (code == PRE_INC || code == POST_INC)
763 curr_sp_change += size;
764 else if (code == PRE_MODIFY || code == POST_MODIFY)
a4686d0a 765 curr_sp_change += offset;
3b3a5e5f 766 }
767 else if (REG_P (XEXP (x, 0))
768 && REGNO (XEXP (x, 0)) >= FIRST_PSEUDO_REGISTER)
769 {
770 /* If we modify the source of an elimination rule, disable
771 it. Do the same if it is the destination and not the
772 hard frame register. */
773 for (ep = reg_eliminate;
774 ep < &reg_eliminate[NUM_ELIMINABLE_REGS];
c6a6cdaa 775 ep++)
3b3a5e5f 776 if (ep->from_rtx == XEXP (x, 0)
777 || (ep->to_rtx == XEXP (x, 0)
778 && ep->to_rtx != hard_frame_pointer_rtx))
779 setup_can_eliminate (ep, false);
780 }
c6a6cdaa 781 return;
782
783 case USE:
784 if (REG_P (XEXP (x, 0)) && REGNO (XEXP (x, 0)) < FIRST_PSEUDO_REGISTER)
785 /* If using a hard register that is the source of an eliminate
786 we still think can be performed, note it cannot be
787 performed since we don't know how this hard register is
788 used. */
789 for (ep = reg_eliminate;
790 ep < &reg_eliminate[NUM_ELIMINABLE_REGS];
791 ep++)
792 if (ep->from_rtx == XEXP (x, 0)
793 && ep->to_rtx != hard_frame_pointer_rtx)
794 setup_can_eliminate (ep, false);
795 return;
796
797 case CLOBBER:
798 if (REG_P (XEXP (x, 0)) && REGNO (XEXP (x, 0)) < FIRST_PSEUDO_REGISTER)
799 /* If clobbering a hard register that is the replacement
800 register for an elimination we still think can be
801 performed, note that it cannot be performed. Otherwise, we
802 need not be concerned about it. */
803 for (ep = reg_eliminate;
804 ep < &reg_eliminate[NUM_ELIMINABLE_REGS];
805 ep++)
806 if (ep->to_rtx == XEXP (x, 0)
807 && ep->to_rtx != hard_frame_pointer_rtx)
808 setup_can_eliminate (ep, false);
809 return;
810
0823eb36 811 case CLOBBER_HIGH:
812 gcc_assert (REG_P (XEXP (x, 0)));
813 gcc_assert (REGNO (XEXP (x, 0)) < FIRST_PSEUDO_REGISTER);
814 for (ep = reg_eliminate;
815 ep < &reg_eliminate[NUM_ELIMINABLE_REGS];
816 ep++)
817 if (reg_is_clobbered_by_clobber_high (ep->to_rtx, XEXP (x, 0)))
818 setup_can_eliminate (ep, false);
819 return;
820
c6a6cdaa 821 case SET:
3b3a5e5f 822 if (SET_DEST (x) == stack_pointer_rtx
823 && GET_CODE (SET_SRC (x)) == PLUS
824 && XEXP (SET_SRC (x), 0) == SET_DEST (x)
a4686d0a 825 && poly_int_rtx_p (XEXP (SET_SRC (x), 1), &offset))
3b3a5e5f 826 {
a4686d0a 827 curr_sp_change += offset;
3b3a5e5f 828 return;
829 }
830 if (! REG_P (SET_DEST (x))
831 || REGNO (SET_DEST (x)) >= FIRST_PSEUDO_REGISTER)
832 mark_not_eliminable (SET_DEST (x), mem_mode);
833 else
c6a6cdaa 834 {
835 /* See if this is setting the replacement hard register for
836 an elimination.
3b3a5e5f 837
c6a6cdaa 838 If DEST is the hard frame pointer, we do nothing because
839 we assume that all assignments to the frame pointer are
840 for non-local gotos and are being done at a time when
841 they are valid and do not disturb anything else. Some
842 machines want to eliminate a fake argument pointer (or
843 even a fake frame pointer) with either the real frame
844 pointer or the stack pointer. Assignments to the hard
845 frame pointer must not prevent this elimination. */
c6a6cdaa 846 for (ep = reg_eliminate;
847 ep < &reg_eliminate[NUM_ELIMINABLE_REGS];
848 ep++)
849 if (ep->to_rtx == SET_DEST (x)
3b3a5e5f 850 && SET_DEST (x) != hard_frame_pointer_rtx)
c6a6cdaa 851 setup_can_eliminate (ep, false);
852 }
3b3a5e5f 853
854 mark_not_eliminable (SET_SRC (x), mem_mode);
855 return;
c6a6cdaa 856
3b3a5e5f 857 case MEM:
858 /* Our only special processing is to pass the mode of the MEM to
859 our recursive call. */
860 mark_not_eliminable (XEXP (x, 0), GET_MODE (x));
c6a6cdaa 861 return;
862
863 default:
864 break;
865 }
866
867 fmt = GET_RTX_FORMAT (code);
868 for (i = 0; i < GET_RTX_LENGTH (code); i++, fmt++)
869 {
870 if (*fmt == 'e')
3b3a5e5f 871 mark_not_eliminable (XEXP (x, i), mem_mode);
c6a6cdaa 872 else if (*fmt == 'E')
873 for (j = 0; j < XVECLEN (x, i); j++)
3b3a5e5f 874 mark_not_eliminable (XVECEXP (x, i, j), mem_mode);
c6a6cdaa 875 }
876}
877
878\f
879
880/* Scan INSN and eliminate all eliminable hard registers in it.
881
882 If REPLACE_P is true, do the replacement destructively. Also
883 delete the insn as dead it if it is setting an eliminable register.
884
885 If REPLACE_P is false, just update the offsets while keeping the
3b3a5e5f 886 base register the same. If FIRST_P, use the sp offset for
99535fab 887 elimination to sp. Otherwise, use UPDATE_SP_OFFSET for this. If
888 UPDATE_SP_OFFSET is non-zero, don't use difference of the offset
889 and the previous offset. Attach the note about used elimination
890 for insns setting frame pointer to update elimination easy (without
891 parsing already generated elimination insns to find offset
892 previously used) in future. */
c6a6cdaa 893
497ba60f 894void
895eliminate_regs_in_insn (rtx_insn *insn, bool replace_p, bool first_p,
a4686d0a 896 poly_int64 update_sp_offset)
c6a6cdaa 897{
898 int icode = recog_memoized (insn);
899 rtx old_set = single_set (insn);
900 bool validate_p;
901 int i;
902 rtx substed_operand[MAX_RECOG_OPERANDS];
903 rtx orig_operand[MAX_RECOG_OPERANDS];
2e966e2a 904 class lra_elim_table *ep;
c6a6cdaa 905 rtx plus_src, plus_cst_src;
906 lra_insn_recog_data_t id;
907 struct lra_static_insn_data *static_id;
908
909 if (icode < 0 && asm_noperands (PATTERN (insn)) < 0 && ! DEBUG_INSN_P (insn))
910 {
91f71fa3 911 lra_assert (GET_CODE (PATTERN (insn)) == USE
c6a6cdaa 912 || GET_CODE (PATTERN (insn)) == CLOBBER
c6a6cdaa 913 || GET_CODE (PATTERN (insn)) == ASM_INPUT);
914 return;
915 }
916
c6a6cdaa 917 /* We allow one special case which happens to work on all machines we
918 currently support: a single set with the source or a REG_EQUAL
919 note being a PLUS of an eliminable register and a constant. */
920 plus_src = plus_cst_src = 0;
a4686d0a 921 poly_int64 offset = 0;
c6a6cdaa 922 if (old_set && REG_P (SET_DEST (old_set)))
923 {
924 if (GET_CODE (SET_SRC (old_set)) == PLUS)
925 plus_src = SET_SRC (old_set);
926 /* First see if the source is of the form (plus (...) CST). */
a4686d0a 927 if (plus_src && poly_int_rtx_p (XEXP (plus_src, 1), &offset))
c6a6cdaa 928 plus_cst_src = plus_src;
929 /* Check that the first operand of the PLUS is a hard reg or
930 the lowpart subreg of one. */
931 if (plus_cst_src)
932 {
933 rtx reg = XEXP (plus_cst_src, 0);
934
935 if (GET_CODE (reg) == SUBREG && subreg_lowpart_p (reg))
936 reg = SUBREG_REG (reg);
937
938 if (!REG_P (reg) || REGNO (reg) >= FIRST_PSEUDO_REGISTER)
939 plus_cst_src = 0;
940 }
941 }
942 if (plus_cst_src)
943 {
944 rtx reg = XEXP (plus_cst_src, 0);
c6a6cdaa 945
946 if (GET_CODE (reg) == SUBREG)
947 reg = SUBREG_REG (reg);
948
949 if (REG_P (reg) && (ep = get_elimination (reg)) != NULL)
950 {
951 rtx to_rtx = replace_p ? ep->to_rtx : ep->from_rtx;
1a8f8886 952
c6a6cdaa 953 if (! replace_p)
954 {
a4686d0a 955 if (known_eq (update_sp_offset, 0))
99535fab 956 offset += (ep->offset - ep->previous_offset);
497ba60f 957 if (ep->to_rtx == stack_pointer_rtx)
958 {
959 if (first_p)
960 offset -= lra_get_insn_recog_data (insn)->sp_offset;
961 else
962 offset += update_sp_offset;
963 }
c6a6cdaa 964 offset = trunc_int_for_mode (offset, GET_MODE (plus_cst_src));
965 }
1a8f8886 966
c6a6cdaa 967 if (GET_CODE (XEXP (plus_cst_src, 0)) == SUBREG)
968 to_rtx = gen_lowpart (GET_MODE (XEXP (plus_cst_src, 0)), to_rtx);
969 /* If we have a nonzero offset, and the source is already a
970 simple REG, the following transformation would increase
971 the cost of the insn by replacing a simple REG with (plus
972 (reg sp) CST). So try only when we already had a PLUS
973 before. */
a4686d0a 974 if (known_eq (offset, 0) || plus_src)
c6a6cdaa 975 {
976 rtx new_src = plus_constant (GET_MODE (to_rtx), to_rtx, offset);
1a8f8886 977
c6a6cdaa 978 old_set = single_set (insn);
979
980 /* First see if this insn remains valid when we make the
981 change. If not, try to replace the whole pattern
982 with a simple set (this may help if the original insn
983 was a PARALLEL that was only recognized as single_set
984 due to REG_UNUSED notes). If this isn't valid
985 either, keep the INSN_CODE the same and let the
986 constraint pass fix it up. */
987 if (! validate_change (insn, &SET_SRC (old_set), new_src, 0))
988 {
d1f9b275 989 rtx new_pat = gen_rtx_SET (SET_DEST (old_set), new_src);
1a8f8886 990
c6a6cdaa 991 if (! validate_change (insn, &PATTERN (insn), new_pat, 0))
992 SET_SRC (old_set) = new_src;
993 }
994 lra_update_insn_recog_data (insn);
995 /* This can't have an effect on elimination offsets, so skip
996 right to the end. */
997 return;
998 }
999 }
1000 }
1001
1002 /* Eliminate all eliminable registers occurring in operands that
1003 can be handled by the constraint pass. */
1004 id = lra_get_insn_recog_data (insn);
1005 static_id = id->insn_static_data;
1006 validate_p = false;
1007 for (i = 0; i < static_id->n_operands; i++)
1008 {
1009 orig_operand[i] = *id->operand_loc[i];
1010 substed_operand[i] = *id->operand_loc[i];
1011
1012 /* For an asm statement, every operand is eliminable. */
1013 if (icode < 0 || insn_data[icode].operand[i].eliminable)
1014 {
1015 /* Check for setting a hard register that we know about. */
1016 if (static_id->operand[i].type != OP_IN
1017 && REG_P (orig_operand[i]))
1018 {
1019 /* If we are assigning to a hard register that can be
1020 eliminated, it must be as part of a PARALLEL, since
f4d3c071 1021 the code above handles single SETs. This reg cannot
c6a6cdaa 1022 be longer eliminated -- it is forced by
1023 mark_not_eliminable. */
1024 for (ep = reg_eliminate;
1025 ep < &reg_eliminate[NUM_ELIMINABLE_REGS];
1026 ep++)
1027 lra_assert (ep->from_rtx != orig_operand[i]
1028 || ! ep->can_eliminate);
1029 }
1030
1031 /* Companion to the above plus substitution, we can allow
1032 invariants as the source of a plain move. */
1033 substed_operand[i]
3b3a5e5f 1034 = lra_eliminate_regs_1 (insn, *id->operand_loc[i], VOIDmode,
1035 replace_p, ! replace_p && ! first_p,
497ba60f 1036 update_sp_offset, first_p);
c6a6cdaa 1037 if (substed_operand[i] != orig_operand[i])
1038 validate_p = true;
1039 }
1040 }
1041
ea99c7a1 1042 if (! validate_p)
1043 return;
1044
c6a6cdaa 1045 /* Substitute the operands; the new values are in the substed_operand
1046 array. */
1047 for (i = 0; i < static_id->n_operands; i++)
1048 *id->operand_loc[i] = substed_operand[i];
1049 for (i = 0; i < static_id->n_dups; i++)
1050 *id->dup_loc[i] = substed_operand[(int) static_id->dup_num[i]];
1051
ea99c7a1 1052 /* If we had a move insn but now we don't, re-recognize it.
1053 This will cause spurious re-recognition if the old move had a
1054 PARALLEL since the new one still will, but we can't call
1055 single_set without having put new body into the insn and the
1056 re-recognition won't hurt in this rare case. */
d8ae7f77 1057 lra_update_insn_recog_data (insn);
c6a6cdaa 1058}
1059
1060/* Spill pseudos which are assigned to hard registers in SET. Add
1061 affected insns for processing in the subsequent constraint
1062 pass. */
1063static void
1064spill_pseudos (HARD_REG_SET set)
1065{
1066 int i;
1067 bitmap_head to_process;
7f836b57 1068 rtx_insn *insn;
c6a6cdaa 1069
1070 if (hard_reg_set_empty_p (set))
1071 return;
1072 if (lra_dump_file != NULL)
1073 {
1074 fprintf (lra_dump_file, " Spilling non-eliminable hard regs:");
1075 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1076 if (TEST_HARD_REG_BIT (set, i))
1077 fprintf (lra_dump_file, " %d", i);
1078 fprintf (lra_dump_file, "\n");
1079 }
1080 bitmap_initialize (&to_process, &reg_obstack);
1081 for (i = FIRST_PSEUDO_REGISTER; i < max_reg_num (); i++)
1082 if (lra_reg_info[i].nrefs != 0 && reg_renumber[i] >= 0
1083 && overlaps_hard_reg_set_p (set,
1084 PSEUDO_REGNO_MODE (i), reg_renumber[i]))
1085 {
1086 if (lra_dump_file != NULL)
1087 fprintf (lra_dump_file, " Spilling r%d(%d)\n",
1088 i, reg_renumber[i]);
1089 reg_renumber[i] = -1;
1090 bitmap_ior_into (&to_process, &lra_reg_info[i].insn_bitmap);
1091 }
1092 IOR_HARD_REG_SET (lra_no_alloc_regs, set);
1093 for (insn = get_insns (); insn != NULL_RTX; insn = NEXT_INSN (insn))
1094 if (bitmap_bit_p (&to_process, INSN_UID (insn)))
1095 {
1096 lra_push_insn (insn);
71d47a14 1097 lra_set_used_insn_alternative (insn, LRA_UNKNOWN_ALT);
c6a6cdaa 1098 }
1099 bitmap_clear (&to_process);
1100}
1101
1102/* Update all offsets and possibility for elimination on eliminable
3b3a5e5f 1103 registers. Spill pseudos assigned to registers which are
c6a6cdaa 1104 uneliminable, update LRA_NO_ALLOC_REGS and ELIMINABLE_REG_SET. Add
1105 insns to INSNS_WITH_CHANGED_OFFSETS containing eliminable hard
c625778b 1106 registers whose offsets should be changed. Return true if any
1107 elimination offset changed. */
1108static bool
c6a6cdaa 1109update_reg_eliminate (bitmap insns_with_changed_offsets)
1110{
c625778b 1111 bool prev, result;
2e966e2a 1112 class lra_elim_table *ep, *ep1;
c6a6cdaa 1113 HARD_REG_SET temp_hard_reg_set;
1114
5e9a50c1 1115 targetm.compute_frame_layout ();
1116
c6a6cdaa 1117 /* Clear self elimination offsets. */
1118 for (ep = reg_eliminate; ep < &reg_eliminate[NUM_ELIMINABLE_REGS]; ep++)
1119 self_elim_offsets[ep->from] = 0;
c6a6cdaa 1120 for (ep = reg_eliminate; ep < &reg_eliminate[NUM_ELIMINABLE_REGS]; ep++)
1121 {
1122 /* If it is a currently used elimination: update the previous
1123 offset. */
1124 if (elimination_map[ep->from] == ep)
1125 ep->previous_offset = ep->offset;
1126
1127 prev = ep->prev_can_eliminate;
1128 setup_can_eliminate (ep, targetm.can_eliminate (ep->from, ep->to));
1129 if (ep->can_eliminate && ! prev)
1130 {
1131 /* It is possible that not eliminable register becomes
1132 eliminable because we took other reasons into account to
1133 set up eliminable regs in the initial set up. Just
1134 ignore new eliminable registers. */
1135 setup_can_eliminate (ep, false);
1136 continue;
1137 }
1138 if (ep->can_eliminate != prev && elimination_map[ep->from] == ep)
1139 {
1140 /* We cannot use this elimination anymore -- find another
1141 one. */
1142 if (lra_dump_file != NULL)
1143 fprintf (lra_dump_file,
1144 " Elimination %d to %d is not possible anymore\n",
1145 ep->from, ep->to);
3b3a5e5f 1146 /* If after processing RTL we decides that SP can be used as
f4d3c071 1147 a result of elimination, it cannot be changed. */
0a644bf8 1148 gcc_assert ((ep->to_rtx != stack_pointer_rtx)
1149 || (ep->from < FIRST_PSEUDO_REGISTER
1150 && fixed_regs [ep->from]));
c6a6cdaa 1151 /* Mark that is not eliminable anymore. */
1152 elimination_map[ep->from] = NULL;
1153 for (ep1 = ep + 1; ep1 < &reg_eliminate[NUM_ELIMINABLE_REGS]; ep1++)
1154 if (ep1->can_eliminate && ep1->from == ep->from)
1155 break;
1156 if (ep1 < &reg_eliminate[NUM_ELIMINABLE_REGS])
1157 {
1158 if (lra_dump_file != NULL)
1159 fprintf (lra_dump_file, " Using elimination %d to %d now\n",
1160 ep1->from, ep1->to);
a4686d0a 1161 lra_assert (known_eq (ep1->previous_offset, 0));
c6a6cdaa 1162 ep1->previous_offset = ep->offset;
1163 }
1164 else
1165 {
1166 /* There is no elimination anymore just use the hard
1167 register `from' itself. Setup self elimination
1168 offset to restore the original offset values. */
1169 if (lra_dump_file != NULL)
1170 fprintf (lra_dump_file, " %d is not eliminable at all\n",
1171 ep->from);
1172 self_elim_offsets[ep->from] = -ep->offset;
a4686d0a 1173 if (maybe_ne (ep->offset, 0))
c6a6cdaa 1174 bitmap_ior_into (insns_with_changed_offsets,
1175 &lra_reg_info[ep->from].insn_bitmap);
1176 }
1177 }
1178
c6a6cdaa 1179 INITIAL_ELIMINATION_OFFSET (ep->from, ep->to, ep->offset);
c6a6cdaa 1180 }
c6a6cdaa 1181 setup_elimination_map ();
c625778b 1182 result = false;
3b3a5e5f 1183 CLEAR_HARD_REG_SET (temp_hard_reg_set);
c6a6cdaa 1184 for (ep = reg_eliminate; ep < &reg_eliminate[NUM_ELIMINABLE_REGS]; ep++)
3b3a5e5f 1185 if (elimination_map[ep->from] == NULL)
fc67b24f 1186 add_to_hard_reg_set (&temp_hard_reg_set, Pmode, ep->from);
3b3a5e5f 1187 else if (elimination_map[ep->from] == ep)
a1064490 1188 {
3b3a5e5f 1189 /* Prevent the hard register into which we eliminate from
1190 the usage for pseudos. */
1191 if (ep->from != ep->to)
fc67b24f 1192 add_to_hard_reg_set (&temp_hard_reg_set, Pmode, ep->to);
a4686d0a 1193 if (maybe_ne (ep->previous_offset, ep->offset))
3b3a5e5f 1194 {
1195 bitmap_ior_into (insns_with_changed_offsets,
1196 &lra_reg_info[ep->from].insn_bitmap);
1197
1198 /* Update offset when the eliminate offset have been
1199 changed. */
1200 lra_update_reg_val_offset (lra_reg_info[ep->from].val,
1201 ep->offset - ep->previous_offset);
1202 result = true;
1203 }
a1064490 1204 }
3b3a5e5f 1205 IOR_HARD_REG_SET (lra_no_alloc_regs, temp_hard_reg_set);
1206 AND_COMPL_HARD_REG_SET (eliminable_regset, temp_hard_reg_set);
1207 spill_pseudos (temp_hard_reg_set);
c625778b 1208 return result;
c6a6cdaa 1209}
1210
1211/* Initialize the table of hard registers to eliminate.
1212 Pre-condition: global flag frame_pointer_needed has been set before
1213 calling this function. */
1214static void
1215init_elim_table (void)
1216{
2e966e2a 1217 class lra_elim_table *ep;
1dd7fae5 1218 bool value_p;
c6a6cdaa 1219 const struct elim_table_1 *ep1;
c6a6cdaa 1220
1221 if (!reg_eliminate)
2e966e2a 1222 reg_eliminate = XCNEWVEC (class lra_elim_table, NUM_ELIMINABLE_REGS);
c6a6cdaa 1223
1224 memset (self_elim_offsets, 0, sizeof (self_elim_offsets));
1225 /* Initiate member values which will be never changed. */
1226 self_elim_table.can_eliminate = self_elim_table.prev_can_eliminate = true;
1227 self_elim_table.previous_offset = 0;
acbc95ac 1228
c6a6cdaa 1229 for (ep = reg_eliminate, ep1 = reg_eliminate_1;
1230 ep < &reg_eliminate[NUM_ELIMINABLE_REGS]; ep++, ep1++)
1231 {
1232 ep->offset = ep->previous_offset = 0;
1233 ep->from = ep1->from;
1234 ep->to = ep1->to;
1235 value_p = (targetm.can_eliminate (ep->from, ep->to)
1236 && ! (ep->to == STACK_POINTER_REGNUM
1a8f8886 1237 && frame_pointer_needed
c6a6cdaa 1238 && (! SUPPORTS_STACK_ALIGNMENT
1239 || ! stack_realign_fp)));
1240 setup_can_eliminate (ep, value_p);
1241 }
c6a6cdaa 1242
3b3a5e5f 1243 /* Build the FROM and TO REG rtx's. Note that code in gen_rtx_REG
1244 will cause, e.g., gen_rtx_REG (Pmode, STACK_POINTER_REGNUM) to
1245 equal stack_pointer_rtx. We depend on this. Threfore we switch
1246 off that we are in LRA temporarily. */
1247 lra_in_progress = 0;
c6a6cdaa 1248 for (ep = reg_eliminate; ep < &reg_eliminate[NUM_ELIMINABLE_REGS]; ep++)
1249 {
1250 ep->from_rtx = gen_rtx_REG (Pmode, ep->from);
1251 ep->to_rtx = gen_rtx_REG (Pmode, ep->to);
1252 eliminable_reg_rtx[ep->from] = ep->from_rtx;
1253 }
3b3a5e5f 1254 lra_in_progress = 1;
c6a6cdaa 1255}
1256
3b3a5e5f 1257/* Function for initialization of elimination once per function. It
1258 sets up sp offset for each insn. */
1259static void
1260init_elimination (void)
c6a6cdaa 1261{
3b3a5e5f 1262 bool stop_to_sp_elimination_p;
c6a6cdaa 1263 basic_block bb;
7f836b57 1264 rtx_insn *insn;
2e966e2a 1265 class lra_elim_table *ep;
c6a6cdaa 1266
1267 init_elim_table ();
fc00614f 1268 FOR_EACH_BB_FN (bb, cfun)
3b3a5e5f 1269 {
1270 curr_sp_change = 0;
1271 stop_to_sp_elimination_p = false;
1272 FOR_BB_INSNS (bb, insn)
1273 if (INSN_P (insn))
1274 {
1275 lra_get_insn_recog_data (insn)->sp_offset = curr_sp_change;
1276 if (NONDEBUG_INSN_P (insn))
1277 {
1278 mark_not_eliminable (PATTERN (insn), VOIDmode);
a4686d0a 1279 if (maybe_ne (curr_sp_change, 0)
3b3a5e5f 1280 && find_reg_note (insn, REG_LABEL_OPERAND, NULL_RTX))
1281 stop_to_sp_elimination_p = true;
1282 }
1283 }
1284 if (! frame_pointer_needed
a4686d0a 1285 && (maybe_ne (curr_sp_change, 0) || stop_to_sp_elimination_p)
3b3a5e5f 1286 && bb->succs && bb->succs->length () != 0)
1287 for (ep = reg_eliminate; ep < &reg_eliminate[NUM_ELIMINABLE_REGS]; ep++)
1288 if (ep->to == STACK_POINTER_REGNUM)
1289 setup_can_eliminate (ep, false);
1290 }
c6a6cdaa 1291 setup_elimination_map ();
1292}
1293
1294/* Eliminate hard reg given by its location LOC. */
1295void
1296lra_eliminate_reg_if_possible (rtx *loc)
1297{
1298 int regno;
2e966e2a 1299 class lra_elim_table *ep;
c6a6cdaa 1300
1301 lra_assert (REG_P (*loc));
1302 if ((regno = REGNO (*loc)) >= FIRST_PSEUDO_REGISTER
1303 || ! TEST_HARD_REG_BIT (lra_no_alloc_regs, regno))
1304 return;
1305 if ((ep = get_elimination (*loc)) != NULL)
1306 *loc = ep->to_rtx;
1307}
1308
3b3a5e5f 1309/* Do (final if FINAL_P or first if FIRST_P) elimination in INSN. Add
1310 the insn for subsequent processing in the constraint pass, update
1311 the insn info. */
c6a6cdaa 1312static void
7f836b57 1313process_insn_for_elimination (rtx_insn *insn, bool final_p, bool first_p)
c6a6cdaa 1314{
497ba60f 1315 eliminate_regs_in_insn (insn, final_p, first_p, 0);
c6a6cdaa 1316 if (! final_p)
1317 {
1318 /* Check that insn changed its code. This is a case when a move
1319 insn becomes an add insn and we do not want to process the
1320 insn as a move anymore. */
1321 int icode = recog (PATTERN (insn), insn, 0);
1322
1323 if (icode >= 0 && icode != INSN_CODE (insn))
1324 {
1325 INSN_CODE (insn) = icode;
1326 lra_update_insn_recog_data (insn);
1327 }
1328 lra_update_insn_regno_info (insn);
1329 lra_push_insn (insn);
71d47a14 1330 lra_set_used_insn_alternative (insn, LRA_UNKNOWN_ALT);
c6a6cdaa 1331 }
1332}
1333
1334/* Entry function to do final elimination if FINAL_P or to update
3b3a5e5f 1335 elimination register offsets (FIRST_P if we are doing it the first
1336 time). */
c6a6cdaa 1337void
3b3a5e5f 1338lra_eliminate (bool final_p, bool first_p)
c6a6cdaa 1339{
c6a6cdaa 1340 unsigned int uid;
c6a6cdaa 1341 bitmap_head insns_with_changed_offsets;
1342 bitmap_iterator bi;
2e966e2a 1343 class lra_elim_table *ep;
3b3a5e5f 1344
1345 gcc_assert (! final_p || ! first_p);
c6a6cdaa 1346
1347 timevar_push (TV_LRA_ELIMINATE);
1348
3b3a5e5f 1349 if (first_p)
1350 init_elimination ();
1351
c6a6cdaa 1352 bitmap_initialize (&insns_with_changed_offsets, &reg_obstack);
1353 if (final_p)
1354 {
382ecba7 1355 if (flag_checking)
1356 {
1357 update_reg_eliminate (&insns_with_changed_offsets);
1358 gcc_assert (bitmap_empty_p (&insns_with_changed_offsets));
1359 }
c6a6cdaa 1360 /* We change eliminable hard registers in insns so we should do
1361 this for all insns containing any eliminable hard
1362 register. */
1363 for (ep = reg_eliminate; ep < &reg_eliminate[NUM_ELIMINABLE_REGS]; ep++)
1364 if (elimination_map[ep->from] != NULL)
1365 bitmap_ior_into (&insns_with_changed_offsets,
1366 &lra_reg_info[ep->from].insn_bitmap);
1367 }
c625778b 1368 else if (! update_reg_eliminate (&insns_with_changed_offsets))
1369 goto lra_eliminate_done;
c6a6cdaa 1370 if (lra_dump_file != NULL)
1371 {
1372 fprintf (lra_dump_file, "New elimination table:\n");
1373 print_elim_table (lra_dump_file);
1374 }
c6a6cdaa 1375 EXECUTE_IF_SET_IN_BITMAP (&insns_with_changed_offsets, 0, uid, bi)
2b1732ad 1376 /* A dead insn can be deleted in process_insn_for_elimination. */
1377 if (lra_insn_recog_data[uid] != NULL)
3b3a5e5f 1378 process_insn_for_elimination (lra_insn_recog_data[uid]->insn,
1379 final_p, first_p);
c6a6cdaa 1380 bitmap_clear (&insns_with_changed_offsets);
1381
1382lra_eliminate_done:
1383 timevar_pop (TV_LRA_ELIMINATE);
1384}