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b4ead7d4 BS |
1 | /* Instruction scheduling pass. |
2 | Copyright (C) 1992, 1993, 1994, 1995, 1996, 1997, 1998, | |
7b25b076 | 3 | 1999, 2000, 2001, 2002 Free Software Foundation, Inc. |
b4ead7d4 BS |
4 | Contributed by Michael Tiemann (tiemann@cygnus.com) Enhanced by, |
5 | and currently maintained by, Jim Wilson (wilson@cygnus.com) | |
6 | ||
1322177d | 7 | This file is part of GCC. |
b4ead7d4 | 8 | |
1322177d LB |
9 | GCC is free software; you can redistribute it and/or modify it under |
10 | the terms of the GNU General Public License as published by the Free | |
11 | Software Foundation; either version 2, or (at your option) any later | |
12 | version. | |
b4ead7d4 | 13 | |
1322177d LB |
14 | GCC is distributed in the hope that it will be useful, but WITHOUT ANY |
15 | WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
b4ead7d4 BS |
16 | FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License |
17 | for more details. | |
18 | ||
19 | You should have received a copy of the GNU General Public License | |
47a1bd82 NC |
20 | along with GCC; see the file COPYING. If not, write to the Free |
21 | Software Foundation, 59 Temple Place - Suite 330, Boston, MA | |
b4ead7d4 BS |
22 | 02111-1307, USA. */ |
23 | ||
24 | /* This pass implements list scheduling within basic blocks. It is | |
25 | run twice: (1) after flow analysis, but before register allocation, | |
26 | and (2) after register allocation. | |
27 | ||
28 | The first run performs interblock scheduling, moving insns between | |
29 | different blocks in the same "region", and the second runs only | |
30 | basic block scheduling. | |
31 | ||
32 | Interblock motions performed are useful motions and speculative | |
33 | motions, including speculative loads. Motions requiring code | |
34 | duplication are not supported. The identification of motion type | |
35 | and the check for validity of speculative motions requires | |
36 | construction and analysis of the function's control flow graph. | |
37 | ||
38 | The main entry point for this pass is schedule_insns(), called for | |
39 | each function. The work of the scheduler is organized in three | |
40 | levels: (1) function level: insns are subject to splitting, | |
41 | control-flow-graph is constructed, regions are computed (after | |
42 | reload, each region is of one block), (2) region level: control | |
43 | flow graph attributes required for interblock scheduling are | |
44 | computed (dominators, reachability, etc.), data dependences and | |
45 | priorities are computed, and (3) block level: insns in the block | |
46 | are actually scheduled. */ | |
47 | \f | |
48 | #include "config.h" | |
49 | #include "system.h" | |
4977bab6 ZW |
50 | #include "coretypes.h" |
51 | #include "tm.h" | |
b4ead7d4 BS |
52 | #include "toplev.h" |
53 | #include "rtl.h" | |
54 | #include "tm_p.h" | |
55 | #include "hard-reg-set.h" | |
56 | #include "basic-block.h" | |
57 | #include "regs.h" | |
58 | #include "function.h" | |
59 | #include "flags.h" | |
60 | #include "insn-config.h" | |
61 | #include "insn-attr.h" | |
62 | #include "except.h" | |
63 | #include "toplev.h" | |
64 | #include "recog.h" | |
d73b1f07 | 65 | #include "cfglayout.h" |
b4ead7d4 | 66 | #include "sched-int.h" |
fae15c93 | 67 | #include "target.h" |
b4ead7d4 | 68 | |
73991d6a JH |
69 | /* Define when we want to do count REG_DEAD notes before and after scheduling |
70 | for sanity checking. We can't do that when conditional execution is used, | |
71 | as REG_DEAD exist only for unconditional deaths. */ | |
72 | ||
73 | #if !defined (HAVE_conditional_execution) && defined (ENABLE_CHECKING) | |
74 | #define CHECK_DEAD_NOTES 1 | |
75 | #else | |
76 | #define CHECK_DEAD_NOTES 0 | |
77 | #endif | |
78 | ||
79 | ||
f56887a7 | 80 | #ifdef INSN_SCHEDULING |
b4ead7d4 BS |
81 | /* Some accessor macros for h_i_d members only used within this file. */ |
82 | #define INSN_REF_COUNT(INSN) (h_i_d[INSN_UID (INSN)].ref_count) | |
83 | #define FED_BY_SPEC_LOAD(insn) (h_i_d[INSN_UID (insn)].fed_by_spec_load) | |
84 | #define IS_LOAD_INSN(insn) (h_i_d[INSN_UID (insn)].is_load_insn) | |
85 | ||
86 | #define MAX_RGN_BLOCKS 10 | |
87 | #define MAX_RGN_INSNS 100 | |
88 | ||
89 | /* nr_inter/spec counts interblock/speculative motion for the function. */ | |
90 | static int nr_inter, nr_spec; | |
91 | ||
92 | /* Control flow graph edges are kept in circular lists. */ | |
93 | typedef struct | |
94 | { | |
95 | int from_block; | |
96 | int to_block; | |
97 | int next_in; | |
98 | int next_out; | |
99 | } | |
100 | haifa_edge; | |
101 | static haifa_edge *edge_table; | |
102 | ||
103 | #define NEXT_IN(edge) (edge_table[edge].next_in) | |
104 | #define NEXT_OUT(edge) (edge_table[edge].next_out) | |
105 | #define FROM_BLOCK(edge) (edge_table[edge].from_block) | |
106 | #define TO_BLOCK(edge) (edge_table[edge].to_block) | |
107 | ||
108 | /* Number of edges in the control flow graph. (In fact, larger than | |
109 | that by 1, since edge 0 is unused.) */ | |
110 | static int nr_edges; | |
111 | ||
112 | /* Circular list of incoming/outgoing edges of a block. */ | |
113 | static int *in_edges; | |
114 | static int *out_edges; | |
115 | ||
116 | #define IN_EDGES(block) (in_edges[block]) | |
117 | #define OUT_EDGES(block) (out_edges[block]) | |
118 | ||
119 | static int is_cfg_nonregular PARAMS ((void)); | |
120 | static int build_control_flow PARAMS ((struct edge_list *)); | |
121 | static void new_edge PARAMS ((int, int)); | |
122 | ||
123 | /* A region is the main entity for interblock scheduling: insns | |
124 | are allowed to move between blocks in the same region, along | |
125 | control flow graph edges, in the 'up' direction. */ | |
126 | typedef struct | |
127 | { | |
128 | int rgn_nr_blocks; /* Number of blocks in region. */ | |
129 | int rgn_blocks; /* cblocks in the region (actually index in rgn_bb_table). */ | |
130 | } | |
131 | region; | |
132 | ||
133 | /* Number of regions in the procedure. */ | |
134 | static int nr_regions; | |
135 | ||
136 | /* Table of region descriptions. */ | |
137 | static region *rgn_table; | |
138 | ||
139 | /* Array of lists of regions' blocks. */ | |
140 | static int *rgn_bb_table; | |
141 | ||
142 | /* Topological order of blocks in the region (if b2 is reachable from | |
143 | b1, block_to_bb[b2] > block_to_bb[b1]). Note: A basic block is | |
144 | always referred to by either block or b, while its topological | |
145 | order name (in the region) is refered to by bb. */ | |
146 | static int *block_to_bb; | |
147 | ||
148 | /* The number of the region containing a block. */ | |
149 | static int *containing_rgn; | |
150 | ||
151 | #define RGN_NR_BLOCKS(rgn) (rgn_table[rgn].rgn_nr_blocks) | |
152 | #define RGN_BLOCKS(rgn) (rgn_table[rgn].rgn_blocks) | |
153 | #define BLOCK_TO_BB(block) (block_to_bb[block]) | |
154 | #define CONTAINING_RGN(block) (containing_rgn[block]) | |
155 | ||
156 | void debug_regions PARAMS ((void)); | |
157 | static void find_single_block_region PARAMS ((void)); | |
355be0dc | 158 | static void find_rgns PARAMS ((struct edge_list *, dominance_info)); |
b4ead7d4 BS |
159 | static int too_large PARAMS ((int, int *, int *)); |
160 | ||
161 | extern void debug_live PARAMS ((int, int)); | |
162 | ||
163 | /* Blocks of the current region being scheduled. */ | |
164 | static int current_nr_blocks; | |
165 | static int current_blocks; | |
166 | ||
167 | /* The mapping from bb to block. */ | |
168 | #define BB_TO_BLOCK(bb) (rgn_bb_table[current_blocks + (bb)]) | |
169 | ||
b4ead7d4 BS |
170 | typedef struct |
171 | { | |
172 | int *first_member; /* Pointer to the list start in bitlst_table. */ | |
173 | int nr_members; /* The number of members of the bit list. */ | |
174 | } | |
175 | bitlst; | |
176 | ||
177 | static int bitlst_table_last; | |
b4ead7d4 BS |
178 | static int *bitlst_table; |
179 | ||
bdfa170f | 180 | static void extract_bitlst PARAMS ((sbitmap, bitlst *)); |
b4ead7d4 BS |
181 | |
182 | /* Target info declarations. | |
183 | ||
184 | The block currently being scheduled is referred to as the "target" block, | |
185 | while other blocks in the region from which insns can be moved to the | |
186 | target are called "source" blocks. The candidate structure holds info | |
187 | about such sources: are they valid? Speculative? Etc. */ | |
188 | typedef bitlst bblst; | |
189 | typedef struct | |
190 | { | |
191 | char is_valid; | |
192 | char is_speculative; | |
193 | int src_prob; | |
194 | bblst split_bbs; | |
195 | bblst update_bbs; | |
196 | } | |
197 | candidate; | |
198 | ||
199 | static candidate *candidate_table; | |
200 | ||
201 | /* A speculative motion requires checking live information on the path | |
202 | from 'source' to 'target'. The split blocks are those to be checked. | |
203 | After a speculative motion, live information should be modified in | |
204 | the 'update' blocks. | |
205 | ||
206 | Lists of split and update blocks for each candidate of the current | |
207 | target are in array bblst_table. */ | |
208 | static int *bblst_table, bblst_size, bblst_last; | |
209 | ||
210 | #define IS_VALID(src) ( candidate_table[src].is_valid ) | |
211 | #define IS_SPECULATIVE(src) ( candidate_table[src].is_speculative ) | |
212 | #define SRC_PROB(src) ( candidate_table[src].src_prob ) | |
213 | ||
214 | /* The bb being currently scheduled. */ | |
215 | static int target_bb; | |
216 | ||
217 | /* List of edges. */ | |
218 | typedef bitlst edgelst; | |
219 | ||
220 | /* Target info functions. */ | |
221 | static void split_edges PARAMS ((int, int, edgelst *)); | |
222 | static void compute_trg_info PARAMS ((int)); | |
223 | void debug_candidate PARAMS ((int)); | |
224 | void debug_candidates PARAMS ((int)); | |
225 | ||
bdfa170f | 226 | /* Dominators array: dom[i] contains the sbitmap of dominators of |
b4ead7d4 | 227 | bb i in the region. */ |
bdfa170f | 228 | static sbitmap *dom; |
b4ead7d4 BS |
229 | |
230 | /* bb 0 is the only region entry. */ | |
231 | #define IS_RGN_ENTRY(bb) (!bb) | |
232 | ||
233 | /* Is bb_src dominated by bb_trg. */ | |
234 | #define IS_DOMINATED(bb_src, bb_trg) \ | |
bdfa170f | 235 | ( TEST_BIT (dom[bb_src], bb_trg) ) |
b4ead7d4 BS |
236 | |
237 | /* Probability: Prob[i] is a float in [0, 1] which is the probability | |
238 | of bb i relative to the region entry. */ | |
239 | static float *prob; | |
240 | ||
241 | /* The probability of bb_src, relative to bb_trg. Note, that while the | |
242 | 'prob[bb]' is a float in [0, 1], this macro returns an integer | |
243 | in [0, 100]. */ | |
244 | #define GET_SRC_PROB(bb_src, bb_trg) ((int) (100.0 * (prob[bb_src] / \ | |
245 | prob[bb_trg]))) | |
246 | ||
247 | /* Bit-set of edges, where bit i stands for edge i. */ | |
bdfa170f | 248 | typedef sbitmap edgeset; |
b4ead7d4 BS |
249 | |
250 | /* Number of edges in the region. */ | |
251 | static int rgn_nr_edges; | |
252 | ||
253 | /* Array of size rgn_nr_edges. */ | |
254 | static int *rgn_edges; | |
255 | ||
b4ead7d4 BS |
256 | |
257 | /* Mapping from each edge in the graph to its number in the rgn. */ | |
258 | static int *edge_to_bit; | |
259 | #define EDGE_TO_BIT(edge) (edge_to_bit[edge]) | |
260 | ||
261 | /* The split edges of a source bb is different for each target | |
262 | bb. In order to compute this efficiently, the 'potential-split edges' | |
263 | are computed for each bb prior to scheduling a region. This is actually | |
264 | the split edges of each bb relative to the region entry. | |
265 | ||
266 | pot_split[bb] is the set of potential split edges of bb. */ | |
267 | static edgeset *pot_split; | |
268 | ||
269 | /* For every bb, a set of its ancestor edges. */ | |
270 | static edgeset *ancestor_edges; | |
271 | ||
272 | static void compute_dom_prob_ps PARAMS ((int)); | |
273 | ||
b4ead7d4 BS |
274 | #define INSN_PROBABILITY(INSN) (SRC_PROB (BLOCK_TO_BB (BLOCK_NUM (INSN)))) |
275 | #define IS_SPECULATIVE_INSN(INSN) (IS_SPECULATIVE (BLOCK_TO_BB (BLOCK_NUM (INSN)))) | |
276 | #define INSN_BB(INSN) (BLOCK_TO_BB (BLOCK_NUM (INSN))) | |
277 | ||
278 | /* Parameters affecting the decision of rank_for_schedule(). | |
279 | ??? Nope. But MIN_PROBABILITY is used in copmute_trg_info. */ | |
b4ead7d4 | 280 | #define MIN_PROBABILITY 40 |
b4ead7d4 BS |
281 | |
282 | /* Speculative scheduling functions. */ | |
283 | static int check_live_1 PARAMS ((int, rtx)); | |
284 | static void update_live_1 PARAMS ((int, rtx)); | |
285 | static int check_live PARAMS ((rtx, int)); | |
286 | static void update_live PARAMS ((rtx, int)); | |
287 | static void set_spec_fed PARAMS ((rtx)); | |
288 | static int is_pfree PARAMS ((rtx, int, int)); | |
289 | static int find_conditional_protection PARAMS ((rtx, int)); | |
290 | static int is_conditionally_protected PARAMS ((rtx, int, int)); | |
291 | static int may_trap_exp PARAMS ((rtx, int)); | |
292 | static int haifa_classify_insn PARAMS ((rtx)); | |
293 | static int is_prisky PARAMS ((rtx, int, int)); | |
294 | static int is_exception_free PARAMS ((rtx, int, int)); | |
295 | ||
68c17f30 RH |
296 | static bool sets_likely_spilled PARAMS ((rtx)); |
297 | static void sets_likely_spilled_1 PARAMS ((rtx, rtx, void *)); | |
b4ead7d4 BS |
298 | static void add_branch_dependences PARAMS ((rtx, rtx)); |
299 | static void compute_block_backward_dependences PARAMS ((int)); | |
300 | void debug_dependencies PARAMS ((void)); | |
301 | ||
302 | static void init_regions PARAMS ((void)); | |
303 | static void schedule_region PARAMS ((int)); | |
37a0f8a5 RH |
304 | static rtx concat_INSN_LIST PARAMS ((rtx, rtx)); |
305 | static void concat_insn_mem_list PARAMS ((rtx, rtx, rtx *, rtx *)); | |
4ba478b8 | 306 | static void propagate_deps PARAMS ((int, struct deps *)); |
b4ead7d4 BS |
307 | static void free_pending_lists PARAMS ((void)); |
308 | ||
309 | /* Functions for construction of the control flow graph. */ | |
310 | ||
311 | /* Return 1 if control flow graph should not be constructed, 0 otherwise. | |
312 | ||
313 | We decide not to build the control flow graph if there is possibly more | |
314 | than one entry to the function, if computed branches exist, of if we | |
315 | have nonlocal gotos. */ | |
316 | ||
317 | static int | |
318 | is_cfg_nonregular () | |
319 | { | |
e0082a72 | 320 | basic_block b; |
b4ead7d4 BS |
321 | rtx insn; |
322 | RTX_CODE code; | |
323 | ||
324 | /* If we have a label that could be the target of a nonlocal goto, then | |
325 | the cfg is not well structured. */ | |
326 | if (nonlocal_goto_handler_labels) | |
327 | return 1; | |
328 | ||
329 | /* If we have any forced labels, then the cfg is not well structured. */ | |
330 | if (forced_labels) | |
331 | return 1; | |
332 | ||
333 | /* If this function has a computed jump, then we consider the cfg | |
334 | not well structured. */ | |
335 | if (current_function_has_computed_jump) | |
336 | return 1; | |
337 | ||
338 | /* If we have exception handlers, then we consider the cfg not well | |
339 | structured. ?!? We should be able to handle this now that flow.c | |
340 | computes an accurate cfg for EH. */ | |
6a58eee9 | 341 | if (current_function_has_exception_handlers ()) |
b4ead7d4 BS |
342 | return 1; |
343 | ||
344 | /* If we have non-jumping insns which refer to labels, then we consider | |
345 | the cfg not well structured. */ | |
346 | /* Check for labels referred to other thn by jumps. */ | |
e0082a72 ZD |
347 | FOR_EACH_BB (b) |
348 | for (insn = b->head;; insn = NEXT_INSN (insn)) | |
b4ead7d4 BS |
349 | { |
350 | code = GET_CODE (insn); | |
f759eb8b | 351 | if (GET_RTX_CLASS (code) == 'i' && code != JUMP_INSN) |
b4ead7d4 | 352 | { |
cabf3891 | 353 | rtx note = find_reg_note (insn, REG_LABEL, NULL_RTX); |
f759eb8b AO |
354 | |
355 | if (note | |
356 | && ! (GET_CODE (NEXT_INSN (insn)) == JUMP_INSN | |
cabf3891 | 357 | && find_reg_note (NEXT_INSN (insn), REG_LABEL, |
f759eb8b AO |
358 | XEXP (note, 0)))) |
359 | return 1; | |
b4ead7d4 BS |
360 | } |
361 | ||
e0082a72 | 362 | if (insn == b->end) |
b4ead7d4 BS |
363 | break; |
364 | } | |
365 | ||
366 | /* All the tests passed. Consider the cfg well structured. */ | |
367 | return 0; | |
368 | } | |
369 | ||
370 | /* Build the control flow graph and set nr_edges. | |
371 | ||
372 | Instead of trying to build a cfg ourselves, we rely on flow to | |
373 | do it for us. Stamp out useless code (and bug) duplication. | |
374 | ||
375 | Return nonzero if an irregularity in the cfg is found which would | |
376 | prevent cross block scheduling. */ | |
377 | ||
378 | static int | |
379 | build_control_flow (edge_list) | |
380 | struct edge_list *edge_list; | |
381 | { | |
382 | int i, unreachable, num_edges; | |
e0082a72 | 383 | basic_block b; |
b4ead7d4 BS |
384 | |
385 | /* This already accounts for entry/exit edges. */ | |
386 | num_edges = NUM_EDGES (edge_list); | |
387 | ||
388 | /* Unreachable loops with more than one basic block are detected | |
389 | during the DFS traversal in find_rgns. | |
390 | ||
391 | Unreachable loops with a single block are detected here. This | |
392 | test is redundant with the one in find_rgns, but it's much | |
393 | cheaper to go ahead and catch the trivial case here. */ | |
394 | unreachable = 0; | |
e0082a72 | 395 | FOR_EACH_BB (b) |
b4ead7d4 | 396 | { |
b4ead7d4 BS |
397 | if (b->pred == NULL |
398 | || (b->pred->src == b | |
399 | && b->pred->pred_next == NULL)) | |
400 | unreachable = 1; | |
401 | } | |
402 | ||
403 | /* ??? We can kill these soon. */ | |
d55bc081 ZD |
404 | in_edges = (int *) xcalloc (last_basic_block, sizeof (int)); |
405 | out_edges = (int *) xcalloc (last_basic_block, sizeof (int)); | |
b4ead7d4 BS |
406 | edge_table = (haifa_edge *) xcalloc (num_edges, sizeof (haifa_edge)); |
407 | ||
408 | nr_edges = 0; | |
409 | for (i = 0; i < num_edges; i++) | |
410 | { | |
411 | edge e = INDEX_EDGE (edge_list, i); | |
412 | ||
413 | if (e->dest != EXIT_BLOCK_PTR | |
414 | && e->src != ENTRY_BLOCK_PTR) | |
0b17ab2f | 415 | new_edge (e->src->index, e->dest->index); |
b4ead7d4 BS |
416 | } |
417 | ||
418 | /* Increment by 1, since edge 0 is unused. */ | |
419 | nr_edges++; | |
420 | ||
421 | return unreachable; | |
422 | } | |
423 | ||
424 | /* Record an edge in the control flow graph from SOURCE to TARGET. | |
425 | ||
426 | In theory, this is redundant with the s_succs computed above, but | |
427 | we have not converted all of haifa to use information from the | |
428 | integer lists. */ | |
429 | ||
430 | static void | |
431 | new_edge (source, target) | |
432 | int source, target; | |
433 | { | |
434 | int e, next_edge; | |
435 | int curr_edge, fst_edge; | |
436 | ||
437 | /* Check for duplicates. */ | |
438 | fst_edge = curr_edge = OUT_EDGES (source); | |
439 | while (curr_edge) | |
440 | { | |
441 | if (FROM_BLOCK (curr_edge) == source | |
442 | && TO_BLOCK (curr_edge) == target) | |
443 | { | |
444 | return; | |
445 | } | |
446 | ||
447 | curr_edge = NEXT_OUT (curr_edge); | |
448 | ||
449 | if (fst_edge == curr_edge) | |
450 | break; | |
451 | } | |
452 | ||
453 | e = ++nr_edges; | |
454 | ||
455 | FROM_BLOCK (e) = source; | |
456 | TO_BLOCK (e) = target; | |
457 | ||
458 | if (OUT_EDGES (source)) | |
459 | { | |
460 | next_edge = NEXT_OUT (OUT_EDGES (source)); | |
461 | NEXT_OUT (OUT_EDGES (source)) = e; | |
462 | NEXT_OUT (e) = next_edge; | |
463 | } | |
464 | else | |
465 | { | |
466 | OUT_EDGES (source) = e; | |
467 | NEXT_OUT (e) = e; | |
468 | } | |
469 | ||
470 | if (IN_EDGES (target)) | |
471 | { | |
472 | next_edge = NEXT_IN (IN_EDGES (target)); | |
473 | NEXT_IN (IN_EDGES (target)) = e; | |
474 | NEXT_IN (e) = next_edge; | |
475 | } | |
476 | else | |
477 | { | |
478 | IN_EDGES (target) = e; | |
479 | NEXT_IN (e) = e; | |
480 | } | |
481 | } | |
482 | ||
b4ead7d4 BS |
483 | /* Translate a bit-set SET to a list BL of the bit-set members. */ |
484 | ||
485 | static void | |
bdfa170f DB |
486 | extract_bitlst (set, bl) |
487 | sbitmap set; | |
b4ead7d4 BS |
488 | bitlst *bl; |
489 | { | |
bdfa170f | 490 | int i; |
b4ead7d4 BS |
491 | |
492 | /* bblst table space is reused in each call to extract_bitlst. */ | |
493 | bitlst_table_last = 0; | |
494 | ||
495 | bl->first_member = &bitlst_table[bitlst_table_last]; | |
496 | bl->nr_members = 0; | |
497 | ||
498 | /* Iterate over each word in the bitset. */ | |
bdfa170f DB |
499 | EXECUTE_IF_SET_IN_SBITMAP (set, 0, i, |
500 | { | |
501 | bitlst_table[bitlst_table_last++] = i; | |
502 | (bl->nr_members)++; | |
503 | }); | |
b4ead7d4 BS |
504 | |
505 | } | |
506 | ||
507 | /* Functions for the construction of regions. */ | |
508 | ||
509 | /* Print the regions, for debugging purposes. Callable from debugger. */ | |
510 | ||
511 | void | |
512 | debug_regions () | |
513 | { | |
514 | int rgn, bb; | |
515 | ||
516 | fprintf (sched_dump, "\n;; ------------ REGIONS ----------\n\n"); | |
517 | for (rgn = 0; rgn < nr_regions; rgn++) | |
518 | { | |
519 | fprintf (sched_dump, ";;\trgn %d nr_blocks %d:\n", rgn, | |
520 | rgn_table[rgn].rgn_nr_blocks); | |
521 | fprintf (sched_dump, ";;\tbb/block: "); | |
522 | ||
523 | for (bb = 0; bb < rgn_table[rgn].rgn_nr_blocks; bb++) | |
524 | { | |
525 | current_blocks = RGN_BLOCKS (rgn); | |
526 | ||
527 | if (bb != BLOCK_TO_BB (BB_TO_BLOCK (bb))) | |
528 | abort (); | |
529 | ||
530 | fprintf (sched_dump, " %d/%d ", bb, BB_TO_BLOCK (bb)); | |
531 | } | |
532 | ||
533 | fprintf (sched_dump, "\n\n"); | |
534 | } | |
535 | } | |
536 | ||
537 | /* Build a single block region for each basic block in the function. | |
538 | This allows for using the same code for interblock and basic block | |
539 | scheduling. */ | |
540 | ||
541 | static void | |
542 | find_single_block_region () | |
543 | { | |
e0082a72 | 544 | basic_block bb; |
355e4ec4 | 545 | |
e0082a72 ZD |
546 | nr_regions = 0; |
547 | ||
548 | FOR_EACH_BB (bb) | |
b4ead7d4 | 549 | { |
e0082a72 ZD |
550 | rgn_bb_table[nr_regions] = bb->index; |
551 | RGN_NR_BLOCKS (nr_regions) = 1; | |
552 | RGN_BLOCKS (nr_regions) = nr_regions; | |
553 | CONTAINING_RGN (bb->index) = nr_regions; | |
554 | BLOCK_TO_BB (bb->index) = 0; | |
555 | nr_regions++; | |
b4ead7d4 | 556 | } |
b4ead7d4 BS |
557 | } |
558 | ||
559 | /* Update number of blocks and the estimate for number of insns | |
560 | in the region. Return 1 if the region is "too large" for interblock | |
561 | scheduling (compile time considerations), otherwise return 0. */ | |
562 | ||
563 | static int | |
564 | too_large (block, num_bbs, num_insns) | |
565 | int block, *num_bbs, *num_insns; | |
566 | { | |
567 | (*num_bbs)++; | |
568 | (*num_insns) += (INSN_LUID (BLOCK_END (block)) - | |
569 | INSN_LUID (BLOCK_HEAD (block))); | |
570 | if ((*num_bbs > MAX_RGN_BLOCKS) || (*num_insns > MAX_RGN_INSNS)) | |
571 | return 1; | |
572 | else | |
573 | return 0; | |
574 | } | |
575 | ||
576 | /* Update_loop_relations(blk, hdr): Check if the loop headed by max_hdr[blk] | |
577 | is still an inner loop. Put in max_hdr[blk] the header of the most inner | |
578 | loop containing blk. */ | |
786de7eb KH |
579 | #define UPDATE_LOOP_RELATIONS(blk, hdr) \ |
580 | { \ | |
581 | if (max_hdr[blk] == -1) \ | |
582 | max_hdr[blk] = hdr; \ | |
583 | else if (dfs_nr[max_hdr[blk]] > dfs_nr[hdr]) \ | |
584 | RESET_BIT (inner, hdr); \ | |
585 | else if (dfs_nr[max_hdr[blk]] < dfs_nr[hdr]) \ | |
586 | { \ | |
587 | RESET_BIT (inner,max_hdr[blk]); \ | |
588 | max_hdr[blk] = hdr; \ | |
589 | } \ | |
b4ead7d4 BS |
590 | } |
591 | ||
592 | /* Find regions for interblock scheduling. | |
593 | ||
594 | A region for scheduling can be: | |
595 | ||
596 | * A loop-free procedure, or | |
597 | ||
598 | * A reducible inner loop, or | |
599 | ||
600 | * A basic block not contained in any other region. | |
601 | ||
602 | ?!? In theory we could build other regions based on extended basic | |
603 | blocks or reverse extended basic blocks. Is it worth the trouble? | |
604 | ||
605 | Loop blocks that form a region are put into the region's block list | |
606 | in topological order. | |
607 | ||
608 | This procedure stores its results into the following global (ick) variables | |
609 | ||
610 | * rgn_nr | |
611 | * rgn_table | |
612 | * rgn_bb_table | |
613 | * block_to_bb | |
614 | * containing region | |
615 | ||
616 | We use dominator relationships to avoid making regions out of non-reducible | |
617 | loops. | |
618 | ||
619 | This procedure needs to be converted to work on pred/succ lists instead | |
620 | of edge tables. That would simplify it somewhat. */ | |
621 | ||
622 | static void | |
623 | find_rgns (edge_list, dom) | |
624 | struct edge_list *edge_list; | |
355be0dc | 625 | dominance_info dom; |
b4ead7d4 BS |
626 | { |
627 | int *max_hdr, *dfs_nr, *stack, *degree; | |
628 | char no_loops = 1; | |
629 | int node, child, loop_head, i, head, tail; | |
630 | int count = 0, sp, idx = 0, current_edge = out_edges[0]; | |
631 | int num_bbs, num_insns, unreachable; | |
632 | int too_large_failure; | |
e0082a72 | 633 | basic_block bb; |
b4ead7d4 BS |
634 | |
635 | /* Note if an edge has been passed. */ | |
636 | sbitmap passed; | |
637 | ||
638 | /* Note if a block is a natural loop header. */ | |
639 | sbitmap header; | |
640 | ||
09da1532 | 641 | /* Note if a block is a natural inner loop header. */ |
b4ead7d4 BS |
642 | sbitmap inner; |
643 | ||
644 | /* Note if a block is in the block queue. */ | |
645 | sbitmap in_queue; | |
646 | ||
647 | /* Note if a block is in the block queue. */ | |
648 | sbitmap in_stack; | |
649 | ||
650 | int num_edges = NUM_EDGES (edge_list); | |
651 | ||
652 | /* Perform a DFS traversal of the cfg. Identify loop headers, inner loops | |
653 | and a mapping from block to its loop header (if the block is contained | |
654 | in a loop, else -1). | |
655 | ||
656 | Store results in HEADER, INNER, and MAX_HDR respectively, these will | |
657 | be used as inputs to the second traversal. | |
658 | ||
659 | STACK, SP and DFS_NR are only used during the first traversal. */ | |
660 | ||
661 | /* Allocate and initialize variables for the first traversal. */ | |
d55bc081 ZD |
662 | max_hdr = (int *) xmalloc (last_basic_block * sizeof (int)); |
663 | dfs_nr = (int *) xcalloc (last_basic_block, sizeof (int)); | |
b4ead7d4 BS |
664 | stack = (int *) xmalloc (nr_edges * sizeof (int)); |
665 | ||
d55bc081 | 666 | inner = sbitmap_alloc (last_basic_block); |
b4ead7d4 BS |
667 | sbitmap_ones (inner); |
668 | ||
d55bc081 | 669 | header = sbitmap_alloc (last_basic_block); |
b4ead7d4 BS |
670 | sbitmap_zero (header); |
671 | ||
672 | passed = sbitmap_alloc (nr_edges); | |
673 | sbitmap_zero (passed); | |
674 | ||
d55bc081 | 675 | in_queue = sbitmap_alloc (last_basic_block); |
b4ead7d4 BS |
676 | sbitmap_zero (in_queue); |
677 | ||
d55bc081 | 678 | in_stack = sbitmap_alloc (last_basic_block); |
b4ead7d4 BS |
679 | sbitmap_zero (in_stack); |
680 | ||
bf77398c | 681 | for (i = 0; i < last_basic_block; i++) |
b4ead7d4 BS |
682 | max_hdr[i] = -1; |
683 | ||
684 | /* DFS traversal to find inner loops in the cfg. */ | |
685 | ||
686 | sp = -1; | |
687 | while (1) | |
688 | { | |
689 | if (current_edge == 0 || TEST_BIT (passed, current_edge)) | |
690 | { | |
691 | /* We have reached a leaf node or a node that was already | |
692 | processed. Pop edges off the stack until we find | |
693 | an edge that has not yet been processed. */ | |
694 | while (sp >= 0 | |
695 | && (current_edge == 0 || TEST_BIT (passed, current_edge))) | |
696 | { | |
697 | /* Pop entry off the stack. */ | |
698 | current_edge = stack[sp--]; | |
699 | node = FROM_BLOCK (current_edge); | |
700 | child = TO_BLOCK (current_edge); | |
701 | RESET_BIT (in_stack, child); | |
702 | if (max_hdr[child] >= 0 && TEST_BIT (in_stack, max_hdr[child])) | |
703 | UPDATE_LOOP_RELATIONS (node, max_hdr[child]); | |
704 | current_edge = NEXT_OUT (current_edge); | |
705 | } | |
706 | ||
707 | /* See if have finished the DFS tree traversal. */ | |
708 | if (sp < 0 && TEST_BIT (passed, current_edge)) | |
709 | break; | |
710 | ||
711 | /* Nope, continue the traversal with the popped node. */ | |
712 | continue; | |
713 | } | |
714 | ||
715 | /* Process a node. */ | |
716 | node = FROM_BLOCK (current_edge); | |
717 | child = TO_BLOCK (current_edge); | |
718 | SET_BIT (in_stack, node); | |
719 | dfs_nr[node] = ++count; | |
720 | ||
721 | /* If the successor is in the stack, then we've found a loop. | |
722 | Mark the loop, if it is not a natural loop, then it will | |
723 | be rejected during the second traversal. */ | |
724 | if (TEST_BIT (in_stack, child)) | |
725 | { | |
726 | no_loops = 0; | |
727 | SET_BIT (header, child); | |
728 | UPDATE_LOOP_RELATIONS (node, child); | |
729 | SET_BIT (passed, current_edge); | |
730 | current_edge = NEXT_OUT (current_edge); | |
731 | continue; | |
732 | } | |
733 | ||
734 | /* If the child was already visited, then there is no need to visit | |
735 | it again. Just update the loop relationships and restart | |
736 | with a new edge. */ | |
737 | if (dfs_nr[child]) | |
738 | { | |
739 | if (max_hdr[child] >= 0 && TEST_BIT (in_stack, max_hdr[child])) | |
740 | UPDATE_LOOP_RELATIONS (node, max_hdr[child]); | |
741 | SET_BIT (passed, current_edge); | |
742 | current_edge = NEXT_OUT (current_edge); | |
743 | continue; | |
744 | } | |
745 | ||
746 | /* Push an entry on the stack and continue DFS traversal. */ | |
747 | stack[++sp] = current_edge; | |
748 | SET_BIT (passed, current_edge); | |
749 | current_edge = OUT_EDGES (child); | |
750 | ||
751 | /* This is temporary until haifa is converted to use rth's new | |
752 | cfg routines which have true entry/exit blocks and the | |
753 | appropriate edges from/to those blocks. | |
754 | ||
755 | Generally we update dfs_nr for a node when we process its | |
756 | out edge. However, if the node has no out edge then we will | |
757 | not set dfs_nr for that node. This can confuse the scheduler | |
758 | into thinking that we have unreachable blocks, which in turn | |
759 | disables cross block scheduling. | |
760 | ||
761 | So, if we have a node with no out edges, go ahead and mark it | |
762 | as reachable now. */ | |
763 | if (current_edge == 0) | |
764 | dfs_nr[child] = ++count; | |
765 | } | |
766 | ||
767 | /* Another check for unreachable blocks. The earlier test in | |
768 | is_cfg_nonregular only finds unreachable blocks that do not | |
769 | form a loop. | |
770 | ||
771 | The DFS traversal will mark every block that is reachable from | |
772 | the entry node by placing a nonzero value in dfs_nr. Thus if | |
773 | dfs_nr is zero for any block, then it must be unreachable. */ | |
774 | unreachable = 0; | |
e0082a72 ZD |
775 | FOR_EACH_BB (bb) |
776 | if (dfs_nr[bb->index] == 0) | |
b4ead7d4 BS |
777 | { |
778 | unreachable = 1; | |
779 | break; | |
780 | } | |
781 | ||
782 | /* Gross. To avoid wasting memory, the second pass uses the dfs_nr array | |
783 | to hold degree counts. */ | |
784 | degree = dfs_nr; | |
785 | ||
e0082a72 ZD |
786 | FOR_EACH_BB (bb) |
787 | degree[bb->index] = 0; | |
b4ead7d4 BS |
788 | for (i = 0; i < num_edges; i++) |
789 | { | |
790 | edge e = INDEX_EDGE (edge_list, i); | |
791 | ||
792 | if (e->dest != EXIT_BLOCK_PTR) | |
0b17ab2f | 793 | degree[e->dest->index]++; |
b4ead7d4 BS |
794 | } |
795 | ||
796 | /* Do not perform region scheduling if there are any unreachable | |
797 | blocks. */ | |
798 | if (!unreachable) | |
799 | { | |
800 | int *queue; | |
801 | ||
802 | if (no_loops) | |
803 | SET_BIT (header, 0); | |
804 | ||
805 | /* Second travsersal:find reducible inner loops and topologically sort | |
806 | block of each region. */ | |
807 | ||
0b17ab2f | 808 | queue = (int *) xmalloc (n_basic_blocks * sizeof (int)); |
b4ead7d4 BS |
809 | |
810 | /* Find blocks which are inner loop headers. We still have non-reducible | |
811 | loops to consider at this point. */ | |
e0082a72 | 812 | FOR_EACH_BB (bb) |
b4ead7d4 | 813 | { |
e0082a72 | 814 | if (TEST_BIT (header, bb->index) && TEST_BIT (inner, bb->index)) |
b4ead7d4 BS |
815 | { |
816 | edge e; | |
e0082a72 | 817 | basic_block jbb; |
b4ead7d4 BS |
818 | |
819 | /* Now check that the loop is reducible. We do this separate | |
820 | from finding inner loops so that we do not find a reducible | |
821 | loop which contains an inner non-reducible loop. | |
822 | ||
823 | A simple way to find reducible/natural loops is to verify | |
824 | that each block in the loop is dominated by the loop | |
825 | header. | |
826 | ||
827 | If there exists a block that is not dominated by the loop | |
828 | header, then the block is reachable from outside the loop | |
829 | and thus the loop is not a natural loop. */ | |
e0082a72 | 830 | FOR_EACH_BB (jbb) |
b4ead7d4 BS |
831 | { |
832 | /* First identify blocks in the loop, except for the loop | |
833 | entry block. */ | |
e0082a72 | 834 | if (bb->index == max_hdr[jbb->index] && bb != jbb) |
b4ead7d4 BS |
835 | { |
836 | /* Now verify that the block is dominated by the loop | |
837 | header. */ | |
355be0dc | 838 | if (!dominated_by_p (dom, jbb, bb)) |
b4ead7d4 BS |
839 | break; |
840 | } | |
841 | } | |
842 | ||
843 | /* If we exited the loop early, then I is the header of | |
844 | a non-reducible loop and we should quit processing it | |
845 | now. */ | |
e0082a72 | 846 | if (jbb != EXIT_BLOCK_PTR) |
b4ead7d4 BS |
847 | continue; |
848 | ||
849 | /* I is a header of an inner loop, or block 0 in a subroutine | |
850 | with no loops at all. */ | |
851 | head = tail = -1; | |
852 | too_large_failure = 0; | |
e0082a72 | 853 | loop_head = max_hdr[bb->index]; |
b4ead7d4 BS |
854 | |
855 | /* Decrease degree of all I's successors for topological | |
856 | ordering. */ | |
e0082a72 | 857 | for (e = bb->succ; e; e = e->succ_next) |
b4ead7d4 | 858 | if (e->dest != EXIT_BLOCK_PTR) |
0b17ab2f | 859 | --degree[e->dest->index]; |
b4ead7d4 BS |
860 | |
861 | /* Estimate # insns, and count # blocks in the region. */ | |
862 | num_bbs = 1; | |
e0082a72 ZD |
863 | num_insns = (INSN_LUID (bb->end) |
864 | - INSN_LUID (bb->head)); | |
b4ead7d4 BS |
865 | |
866 | /* Find all loop latches (blocks with back edges to the loop | |
867 | header) or all the leaf blocks in the cfg has no loops. | |
868 | ||
869 | Place those blocks into the queue. */ | |
870 | if (no_loops) | |
871 | { | |
e0082a72 | 872 | FOR_EACH_BB (jbb) |
b4ead7d4 BS |
873 | /* Leaf nodes have only a single successor which must |
874 | be EXIT_BLOCK. */ | |
e0082a72 ZD |
875 | if (jbb->succ |
876 | && jbb->succ->dest == EXIT_BLOCK_PTR | |
877 | && jbb->succ->succ_next == NULL) | |
b4ead7d4 | 878 | { |
e0082a72 ZD |
879 | queue[++tail] = jbb->index; |
880 | SET_BIT (in_queue, jbb->index); | |
b4ead7d4 | 881 | |
e0082a72 | 882 | if (too_large (jbb->index, &num_bbs, &num_insns)) |
b4ead7d4 BS |
883 | { |
884 | too_large_failure = 1; | |
885 | break; | |
886 | } | |
887 | } | |
888 | } | |
889 | else | |
890 | { | |
891 | edge e; | |
892 | ||
e0082a72 | 893 | for (e = bb->pred; e; e = e->pred_next) |
b4ead7d4 BS |
894 | { |
895 | if (e->src == ENTRY_BLOCK_PTR) | |
896 | continue; | |
897 | ||
0b17ab2f | 898 | node = e->src->index; |
b4ead7d4 | 899 | |
e0082a72 | 900 | if (max_hdr[node] == loop_head && node != bb->index) |
b4ead7d4 BS |
901 | { |
902 | /* This is a loop latch. */ | |
903 | queue[++tail] = node; | |
904 | SET_BIT (in_queue, node); | |
905 | ||
906 | if (too_large (node, &num_bbs, &num_insns)) | |
907 | { | |
908 | too_large_failure = 1; | |
909 | break; | |
910 | } | |
911 | } | |
912 | } | |
913 | } | |
914 | ||
915 | /* Now add all the blocks in the loop to the queue. | |
916 | ||
917 | We know the loop is a natural loop; however the algorithm | |
918 | above will not always mark certain blocks as being in the | |
919 | loop. Consider: | |
920 | node children | |
921 | a b,c | |
922 | b c | |
923 | c a,d | |
924 | d b | |
925 | ||
926 | The algorithm in the DFS traversal may not mark B & D as part | |
927 | of the loop (ie they will not have max_hdr set to A). | |
928 | ||
929 | We know they can not be loop latches (else they would have | |
930 | had max_hdr set since they'd have a backedge to a dominator | |
931 | block). So we don't need them on the initial queue. | |
932 | ||
933 | We know they are part of the loop because they are dominated | |
934 | by the loop header and can be reached by a backwards walk of | |
935 | the edges starting with nodes on the initial queue. | |
936 | ||
937 | It is safe and desirable to include those nodes in the | |
938 | loop/scheduling region. To do so we would need to decrease | |
939 | the degree of a node if it is the target of a backedge | |
940 | within the loop itself as the node is placed in the queue. | |
941 | ||
942 | We do not do this because I'm not sure that the actual | |
943 | scheduling code will properly handle this case. ?!? */ | |
944 | ||
945 | while (head < tail && !too_large_failure) | |
946 | { | |
947 | edge e; | |
948 | child = queue[++head]; | |
949 | ||
950 | for (e = BASIC_BLOCK (child)->pred; e; e = e->pred_next) | |
951 | { | |
0b17ab2f | 952 | node = e->src->index; |
b4ead7d4 BS |
953 | |
954 | /* See discussion above about nodes not marked as in | |
955 | this loop during the initial DFS traversal. */ | |
956 | if (e->src == ENTRY_BLOCK_PTR | |
957 | || max_hdr[node] != loop_head) | |
958 | { | |
959 | tail = -1; | |
960 | break; | |
961 | } | |
e0082a72 | 962 | else if (!TEST_BIT (in_queue, node) && node != bb->index) |
b4ead7d4 BS |
963 | { |
964 | queue[++tail] = node; | |
965 | SET_BIT (in_queue, node); | |
966 | ||
967 | if (too_large (node, &num_bbs, &num_insns)) | |
968 | { | |
969 | too_large_failure = 1; | |
970 | break; | |
971 | } | |
972 | } | |
973 | } | |
974 | } | |
975 | ||
976 | if (tail >= 0 && !too_large_failure) | |
977 | { | |
978 | /* Place the loop header into list of region blocks. */ | |
e0082a72 ZD |
979 | degree[bb->index] = -1; |
980 | rgn_bb_table[idx] = bb->index; | |
b4ead7d4 BS |
981 | RGN_NR_BLOCKS (nr_regions) = num_bbs; |
982 | RGN_BLOCKS (nr_regions) = idx++; | |
e0082a72 ZD |
983 | CONTAINING_RGN (bb->index) = nr_regions; |
984 | BLOCK_TO_BB (bb->index) = count = 0; | |
b4ead7d4 BS |
985 | |
986 | /* Remove blocks from queue[] when their in degree | |
987 | becomes zero. Repeat until no blocks are left on the | |
988 | list. This produces a topological list of blocks in | |
989 | the region. */ | |
990 | while (tail >= 0) | |
991 | { | |
992 | if (head < 0) | |
993 | head = tail; | |
994 | child = queue[head]; | |
995 | if (degree[child] == 0) | |
996 | { | |
997 | edge e; | |
998 | ||
999 | degree[child] = -1; | |
1000 | rgn_bb_table[idx++] = child; | |
1001 | BLOCK_TO_BB (child) = ++count; | |
1002 | CONTAINING_RGN (child) = nr_regions; | |
1003 | queue[head] = queue[tail--]; | |
1004 | ||
1005 | for (e = BASIC_BLOCK (child)->succ; | |
1006 | e; | |
1007 | e = e->succ_next) | |
1008 | if (e->dest != EXIT_BLOCK_PTR) | |
0b17ab2f | 1009 | --degree[e->dest->index]; |
b4ead7d4 BS |
1010 | } |
1011 | else | |
1012 | --head; | |
1013 | } | |
1014 | ++nr_regions; | |
1015 | } | |
1016 | } | |
1017 | } | |
1018 | free (queue); | |
1019 | } | |
1020 | ||
1021 | /* Any block that did not end up in a region is placed into a region | |
1022 | by itself. */ | |
e0082a72 ZD |
1023 | FOR_EACH_BB (bb) |
1024 | if (degree[bb->index] >= 0) | |
b4ead7d4 | 1025 | { |
e0082a72 | 1026 | rgn_bb_table[idx] = bb->index; |
b4ead7d4 BS |
1027 | RGN_NR_BLOCKS (nr_regions) = 1; |
1028 | RGN_BLOCKS (nr_regions) = idx++; | |
e0082a72 ZD |
1029 | CONTAINING_RGN (bb->index) = nr_regions++; |
1030 | BLOCK_TO_BB (bb->index) = 0; | |
b4ead7d4 BS |
1031 | } |
1032 | ||
1033 | free (max_hdr); | |
1034 | free (dfs_nr); | |
1035 | free (stack); | |
7b25b076 GS |
1036 | sbitmap_free (passed); |
1037 | sbitmap_free (header); | |
1038 | sbitmap_free (inner); | |
1039 | sbitmap_free (in_queue); | |
1040 | sbitmap_free (in_stack); | |
b4ead7d4 BS |
1041 | } |
1042 | ||
1043 | /* Functions for regions scheduling information. */ | |
1044 | ||
1045 | /* Compute dominators, probability, and potential-split-edges of bb. | |
1046 | Assume that these values were already computed for bb's predecessors. */ | |
1047 | ||
1048 | static void | |
1049 | compute_dom_prob_ps (bb) | |
1050 | int bb; | |
1051 | { | |
1052 | int nxt_in_edge, fst_in_edge, pred; | |
1053 | int fst_out_edge, nxt_out_edge, nr_out_edges, nr_rgn_out_edges; | |
1054 | ||
1055 | prob[bb] = 0.0; | |
1056 | if (IS_RGN_ENTRY (bb)) | |
1057 | { | |
bdfa170f | 1058 | SET_BIT (dom[bb], 0); |
b4ead7d4 BS |
1059 | prob[bb] = 1.0; |
1060 | return; | |
1061 | } | |
1062 | ||
1063 | fst_in_edge = nxt_in_edge = IN_EDGES (BB_TO_BLOCK (bb)); | |
1064 | ||
eaec9b3d | 1065 | /* Initialize dom[bb] to '111..1'. */ |
bdfa170f | 1066 | sbitmap_ones (dom[bb]); |
b4ead7d4 BS |
1067 | |
1068 | do | |
1069 | { | |
1070 | pred = FROM_BLOCK (nxt_in_edge); | |
bdfa170f DB |
1071 | sbitmap_a_and_b (dom[bb], dom[bb], dom[BLOCK_TO_BB (pred)]); |
1072 | sbitmap_a_or_b (ancestor_edges[bb], ancestor_edges[bb], ancestor_edges[BLOCK_TO_BB (pred)]); | |
b4ead7d4 | 1073 | |
bdfa170f | 1074 | SET_BIT (ancestor_edges[bb], EDGE_TO_BIT (nxt_in_edge)); |
b4ead7d4 BS |
1075 | |
1076 | nr_out_edges = 1; | |
1077 | nr_rgn_out_edges = 0; | |
1078 | fst_out_edge = OUT_EDGES (pred); | |
1079 | nxt_out_edge = NEXT_OUT (fst_out_edge); | |
b4ead7d4 | 1080 | |
bdfa170f DB |
1081 | sbitmap_a_or_b (pot_split[bb], pot_split[bb], pot_split[BLOCK_TO_BB (pred)]); |
1082 | ||
1083 | SET_BIT (pot_split[bb], EDGE_TO_BIT (fst_out_edge)); | |
b4ead7d4 BS |
1084 | |
1085 | /* The successor doesn't belong in the region? */ | |
1086 | if (CONTAINING_RGN (TO_BLOCK (fst_out_edge)) != | |
1087 | CONTAINING_RGN (BB_TO_BLOCK (bb))) | |
1088 | ++nr_rgn_out_edges; | |
1089 | ||
1090 | while (fst_out_edge != nxt_out_edge) | |
1091 | { | |
1092 | ++nr_out_edges; | |
1093 | /* The successor doesn't belong in the region? */ | |
1094 | if (CONTAINING_RGN (TO_BLOCK (nxt_out_edge)) != | |
1095 | CONTAINING_RGN (BB_TO_BLOCK (bb))) | |
1096 | ++nr_rgn_out_edges; | |
786de7eb | 1097 | SET_BIT (pot_split[bb], EDGE_TO_BIT (nxt_out_edge)); |
b4ead7d4 BS |
1098 | nxt_out_edge = NEXT_OUT (nxt_out_edge); |
1099 | ||
1100 | } | |
1101 | ||
1102 | /* Now nr_rgn_out_edges is the number of region-exit edges from | |
1103 | pred, and nr_out_edges will be the number of pred out edges | |
1104 | not leaving the region. */ | |
1105 | nr_out_edges -= nr_rgn_out_edges; | |
1106 | if (nr_rgn_out_edges > 0) | |
1107 | prob[bb] += 0.9 * prob[BLOCK_TO_BB (pred)] / nr_out_edges; | |
1108 | else | |
1109 | prob[bb] += prob[BLOCK_TO_BB (pred)] / nr_out_edges; | |
1110 | nxt_in_edge = NEXT_IN (nxt_in_edge); | |
1111 | } | |
1112 | while (fst_in_edge != nxt_in_edge); | |
1113 | ||
bdfa170f DB |
1114 | SET_BIT (dom[bb], bb); |
1115 | sbitmap_difference (pot_split[bb], pot_split[bb], ancestor_edges[bb]); | |
b4ead7d4 BS |
1116 | |
1117 | if (sched_verbose >= 2) | |
1118 | fprintf (sched_dump, ";; bb_prob(%d, %d) = %3d\n", bb, BB_TO_BLOCK (bb), | |
1119 | (int) (100.0 * prob[bb])); | |
1120 | } | |
1121 | ||
1122 | /* Functions for target info. */ | |
1123 | ||
1124 | /* Compute in BL the list of split-edges of bb_src relatively to bb_trg. | |
1125 | Note that bb_trg dominates bb_src. */ | |
1126 | ||
1127 | static void | |
1128 | split_edges (bb_src, bb_trg, bl) | |
1129 | int bb_src; | |
1130 | int bb_trg; | |
1131 | edgelst *bl; | |
1132 | { | |
bdfa170f DB |
1133 | sbitmap src = (edgeset) sbitmap_alloc (pot_split[bb_src]->n_bits); |
1134 | sbitmap_copy (src, pot_split[bb_src]); | |
1135 | ||
1136 | sbitmap_difference (src, src, pot_split[bb_trg]); | |
1137 | extract_bitlst (src, bl); | |
1138 | sbitmap_free (src); | |
b4ead7d4 BS |
1139 | } |
1140 | ||
1141 | /* Find the valid candidate-source-blocks for the target block TRG, compute | |
1142 | their probability, and check if they are speculative or not. | |
1143 | For speculative sources, compute their update-blocks and split-blocks. */ | |
1144 | ||
1145 | static void | |
1146 | compute_trg_info (trg) | |
1147 | int trg; | |
1148 | { | |
b3694847 | 1149 | candidate *sp; |
b4ead7d4 BS |
1150 | edgelst el; |
1151 | int check_block, update_idx; | |
1152 | int i, j, k, fst_edge, nxt_edge; | |
1153 | ||
1154 | /* Define some of the fields for the target bb as well. */ | |
1155 | sp = candidate_table + trg; | |
1156 | sp->is_valid = 1; | |
1157 | sp->is_speculative = 0; | |
1158 | sp->src_prob = 100; | |
1159 | ||
1160 | for (i = trg + 1; i < current_nr_blocks; i++) | |
1161 | { | |
1162 | sp = candidate_table + i; | |
1163 | ||
1164 | sp->is_valid = IS_DOMINATED (i, trg); | |
1165 | if (sp->is_valid) | |
1166 | { | |
1167 | sp->src_prob = GET_SRC_PROB (i, trg); | |
1168 | sp->is_valid = (sp->src_prob >= MIN_PROBABILITY); | |
1169 | } | |
1170 | ||
1171 | if (sp->is_valid) | |
1172 | { | |
1173 | split_edges (i, trg, &el); | |
1174 | sp->is_speculative = (el.nr_members) ? 1 : 0; | |
1175 | if (sp->is_speculative && !flag_schedule_speculative) | |
1176 | sp->is_valid = 0; | |
1177 | } | |
1178 | ||
1179 | if (sp->is_valid) | |
1180 | { | |
1181 | char *update_blocks; | |
1182 | ||
1183 | /* Compute split blocks and store them in bblst_table. | |
1184 | The TO block of every split edge is a split block. */ | |
1185 | sp->split_bbs.first_member = &bblst_table[bblst_last]; | |
1186 | sp->split_bbs.nr_members = el.nr_members; | |
1187 | for (j = 0; j < el.nr_members; bblst_last++, j++) | |
1188 | bblst_table[bblst_last] = | |
1189 | TO_BLOCK (rgn_edges[el.first_member[j]]); | |
1190 | sp->update_bbs.first_member = &bblst_table[bblst_last]; | |
1191 | ||
1192 | /* Compute update blocks and store them in bblst_table. | |
1193 | For every split edge, look at the FROM block, and check | |
1194 | all out edges. For each out edge that is not a split edge, | |
1195 | add the TO block to the update block list. This list can end | |
1196 | up with a lot of duplicates. We need to weed them out to avoid | |
1197 | overrunning the end of the bblst_table. */ | |
d55bc081 ZD |
1198 | update_blocks = (char *) alloca (last_basic_block); |
1199 | memset (update_blocks, 0, last_basic_block); | |
b4ead7d4 BS |
1200 | |
1201 | update_idx = 0; | |
1202 | for (j = 0; j < el.nr_members; j++) | |
1203 | { | |
1204 | check_block = FROM_BLOCK (rgn_edges[el.first_member[j]]); | |
1205 | fst_edge = nxt_edge = OUT_EDGES (check_block); | |
1206 | do | |
1207 | { | |
1208 | if (! update_blocks[TO_BLOCK (nxt_edge)]) | |
1209 | { | |
1210 | for (k = 0; k < el.nr_members; k++) | |
1211 | if (EDGE_TO_BIT (nxt_edge) == el.first_member[k]) | |
1212 | break; | |
1213 | ||
1214 | if (k >= el.nr_members) | |
1215 | { | |
1216 | bblst_table[bblst_last++] = TO_BLOCK (nxt_edge); | |
1217 | update_blocks[TO_BLOCK (nxt_edge)] = 1; | |
1218 | update_idx++; | |
1219 | } | |
1220 | } | |
1221 | ||
1222 | nxt_edge = NEXT_OUT (nxt_edge); | |
1223 | } | |
1224 | while (fst_edge != nxt_edge); | |
1225 | } | |
1226 | sp->update_bbs.nr_members = update_idx; | |
1227 | ||
1228 | /* Make sure we didn't overrun the end of bblst_table. */ | |
1229 | if (bblst_last > bblst_size) | |
1230 | abort (); | |
1231 | } | |
1232 | else | |
1233 | { | |
1234 | sp->split_bbs.nr_members = sp->update_bbs.nr_members = 0; | |
1235 | ||
1236 | sp->is_speculative = 0; | |
1237 | sp->src_prob = 0; | |
1238 | } | |
1239 | } | |
1240 | } | |
1241 | ||
1242 | /* Print candidates info, for debugging purposes. Callable from debugger. */ | |
1243 | ||
1244 | void | |
1245 | debug_candidate (i) | |
1246 | int i; | |
1247 | { | |
1248 | if (!candidate_table[i].is_valid) | |
1249 | return; | |
1250 | ||
1251 | if (candidate_table[i].is_speculative) | |
1252 | { | |
1253 | int j; | |
1254 | fprintf (sched_dump, "src b %d bb %d speculative \n", BB_TO_BLOCK (i), i); | |
1255 | ||
1256 | fprintf (sched_dump, "split path: "); | |
1257 | for (j = 0; j < candidate_table[i].split_bbs.nr_members; j++) | |
1258 | { | |
1259 | int b = candidate_table[i].split_bbs.first_member[j]; | |
1260 | ||
1261 | fprintf (sched_dump, " %d ", b); | |
1262 | } | |
1263 | fprintf (sched_dump, "\n"); | |
1264 | ||
1265 | fprintf (sched_dump, "update path: "); | |
1266 | for (j = 0; j < candidate_table[i].update_bbs.nr_members; j++) | |
1267 | { | |
1268 | int b = candidate_table[i].update_bbs.first_member[j]; | |
1269 | ||
1270 | fprintf (sched_dump, " %d ", b); | |
1271 | } | |
1272 | fprintf (sched_dump, "\n"); | |
1273 | } | |
1274 | else | |
1275 | { | |
1276 | fprintf (sched_dump, " src %d equivalent\n", BB_TO_BLOCK (i)); | |
1277 | } | |
1278 | } | |
1279 | ||
1280 | /* Print candidates info, for debugging purposes. Callable from debugger. */ | |
1281 | ||
1282 | void | |
1283 | debug_candidates (trg) | |
1284 | int trg; | |
1285 | { | |
1286 | int i; | |
1287 | ||
1288 | fprintf (sched_dump, "----------- candidate table: target: b=%d bb=%d ---\n", | |
1289 | BB_TO_BLOCK (trg), trg); | |
1290 | for (i = trg + 1; i < current_nr_blocks; i++) | |
1291 | debug_candidate (i); | |
1292 | } | |
1293 | ||
1294 | /* Functions for speculative scheduing. */ | |
1295 | ||
1296 | /* Return 0 if x is a set of a register alive in the beginning of one | |
1297 | of the split-blocks of src, otherwise return 1. */ | |
1298 | ||
1299 | static int | |
1300 | check_live_1 (src, x) | |
1301 | int src; | |
1302 | rtx x; | |
1303 | { | |
b3694847 SS |
1304 | int i; |
1305 | int regno; | |
1306 | rtx reg = SET_DEST (x); | |
b4ead7d4 BS |
1307 | |
1308 | if (reg == 0) | |
1309 | return 1; | |
1310 | ||
1311 | while (GET_CODE (reg) == SUBREG || GET_CODE (reg) == ZERO_EXTRACT | |
1312 | || GET_CODE (reg) == SIGN_EXTRACT | |
1313 | || GET_CODE (reg) == STRICT_LOW_PART) | |
1314 | reg = XEXP (reg, 0); | |
1315 | ||
7193d1dc | 1316 | if (GET_CODE (reg) == PARALLEL) |
b4ead7d4 | 1317 | { |
b3694847 | 1318 | int i; |
90d036a0 | 1319 | |
b4ead7d4 | 1320 | for (i = XVECLEN (reg, 0) - 1; i >= 0; i--) |
7193d1dc RK |
1321 | if (XEXP (XVECEXP (reg, 0, i), 0) != 0) |
1322 | if (check_live_1 (src, XEXP (XVECEXP (reg, 0, i), 0))) | |
90d036a0 | 1323 | return 1; |
90d036a0 | 1324 | |
b4ead7d4 BS |
1325 | return 0; |
1326 | } | |
1327 | ||
1328 | if (GET_CODE (reg) != REG) | |
1329 | return 1; | |
1330 | ||
1331 | regno = REGNO (reg); | |
1332 | ||
1333 | if (regno < FIRST_PSEUDO_REGISTER && global_regs[regno]) | |
1334 | { | |
1335 | /* Global registers are assumed live. */ | |
1336 | return 0; | |
1337 | } | |
1338 | else | |
1339 | { | |
1340 | if (regno < FIRST_PSEUDO_REGISTER) | |
1341 | { | |
1342 | /* Check for hard registers. */ | |
1343 | int j = HARD_REGNO_NREGS (regno, GET_MODE (reg)); | |
1344 | while (--j >= 0) | |
1345 | { | |
1346 | for (i = 0; i < candidate_table[src].split_bbs.nr_members; i++) | |
1347 | { | |
1348 | int b = candidate_table[src].split_bbs.first_member[i]; | |
1349 | ||
1350 | if (REGNO_REG_SET_P (BASIC_BLOCK (b)->global_live_at_start, | |
1351 | regno + j)) | |
1352 | { | |
1353 | return 0; | |
1354 | } | |
1355 | } | |
1356 | } | |
1357 | } | |
1358 | else | |
1359 | { | |
1360 | /* Check for psuedo registers. */ | |
1361 | for (i = 0; i < candidate_table[src].split_bbs.nr_members; i++) | |
1362 | { | |
1363 | int b = candidate_table[src].split_bbs.first_member[i]; | |
1364 | ||
1365 | if (REGNO_REG_SET_P (BASIC_BLOCK (b)->global_live_at_start, regno)) | |
1366 | { | |
1367 | return 0; | |
1368 | } | |
1369 | } | |
1370 | } | |
1371 | } | |
1372 | ||
1373 | return 1; | |
1374 | } | |
1375 | ||
1376 | /* If x is a set of a register R, mark that R is alive in the beginning | |
1377 | of every update-block of src. */ | |
1378 | ||
1379 | static void | |
1380 | update_live_1 (src, x) | |
1381 | int src; | |
1382 | rtx x; | |
1383 | { | |
b3694847 SS |
1384 | int i; |
1385 | int regno; | |
1386 | rtx reg = SET_DEST (x); | |
b4ead7d4 BS |
1387 | |
1388 | if (reg == 0) | |
1389 | return; | |
1390 | ||
1391 | while (GET_CODE (reg) == SUBREG || GET_CODE (reg) == ZERO_EXTRACT | |
1392 | || GET_CODE (reg) == SIGN_EXTRACT | |
1393 | || GET_CODE (reg) == STRICT_LOW_PART) | |
1394 | reg = XEXP (reg, 0); | |
1395 | ||
7193d1dc | 1396 | if (GET_CODE (reg) == PARALLEL) |
b4ead7d4 | 1397 | { |
b3694847 | 1398 | int i; |
90d036a0 | 1399 | |
b4ead7d4 | 1400 | for (i = XVECLEN (reg, 0) - 1; i >= 0; i--) |
7193d1dc RK |
1401 | if (XEXP (XVECEXP (reg, 0, i), 0) != 0) |
1402 | update_live_1 (src, XEXP (XVECEXP (reg, 0, i), 0)); | |
90d036a0 | 1403 | |
b4ead7d4 BS |
1404 | return; |
1405 | } | |
1406 | ||
1407 | if (GET_CODE (reg) != REG) | |
1408 | return; | |
1409 | ||
1410 | /* Global registers are always live, so the code below does not apply | |
1411 | to them. */ | |
1412 | ||
1413 | regno = REGNO (reg); | |
1414 | ||
1415 | if (regno >= FIRST_PSEUDO_REGISTER || !global_regs[regno]) | |
1416 | { | |
1417 | if (regno < FIRST_PSEUDO_REGISTER) | |
1418 | { | |
1419 | int j = HARD_REGNO_NREGS (regno, GET_MODE (reg)); | |
1420 | while (--j >= 0) | |
1421 | { | |
1422 | for (i = 0; i < candidate_table[src].update_bbs.nr_members; i++) | |
1423 | { | |
1424 | int b = candidate_table[src].update_bbs.first_member[i]; | |
1425 | ||
1426 | SET_REGNO_REG_SET (BASIC_BLOCK (b)->global_live_at_start, | |
1427 | regno + j); | |
1428 | } | |
1429 | } | |
1430 | } | |
1431 | else | |
1432 | { | |
1433 | for (i = 0; i < candidate_table[src].update_bbs.nr_members; i++) | |
1434 | { | |
1435 | int b = candidate_table[src].update_bbs.first_member[i]; | |
1436 | ||
1437 | SET_REGNO_REG_SET (BASIC_BLOCK (b)->global_live_at_start, regno); | |
1438 | } | |
1439 | } | |
1440 | } | |
1441 | } | |
1442 | ||
1443 | /* Return 1 if insn can be speculatively moved from block src to trg, | |
1444 | otherwise return 0. Called before first insertion of insn to | |
1445 | ready-list or before the scheduling. */ | |
1446 | ||
1447 | static int | |
1448 | check_live (insn, src) | |
1449 | rtx insn; | |
1450 | int src; | |
1451 | { | |
1452 | /* Find the registers set by instruction. */ | |
1453 | if (GET_CODE (PATTERN (insn)) == SET | |
1454 | || GET_CODE (PATTERN (insn)) == CLOBBER) | |
1455 | return check_live_1 (src, PATTERN (insn)); | |
1456 | else if (GET_CODE (PATTERN (insn)) == PARALLEL) | |
1457 | { | |
1458 | int j; | |
1459 | for (j = XVECLEN (PATTERN (insn), 0) - 1; j >= 0; j--) | |
1460 | if ((GET_CODE (XVECEXP (PATTERN (insn), 0, j)) == SET | |
1461 | || GET_CODE (XVECEXP (PATTERN (insn), 0, j)) == CLOBBER) | |
1462 | && !check_live_1 (src, XVECEXP (PATTERN (insn), 0, j))) | |
1463 | return 0; | |
1464 | ||
1465 | return 1; | |
1466 | } | |
1467 | ||
1468 | return 1; | |
1469 | } | |
1470 | ||
1471 | /* Update the live registers info after insn was moved speculatively from | |
1472 | block src to trg. */ | |
1473 | ||
1474 | static void | |
1475 | update_live (insn, src) | |
1476 | rtx insn; | |
1477 | int src; | |
1478 | { | |
1479 | /* Find the registers set by instruction. */ | |
1480 | if (GET_CODE (PATTERN (insn)) == SET | |
1481 | || GET_CODE (PATTERN (insn)) == CLOBBER) | |
1482 | update_live_1 (src, PATTERN (insn)); | |
1483 | else if (GET_CODE (PATTERN (insn)) == PARALLEL) | |
1484 | { | |
1485 | int j; | |
1486 | for (j = XVECLEN (PATTERN (insn), 0) - 1; j >= 0; j--) | |
1487 | if (GET_CODE (XVECEXP (PATTERN (insn), 0, j)) == SET | |
1488 | || GET_CODE (XVECEXP (PATTERN (insn), 0, j)) == CLOBBER) | |
1489 | update_live_1 (src, XVECEXP (PATTERN (insn), 0, j)); | |
1490 | } | |
1491 | } | |
1492 | ||
1493 | /* Exception Free Loads: | |
1494 | ||
1495 | We define five classes of speculative loads: IFREE, IRISKY, | |
1496 | PFREE, PRISKY, and MFREE. | |
1497 | ||
1498 | IFREE loads are loads that are proved to be exception-free, just | |
1499 | by examining the load insn. Examples for such loads are loads | |
1500 | from TOC and loads of global data. | |
1501 | ||
1502 | IRISKY loads are loads that are proved to be exception-risky, | |
1503 | just by examining the load insn. Examples for such loads are | |
1504 | volatile loads and loads from shared memory. | |
1505 | ||
1506 | PFREE loads are loads for which we can prove, by examining other | |
1507 | insns, that they are exception-free. Currently, this class consists | |
1508 | of loads for which we are able to find a "similar load", either in | |
1509 | the target block, or, if only one split-block exists, in that split | |
1510 | block. Load2 is similar to load1 if both have same single base | |
1511 | register. We identify only part of the similar loads, by finding | |
1512 | an insn upon which both load1 and load2 have a DEF-USE dependence. | |
1513 | ||
1514 | PRISKY loads are loads for which we can prove, by examining other | |
1515 | insns, that they are exception-risky. Currently we have two proofs for | |
1516 | such loads. The first proof detects loads that are probably guarded by a | |
1517 | test on the memory address. This proof is based on the | |
1518 | backward and forward data dependence information for the region. | |
1519 | Let load-insn be the examined load. | |
1520 | Load-insn is PRISKY iff ALL the following hold: | |
1521 | ||
1522 | - insn1 is not in the same block as load-insn | |
1523 | - there is a DEF-USE dependence chain (insn1, ..., load-insn) | |
1524 | - test-insn is either a compare or a branch, not in the same block | |
1525 | as load-insn | |
1526 | - load-insn is reachable from test-insn | |
1527 | - there is a DEF-USE dependence chain (insn1, ..., test-insn) | |
1528 | ||
1529 | This proof might fail when the compare and the load are fed | |
1530 | by an insn not in the region. To solve this, we will add to this | |
1531 | group all loads that have no input DEF-USE dependence. | |
1532 | ||
1533 | The second proof detects loads that are directly or indirectly | |
1534 | fed by a speculative load. This proof is affected by the | |
1535 | scheduling process. We will use the flag fed_by_spec_load. | |
1536 | Initially, all insns have this flag reset. After a speculative | |
1537 | motion of an insn, if insn is either a load, or marked as | |
1538 | fed_by_spec_load, we will also mark as fed_by_spec_load every | |
1539 | insn1 for which a DEF-USE dependence (insn, insn1) exists. A | |
1540 | load which is fed_by_spec_load is also PRISKY. | |
1541 | ||
1542 | MFREE (maybe-free) loads are all the remaining loads. They may be | |
1543 | exception-free, but we cannot prove it. | |
1544 | ||
1545 | Now, all loads in IFREE and PFREE classes are considered | |
1546 | exception-free, while all loads in IRISKY and PRISKY classes are | |
1547 | considered exception-risky. As for loads in the MFREE class, | |
1548 | these are considered either exception-free or exception-risky, | |
1549 | depending on whether we are pessimistic or optimistic. We have | |
1550 | to take the pessimistic approach to assure the safety of | |
1551 | speculative scheduling, but we can take the optimistic approach | |
1552 | by invoking the -fsched_spec_load_dangerous option. */ | |
1553 | ||
1554 | enum INSN_TRAP_CLASS | |
1555 | { | |
1556 | TRAP_FREE = 0, IFREE = 1, PFREE_CANDIDATE = 2, | |
1557 | PRISKY_CANDIDATE = 3, IRISKY = 4, TRAP_RISKY = 5 | |
1558 | }; | |
1559 | ||
1560 | #define WORST_CLASS(class1, class2) \ | |
1561 | ((class1 > class2) ? class1 : class2) | |
1562 | ||
1563 | /* Non-zero if block bb_to is equal to, or reachable from block bb_from. */ | |
1564 | #define IS_REACHABLE(bb_from, bb_to) \ | |
786de7eb | 1565 | (bb_from == bb_to \ |
b4ead7d4 | 1566 | || IS_RGN_ENTRY (bb_from) \ |
786de7eb KH |
1567 | || (TEST_BIT (ancestor_edges[bb_to], \ |
1568 | EDGE_TO_BIT (IN_EDGES (BB_TO_BLOCK (bb_from)))))) | |
b4ead7d4 BS |
1569 | |
1570 | /* Non-zero iff the address is comprised from at most 1 register. */ | |
1571 | #define CONST_BASED_ADDRESS_P(x) \ | |
1572 | (GET_CODE (x) == REG \ | |
786de7eb KH |
1573 | || ((GET_CODE (x) == PLUS || GET_CODE (x) == MINUS \ |
1574 | || (GET_CODE (x) == LO_SUM)) \ | |
1575 | && (CONSTANT_P (XEXP (x, 0)) \ | |
81217be9 | 1576 | || CONSTANT_P (XEXP (x, 1))))) |
b4ead7d4 BS |
1577 | |
1578 | /* Turns on the fed_by_spec_load flag for insns fed by load_insn. */ | |
1579 | ||
1580 | static void | |
1581 | set_spec_fed (load_insn) | |
1582 | rtx load_insn; | |
1583 | { | |
1584 | rtx link; | |
1585 | ||
1586 | for (link = INSN_DEPEND (load_insn); link; link = XEXP (link, 1)) | |
1587 | if (GET_MODE (link) == VOIDmode) | |
1588 | FED_BY_SPEC_LOAD (XEXP (link, 0)) = 1; | |
1589 | } /* set_spec_fed */ | |
1590 | ||
1591 | /* On the path from the insn to load_insn_bb, find a conditional | |
1592 | branch depending on insn, that guards the speculative load. */ | |
1593 | ||
1594 | static int | |
1595 | find_conditional_protection (insn, load_insn_bb) | |
1596 | rtx insn; | |
1597 | int load_insn_bb; | |
1598 | { | |
1599 | rtx link; | |
1600 | ||
1601 | /* Iterate through DEF-USE forward dependences. */ | |
1602 | for (link = INSN_DEPEND (insn); link; link = XEXP (link, 1)) | |
1603 | { | |
1604 | rtx next = XEXP (link, 0); | |
1605 | if ((CONTAINING_RGN (BLOCK_NUM (next)) == | |
1606 | CONTAINING_RGN (BB_TO_BLOCK (load_insn_bb))) | |
1607 | && IS_REACHABLE (INSN_BB (next), load_insn_bb) | |
1608 | && load_insn_bb != INSN_BB (next) | |
1609 | && GET_MODE (link) == VOIDmode | |
1610 | && (GET_CODE (next) == JUMP_INSN | |
1611 | || find_conditional_protection (next, load_insn_bb))) | |
1612 | return 1; | |
1613 | } | |
1614 | return 0; | |
1615 | } /* find_conditional_protection */ | |
1616 | ||
1617 | /* Returns 1 if the same insn1 that participates in the computation | |
1618 | of load_insn's address is feeding a conditional branch that is | |
1619 | guarding on load_insn. This is true if we find a the two DEF-USE | |
1620 | chains: | |
1621 | insn1 -> ... -> conditional-branch | |
1622 | insn1 -> ... -> load_insn, | |
1623 | and if a flow path exist: | |
1624 | insn1 -> ... -> conditional-branch -> ... -> load_insn, | |
1625 | and if insn1 is on the path | |
1626 | region-entry -> ... -> bb_trg -> ... load_insn. | |
1627 | ||
1628 | Locate insn1 by climbing on LOG_LINKS from load_insn. | |
1629 | Locate the branch by following INSN_DEPEND from insn1. */ | |
1630 | ||
1631 | static int | |
1632 | is_conditionally_protected (load_insn, bb_src, bb_trg) | |
1633 | rtx load_insn; | |
1634 | int bb_src, bb_trg; | |
1635 | { | |
1636 | rtx link; | |
1637 | ||
1638 | for (link = LOG_LINKS (load_insn); link; link = XEXP (link, 1)) | |
1639 | { | |
1640 | rtx insn1 = XEXP (link, 0); | |
1641 | ||
1642 | /* Must be a DEF-USE dependence upon non-branch. */ | |
1643 | if (GET_MODE (link) != VOIDmode | |
1644 | || GET_CODE (insn1) == JUMP_INSN) | |
1645 | continue; | |
1646 | ||
1647 | /* Must exist a path: region-entry -> ... -> bb_trg -> ... load_insn. */ | |
1648 | if (INSN_BB (insn1) == bb_src | |
1649 | || (CONTAINING_RGN (BLOCK_NUM (insn1)) | |
1650 | != CONTAINING_RGN (BB_TO_BLOCK (bb_src))) | |
1651 | || (!IS_REACHABLE (bb_trg, INSN_BB (insn1)) | |
1652 | && !IS_REACHABLE (INSN_BB (insn1), bb_trg))) | |
1653 | continue; | |
1654 | ||
1655 | /* Now search for the conditional-branch. */ | |
1656 | if (find_conditional_protection (insn1, bb_src)) | |
1657 | return 1; | |
1658 | ||
1659 | /* Recursive step: search another insn1, "above" current insn1. */ | |
1660 | return is_conditionally_protected (insn1, bb_src, bb_trg); | |
1661 | } | |
1662 | ||
1663 | /* The chain does not exist. */ | |
1664 | return 0; | |
1665 | } /* is_conditionally_protected */ | |
1666 | ||
1667 | /* Returns 1 if a clue for "similar load" 'insn2' is found, and hence | |
1668 | load_insn can move speculatively from bb_src to bb_trg. All the | |
1669 | following must hold: | |
1670 | ||
1671 | (1) both loads have 1 base register (PFREE_CANDIDATEs). | |
1672 | (2) load_insn and load1 have a def-use dependence upon | |
1673 | the same insn 'insn1'. | |
1674 | (3) either load2 is in bb_trg, or: | |
1675 | - there's only one split-block, and | |
1676 | - load1 is on the escape path, and | |
1677 | ||
1678 | From all these we can conclude that the two loads access memory | |
1679 | addresses that differ at most by a constant, and hence if moving | |
1680 | load_insn would cause an exception, it would have been caused by | |
1681 | load2 anyhow. */ | |
1682 | ||
1683 | static int | |
1684 | is_pfree (load_insn, bb_src, bb_trg) | |
1685 | rtx load_insn; | |
1686 | int bb_src, bb_trg; | |
1687 | { | |
1688 | rtx back_link; | |
b3694847 | 1689 | candidate *candp = candidate_table + bb_src; |
b4ead7d4 BS |
1690 | |
1691 | if (candp->split_bbs.nr_members != 1) | |
1692 | /* Must have exactly one escape block. */ | |
1693 | return 0; | |
1694 | ||
1695 | for (back_link = LOG_LINKS (load_insn); | |
1696 | back_link; back_link = XEXP (back_link, 1)) | |
1697 | { | |
1698 | rtx insn1 = XEXP (back_link, 0); | |
1699 | ||
1700 | if (GET_MODE (back_link) == VOIDmode) | |
1701 | { | |
1702 | /* Found a DEF-USE dependence (insn1, load_insn). */ | |
1703 | rtx fore_link; | |
1704 | ||
1705 | for (fore_link = INSN_DEPEND (insn1); | |
1706 | fore_link; fore_link = XEXP (fore_link, 1)) | |
1707 | { | |
1708 | rtx insn2 = XEXP (fore_link, 0); | |
1709 | if (GET_MODE (fore_link) == VOIDmode) | |
1710 | { | |
1711 | /* Found a DEF-USE dependence (insn1, insn2). */ | |
1712 | if (haifa_classify_insn (insn2) != PFREE_CANDIDATE) | |
1713 | /* insn2 not guaranteed to be a 1 base reg load. */ | |
1714 | continue; | |
1715 | ||
1716 | if (INSN_BB (insn2) == bb_trg) | |
1717 | /* insn2 is the similar load, in the target block. */ | |
1718 | return 1; | |
1719 | ||
1720 | if (*(candp->split_bbs.first_member) == BLOCK_NUM (insn2)) | |
1721 | /* insn2 is a similar load, in a split-block. */ | |
1722 | return 1; | |
1723 | } | |
1724 | } | |
1725 | } | |
1726 | } | |
1727 | ||
1728 | /* Couldn't find a similar load. */ | |
1729 | return 0; | |
1730 | } /* is_pfree */ | |
1731 | ||
1732 | /* Returns a class that insn with GET_DEST(insn)=x may belong to, | |
1733 | as found by analyzing insn's expression. */ | |
1734 | ||
1735 | static int | |
1736 | may_trap_exp (x, is_store) | |
1737 | rtx x; | |
1738 | int is_store; | |
1739 | { | |
1740 | enum rtx_code code; | |
1741 | ||
1742 | if (x == 0) | |
1743 | return TRAP_FREE; | |
1744 | code = GET_CODE (x); | |
1745 | if (is_store) | |
1746 | { | |
81217be9 | 1747 | if (code == MEM && may_trap_p (x)) |
b4ead7d4 BS |
1748 | return TRAP_RISKY; |
1749 | else | |
1750 | return TRAP_FREE; | |
1751 | } | |
1752 | if (code == MEM) | |
1753 | { | |
1754 | /* The insn uses memory: a volatile load. */ | |
1755 | if (MEM_VOLATILE_P (x)) | |
1756 | return IRISKY; | |
1757 | /* An exception-free load. */ | |
1758 | if (!may_trap_p (x)) | |
1759 | return IFREE; | |
1760 | /* A load with 1 base register, to be further checked. */ | |
1761 | if (CONST_BASED_ADDRESS_P (XEXP (x, 0))) | |
1762 | return PFREE_CANDIDATE; | |
1763 | /* No info on the load, to be further checked. */ | |
1764 | return PRISKY_CANDIDATE; | |
1765 | } | |
1766 | else | |
1767 | { | |
1768 | const char *fmt; | |
1769 | int i, insn_class = TRAP_FREE; | |
1770 | ||
1771 | /* Neither store nor load, check if it may cause a trap. */ | |
1772 | if (may_trap_p (x)) | |
1773 | return TRAP_RISKY; | |
1774 | /* Recursive step: walk the insn... */ | |
1775 | fmt = GET_RTX_FORMAT (code); | |
1776 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) | |
1777 | { | |
1778 | if (fmt[i] == 'e') | |
1779 | { | |
1780 | int tmp_class = may_trap_exp (XEXP (x, i), is_store); | |
1781 | insn_class = WORST_CLASS (insn_class, tmp_class); | |
1782 | } | |
1783 | else if (fmt[i] == 'E') | |
1784 | { | |
1785 | int j; | |
1786 | for (j = 0; j < XVECLEN (x, i); j++) | |
1787 | { | |
1788 | int tmp_class = may_trap_exp (XVECEXP (x, i, j), is_store); | |
1789 | insn_class = WORST_CLASS (insn_class, tmp_class); | |
1790 | if (insn_class == TRAP_RISKY || insn_class == IRISKY) | |
1791 | break; | |
1792 | } | |
1793 | } | |
1794 | if (insn_class == TRAP_RISKY || insn_class == IRISKY) | |
1795 | break; | |
1796 | } | |
1797 | return insn_class; | |
1798 | } | |
1799 | } | |
1800 | ||
1801 | /* Classifies insn for the purpose of verifying that it can be | |
1802 | moved speculatively, by examining it's patterns, returning: | |
1803 | TRAP_RISKY: store, or risky non-load insn (e.g. division by variable). | |
1804 | TRAP_FREE: non-load insn. | |
1805 | IFREE: load from a globaly safe location. | |
1806 | IRISKY: volatile load. | |
1807 | PFREE_CANDIDATE, PRISKY_CANDIDATE: load that need to be checked for | |
1808 | being either PFREE or PRISKY. */ | |
1809 | ||
1810 | static int | |
1811 | haifa_classify_insn (insn) | |
1812 | rtx insn; | |
1813 | { | |
1814 | rtx pat = PATTERN (insn); | |
1815 | int tmp_class = TRAP_FREE; | |
1816 | int insn_class = TRAP_FREE; | |
1817 | enum rtx_code code; | |
1818 | ||
1819 | if (GET_CODE (pat) == PARALLEL) | |
1820 | { | |
1821 | int i, len = XVECLEN (pat, 0); | |
1822 | ||
1823 | for (i = len - 1; i >= 0; i--) | |
1824 | { | |
1825 | code = GET_CODE (XVECEXP (pat, 0, i)); | |
1826 | switch (code) | |
1827 | { | |
1828 | case CLOBBER: | |
1829 | /* Test if it is a 'store'. */ | |
1830 | tmp_class = may_trap_exp (XEXP (XVECEXP (pat, 0, i), 0), 1); | |
1831 | break; | |
1832 | case SET: | |
1833 | /* Test if it is a store. */ | |
1834 | tmp_class = may_trap_exp (SET_DEST (XVECEXP (pat, 0, i)), 1); | |
1835 | if (tmp_class == TRAP_RISKY) | |
1836 | break; | |
1837 | /* Test if it is a load. */ | |
90d036a0 RK |
1838 | tmp_class |
1839 | = WORST_CLASS (tmp_class, | |
1840 | may_trap_exp (SET_SRC (XVECEXP (pat, 0, i)), | |
1841 | 0)); | |
b4ead7d4 BS |
1842 | break; |
1843 | case COND_EXEC: | |
1844 | case TRAP_IF: | |
1845 | tmp_class = TRAP_RISKY; | |
1846 | break; | |
90d036a0 RK |
1847 | default: |
1848 | ; | |
b4ead7d4 BS |
1849 | } |
1850 | insn_class = WORST_CLASS (insn_class, tmp_class); | |
1851 | if (insn_class == TRAP_RISKY || insn_class == IRISKY) | |
1852 | break; | |
1853 | } | |
1854 | } | |
1855 | else | |
1856 | { | |
1857 | code = GET_CODE (pat); | |
1858 | switch (code) | |
1859 | { | |
1860 | case CLOBBER: | |
1861 | /* Test if it is a 'store'. */ | |
1862 | tmp_class = may_trap_exp (XEXP (pat, 0), 1); | |
1863 | break; | |
1864 | case SET: | |
1865 | /* Test if it is a store. */ | |
1866 | tmp_class = may_trap_exp (SET_DEST (pat), 1); | |
1867 | if (tmp_class == TRAP_RISKY) | |
1868 | break; | |
1869 | /* Test if it is a load. */ | |
1870 | tmp_class = | |
1871 | WORST_CLASS (tmp_class, | |
1872 | may_trap_exp (SET_SRC (pat), 0)); | |
1873 | break; | |
1874 | case COND_EXEC: | |
1875 | case TRAP_IF: | |
1876 | tmp_class = TRAP_RISKY; | |
1877 | break; | |
1878 | default:; | |
1879 | } | |
1880 | insn_class = tmp_class; | |
1881 | } | |
1882 | ||
1883 | return insn_class; | |
1884 | } | |
1885 | ||
1886 | /* Return 1 if load_insn is prisky (i.e. if load_insn is fed by | |
1887 | a load moved speculatively, or if load_insn is protected by | |
1888 | a compare on load_insn's address). */ | |
1889 | ||
1890 | static int | |
1891 | is_prisky (load_insn, bb_src, bb_trg) | |
1892 | rtx load_insn; | |
1893 | int bb_src, bb_trg; | |
1894 | { | |
1895 | if (FED_BY_SPEC_LOAD (load_insn)) | |
1896 | return 1; | |
1897 | ||
1898 | if (LOG_LINKS (load_insn) == NULL) | |
1899 | /* Dependence may 'hide' out of the region. */ | |
1900 | return 1; | |
1901 | ||
1902 | if (is_conditionally_protected (load_insn, bb_src, bb_trg)) | |
1903 | return 1; | |
1904 | ||
1905 | return 0; | |
1906 | } | |
1907 | ||
1908 | /* Insn is a candidate to be moved speculatively from bb_src to bb_trg. | |
1909 | Return 1 if insn is exception-free (and the motion is valid) | |
1910 | and 0 otherwise. */ | |
1911 | ||
1912 | static int | |
1913 | is_exception_free (insn, bb_src, bb_trg) | |
1914 | rtx insn; | |
1915 | int bb_src, bb_trg; | |
1916 | { | |
1917 | int insn_class = haifa_classify_insn (insn); | |
1918 | ||
1919 | /* Handle non-load insns. */ | |
1920 | switch (insn_class) | |
1921 | { | |
1922 | case TRAP_FREE: | |
1923 | return 1; | |
1924 | case TRAP_RISKY: | |
1925 | return 0; | |
1926 | default:; | |
1927 | } | |
1928 | ||
1929 | /* Handle loads. */ | |
1930 | if (!flag_schedule_speculative_load) | |
1931 | return 0; | |
1932 | IS_LOAD_INSN (insn) = 1; | |
1933 | switch (insn_class) | |
1934 | { | |
1935 | case IFREE: | |
1936 | return (1); | |
1937 | case IRISKY: | |
1938 | return 0; | |
1939 | case PFREE_CANDIDATE: | |
1940 | if (is_pfree (insn, bb_src, bb_trg)) | |
1941 | return 1; | |
1942 | /* Don't 'break' here: PFREE-candidate is also PRISKY-candidate. */ | |
1943 | case PRISKY_CANDIDATE: | |
1944 | if (!flag_schedule_speculative_load_dangerous | |
1945 | || is_prisky (insn, bb_src, bb_trg)) | |
1946 | return 0; | |
1947 | break; | |
1948 | default:; | |
1949 | } | |
1950 | ||
1951 | return flag_schedule_speculative_load_dangerous; | |
1952 | } | |
1953 | \f | |
1954 | /* The number of insns from the current block scheduled so far. */ | |
1955 | static int sched_target_n_insns; | |
1956 | /* The number of insns from the current block to be scheduled in total. */ | |
1957 | static int target_n_insns; | |
1958 | /* The number of insns from the entire region scheduled so far. */ | |
1959 | static int sched_n_insns; | |
79c2ffde BS |
1960 | /* Nonzero if the last scheduled insn was a jump. */ |
1961 | static int last_was_jump; | |
b4ead7d4 BS |
1962 | |
1963 | /* Implementations of the sched_info functions for region scheduling. */ | |
1964 | static void init_ready_list PARAMS ((struct ready_list *)); | |
1965 | static int can_schedule_ready_p PARAMS ((rtx)); | |
1966 | static int new_ready PARAMS ((rtx)); | |
1967 | static int schedule_more_p PARAMS ((void)); | |
1968 | static const char *rgn_print_insn PARAMS ((rtx, int)); | |
1969 | static int rgn_rank PARAMS ((rtx, rtx)); | |
18e720b3 BS |
1970 | static int contributes_to_priority PARAMS ((rtx, rtx)); |
1971 | static void compute_jump_reg_dependencies PARAMS ((rtx, regset)); | |
b4ead7d4 BS |
1972 | |
1973 | /* Return nonzero if there are more insns that should be scheduled. */ | |
1974 | ||
1975 | static int | |
1976 | schedule_more_p () | |
1977 | { | |
79c2ffde | 1978 | return ! last_was_jump && sched_target_n_insns < target_n_insns; |
b4ead7d4 BS |
1979 | } |
1980 | ||
1981 | /* Add all insns that are initially ready to the ready list READY. Called | |
1982 | once before scheduling a set of insns. */ | |
1983 | ||
1984 | static void | |
1985 | init_ready_list (ready) | |
1986 | struct ready_list *ready; | |
1987 | { | |
1988 | rtx prev_head = current_sched_info->prev_head; | |
1989 | rtx next_tail = current_sched_info->next_tail; | |
1990 | int bb_src; | |
1991 | rtx insn; | |
1992 | ||
1993 | target_n_insns = 0; | |
1994 | sched_target_n_insns = 0; | |
1995 | sched_n_insns = 0; | |
79c2ffde | 1996 | last_was_jump = 0; |
b4ead7d4 BS |
1997 | |
1998 | /* Print debugging information. */ | |
1999 | if (sched_verbose >= 5) | |
2000 | debug_dependencies (); | |
2001 | ||
2002 | /* Prepare current target block info. */ | |
2003 | if (current_nr_blocks > 1) | |
2004 | { | |
2005 | candidate_table = (candidate *) xmalloc (current_nr_blocks | |
2006 | * sizeof (candidate)); | |
2007 | ||
2008 | bblst_last = 0; | |
2009 | /* bblst_table holds split blocks and update blocks for each block after | |
2010 | the current one in the region. split blocks and update blocks are | |
2011 | the TO blocks of region edges, so there can be at most rgn_nr_edges | |
2012 | of them. */ | |
2013 | bblst_size = (current_nr_blocks - target_bb) * rgn_nr_edges; | |
2014 | bblst_table = (int *) xmalloc (bblst_size * sizeof (int)); | |
2015 | ||
2016 | bitlst_table_last = 0; | |
b4ead7d4 BS |
2017 | bitlst_table = (int *) xmalloc (rgn_nr_edges * sizeof (int)); |
2018 | ||
2019 | compute_trg_info (target_bb); | |
2020 | } | |
2021 | ||
2022 | /* Initialize ready list with all 'ready' insns in target block. | |
2023 | Count number of insns in the target block being scheduled. */ | |
2024 | for (insn = NEXT_INSN (prev_head); insn != next_tail; insn = NEXT_INSN (insn)) | |
2025 | { | |
2026 | rtx next; | |
2027 | ||
2028 | if (! INSN_P (insn)) | |
2029 | continue; | |
2030 | next = NEXT_INSN (insn); | |
2031 | ||
2032 | if (INSN_DEP_COUNT (insn) == 0 | |
be202ec2 | 2033 | && (! INSN_P (next) || SCHED_GROUP_P (next) == 0)) |
b4ead7d4 BS |
2034 | ready_add (ready, insn); |
2035 | if (!(SCHED_GROUP_P (insn))) | |
2036 | target_n_insns++; | |
2037 | } | |
2038 | ||
2039 | /* Add to ready list all 'ready' insns in valid source blocks. | |
2040 | For speculative insns, check-live, exception-free, and | |
2041 | issue-delay. */ | |
2042 | for (bb_src = target_bb + 1; bb_src < current_nr_blocks; bb_src++) | |
2043 | if (IS_VALID (bb_src)) | |
2044 | { | |
2045 | rtx src_head; | |
2046 | rtx src_next_tail; | |
2047 | rtx tail, head; | |
2048 | ||
2049 | get_block_head_tail (BB_TO_BLOCK (bb_src), &head, &tail); | |
2050 | src_next_tail = NEXT_INSN (tail); | |
2051 | src_head = head; | |
2052 | ||
2053 | for (insn = src_head; insn != src_next_tail; insn = NEXT_INSN (insn)) | |
2054 | { | |
2055 | if (! INSN_P (insn)) | |
2056 | continue; | |
2057 | ||
2058 | if (!CANT_MOVE (insn) | |
2059 | && (!IS_SPECULATIVE_INSN (insn) | |
fae15c93 VM |
2060 | || ((((!targetm.sched.use_dfa_pipeline_interface |
2061 | || !(*targetm.sched.use_dfa_pipeline_interface) ()) | |
2062 | && insn_issue_delay (insn) <= 3) | |
2063 | || (targetm.sched.use_dfa_pipeline_interface | |
2064 | && (*targetm.sched.use_dfa_pipeline_interface) () | |
2065 | && (recog_memoized (insn) < 0 | |
2066 | || min_insn_conflict_delay (curr_state, | |
2067 | insn, insn) <= 3))) | |
b4ead7d4 BS |
2068 | && check_live (insn, bb_src) |
2069 | && is_exception_free (insn, bb_src, target_bb)))) | |
2070 | { | |
2071 | rtx next; | |
2072 | ||
a1f300c0 | 2073 | /* Note that we haven't squirreled away the notes for |
b4ead7d4 BS |
2074 | blocks other than the current. So if this is a |
2075 | speculative insn, NEXT might otherwise be a note. */ | |
2076 | next = next_nonnote_insn (insn); | |
2077 | if (INSN_DEP_COUNT (insn) == 0 | |
2078 | && (! next | |
be202ec2 FS |
2079 | || ! INSN_P (next) |
2080 | || SCHED_GROUP_P (next) == 0)) | |
b4ead7d4 BS |
2081 | ready_add (ready, insn); |
2082 | } | |
2083 | } | |
2084 | } | |
2085 | } | |
2086 | ||
2087 | /* Called after taking INSN from the ready list. Returns nonzero if this | |
2088 | insn can be scheduled, nonzero if we should silently discard it. */ | |
2089 | ||
2090 | static int | |
2091 | can_schedule_ready_p (insn) | |
2092 | rtx insn; | |
2093 | { | |
79c2ffde BS |
2094 | if (GET_CODE (insn) == JUMP_INSN) |
2095 | last_was_jump = 1; | |
2096 | ||
b4ead7d4 BS |
2097 | /* An interblock motion? */ |
2098 | if (INSN_BB (insn) != target_bb) | |
2099 | { | |
2100 | rtx temp; | |
2101 | basic_block b1; | |
2102 | ||
2103 | if (IS_SPECULATIVE_INSN (insn)) | |
2104 | { | |
2105 | if (!check_live (insn, INSN_BB (insn))) | |
2106 | return 0; | |
2107 | update_live (insn, INSN_BB (insn)); | |
2108 | ||
2109 | /* For speculative load, mark insns fed by it. */ | |
2110 | if (IS_LOAD_INSN (insn) || FED_BY_SPEC_LOAD (insn)) | |
2111 | set_spec_fed (insn); | |
2112 | ||
2113 | nr_spec++; | |
2114 | } | |
2115 | nr_inter++; | |
2116 | ||
2117 | /* Find the beginning of the scheduling group. */ | |
2118 | /* ??? Ought to update basic block here, but later bits of | |
2119 | schedule_block assumes the original insn block is | |
2120 | still intact. */ | |
2121 | ||
2122 | temp = insn; | |
2123 | while (SCHED_GROUP_P (temp)) | |
2124 | temp = PREV_INSN (temp); | |
2125 | ||
6d2f8887 | 2126 | /* Update source block boundaries. */ |
b4ead7d4 BS |
2127 | b1 = BLOCK_FOR_INSN (temp); |
2128 | if (temp == b1->head && insn == b1->end) | |
2129 | { | |
2130 | /* We moved all the insns in the basic block. | |
2131 | Emit a note after the last insn and update the | |
2132 | begin/end boundaries to point to the note. */ | |
2133 | rtx note = emit_note_after (NOTE_INSN_DELETED, insn); | |
2134 | b1->head = note; | |
2135 | b1->end = note; | |
2136 | } | |
2137 | else if (insn == b1->end) | |
2138 | { | |
2139 | /* We took insns from the end of the basic block, | |
2140 | so update the end of block boundary so that it | |
2141 | points to the first insn we did not move. */ | |
2142 | b1->end = PREV_INSN (temp); | |
2143 | } | |
2144 | else if (temp == b1->head) | |
2145 | { | |
2146 | /* We took insns from the start of the basic block, | |
2147 | so update the start of block boundary so that | |
2148 | it points to the first insn we did not move. */ | |
2149 | b1->head = NEXT_INSN (insn); | |
2150 | } | |
2151 | } | |
2152 | else | |
2153 | { | |
2154 | /* In block motion. */ | |
2155 | sched_target_n_insns++; | |
2156 | } | |
2157 | sched_n_insns++; | |
2158 | ||
2159 | return 1; | |
2160 | } | |
2161 | ||
2162 | /* Called after INSN has all its dependencies resolved. Return nonzero | |
2163 | if it should be moved to the ready list or the queue, or zero if we | |
2164 | should silently discard it. */ | |
2165 | static int | |
2166 | new_ready (next) | |
2167 | rtx next; | |
2168 | { | |
2169 | /* For speculative insns, before inserting to ready/queue, | |
2170 | check live, exception-free, and issue-delay. */ | |
2171 | if (INSN_BB (next) != target_bb | |
2172 | && (!IS_VALID (INSN_BB (next)) | |
2173 | || CANT_MOVE (next) | |
2174 | || (IS_SPECULATIVE_INSN (next) | |
fae15c93 VM |
2175 | && (0 |
2176 | || (targetm.sched.use_dfa_pipeline_interface | |
2177 | && (*targetm.sched.use_dfa_pipeline_interface) () | |
2178 | && recog_memoized (next) >= 0 | |
2179 | && min_insn_conflict_delay (curr_state, next, | |
2180 | next) > 3) | |
2181 | || ((!targetm.sched.use_dfa_pipeline_interface | |
2182 | || !(*targetm.sched.use_dfa_pipeline_interface) ()) | |
2183 | && insn_issue_delay (next) > 3) | |
b4ead7d4 BS |
2184 | || !check_live (next, INSN_BB (next)) |
2185 | || !is_exception_free (next, INSN_BB (next), target_bb))))) | |
2186 | return 0; | |
2187 | return 1; | |
2188 | } | |
2189 | ||
2190 | /* Return a string that contains the insn uid and optionally anything else | |
2191 | necessary to identify this insn in an output. It's valid to use a | |
2192 | static buffer for this. The ALIGNED parameter should cause the string | |
2193 | to be formatted so that multiple output lines will line up nicely. */ | |
2194 | ||
2195 | static const char * | |
2196 | rgn_print_insn (insn, aligned) | |
2197 | rtx insn; | |
2198 | int aligned; | |
2199 | { | |
2200 | static char tmp[80]; | |
2201 | ||
2202 | if (aligned) | |
2203 | sprintf (tmp, "b%3d: i%4d", INSN_BB (insn), INSN_UID (insn)); | |
2204 | else | |
2205 | { | |
b4ead7d4 | 2206 | if (current_nr_blocks > 1 && INSN_BB (insn) != target_bb) |
f56887a7 BS |
2207 | sprintf (tmp, "%d/b%d", INSN_UID (insn), INSN_BB (insn)); |
2208 | else | |
2209 | sprintf (tmp, "%d", INSN_UID (insn)); | |
b4ead7d4 BS |
2210 | } |
2211 | return tmp; | |
2212 | } | |
2213 | ||
2214 | /* Compare priority of two insns. Return a positive number if the second | |
2215 | insn is to be preferred for scheduling, and a negative one if the first | |
2216 | is to be preferred. Zero if they are equally good. */ | |
2217 | ||
2218 | static int | |
2219 | rgn_rank (insn1, insn2) | |
2220 | rtx insn1, insn2; | |
2221 | { | |
2222 | /* Some comparison make sense in interblock scheduling only. */ | |
2223 | if (INSN_BB (insn1) != INSN_BB (insn2)) | |
2224 | { | |
2225 | int spec_val, prob_val; | |
2226 | ||
2227 | /* Prefer an inblock motion on an interblock motion. */ | |
2228 | if ((INSN_BB (insn2) == target_bb) && (INSN_BB (insn1) != target_bb)) | |
2229 | return 1; | |
2230 | if ((INSN_BB (insn1) == target_bb) && (INSN_BB (insn2) != target_bb)) | |
2231 | return -1; | |
2232 | ||
2233 | /* Prefer a useful motion on a speculative one. */ | |
2234 | spec_val = IS_SPECULATIVE_INSN (insn1) - IS_SPECULATIVE_INSN (insn2); | |
2235 | if (spec_val) | |
2236 | return spec_val; | |
2237 | ||
2238 | /* Prefer a more probable (speculative) insn. */ | |
2239 | prob_val = INSN_PROBABILITY (insn2) - INSN_PROBABILITY (insn1); | |
2240 | if (prob_val) | |
2241 | return prob_val; | |
2242 | } | |
2243 | return 0; | |
2244 | } | |
2245 | ||
18e720b3 BS |
2246 | /* NEXT is an instruction that depends on INSN (a backward dependence); |
2247 | return nonzero if we should include this dependence in priority | |
2248 | calculations. */ | |
2249 | ||
2250 | static int | |
2251 | contributes_to_priority (next, insn) | |
2252 | rtx next, insn; | |
2253 | { | |
2254 | return BLOCK_NUM (next) == BLOCK_NUM (insn); | |
2255 | } | |
2256 | ||
2257 | /* INSN is a JUMP_INSN. Store the set of registers that must be considered | |
2258 | to be set by this jump in SET. */ | |
2259 | ||
2260 | static void | |
2261 | compute_jump_reg_dependencies (insn, set) | |
2262 | rtx insn ATTRIBUTE_UNUSED; | |
2263 | regset set ATTRIBUTE_UNUSED; | |
2264 | { | |
2265 | /* Nothing to do here, since we postprocess jumps in | |
2266 | add_branch_dependences. */ | |
2267 | } | |
2268 | ||
b4ead7d4 BS |
2269 | /* Used in schedule_insns to initialize current_sched_info for scheduling |
2270 | regions (or single basic blocks). */ | |
2271 | ||
2272 | static struct sched_info region_sched_info = | |
2273 | { | |
2274 | init_ready_list, | |
2275 | can_schedule_ready_p, | |
2276 | schedule_more_p, | |
2277 | new_ready, | |
2278 | rgn_rank, | |
2279 | rgn_print_insn, | |
18e720b3 BS |
2280 | contributes_to_priority, |
2281 | compute_jump_reg_dependencies, | |
b4ead7d4 BS |
2282 | |
2283 | NULL, NULL, | |
2284 | NULL, NULL, | |
4b6c5340 | 2285 | 0, 0 |
b4ead7d4 BS |
2286 | }; |
2287 | ||
68c17f30 RH |
2288 | /* Determine if PAT sets a CLASS_LIKELY_SPILLED_P register. */ |
2289 | ||
2290 | static bool | |
2291 | sets_likely_spilled (pat) | |
2292 | rtx pat; | |
2293 | { | |
2294 | bool ret = false; | |
2295 | note_stores (pat, sets_likely_spilled_1, &ret); | |
2296 | return ret; | |
2297 | } | |
2298 | ||
2299 | static void | |
2300 | sets_likely_spilled_1 (x, pat, data) | |
2301 | rtx x, pat; | |
2302 | void *data; | |
2303 | { | |
2304 | bool *ret = (bool *) data; | |
2305 | ||
2306 | if (GET_CODE (pat) == SET | |
2307 | && REG_P (x) | |
2308 | && REGNO (x) < FIRST_PSEUDO_REGISTER | |
2309 | && CLASS_LIKELY_SPILLED_P (REGNO_REG_CLASS (REGNO (x)))) | |
2310 | *ret = true; | |
2311 | } | |
2312 | ||
b4ead7d4 BS |
2313 | /* Add dependences so that branches are scheduled to run last in their |
2314 | block. */ | |
2315 | ||
2316 | static void | |
2317 | add_branch_dependences (head, tail) | |
2318 | rtx head, tail; | |
2319 | { | |
2320 | rtx insn, last; | |
2321 | ||
8d8a083e RH |
2322 | /* For all branches, calls, uses, clobbers, cc0 setters, and instructions |
2323 | that can throw exceptions, force them to remain in order at the end of | |
2324 | the block by adding dependencies and giving the last a high priority. | |
2325 | There may be notes present, and prev_head may also be a note. | |
b4ead7d4 BS |
2326 | |
2327 | Branches must obviously remain at the end. Calls should remain at the | |
2328 | end since moving them results in worse register allocation. Uses remain | |
68c17f30 RH |
2329 | at the end to ensure proper register allocation. |
2330 | ||
2331 | cc0 setters remaim at the end because they can't be moved away from | |
2332 | their cc0 user. | |
2333 | ||
2334 | Insns setting CLASS_LIKELY_SPILLED_P registers (usually return values) | |
2335 | are not moved before reload because we can wind up with register | |
2336 | allocation failures. */ | |
2337 | ||
b4ead7d4 BS |
2338 | insn = tail; |
2339 | last = 0; | |
2340 | while (GET_CODE (insn) == CALL_INSN | |
2341 | || GET_CODE (insn) == JUMP_INSN | |
2342 | || (GET_CODE (insn) == INSN | |
2343 | && (GET_CODE (PATTERN (insn)) == USE | |
2344 | || GET_CODE (PATTERN (insn)) == CLOBBER | |
8d8a083e | 2345 | || can_throw_internal (insn) |
b4ead7d4 BS |
2346 | #ifdef HAVE_cc0 |
2347 | || sets_cc0_p (PATTERN (insn)) | |
2348 | #endif | |
68c17f30 RH |
2349 | || (!reload_completed |
2350 | && sets_likely_spilled (PATTERN (insn))))) | |
b4ead7d4 BS |
2351 | || GET_CODE (insn) == NOTE) |
2352 | { | |
2353 | if (GET_CODE (insn) != NOTE) | |
2354 | { | |
37a0f8a5 | 2355 | if (last != 0 && !find_insn_list (insn, LOG_LINKS (last))) |
b4ead7d4 BS |
2356 | { |
2357 | add_dependence (last, insn, REG_DEP_ANTI); | |
2358 | INSN_REF_COUNT (insn)++; | |
2359 | } | |
2360 | ||
2361 | CANT_MOVE (insn) = 1; | |
2362 | ||
2363 | last = insn; | |
2364 | /* Skip over insns that are part of a group. | |
2365 | Make each insn explicitly depend on the previous insn. | |
2366 | This ensures that only the group header will ever enter | |
2367 | the ready queue (and, when scheduled, will automatically | |
2368 | schedule the SCHED_GROUP_P block). */ | |
2369 | while (SCHED_GROUP_P (insn)) | |
2370 | { | |
2371 | rtx temp = prev_nonnote_insn (insn); | |
2372 | add_dependence (insn, temp, REG_DEP_ANTI); | |
2373 | insn = temp; | |
2374 | } | |
2375 | } | |
2376 | ||
2377 | /* Don't overrun the bounds of the basic block. */ | |
2378 | if (insn == head) | |
2379 | break; | |
2380 | ||
2381 | insn = PREV_INSN (insn); | |
2382 | } | |
2383 | ||
2384 | /* Make sure these insns are scheduled last in their block. */ | |
2385 | insn = last; | |
2386 | if (insn != 0) | |
2387 | while (insn != head) | |
2388 | { | |
2389 | insn = prev_nonnote_insn (insn); | |
2390 | ||
2391 | if (INSN_REF_COUNT (insn) != 0) | |
2392 | continue; | |
2393 | ||
2394 | add_dependence (last, insn, REG_DEP_ANTI); | |
2395 | INSN_REF_COUNT (insn) = 1; | |
2396 | ||
2397 | /* Skip over insns that are part of a group. */ | |
2398 | while (SCHED_GROUP_P (insn)) | |
2399 | insn = prev_nonnote_insn (insn); | |
2400 | } | |
2401 | } | |
2402 | ||
2403 | /* Data structures for the computation of data dependences in a regions. We | |
2404 | keep one `deps' structure for every basic block. Before analyzing the | |
2405 | data dependences for a bb, its variables are initialized as a function of | |
2406 | the variables of its predecessors. When the analysis for a bb completes, | |
2407 | we save the contents to the corresponding bb_deps[bb] variable. */ | |
2408 | ||
2409 | static struct deps *bb_deps; | |
2410 | ||
37a0f8a5 RH |
2411 | /* Duplicate the INSN_LIST elements of COPY and prepend them to OLD. */ |
2412 | ||
2413 | static rtx | |
2414 | concat_INSN_LIST (copy, old) | |
2415 | rtx copy, old; | |
2416 | { | |
2417 | rtx new = old; | |
2418 | for (; copy ; copy = XEXP (copy, 1)) | |
2419 | new = alloc_INSN_LIST (XEXP (copy, 0), new); | |
2420 | return new; | |
2421 | } | |
2422 | ||
2423 | static void | |
2424 | concat_insn_mem_list (copy_insns, copy_mems, old_insns_p, old_mems_p) | |
2425 | rtx copy_insns, copy_mems; | |
2426 | rtx *old_insns_p, *old_mems_p; | |
2427 | { | |
2428 | rtx new_insns = *old_insns_p; | |
2429 | rtx new_mems = *old_mems_p; | |
2430 | ||
2431 | while (copy_insns) | |
2432 | { | |
2433 | new_insns = alloc_INSN_LIST (XEXP (copy_insns, 0), new_insns); | |
2434 | new_mems = alloc_EXPR_LIST (VOIDmode, XEXP (copy_mems, 0), new_mems); | |
2435 | copy_insns = XEXP (copy_insns, 1); | |
2436 | copy_mems = XEXP (copy_mems, 1); | |
2437 | } | |
2438 | ||
2439 | *old_insns_p = new_insns; | |
2440 | *old_mems_p = new_mems; | |
2441 | } | |
2442 | ||
b4ead7d4 | 2443 | /* After computing the dependencies for block BB, propagate the dependencies |
4ba478b8 | 2444 | found in TMP_DEPS to the successors of the block. */ |
b4ead7d4 | 2445 | static void |
37a0f8a5 | 2446 | propagate_deps (bb, pred_deps) |
b4ead7d4 | 2447 | int bb; |
37a0f8a5 | 2448 | struct deps *pred_deps; |
b4ead7d4 BS |
2449 | { |
2450 | int b = BB_TO_BLOCK (bb); | |
2451 | int e, first_edge; | |
b4ead7d4 BS |
2452 | |
2453 | /* bb's structures are inherited by its successors. */ | |
2454 | first_edge = e = OUT_EDGES (b); | |
37a0f8a5 RH |
2455 | if (e > 0) |
2456 | do | |
2457 | { | |
2458 | int b_succ = TO_BLOCK (e); | |
2459 | int bb_succ = BLOCK_TO_BB (b_succ); | |
2460 | struct deps *succ_deps = bb_deps + bb_succ; | |
2461 | int reg; | |
2462 | ||
2463 | /* Only bbs "below" bb, in the same region, are interesting. */ | |
2464 | if (CONTAINING_RGN (b) != CONTAINING_RGN (b_succ) | |
2465 | || bb_succ <= bb) | |
2466 | { | |
2467 | e = NEXT_OUT (e); | |
2468 | continue; | |
2469 | } | |
b4ead7d4 | 2470 | |
37a0f8a5 RH |
2471 | /* The reg_last lists are inherited by bb_succ. */ |
2472 | EXECUTE_IF_SET_IN_REG_SET (&pred_deps->reg_last_in_use, 0, reg, | |
2473 | { | |
2474 | struct deps_reg *pred_rl = &pred_deps->reg_last[reg]; | |
2475 | struct deps_reg *succ_rl = &succ_deps->reg_last[reg]; | |
2476 | ||
2477 | succ_rl->uses = concat_INSN_LIST (pred_rl->uses, succ_rl->uses); | |
2478 | succ_rl->sets = concat_INSN_LIST (pred_rl->sets, succ_rl->sets); | |
2479 | succ_rl->clobbers = concat_INSN_LIST (pred_rl->clobbers, | |
2480 | succ_rl->clobbers); | |
2583081e RH |
2481 | succ_rl->uses_length += pred_rl->uses_length; |
2482 | succ_rl->clobbers_length += pred_rl->clobbers_length; | |
37a0f8a5 RH |
2483 | }); |
2484 | IOR_REG_SET (&succ_deps->reg_last_in_use, &pred_deps->reg_last_in_use); | |
2485 | ||
2486 | /* Mem read/write lists are inherited by bb_succ. */ | |
2487 | concat_insn_mem_list (pred_deps->pending_read_insns, | |
2488 | pred_deps->pending_read_mems, | |
2489 | &succ_deps->pending_read_insns, | |
2490 | &succ_deps->pending_read_mems); | |
2491 | concat_insn_mem_list (pred_deps->pending_write_insns, | |
2492 | pred_deps->pending_write_mems, | |
2493 | &succ_deps->pending_write_insns, | |
2494 | &succ_deps->pending_write_mems); | |
2495 | ||
2496 | succ_deps->last_pending_memory_flush | |
2497 | = concat_INSN_LIST (pred_deps->last_pending_memory_flush, | |
2498 | succ_deps->last_pending_memory_flush); | |
786de7eb | 2499 | |
37a0f8a5 RH |
2500 | succ_deps->pending_lists_length += pred_deps->pending_lists_length; |
2501 | succ_deps->pending_flush_length += pred_deps->pending_flush_length; | |
2502 | ||
2503 | /* last_function_call is inherited by bb_succ. */ | |
2504 | succ_deps->last_function_call | |
2505 | = concat_INSN_LIST (pred_deps->last_function_call, | |
2506 | succ_deps->last_function_call); | |
2507 | ||
2508 | /* sched_before_next_call is inherited by bb_succ. */ | |
2509 | succ_deps->sched_before_next_call | |
2510 | = concat_INSN_LIST (pred_deps->sched_before_next_call, | |
2511 | succ_deps->sched_before_next_call); | |
2512 | ||
2513 | e = NEXT_OUT (e); | |
2514 | } | |
2515 | while (e != first_edge); | |
b4ead7d4 | 2516 | |
37a0f8a5 RH |
2517 | /* These lists should point to the right place, for correct |
2518 | freeing later. */ | |
2519 | bb_deps[bb].pending_read_insns = pred_deps->pending_read_insns; | |
2520 | bb_deps[bb].pending_read_mems = pred_deps->pending_read_mems; | |
2521 | bb_deps[bb].pending_write_insns = pred_deps->pending_write_insns; | |
2522 | bb_deps[bb].pending_write_mems = pred_deps->pending_write_mems; | |
2523 | ||
2524 | /* Can't allow these to be freed twice. */ | |
2525 | pred_deps->pending_read_insns = 0; | |
2526 | pred_deps->pending_read_mems = 0; | |
2527 | pred_deps->pending_write_insns = 0; | |
2528 | pred_deps->pending_write_mems = 0; | |
b4ead7d4 BS |
2529 | } |
2530 | ||
2531 | /* Compute backward dependences inside bb. In a multiple blocks region: | |
2532 | (1) a bb is analyzed after its predecessors, and (2) the lists in | |
2533 | effect at the end of bb (after analyzing for bb) are inherited by | |
2534 | bb's successrs. | |
2535 | ||
2536 | Specifically for reg-reg data dependences, the block insns are | |
2537 | scanned by sched_analyze () top-to-bottom. Two lists are | |
4ba478b8 RH |
2538 | maintained by sched_analyze (): reg_last[].sets for register DEFs, |
2539 | and reg_last[].uses for register USEs. | |
b4ead7d4 BS |
2540 | |
2541 | When analysis is completed for bb, we update for its successors: | |
2542 | ; - DEFS[succ] = Union (DEFS [succ], DEFS [bb]) | |
2543 | ; - USES[succ] = Union (USES [succ], DEFS [bb]) | |
2544 | ||
2545 | The mechanism for computing mem-mem data dependence is very | |
2546 | similar, and the result is interblock dependences in the region. */ | |
2547 | ||
2548 | static void | |
2549 | compute_block_backward_dependences (bb) | |
2550 | int bb; | |
2551 | { | |
2552 | rtx head, tail; | |
b4ead7d4 BS |
2553 | struct deps tmp_deps; |
2554 | ||
2555 | tmp_deps = bb_deps[bb]; | |
2556 | ||
2557 | /* Do the analysis for this block. */ | |
2558 | get_block_head_tail (BB_TO_BLOCK (bb), &head, &tail); | |
2559 | sched_analyze (&tmp_deps, head, tail); | |
2560 | add_branch_dependences (head, tail); | |
2561 | ||
2562 | if (current_nr_blocks > 1) | |
4ba478b8 | 2563 | propagate_deps (bb, &tmp_deps); |
b4ead7d4 BS |
2564 | |
2565 | /* Free up the INSN_LISTs. */ | |
2566 | free_deps (&tmp_deps); | |
b4ead7d4 | 2567 | } |
4ba478b8 | 2568 | |
b4ead7d4 BS |
2569 | /* Remove all INSN_LISTs and EXPR_LISTs from the pending lists and add |
2570 | them to the unused_*_list variables, so that they can be reused. */ | |
2571 | ||
2572 | static void | |
2573 | free_pending_lists () | |
2574 | { | |
2575 | int bb; | |
2576 | ||
2577 | for (bb = 0; bb < current_nr_blocks; bb++) | |
2578 | { | |
2579 | free_INSN_LIST_list (&bb_deps[bb].pending_read_insns); | |
2580 | free_INSN_LIST_list (&bb_deps[bb].pending_write_insns); | |
2581 | free_EXPR_LIST_list (&bb_deps[bb].pending_read_mems); | |
2582 | free_EXPR_LIST_list (&bb_deps[bb].pending_write_mems); | |
2583 | } | |
2584 | } | |
2585 | \f | |
2586 | /* Print dependences for debugging, callable from debugger. */ | |
2587 | ||
2588 | void | |
2589 | debug_dependencies () | |
2590 | { | |
2591 | int bb; | |
2592 | ||
2593 | fprintf (sched_dump, ";; --------------- forward dependences: ------------ \n"); | |
2594 | for (bb = 0; bb < current_nr_blocks; bb++) | |
2595 | { | |
2596 | if (1) | |
2597 | { | |
2598 | rtx head, tail; | |
2599 | rtx next_tail; | |
2600 | rtx insn; | |
2601 | ||
2602 | get_block_head_tail (BB_TO_BLOCK (bb), &head, &tail); | |
2603 | next_tail = NEXT_INSN (tail); | |
2604 | fprintf (sched_dump, "\n;; --- Region Dependences --- b %d bb %d \n", | |
2605 | BB_TO_BLOCK (bb), bb); | |
2606 | ||
fae15c93 VM |
2607 | if (targetm.sched.use_dfa_pipeline_interface |
2608 | && (*targetm.sched.use_dfa_pipeline_interface) ()) | |
2609 | { | |
2610 | fprintf (sched_dump, ";; %7s%6s%6s%6s%6s%6s%14s\n", | |
2611 | "insn", "code", "bb", "dep", "prio", "cost", | |
2612 | "reservation"); | |
2613 | fprintf (sched_dump, ";; %7s%6s%6s%6s%6s%6s%14s\n", | |
2614 | "----", "----", "--", "---", "----", "----", | |
2615 | "-----------"); | |
2616 | } | |
2617 | else | |
2618 | { | |
2619 | fprintf (sched_dump, ";; %7s%6s%6s%6s%6s%6s%11s%6s\n", | |
2620 | "insn", "code", "bb", "dep", "prio", "cost", "blockage", "units"); | |
2621 | fprintf (sched_dump, ";; %7s%6s%6s%6s%6s%6s%11s%6s\n", | |
2622 | "----", "----", "--", "---", "----", "----", "--------", "-----"); | |
2623 | } | |
2624 | ||
b4ead7d4 BS |
2625 | for (insn = head; insn != next_tail; insn = NEXT_INSN (insn)) |
2626 | { | |
2627 | rtx link; | |
b4ead7d4 BS |
2628 | |
2629 | if (! INSN_P (insn)) | |
2630 | { | |
2631 | int n; | |
2632 | fprintf (sched_dump, ";; %6d ", INSN_UID (insn)); | |
2633 | if (GET_CODE (insn) == NOTE) | |
2634 | { | |
2635 | n = NOTE_LINE_NUMBER (insn); | |
2636 | if (n < 0) | |
2637 | fprintf (sched_dump, "%s\n", GET_NOTE_INSN_NAME (n)); | |
2638 | else | |
2639 | fprintf (sched_dump, "line %d, file %s\n", n, | |
2640 | NOTE_SOURCE_FILE (insn)); | |
2641 | } | |
2642 | else | |
2643 | fprintf (sched_dump, " {%s}\n", GET_RTX_NAME (GET_CODE (insn))); | |
2644 | continue; | |
2645 | } | |
2646 | ||
fae15c93 VM |
2647 | if (targetm.sched.use_dfa_pipeline_interface |
2648 | && (*targetm.sched.use_dfa_pipeline_interface) ()) | |
2649 | { | |
2650 | fprintf (sched_dump, | |
2651 | ";; %s%5d%6d%6d%6d%6d%6d ", | |
2652 | (SCHED_GROUP_P (insn) ? "+" : " "), | |
2653 | INSN_UID (insn), | |
2654 | INSN_CODE (insn), | |
2655 | INSN_BB (insn), | |
2656 | INSN_DEP_COUNT (insn), | |
2657 | INSN_PRIORITY (insn), | |
2658 | insn_cost (insn, 0, 0)); | |
786de7eb | 2659 | |
fae15c93 VM |
2660 | if (recog_memoized (insn) < 0) |
2661 | fprintf (sched_dump, "nothing"); | |
2662 | else | |
2663 | print_reservation (sched_dump, insn); | |
2664 | } | |
2665 | else | |
2666 | { | |
2667 | int unit = insn_unit (insn); | |
2668 | int range | |
2669 | = (unit < 0 | |
2670 | || function_units[unit].blockage_range_function == 0 | |
2671 | ? 0 | |
2672 | : function_units[unit].blockage_range_function (insn)); | |
2673 | fprintf (sched_dump, | |
2674 | ";; %s%5d%6d%6d%6d%6d%6d %3d -%3d ", | |
2675 | (SCHED_GROUP_P (insn) ? "+" : " "), | |
2676 | INSN_UID (insn), | |
2677 | INSN_CODE (insn), | |
2678 | INSN_BB (insn), | |
2679 | INSN_DEP_COUNT (insn), | |
2680 | INSN_PRIORITY (insn), | |
2681 | insn_cost (insn, 0, 0), | |
2682 | (int) MIN_BLOCKAGE_COST (range), | |
2683 | (int) MAX_BLOCKAGE_COST (range)); | |
2684 | insn_print_units (insn); | |
2685 | } | |
2686 | ||
b4ead7d4 BS |
2687 | fprintf (sched_dump, "\t: "); |
2688 | for (link = INSN_DEPEND (insn); link; link = XEXP (link, 1)) | |
2689 | fprintf (sched_dump, "%d ", INSN_UID (XEXP (link, 0))); | |
2690 | fprintf (sched_dump, "\n"); | |
2691 | } | |
2692 | } | |
2693 | } | |
2694 | fprintf (sched_dump, "\n"); | |
2695 | } | |
2696 | \f | |
2697 | /* Schedule a region. A region is either an inner loop, a loop-free | |
2698 | subroutine, or a single basic block. Each bb in the region is | |
2699 | scheduled after its flow predecessors. */ | |
2700 | ||
2701 | static void | |
2702 | schedule_region (rgn) | |
2703 | int rgn; | |
2704 | { | |
2705 | int bb; | |
2706 | int rgn_n_insns = 0; | |
2707 | int sched_rgn_n_insns = 0; | |
2708 | ||
2709 | /* Set variables for the current region. */ | |
2710 | current_nr_blocks = RGN_NR_BLOCKS (rgn); | |
2711 | current_blocks = RGN_BLOCKS (rgn); | |
2712 | ||
2713 | init_deps_global (); | |
2714 | ||
2715 | /* Initializations for region data dependence analyisis. */ | |
2716 | bb_deps = (struct deps *) xmalloc (sizeof (struct deps) * current_nr_blocks); | |
2717 | for (bb = 0; bb < current_nr_blocks; bb++) | |
2718 | init_deps (bb_deps + bb); | |
2719 | ||
2720 | /* Compute LOG_LINKS. */ | |
2721 | for (bb = 0; bb < current_nr_blocks; bb++) | |
2722 | compute_block_backward_dependences (bb); | |
2723 | ||
2724 | /* Compute INSN_DEPEND. */ | |
2725 | for (bb = current_nr_blocks - 1; bb >= 0; bb--) | |
2726 | { | |
2727 | rtx head, tail; | |
2728 | get_block_head_tail (BB_TO_BLOCK (bb), &head, &tail); | |
2729 | ||
2730 | compute_forward_dependences (head, tail); | |
2731 | } | |
2732 | ||
2733 | /* Set priorities. */ | |
2734 | for (bb = 0; bb < current_nr_blocks; bb++) | |
79c2ffde BS |
2735 | { |
2736 | rtx head, tail; | |
2737 | get_block_head_tail (BB_TO_BLOCK (bb), &head, &tail); | |
2738 | ||
2739 | rgn_n_insns += set_priorities (head, tail); | |
2740 | } | |
b4ead7d4 BS |
2741 | |
2742 | /* Compute interblock info: probabilities, split-edges, dominators, etc. */ | |
2743 | if (current_nr_blocks > 1) | |
2744 | { | |
2745 | int i; | |
2746 | ||
2747 | prob = (float *) xmalloc ((current_nr_blocks) * sizeof (float)); | |
2748 | ||
bdfa170f DB |
2749 | dom = sbitmap_vector_alloc (current_nr_blocks, current_nr_blocks); |
2750 | sbitmap_vector_zero (dom, current_nr_blocks); | |
b4ead7d4 BS |
2751 | /* Edge to bit. */ |
2752 | rgn_nr_edges = 0; | |
2753 | edge_to_bit = (int *) xmalloc (nr_edges * sizeof (int)); | |
2754 | for (i = 1; i < nr_edges; i++) | |
2755 | if (CONTAINING_RGN (FROM_BLOCK (i)) == rgn) | |
2756 | EDGE_TO_BIT (i) = rgn_nr_edges++; | |
2757 | rgn_edges = (int *) xmalloc (rgn_nr_edges * sizeof (int)); | |
2758 | ||
2759 | rgn_nr_edges = 0; | |
2760 | for (i = 1; i < nr_edges; i++) | |
2761 | if (CONTAINING_RGN (FROM_BLOCK (i)) == (rgn)) | |
2762 | rgn_edges[rgn_nr_edges++] = i; | |
2763 | ||
2764 | /* Split edges. */ | |
bdfa170f DB |
2765 | pot_split = sbitmap_vector_alloc (current_nr_blocks, rgn_nr_edges); |
2766 | sbitmap_vector_zero (pot_split, current_nr_blocks); | |
2767 | ancestor_edges = sbitmap_vector_alloc (current_nr_blocks, rgn_nr_edges); | |
2768 | sbitmap_vector_zero (ancestor_edges, current_nr_blocks); | |
b4ead7d4 BS |
2769 | |
2770 | /* Compute probabilities, dominators, split_edges. */ | |
2771 | for (bb = 0; bb < current_nr_blocks; bb++) | |
2772 | compute_dom_prob_ps (bb); | |
2773 | } | |
2774 | ||
2775 | /* Now we can schedule all blocks. */ | |
2776 | for (bb = 0; bb < current_nr_blocks; bb++) | |
2777 | { | |
2778 | rtx head, tail; | |
2779 | int b = BB_TO_BLOCK (bb); | |
2780 | ||
2781 | get_block_head_tail (b, &head, &tail); | |
2782 | ||
2783 | if (no_real_insns_p (head, tail)) | |
2784 | continue; | |
2785 | ||
2786 | current_sched_info->prev_head = PREV_INSN (head); | |
2787 | current_sched_info->next_tail = NEXT_INSN (tail); | |
2788 | ||
2789 | if (write_symbols != NO_DEBUG) | |
2790 | { | |
79c2ffde BS |
2791 | save_line_notes (b, head, tail); |
2792 | rm_line_notes (head, tail); | |
b4ead7d4 BS |
2793 | } |
2794 | ||
2795 | /* rm_other_notes only removes notes which are _inside_ the | |
2796 | block---that is, it won't remove notes before the first real insn | |
2797 | or after the last real insn of the block. So if the first insn | |
2798 | has a REG_SAVE_NOTE which would otherwise be emitted before the | |
2799 | insn, it is redundant with the note before the start of the | |
570a98eb | 2800 | block, and so we have to take it out. */ |
b4ead7d4 BS |
2801 | if (INSN_P (head)) |
2802 | { | |
2803 | rtx note; | |
2804 | ||
2805 | for (note = REG_NOTES (head); note; note = XEXP (note, 1)) | |
2806 | if (REG_NOTE_KIND (note) == REG_SAVE_NOTE) | |
2807 | { | |
570a98eb JH |
2808 | remove_note (head, note); |
2809 | note = XEXP (note, 1); | |
2810 | remove_note (head, note); | |
b4ead7d4 BS |
2811 | } |
2812 | } | |
2813 | ||
2814 | /* Remove remaining note insns from the block, save them in | |
2815 | note_list. These notes are restored at the end of | |
2816 | schedule_block (). */ | |
2817 | rm_other_notes (head, tail); | |
2818 | ||
2819 | target_bb = bb; | |
2820 | ||
2821 | current_sched_info->queue_must_finish_empty | |
2822 | = current_nr_blocks > 1 && !flag_schedule_interblock; | |
2823 | ||
2824 | schedule_block (b, rgn_n_insns); | |
2825 | sched_rgn_n_insns += sched_n_insns; | |
2826 | ||
2827 | /* Update target block boundaries. */ | |
2828 | if (head == BLOCK_HEAD (b)) | |
2829 | BLOCK_HEAD (b) = current_sched_info->head; | |
2830 | if (tail == BLOCK_END (b)) | |
2831 | BLOCK_END (b) = current_sched_info->tail; | |
2832 | ||
2833 | /* Clean up. */ | |
2834 | if (current_nr_blocks > 1) | |
2835 | { | |
2836 | free (candidate_table); | |
2837 | free (bblst_table); | |
2838 | free (bitlst_table); | |
2839 | } | |
2840 | } | |
2841 | ||
2842 | /* Sanity check: verify that all region insns were scheduled. */ | |
2843 | if (sched_rgn_n_insns != rgn_n_insns) | |
2844 | abort (); | |
2845 | ||
2846 | /* Restore line notes. */ | |
2847 | if (write_symbols != NO_DEBUG) | |
2848 | { | |
2849 | for (bb = 0; bb < current_nr_blocks; bb++) | |
79c2ffde BS |
2850 | { |
2851 | rtx head, tail; | |
2852 | get_block_head_tail (BB_TO_BLOCK (bb), &head, &tail); | |
14052b68 | 2853 | restore_line_notes (head, tail); |
79c2ffde | 2854 | } |
b4ead7d4 BS |
2855 | } |
2856 | ||
2857 | /* Done with this region. */ | |
2858 | free_pending_lists (); | |
2859 | ||
2860 | finish_deps_global (); | |
2861 | ||
2862 | free (bb_deps); | |
2863 | ||
2864 | if (current_nr_blocks > 1) | |
2865 | { | |
b4ead7d4 | 2866 | free (prob); |
bdfa170f DB |
2867 | sbitmap_vector_free (dom); |
2868 | sbitmap_vector_free (pot_split); | |
2869 | sbitmap_vector_free (ancestor_edges); | |
b4ead7d4 BS |
2870 | free (edge_to_bit); |
2871 | free (rgn_edges); | |
b4ead7d4 BS |
2872 | } |
2873 | } | |
2874 | ||
2875 | /* Indexed by region, holds the number of death notes found in that region. | |
2876 | Used for consistency checks. */ | |
2877 | static int *deaths_in_region; | |
2878 | ||
2879 | /* Initialize data structures for region scheduling. */ | |
2880 | ||
2881 | static void | |
2882 | init_regions () | |
2883 | { | |
2884 | sbitmap blocks; | |
2885 | int rgn; | |
2886 | ||
2887 | nr_regions = 0; | |
0b17ab2f RH |
2888 | rgn_table = (region *) xmalloc ((n_basic_blocks) * sizeof (region)); |
2889 | rgn_bb_table = (int *) xmalloc ((n_basic_blocks) * sizeof (int)); | |
d55bc081 ZD |
2890 | block_to_bb = (int *) xmalloc ((last_basic_block) * sizeof (int)); |
2891 | containing_rgn = (int *) xmalloc ((last_basic_block) * sizeof (int)); | |
b4ead7d4 | 2892 | |
b4ead7d4 BS |
2893 | /* Compute regions for scheduling. */ |
2894 | if (reload_completed | |
0b17ab2f | 2895 | || n_basic_blocks == 1 |
b4ead7d4 BS |
2896 | || !flag_schedule_interblock) |
2897 | { | |
2898 | find_single_block_region (); | |
2899 | } | |
2900 | else | |
2901 | { | |
2902 | /* Verify that a 'good' control flow graph can be built. */ | |
2903 | if (is_cfg_nonregular ()) | |
2904 | { | |
2905 | find_single_block_region (); | |
2906 | } | |
2907 | else | |
2908 | { | |
355be0dc | 2909 | dominance_info dom; |
b4ead7d4 BS |
2910 | struct edge_list *edge_list; |
2911 | ||
b4ead7d4 BS |
2912 | /* The scheduler runs after flow; therefore, we can't blindly call |
2913 | back into find_basic_blocks since doing so could invalidate the | |
2914 | info in global_live_at_start. | |
2915 | ||
2916 | Consider a block consisting entirely of dead stores; after life | |
2917 | analysis it would be a block of NOTE_INSN_DELETED notes. If | |
2918 | we call find_basic_blocks again, then the block would be removed | |
2919 | entirely and invalidate our the register live information. | |
2920 | ||
2921 | We could (should?) recompute register live information. Doing | |
2922 | so may even be beneficial. */ | |
2923 | edge_list = create_edge_list (); | |
2924 | ||
2925 | /* Compute the dominators and post dominators. */ | |
355be0dc | 2926 | dom = calculate_dominance_info (CDI_DOMINATORS); |
b4ead7d4 BS |
2927 | |
2928 | /* build_control_flow will return nonzero if it detects unreachable | |
2929 | blocks or any other irregularity with the cfg which prevents | |
2930 | cross block scheduling. */ | |
2931 | if (build_control_flow (edge_list) != 0) | |
2932 | find_single_block_region (); | |
2933 | else | |
2934 | find_rgns (edge_list, dom); | |
2935 | ||
2936 | if (sched_verbose >= 3) | |
2937 | debug_regions (); | |
2938 | ||
2939 | /* We are done with flow's edge list. */ | |
2940 | free_edge_list (edge_list); | |
2941 | ||
2942 | /* For now. This will move as more and more of haifa is converted | |
2943 | to using the cfg code in flow.c. */ | |
355be0dc | 2944 | free_dominance_info (dom); |
b4ead7d4 BS |
2945 | } |
2946 | } | |
2947 | ||
b4ead7d4 | 2948 | |
73991d6a | 2949 | if (CHECK_DEAD_NOTES) |
b4ead7d4 | 2950 | { |
d55bc081 | 2951 | blocks = sbitmap_alloc (last_basic_block); |
73991d6a JH |
2952 | deaths_in_region = (int *) xmalloc (sizeof (int) * nr_regions); |
2953 | /* Remove all death notes from the subroutine. */ | |
2954 | for (rgn = 0; rgn < nr_regions; rgn++) | |
2955 | { | |
2956 | int b; | |
b4ead7d4 | 2957 | |
73991d6a JH |
2958 | sbitmap_zero (blocks); |
2959 | for (b = RGN_NR_BLOCKS (rgn) - 1; b >= 0; --b) | |
2960 | SET_BIT (blocks, rgn_bb_table[RGN_BLOCKS (rgn) + b]); | |
b4ead7d4 | 2961 | |
73991d6a JH |
2962 | deaths_in_region[rgn] = count_or_remove_death_notes (blocks, 1); |
2963 | } | |
2964 | sbitmap_free (blocks); | |
b4ead7d4 | 2965 | } |
73991d6a JH |
2966 | else |
2967 | count_or_remove_death_notes (NULL, 1); | |
b4ead7d4 BS |
2968 | } |
2969 | ||
2970 | /* The one entry point in this file. DUMP_FILE is the dump file for | |
2971 | this pass. */ | |
2972 | ||
2973 | void | |
2974 | schedule_insns (dump_file) | |
2975 | FILE *dump_file; | |
2976 | { | |
2977 | sbitmap large_region_blocks, blocks; | |
2978 | int rgn; | |
2979 | int any_large_regions; | |
e0082a72 | 2980 | basic_block bb; |
b4ead7d4 BS |
2981 | |
2982 | /* Taking care of this degenerate case makes the rest of | |
2983 | this code simpler. */ | |
0b17ab2f | 2984 | if (n_basic_blocks == 0) |
b4ead7d4 BS |
2985 | return; |
2986 | ||
2987 | nr_inter = 0; | |
2988 | nr_spec = 0; | |
2989 | ||
2990 | sched_init (dump_file); | |
2991 | ||
2992 | init_regions (); | |
2993 | ||
2994 | current_sched_info = ®ion_sched_info; | |
786de7eb | 2995 | |
b4ead7d4 BS |
2996 | /* Schedule every region in the subroutine. */ |
2997 | for (rgn = 0; rgn < nr_regions; rgn++) | |
2998 | schedule_region (rgn); | |
2999 | ||
3000 | /* Update life analysis for the subroutine. Do single block regions | |
3001 | first so that we can verify that live_at_start didn't change. Then | |
6d2f8887 | 3002 | do all other blocks. */ |
b4ead7d4 | 3003 | /* ??? There is an outside possibility that update_life_info, or more |
0e9e1e0a | 3004 | to the point propagate_block, could get called with nonzero flags |
b4ead7d4 BS |
3005 | more than once for one basic block. This would be kinda bad if it |
3006 | were to happen, since REG_INFO would be accumulated twice for the | |
3007 | block, and we'd have twice the REG_DEAD notes. | |
3008 | ||
3009 | I'm fairly certain that this _shouldn't_ happen, since I don't think | |
3010 | that live_at_start should change at region heads. Not sure what the | |
3011 | best way to test for this kind of thing... */ | |
3012 | ||
3013 | allocate_reg_life_data (); | |
852c6ec7 | 3014 | compute_bb_for_insn (); |
b4ead7d4 BS |
3015 | |
3016 | any_large_regions = 0; | |
d55bc081 | 3017 | large_region_blocks = sbitmap_alloc (last_basic_block); |
e0082a72 ZD |
3018 | sbitmap_zero (large_region_blocks); |
3019 | FOR_EACH_BB (bb) | |
3020 | SET_BIT (large_region_blocks, bb->index); | |
b4ead7d4 | 3021 | |
d55bc081 | 3022 | blocks = sbitmap_alloc (last_basic_block); |
73991d6a | 3023 | sbitmap_zero (blocks); |
b4ead7d4 | 3024 | |
73991d6a JH |
3025 | /* Update life information. For regions consisting of multiple blocks |
3026 | we've possibly done interblock scheduling that affects global liveness. | |
3027 | For regions consisting of single blocks we need to do only local | |
3028 | liveness. */ | |
b4ead7d4 BS |
3029 | for (rgn = 0; rgn < nr_regions; rgn++) |
3030 | if (RGN_NR_BLOCKS (rgn) > 1) | |
3031 | any_large_regions = 1; | |
3032 | else | |
3033 | { | |
b4ead7d4 BS |
3034 | SET_BIT (blocks, rgn_bb_table[RGN_BLOCKS (rgn)]); |
3035 | RESET_BIT (large_region_blocks, rgn_bb_table[RGN_BLOCKS (rgn)]); | |
b4ead7d4 BS |
3036 | } |
3037 | ||
73991d6a JH |
3038 | /* Don't update reg info after reload, since that affects |
3039 | regs_ever_live, which should not change after reload. */ | |
3040 | update_life_info (blocks, UPDATE_LIFE_LOCAL, | |
3041 | (reload_completed ? PROP_DEATH_NOTES | |
3042 | : PROP_DEATH_NOTES | PROP_REG_INFO)); | |
b4ead7d4 BS |
3043 | if (any_large_regions) |
3044 | { | |
3045 | update_life_info (large_region_blocks, UPDATE_LIFE_GLOBAL, | |
3046 | PROP_DEATH_NOTES | PROP_REG_INFO); | |
3047 | } | |
3048 | ||
73991d6a JH |
3049 | if (CHECK_DEAD_NOTES) |
3050 | { | |
6bbdfefd JH |
3051 | /* Verify the counts of basic block notes in single the basic block |
3052 | regions. */ | |
73991d6a JH |
3053 | for (rgn = 0; rgn < nr_regions; rgn++) |
3054 | if (RGN_NR_BLOCKS (rgn) == 1) | |
3055 | { | |
73991d6a JH |
3056 | sbitmap_zero (blocks); |
3057 | SET_BIT (blocks, rgn_bb_table[RGN_BLOCKS (rgn)]); | |
3058 | ||
3059 | if (deaths_in_region[rgn] | |
3060 | != count_or_remove_death_notes (blocks, 0)) | |
3061 | abort (); | |
3062 | } | |
3063 | free (deaths_in_region); | |
3064 | } | |
3065 | ||
b4ead7d4 BS |
3066 | /* Reposition the prologue and epilogue notes in case we moved the |
3067 | prologue/epilogue insns. */ | |
3068 | if (reload_completed) | |
3069 | reposition_prologue_and_epilogue_notes (get_insns ()); | |
3070 | ||
3071 | /* Delete redundant line notes. */ | |
3072 | if (write_symbols != NO_DEBUG) | |
3073 | rm_redundant_line_notes (); | |
3074 | ||
3075 | if (sched_verbose) | |
3076 | { | |
3077 | if (reload_completed == 0 && flag_schedule_interblock) | |
3078 | { | |
3079 | fprintf (sched_dump, | |
3080 | "\n;; Procedure interblock/speculative motions == %d/%d \n", | |
3081 | nr_inter, nr_spec); | |
3082 | } | |
3083 | else | |
3084 | { | |
3085 | if (nr_inter > 0) | |
3086 | abort (); | |
3087 | } | |
3088 | fprintf (sched_dump, "\n\n"); | |
3089 | } | |
3090 | ||
3091 | /* Clean up. */ | |
3092 | free (rgn_table); | |
3093 | free (rgn_bb_table); | |
3094 | free (block_to_bb); | |
3095 | free (containing_rgn); | |
3096 | ||
3097 | sched_finish (); | |
3098 | ||
3099 | if (edge_table) | |
3100 | { | |
3101 | free (edge_table); | |
3102 | edge_table = NULL; | |
3103 | } | |
3104 | ||
3105 | if (in_edges) | |
3106 | { | |
3107 | free (in_edges); | |
3108 | in_edges = NULL; | |
3109 | } | |
3110 | if (out_edges) | |
3111 | { | |
3112 | free (out_edges); | |
3113 | out_edges = NULL; | |
3114 | } | |
3115 | ||
3116 | sbitmap_free (blocks); | |
3117 | sbitmap_free (large_region_blocks); | |
b4ead7d4 | 3118 | } |
f56887a7 | 3119 | #endif |