projects / thirdparty / gcc.git / blame
| Commit | Line | Data |
|---|---|---|
| 9304f876 | 1 | /* c-isr library stuff of Andes NDS32 cpu for GNU compiler |
| a945c346 | 2 | Copyright (C) 2012-2024 Free Software Foundation, Inc. |
| 9304f876 CJW |
3 | Contributed by Andes Technology Corporation. |
| 4 | ||
| 5 | This file is part of GCC. | |
| 6 | ||
| 7 | GCC is free software; you can redistribute it and/or modify it | |
| 8 | under the terms of the GNU General Public License as published | |
| 9 | by the Free Software Foundation; either version 3, or (at your | |
| 10 | option) any later version. | |
| 11 | ||
| 12 | GCC is distributed in the hope that it will be useful, but WITHOUT | |
| 13 | ANY WARRANTY; without even the implied warranty of MERCHANTABILITY | |
| 14 | or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public | |
| 15 | License for more details. | |
| 16 | ||
| 17 | Under Section 7 of GPL version 3, you are granted additional | |
| 18 | permissions described in the GCC Runtime Library Exception, version | |
| 19 | 3.1, as published by the Free Software Foundation. | |
| 20 | ||
| 21 | You should have received a copy of the GNU General Public License and | |
| 22 | a copy of the GCC Runtime Library Exception along with this program; | |
| 23 | see the files COPYING3 and COPYING.RUNTIME respectively. If not, see | |
| 24 | <http://www.gnu.org/licenses/>. */ | |
| 25 | ||
| a4931745 CJW |
26 | #if __NDS32_ISR_VECTOR_SIZE_4__ |
| 27 | ||
| 28 | /* If vector size is 4-byte, we have to save registers | |
| 29 | in the macro implementation. */ | |
| 30 | .macro SAVE_ALL | |
| 31 | #if __NDS32_REDUCED_REGS__ || __NDS32_REDUCE_REGS | |
| 9304f876 CJW |
32 | smw.adm $r15, [$sp], $r15, #0xf |
| 33 | smw.adm $r0, [$sp], $r10, #0x0 | |
| a4931745 | 34 | #else |
| 9304f876 | 35 | smw.adm $r0, [$sp], $r27, #0xf |
| 9304f876 | 36 | #endif |
| a4931745 CJW |
37 | SAVE_USR_REGS |
| 38 | SAVE_MAC_REGS | |
| 39 | SAVE_FPU_REGS | |
| 9304f876 CJW |
40 | mfsr $r1, $IPC /* Get IPC. */ |
| 41 | mfsr $r2, $IPSW /* Get IPSW. */ | |
| 42 | smw.adm $r1, [$sp], $r2, #0x0 /* Push IPC, IPSW. */ | |
| 43 | move $r1, $sp /* $r1 is ptr to NDS32_CONTEXT. */ | |
| 44 | mfsr $r0, $ITYPE /* Get VID to $r0. */ | |
| 45 | srli $r0, $r0, #5 | |
| 9304f876 | 46 | andi $r0, $r0, #127 |
| 9304f876 CJW |
47 | .endm |
| 48 | ||
| a4931745 CJW |
49 | #else /* not __NDS32_ISR_VECTOR_SIZE_4__ */ |
| 50 | ||
| 51 | /* If vector size is 16-byte, some works can be done in | |
| 52 | the vector section generated by compiler, so that we | |
| 53 | can implement less in the macro. */ | |
| 9304f876 | 54 | .macro SAVE_ALL |
| a4931745 CJW |
55 | SAVE_USR_REGS |
| 56 | SAVE_MAC_REGS | |
| 57 | SAVE_FPU_REGS | |
| 9304f876 CJW |
58 | mfsr $r1, $IPC /* Get IPC. */ |
| 59 | mfsr $r2, $IPSW /* Get IPSW. */ | |
| 60 | smw.adm $r1, [$sp], $r2, #0x0 /* Push IPC, IPSW. */ | |
| 61 | move $r1, $sp /* $r1 is ptr to NDS32_CONTEXT. */ | |
| 62 | .endm | |
| a4931745 CJW |
63 | |
| 64 | #endif /* not __NDS32_ISR_VECTOR_SIZE_4__ */ |