2 Copyright 1988-2022 Free Software Foundation, Inc.
3 This is part of the GCC manual.
4 For copying conditions, see the copyright.rst file.
6 .. _fr-v-built-in-functions:
8 FR-V Built-in Functions
9 ^^^^^^^^^^^^^^^^^^^^^^^
11 GCC provides many FR-V-specific built-in functions. In general,
12 these functions are intended to be compatible with those described
13 by FR-V Family, Softune C/C++ Compiler Manual (V6), Fujitsu
14 Semiconductor. The two exceptions are ``__MDUNPACKH`` and
15 ``__MBTOHE``, the GCC forms of which pass 128-bit values by
16 pointer rather than by value.
18 Most of the functions are named after specific FR-V instructions.
19 Such functions are said to be 'directly mapped' and are summarized
31 The arguments to the built-in functions can be divided into three groups:
32 register numbers, compile-time constants and run-time values. In order
33 to make this classification clear at a glance, the arguments and return
34 values are given the following pseudo types:
47 - an unsigned halfword
57 - ``unsigned long long``
59 - an unsigned doubleword
71 - an ACC register number
75 - an IACC register number
77 These pseudo types are not defined by GCC, they are simply a notational
78 convenience used in this manual.
80 Arguments of type ``uh``, ``uw1``, ``sw1``, ``uw2``
81 and ``sw2`` are evaluated at run time. They correspond to
82 register operands in the underlying FR-V instructions.
84 ``const`` arguments represent immediate operands in the underlying
85 FR-V instructions. They must be compile-time constants.
87 ``acc`` arguments are evaluated at compile time and specify the number
88 of an accumulator register. For example, an ``acc`` argument of 2
89 selects the ACC2 register.
91 ``iacc`` arguments are similar to ``acc`` arguments but specify the
92 number of an IACC register. See see :ref:`other-builtins`
95 .. _directly-mapped-integer-functions:
97 Directly-Mapped Integer Functions
98 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
100 The functions listed below map directly to FR-V I-type instructions.
105 * - Function prototype
109 * - ``sw1 __ADDSS (sw1, sw1)``
110 - ``c = __ADDSS (a, b)``
112 * - ``sw1 __SCAN (sw1, sw1)``
113 - ``c = __SCAN (a, b)``
115 * - ``sw1 __SCUTSS (sw1)``
116 - ``b = __SCUTSS (a)``
118 * - ``sw1 __SLASS (sw1, sw1)``
119 - ``c = __SLASS (a, b)``
121 * - ``void __SMASS (sw1, sw1)``
124 * - ``void __SMSSS (sw1, sw1)``
127 * - ``void __SMU (sw1, sw1)``
130 * - ``sw2 __SMUL (sw1, sw1)``
131 - ``c = __SMUL (a, b)``
133 * - ``sw1 __SUBSS (sw1, sw1)``
134 - ``c = __SUBSS (a, b)``
136 * - ``uw2 __UMUL (uw1, uw1)``
137 - ``c = __UMUL (a, b)``
140 .. _directly-mapped-media-functions:
142 Directly-Mapped Media Functions
143 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
145 The functions listed below map directly to FR-V M-type instructions.
150 * - Function prototype
154 * - ``uw1 __MABSHS (sw1)``
155 - ``b = __MABSHS (a)``
157 * - ``void __MADDACCS (acc, acc)``
158 - ``__MADDACCS (b, a)``
160 * - ``sw1 __MADDHSS (sw1, sw1)``
161 - ``c = __MADDHSS (a, b)``
163 * - ``uw1 __MADDHUS (uw1, uw1)``
164 - ``c = __MADDHUS (a, b)``
166 * - ``uw1 __MAND (uw1, uw1)``
167 - ``c = __MAND (a, b)``
169 * - ``void __MASACCS (acc, acc)``
170 - ``__MASACCS (b, a)``
172 * - ``uw1 __MAVEH (uw1, uw1)``
173 - ``c = __MAVEH (a, b)``
175 * - ``uw2 __MBTOH (uw1)``
176 - ``b = __MBTOH (a)``
178 * - ``void __MBTOHE (uw1 *, uw1)``
179 - ``__MBTOHE (&b, a)``
181 * - ``void __MCLRACC (acc)``
184 * - ``void __MCLRACCA (void)``
187 * - ``uw1 __Mcop1 (uw1, uw1)``
188 - ``c = __Mcop1 (a, b)``
190 * - ``uw1 __Mcop2 (uw1, uw1)``
191 - ``c = __Mcop2 (a, b)``
193 * - ``uw1 __MCPLHI (uw2, const)``
194 - ``c = __MCPLHI (a, b)``
196 * - ``uw1 __MCPLI (uw2, const)``
197 - ``c = __MCPLI (a, b)``
199 * - ``void __MCPXIS (acc, sw1, sw1)``
200 - ``__MCPXIS (c, a, b)``
202 * - ``void __MCPXIU (acc, uw1, uw1)``
203 - ``__MCPXIU (c, a, b)``
205 * - ``void __MCPXRS (acc, sw1, sw1)``
206 - ``__MCPXRS (c, a, b)``
208 * - ``void __MCPXRU (acc, uw1, uw1)``
209 - ``__MCPXRU (c, a, b)``
211 * - ``uw1 __MCUT (acc, uw1)``
212 - ``c = __MCUT (a, b)``
214 * - ``uw1 __MCUTSS (acc, sw1)``
215 - ``c = __MCUTSS (a, b)``
217 * - ``void __MDADDACCS (acc, acc)``
218 - ``__MDADDACCS (b, a)``
220 * - ``void __MDASACCS (acc, acc)``
221 - ``__MDASACCS (b, a)``
223 * - ``uw2 __MDCUTSSI (acc, const)``
224 - ``c = __MDCUTSSI (a, b)``
225 - ``MDCUTSSI a,#b,c``
226 * - ``uw2 __MDPACKH (uw2, uw2)``
227 - ``c = __MDPACKH (a, b)``
229 * - ``uw2 __MDROTLI (uw2, const)``
230 - ``c = __MDROTLI (a, b)``
232 * - ``void __MDSUBACCS (acc, acc)``
233 - ``__MDSUBACCS (b, a)``
235 * - ``void __MDUNPACKH (uw1 *, uw2)``
236 - ``__MDUNPACKH (&b, a)``
238 * - ``uw2 __MEXPDHD (uw1, const)``
239 - ``c = __MEXPDHD (a, b)``
241 * - ``uw1 __MEXPDHW (uw1, const)``
242 - ``c = __MEXPDHW (a, b)``
244 * - ``uw1 __MHDSETH (uw1, const)``
245 - ``c = __MHDSETH (a, b)``
247 * - ``sw1 __MHDSETS (const)``
248 - ``b = __MHDSETS (a)``
250 * - ``uw1 __MHSETHIH (uw1, const)``
251 - ``b = __MHSETHIH (b, a)``
253 * - ``sw1 __MHSETHIS (sw1, const)``
254 - ``b = __MHSETHIS (b, a)``
256 * - ``uw1 __MHSETLOH (uw1, const)``
257 - ``b = __MHSETLOH (b, a)``
259 * - ``sw1 __MHSETLOS (sw1, const)``
260 - ``b = __MHSETLOS (b, a)``
262 * - ``uw1 __MHTOB (uw2)``
263 - ``b = __MHTOB (a)``
265 * - ``void __MMACHS (acc, sw1, sw1)``
266 - ``__MMACHS (c, a, b)``
268 * - ``void __MMACHU (acc, uw1, uw1)``
269 - ``__MMACHU (c, a, b)``
271 * - ``void __MMRDHS (acc, sw1, sw1)``
272 - ``__MMRDHS (c, a, b)``
274 * - ``void __MMRDHU (acc, uw1, uw1)``
275 - ``__MMRDHU (c, a, b)``
277 * - ``void __MMULHS (acc, sw1, sw1)``
278 - ``__MMULHS (c, a, b)``
280 * - ``void __MMULHU (acc, uw1, uw1)``
281 - ``__MMULHU (c, a, b)``
283 * - ``void __MMULXHS (acc, sw1, sw1)``
284 - ``__MMULXHS (c, a, b)``
286 * - ``void __MMULXHU (acc, uw1, uw1)``
287 - ``__MMULXHU (c, a, b)``
289 * - ``uw1 __MNOT (uw1)``
292 * - ``uw1 __MOR (uw1, uw1)``
293 - ``c = __MOR (a, b)``
295 * - ``uw1 __MPACKH (uh, uh)``
296 - ``c = __MPACKH (a, b)``
298 * - ``sw2 __MQADDHSS (sw2, sw2)``
299 - ``c = __MQADDHSS (a, b)``
301 * - ``uw2 __MQADDHUS (uw2, uw2)``
302 - ``c = __MQADDHUS (a, b)``
304 * - ``void __MQCPXIS (acc, sw2, sw2)``
305 - ``__MQCPXIS (c, a, b)``
307 * - ``void __MQCPXIU (acc, uw2, uw2)``
308 - ``__MQCPXIU (c, a, b)``
310 * - ``void __MQCPXRS (acc, sw2, sw2)``
311 - ``__MQCPXRS (c, a, b)``
313 * - ``void __MQCPXRU (acc, uw2, uw2)``
314 - ``__MQCPXRU (c, a, b)``
316 * - ``sw2 __MQLCLRHS (sw2, sw2)``
317 - ``c = __MQLCLRHS (a, b)``
319 * - ``sw2 __MQLMTHS (sw2, sw2)``
320 - ``c = __MQLMTHS (a, b)``
322 * - ``void __MQMACHS (acc, sw2, sw2)``
323 - ``__MQMACHS (c, a, b)``
325 * - ``void __MQMACHU (acc, uw2, uw2)``
326 - ``__MQMACHU (c, a, b)``
328 * - ``void __MQMACXHS (acc, sw2, sw2)``
329 - ``__MQMACXHS (c, a, b)``
331 * - ``void __MQMULHS (acc, sw2, sw2)``
332 - ``__MQMULHS (c, a, b)``
334 * - ``void __MQMULHU (acc, uw2, uw2)``
335 - ``__MQMULHU (c, a, b)``
337 * - ``void __MQMULXHS (acc, sw2, sw2)``
338 - ``__MQMULXHS (c, a, b)``
340 * - ``void __MQMULXHU (acc, uw2, uw2)``
341 - ``__MQMULXHU (c, a, b)``
343 * - ``sw2 __MQSATHS (sw2, sw2)``
344 - ``c = __MQSATHS (a, b)``
346 * - ``uw2 __MQSLLHI (uw2, int)``
347 - ``c = __MQSLLHI (a, b)``
349 * - ``sw2 __MQSRAHI (sw2, int)``
350 - ``c = __MQSRAHI (a, b)``
352 * - ``sw2 __MQSUBHSS (sw2, sw2)``
353 - ``c = __MQSUBHSS (a, b)``
355 * - ``uw2 __MQSUBHUS (uw2, uw2)``
356 - ``c = __MQSUBHUS (a, b)``
358 * - ``void __MQXMACHS (acc, sw2, sw2)``
359 - ``__MQXMACHS (c, a, b)``
361 * - ``void __MQXMACXHS (acc, sw2, sw2)``
362 - ``__MQXMACXHS (c, a, b)``
363 - ``MQXMACXHS a,b,c``
364 * - ``uw1 __MRDACC (acc)``
365 - ``b = __MRDACC (a)``
367 * - ``uw1 __MRDACCG (acc)``
368 - ``b = __MRDACCG (a)``
370 * - ``uw1 __MROTLI (uw1, const)``
371 - ``c = __MROTLI (a, b)``
373 * - ``uw1 __MROTRI (uw1, const)``
374 - ``c = __MROTRI (a, b)``
376 * - ``sw1 __MSATHS (sw1, sw1)``
377 - ``c = __MSATHS (a, b)``
379 * - ``uw1 __MSATHU (uw1, uw1)``
380 - ``c = __MSATHU (a, b)``
382 * - ``uw1 __MSLLHI (uw1, const)``
383 - ``c = __MSLLHI (a, b)``
385 * - ``sw1 __MSRAHI (sw1, const)``
386 - ``c = __MSRAHI (a, b)``
388 * - ``uw1 __MSRLHI (uw1, const)``
389 - ``c = __MSRLHI (a, b)``
391 * - ``void __MSUBACCS (acc, acc)``
392 - ``__MSUBACCS (b, a)``
394 * - ``sw1 __MSUBHSS (sw1, sw1)``
395 - ``c = __MSUBHSS (a, b)``
397 * - ``uw1 __MSUBHUS (uw1, uw1)``
398 - ``c = __MSUBHUS (a, b)``
400 * - ``void __MTRAP (void)``
403 * - ``uw2 __MUNPACKH (uw1)``
404 - ``b = __MUNPACKH (a)``
406 * - ``uw1 __MWCUT (uw2, uw1)``
407 - ``c = __MWCUT (a, b)``
409 * - ``void __MWTACC (acc, uw1)``
410 - ``__MWTACC (b, a)``
412 * - ``void __MWTACCG (acc, uw1)``
413 - ``__MWTACCG (b, a)``
415 * - ``uw1 __MXOR (uw1, uw1)``
416 - ``c = __MXOR (a, b)``
419 .. _raw-read-write-functions:
421 Raw Read/Write Functions
422 ~~~~~~~~~~~~~~~~~~~~~~~~
424 This sections describes built-in functions related to read and write
425 instructions to access memory. These functions generate
426 ``membar`` instructions to flush the I/O load and stores where
427 appropriate, as described in Fujitsu's manual described above.
431 unsigned char __builtin_read8 (void *data);
432 unsigned short __builtin_read16 (void *data);
433 unsigned long __builtin_read32 (void *data);
434 unsigned long long __builtin_read64 (void *data);
435 void __builtin_write8 (void *data, unsigned char datum);
436 void __builtin_write16 (void *data, unsigned short datum);
437 void __builtin_write32 (void *data, unsigned long datum);
438 void __builtin_write64 (void *data, unsigned long long datum);
440 Other Built-in Functions
441 ~~~~~~~~~~~~~~~~~~~~~~~~
443 This section describes built-in functions that are not named after
444 a specific FR-V instruction.
446 .. function:: sw2 __IACCreadll (iacc reg)
448 Return the full 64-bit value of IACC0. The :samp:`{reg}` argument is reserved
449 for future expansion and must be 0.
451 .. function:: sw1 __IACCreadl (iacc reg)
453 Return the value of IACC0H if :samp:`{reg}` is 0 and IACC0L if :samp:`{reg}` is 1.
454 Other values of :samp:`{reg}` are rejected as invalid.
456 .. function:: void __IACCsetll (iacc reg, sw2 x)
458 Set the full 64-bit value of IACC0 to :samp:`{x}`. The :samp:`{reg}` argument
459 is reserved for future expansion and must be 0.
461 .. function:: void __IACCsetl (iacc reg, sw1 x)
463 Set IACC0H to :samp:`{x}` if :samp:`{reg}` is 0 and IACC0L to :samp:`{x}` if :samp:`{reg}`
464 is 1. Other values of :samp:`{reg}` are rejected as invalid.
466 .. function:: void __data_prefetch0 (const void *x)
468 Use the ``dcpl`` instruction to load the contents of address :samp:`{x}`
471 .. function:: void __data_prefetch (const void *x)
473 Use the ``nldub`` instruction to load the contents of address :samp:`{x}`
474 into the data cache. The instruction is issued in slot I1.