i386: Double-word sign-extension missed-optimization [PR110717]

[thirdparty/gcc.git] / gcc / config / i386 / i386.md

diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md
index 8c54aa5e981c0a3415bf58ce278f21214e733758..4db210cc7959f89917f9a12e7dc583e5116e2695 100644 (file)
--- a/gcc/config/i386/i386.md
+++ b/gcc/config/i386/i386.md
@@ -15292,6 +15292,41 @@
        (const_string "0")
        (const_string "*")))
    (set_attr "mode" "QI")])
+
+(define_insn_and_split "*extend<dwi>2_doubleword_highpart"
+  [(set (match_operand:<DWI> 0 "register_operand" "=r")
+       (ashiftrt:<DWI>
+         (ashift:<DWI> (match_operand:<DWI> 1 "nonimmediate_operand" "0")
+                       (match_operand:QI 2 "const_int_operand"))
+         (match_operand:QI 3 "const_int_operand")))
+   (clobber (reg:CC FLAGS_REG))]
+  "INTVAL (operands[2]) == INTVAL (operands[3])
+   && UINTVAL (operands[2]) < <MODE_SIZE> * BITS_PER_UNIT"
+  "#"
+  "&& reload_completed"
+  [(parallel [(set (match_dup 4)
+                  (ashift:DWIH (match_dup 4) (match_dup 2)))
+             (clobber (reg:CC FLAGS_REG))])
+   (parallel [(set (match_dup 4)
+                  (ashiftrt:DWIH (match_dup 4) (match_dup 2)))
+             (clobber (reg:CC FLAGS_REG))])]
+  "split_double_mode (<DWI>mode, &operands[0], 1, &operands[0], &operands[4]);")
+
+(define_insn_and_split "*extendv2di2_highpart_stv"
+  [(set (match_operand:V2DI 0 "register_operand" "=v")
+       (ashiftrt:V2DI
+         (ashift:V2DI (match_operand:V2DI 1 "nonimmediate_operand" "vm")
+                      (match_operand:QI 2 "const_int_operand"))
+         (match_operand:QI 3 "const_int_operand")))]
+  "!TARGET_64BIT && TARGET_STV && TARGET_AVX512VL
+   && INTVAL (operands[2]) == INTVAL (operands[3])
+   && UINTVAL (operands[2]) < 32"
+  "#"
+  "&& reload_completed"
+  [(set (match_dup 0)
+       (ashift:V2DI (match_dup 1) (match_dup 2)))
+   (set (match_dup 0)
+       (ashiftrt:V2DI (match_dup 0) (match_dup 2)))])
 \f
 ;; Rotate instructions