Re: testsuite: Adjust target requirements for sad-vectorize and signbit

Fixes
FAIL: gcc.target/powerpc/signbit-1.c scan-assembler-not stxvd2x
FAIL: gcc.target/powerpc/signbit-1.c scan-assembler-times mfvsrd 3
FAIL: gcc.target/powerpc/signbit-1.c scan-assembler-times srdi 3
FAIL: gcc.target/powerpc/signbit-2.c scan-assembler-times ld 1
FAIL: gcc.target/powerpc/signbit-2.c scan-assembler-times srdi 1
on powerpc-linux (or powerpc64-linux biarch -m32).

signbit-1.c is quite obviously a 64-bit only testcase given the
scan-assembler directives, and the purpose of the testcase to verify
the 64-bit only UNSPEC_SIGNBIT patterns.  It could be made to pass for
-m32 by adding -mpowerpc64, but that option that isn't very effective
when bi-arch testing and results in errors on rs6000-aix.  And it is
pointless to match -m32 stores to the stack followed by loads, which
is what we do at the moment.

signbit-2.c on the other hand has more reasonable 32-bit output.

	* gcc.target/powerpc/signbit-1.c: Reinstate lp64 condition.
	* gcc.target/powerpc/signbit-2.c: Match 32-bit output too.

diff --git a/gcc/testsuite/gcc.target/powerpc/signbit-1.c b/gcc/testsuite/gcc.target/powerpc/signbit-1.c
index eb4f53e397d1890685b3554854c4580e428cbe5c..1642bf46d7a28db9a4e822eb8593f66d0bad7252 100644 (file)
--- a/gcc/testsuite/gcc.target/powerpc/signbit-1.c
+++ b/gcc/testsuite/gcc.target/powerpc/signbit-1.c
@@ -1,4 +1,5 @@
 /* { dg-do compile } */
+/* { dg-require-effective-target lp64 } */
 /* { dg-require-effective-target ppc_float128_sw } */
 /* { dg-require-effective-target powerpc_p8vector_ok } */
 /* { dg-options "-mdejagnu-cpu=power8 -O2 -mfloat128" } */

diff --git a/gcc/testsuite/gcc.target/powerpc/signbit-2.c b/gcc/testsuite/gcc.target/powerpc/signbit-2.c
index ff6af963dda28066d4cb9cfee7546cc58ecf338d..1b792916eba8880e60200ab3cac64d9f115f6050 100644 (file)
--- a/gcc/testsuite/gcc.target/powerpc/signbit-2.c
+++ b/gcc/testsuite/gcc.target/powerpc/signbit-2.c
@@ -13,5 +13,7 @@ int do_signbit_kf (__float128 *a) { return __builtin_signbit (*a); }
 /* { dg-final { scan-assembler-not   "lxvw4x"   } } */
 /* { dg-final { scan-assembler-not   "lxsd"     } } */
 /* { dg-final { scan-assembler-not   "lxsdx"    } } */
-/* { dg-final { scan-assembler-times "ld"     1 } } */
-/* { dg-final { scan-assembler-times "srdi"   1 } } */
+/* { dg-final { scan-assembler-times "ld"     1 { target lp64 } } } */
+/* { dg-final { scan-assembler-times "srdi"   1 { target lp64 } } } */
+/* { dg-final { scan-assembler-times "lwz"    1 { target ilp32 } } } */
+/* { dg-final { scan-assembler-times "rlwinm" 1 { target ilp32 } } } */