re PR target/59142 (internal compiler error while compiling OpenCV 2.4.7)

2013-12-19  Charles Baylis  <charles.baylis@linaro.org>

	PR target/59142
	* config/arm/predicates.md (vfp_hard_register_operand): New predicate.
	* config/arm/arm.md (vfp_pop_multiple_with_writeback): Use
	vfp_hard_register_operand.

From-SVN: r206123

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 47dfb73660b6dc3d88989f5cf794e20755ab3c87..7ff9d7c7fc1fac7968bb5ea2be242fb230807e0f 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,4 +1,11 @@
-o2013-12-19  Tejas Belagod  <tejas.belagod@arm.com>
+2013-12-19  Charles Baylis  <charles.baylis@linaro.org>
+
+       PR target/59142
+       * config/arm/predicates.md (vfp_hard_register_operand): New predicate.
+       * config/arm/arm.md (vfp_pop_multiple_with_writeback): Use
+       vfp_hard_register_operand.
+
+2013-12-19  Tejas Belagod  <tejas.belagod@arm.com>
 
        * config/aarch64/aarch64-builtins.c (aarch64_init_simd_builtins):
        Define builtin types for poly64_t poly128_t.

diff --git a/gcc/config/arm/arm.md b/gcc/config/arm/arm.md
index c474ff16d517e378469d4a31327df7d5ec147806..6e1b47d69e2521ec4b8bc2381566cdb77df5b589 100644 (file)
--- a/gcc/config/arm/arm.md
+++ b/gcc/config/arm/arm.md
@@ -12253,7 +12253,7 @@
     [(set (match_operand:SI 1 "s_register_operand" "+rk")
           (plus:SI (match_dup 1)
                    (match_operand:SI 2 "const_int_operand" "I")))
-     (set (match_operand:DF 3 "arm_hard_register_operand" "")
+     (set (match_operand:DF 3 "vfp_hard_register_operand" "")
           (mem:DF (match_dup 1)))])]
   "TARGET_32BIT && TARGET_HARD_FLOAT && TARGET_VFP"
   "*

diff --git a/gcc/config/arm/predicates.md b/gcc/config/arm/predicates.md
index 29e1e5c827618d13e9e755fe69d5f7253e0cf1eb..24f05489aafeb8d97b983aa4db7699d8c47ef855 100644 (file)
--- a/gcc/config/arm/predicates.md
+++ b/gcc/config/arm/predicates.md
@@ -98,6 +98,12 @@
                  && REGNO_REG_CLASS (REGNO (op)) == VFP_REGS)));
 })
 
+(define_predicate "vfp_hard_register_operand"
+  (match_code "reg")
+{
+  return (IS_VFP_REGNUM (REGNO (op)));
+})
+
 (define_predicate "zero_operand"
   (and (match_code "const_int,const_double,const_vector")
        (match_test "op == CONST0_RTX (mode)")))