gen_rtx_IOR (DImode, copy_rtx (temp),
GEN_INT (ud1)));
}
+ else if (TARGET_PREFIXED)
+ {
+ if (can_create_pseudo_p ())
+ {
+ /* pli A,L + pli B,H + rldimi A,B,32,0. */
+ temp = gen_reg_rtx (DImode);
+ rtx temp1 = gen_reg_rtx (DImode);
+ emit_move_insn (temp, GEN_INT ((ud4 << 16) | ud3));
+ emit_move_insn (temp1, GEN_INT ((ud2 << 16) | ud1));
+
+ emit_insn (gen_rotldi3_insert_3 (dest, temp, GEN_INT (32), temp1,
+ GEN_INT (0xffffffff)));
+ }
+ else
+ {
+ /* pli A,H + sldi A,32 + paddi A,A,L. */
+ emit_move_insn (dest, GEN_INT ((ud4 << 16) | ud3));
+
+ emit_move_insn (dest, gen_rtx_ASHIFT (DImode, dest, GEN_INT (32)));
+
+ bool can_use_paddi = REGNO (dest) != FIRST_GPR_REGNO;
+
+ /* Use paddi for the low 32 bits. */
+ if (ud2 != 0 && ud1 != 0 && can_use_paddi)
+ emit_move_insn (dest, gen_rtx_PLUS (DImode, dest,
+ GEN_INT ((ud2 << 16) | ud1)));
+
+ /* Use oris, ori for low 32 bits. */
+ if (ud2 != 0 && (ud1 == 0 || !can_use_paddi))
+ emit_move_insn (dest,
+ gen_rtx_IOR (DImode, dest, GEN_INT (ud2 << 16)));
+ if (ud1 != 0 && (ud2 == 0 || !can_use_paddi))
+ emit_move_insn (dest, gen_rtx_IOR (DImode, dest, GEN_INT (ud1)));
+ }
+ }
else
{
temp = !can_create_pseudo_p () ? dest : gen_reg_rtx (DImode);
--- /dev/null
+/* PR target/106550 */
+/* { dg-options "-O2 -mdejagnu-cpu=power10" } */
+/* { dg-require-effective-target power10_ok } */
+
+void
+foo (unsigned long long *a)
+{
+ *a++ = 0x020805006106003; /* pli+pli+rldimi */
+ *a++ = 0x2351847027482577;/* pli+pli+rldimi */
+}
+
+/* { dg-final { scan-assembler-times {\mpli\M} 4 } } */
+/* { dg-final { scan-assembler-times {\mrldimi\M} 2 } } */
+
--- /dev/null
+/* PR target/106550 */
+/* { dg-require-effective-target power10_ok } */
+/* { dg-options "-O2 -mdejagnu-cpu=power10 -fdisable-rtl-split1" } */
+/* force the constant splitter run after RA: -fdisable-rtl-split1. */
+
+void
+foo (unsigned long long *a)
+{
+ /* Test oris/ori is used where paddi does not work with 'r0'. */
+ register long long d asm("r0") = 0x1245abcef9240dec; /* pli+sldi+oris+ori */
+ long long n;
+ asm("cntlzd %0, %1" : "=r"(n) : "r"(d));
+ *a++ = n;
+
+ *a++ = 0x235a8470a7480000ULL; /* pli+sldi+oris */
+ *a++ = 0x23a184700000b677ULL; /* pli+sldi+ori */
+}
+
+/* { dg-final { scan-assembler-times {\mpli\M} 3 } } */
+/* { dg-final { scan-assembler-times {\msldi\M} 3 } } */
+/* { dg-final { scan-assembler-times {\moris\M} 2 } } */
+/* { dg-final { scan-assembler-times {\mori\M} 2 } } */