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a4ca5195 | 1 | /* Macros to test for CPU features on ARM. Generic ARM version. |
04277e02 | 2 | Copyright (C) 2012-2019 Free Software Foundation, Inc. |
a4ca5195 RM |
3 | This file is part of the GNU C Library. |
4 | ||
5 | The GNU C Library is free software; you can redistribute it and/or | |
6 | modify it under the terms of the GNU Lesser General Public | |
7 | License as published by the Free Software Foundation; either | |
8 | version 2.1 of the License, or (at your option) any later version. | |
9 | ||
10 | The GNU C Library is distributed in the hope that it will be useful, | |
11 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
12 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
13 | Lesser General Public License for more details. | |
14 | ||
15 | You should have received a copy of the GNU Lesser General Public | |
16 | License along with the GNU C Library. If not, see | |
17 | <http://www.gnu.org/licenses/>. */ | |
18 | ||
19 | #ifndef _ARM_ARM_FEATURES_H | |
20 | #define _ARM_ARM_FEATURES_H 1 | |
21 | ||
22 | /* An OS-specific arm-features.h file should define ARM_HAVE_VFP to | |
23 | an appropriate expression for testing at runtime whether the VFP | |
24 | hardware is present. We'll then redefine it to a constant if we | |
25 | know at compile time that we can assume VFP. */ | |
26 | ||
27 | #ifndef __SOFTFP__ | |
28 | /* The compiler is generating VFP instructions, so we're already | |
29 | assuming the hardware exists. */ | |
30 | # undef ARM_HAVE_VFP | |
31 | # define ARM_HAVE_VFP 1 | |
32 | #endif | |
33 | ||
2aa5b9c1 RM |
34 | /* An OS-specific arm-features.h file may define ARM_ASSUME_NO_IWMMXT |
35 | to indicate at compile time that iWMMXt hardware is never present | |
36 | at runtime (or that we never care about its state) and so need not | |
37 | be checked for. */ | |
38 | ||
9e1d4ac9 RM |
39 | /* A more-specific arm-features.h file may define ARM_ALWAYS_BX to indicate |
40 | that instructions using pc as a destination register must never be used, | |
41 | so a "bx" (or "blx") instruction is always required. */ | |
42 | ||
bb48a26a RM |
43 | /* The log2 of the minimum alignment required for an address that |
44 | is the target of a computed branch (i.e. a "bx" instruction). | |
45 | A more-specific arm-features.h file may define this to set a more | |
46 | stringent requirement. | |
47 | ||
48 | Using this only makes sense for code in ARM mode (where instructions | |
49 | always have a fixed size of four bytes), or for Thumb-mode code that is | |
50 | specifically aligning all the related branch targets to match (since | |
51 | Thumb instructions might be either two or four bytes). */ | |
52 | #ifndef ARM_BX_ALIGN_LOG2 | |
53 | # define ARM_BX_ALIGN_LOG2 2 | |
54 | #endif | |
55 | ||
6bcae146 RM |
56 | /* An OS-specific arm-features.h file may define ARM_NO_INDEX_REGISTER to |
57 | indicate that the two-register addressing modes must never be used. */ | |
58 | ||
a4ca5195 | 59 | #endif /* arm-features.h */ |