[thirdparty/glibc.git] / sysdeps / arm / sysdep.h

/* Assembler macros for ARM.
   Copyright (C) 1997-2018 Free Software Foundation, Inc.
   This file is part of the GNU C Library.

   The GNU C Library is free software; you can redistribute it and/or
   modify it under the terms of the GNU Lesser General Public
   License as published by the Free Software Foundation; either
   version 2.1 of the License, or (at your option) any later version.

   The GNU C Library is distributed in the hope that it will be useful,
   but WITHOUT ANY WARRANTY; without even the implied warranty of
   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
   Lesser General Public License for more details.

   You should have received a copy of the GNU Lesser General Public
   License along with the GNU C Library.  If not, see
   <http://www.gnu.org/licenses/>.  */

#include <sysdeps/generic/sysdep.h>
#include <features.h>

#ifndef __ASSEMBLER__
# include <stdint.h>
#else
# include <arm-features.h>
#endif

/* The __ARM_ARCH define is provided by gcc 4.8.  Construct it otherwise.  */
#ifndef __ARM_ARCH
# ifdef __ARM_ARCH_2__
#  define __ARM_ARCH 2
# elif defined (__ARM_ARCH_3__) || defined (__ARM_ARCH_3M__)
#  define __ARM_ARCH 3
# elif defined (__ARM_ARCH_4__) || defined (__ARM_ARCH_4T__)
#  define __ARM_ARCH 4
# elif defined (__ARM_ARCH_5__) || defined (__ARM_ARCH_5E__) \
       || defined(__ARM_ARCH_5T__) || defined(__ARM_ARCH_5TE__) \
       || defined(__ARM_ARCH_5TEJ__)
#  define __ARM_ARCH 5
# elif defined (__ARM_ARCH_6__) || defined(__ARM_ARCH_6J__) \
       || defined (__ARM_ARCH_6Z__) || defined(__ARM_ARCH_6ZK__) \
       || defined (__ARM_ARCH_6K__) || defined(__ARM_ARCH_6T2__)
#  define __ARM_ARCH 6
# elif defined (__ARM_ARCH_7__) || defined(__ARM_ARCH_7A__) \
       || defined(__ARM_ARCH_7R__) || defined(__ARM_ARCH_7M__) \
       || defined(__ARM_ARCH_7EM__)
#  define __ARM_ARCH 7
# else
#  error unknown arm architecture
# endif
#endif

#if __ARM_ARCH > 4 || defined (__ARM_ARCH_4T__)
# define ARCH_HAS_BX
#endif
#if __ARM_ARCH > 4
# define ARCH_HAS_BLX
#endif
#if __ARM_ARCH > 6 || defined (__ARM_ARCH_6K__) || defined (__ARM_ARCH_6ZK__)
# define ARCH_HAS_HARD_TP
#endif
#if __ARM_ARCH > 6 || defined (__ARM_ARCH_6T2__)
# define ARCH_HAS_T2
#endif

#ifdef	__ASSEMBLER__

/* Syntactic details of assembler.  */

#define ALIGNARG(log2) log2
#define ASM_SIZE_DIRECTIVE(name) .size name,.-name

#define PLTJMP(_x)	_x##(PLT)

#ifdef ARCH_HAS_BX
# define BX(R)		bx	R
# define BXC(C, R)	bx##C	R
# ifdef ARCH_HAS_BLX
#  define BLX(R)	blx	R
# else
#  define BLX(R)	mov	lr, pc; bx R
# endif
#else
# define BX(R)		mov	pc, R
# define BXC(C, R)	mov##C	pc, R
# define BLX(R)		mov	lr, pc; mov pc, R
#endif

#define DO_RET(R)	BX(R)
#define RETINSTR(C, R)	BXC(C, R)

/* Define an entry point visible from C.  */
#define	ENTRY(name)					\
	.globl	C_SYMBOL_NAME(name);			\
	.type	C_SYMBOL_NAME(name),%function;		\
	.align	ALIGNARG(4);				\
  C_LABEL(name)						\
	CFI_SECTIONS;					\
	cfi_startproc;					\
	CALL_MCOUNT

#define CFI_SECTIONS					\
	.cfi_sections .debug_frame

#undef	END
#define END(name)					\
	cfi_endproc;					\
	ASM_SIZE_DIRECTIVE(name)

/* If compiled for profiling, call `mcount' at the start of each function.  */
#ifdef	PROF
/* Call __gnu_mcount_nc (GCC >= 4.4).  */
#define CALL_MCOUNT					\
	push	{lr};					\
	cfi_adjust_cfa_offset (4);			\
	cfi_rel_offset (lr, 0);				\
	bl	PLTJMP(mcount);				\
	cfi_adjust_cfa_offset (-4);			\
	cfi_restore (lr)
#else
#define CALL_MCOUNT		/* Do nothing.  */
#endif

/* Since C identifiers are not normally prefixed with an underscore
   on this system, the asm identifier `syscall_error' intrudes on the
   C name space.  Make sure we use an innocuous name.  */
#define	syscall_error	__syscall_error
#define mcount		__gnu_mcount_nc

/* Tag_ABI_align8_preserved: This code preserves 8-byte
   alignment in any callee.  */
	.eabi_attribute 25, 1
/* Tag_ABI_align8_needed: This code may require 8-byte alignment from
   the caller.  */
	.eabi_attribute 24, 1

/* The thumb2 encoding is reasonably complete.  Unless suppressed, use it.  */
	.syntax unified
# if defined(__thumb2__) && !defined(NO_THUMB)
	.thumb
#else
#  undef __thumb__
#  undef __thumb2__
	.arm
# endif

/* Load or store to/from address X + Y into/from R, (maybe) using T.
   X or Y can use T freely; T can be R if OP is a load.  The first
   version eschews the two-register addressing mode, while the
   second version uses it.  */
# define LDST_INDEXED_NOINDEX(OP, R, T, X, Y)		\
	add	T, X, Y;				\
	OP	R, [T]
# define LDST_INDEXED_INDEX(OP, R, X, Y)		\
	OP	R, [X, Y]

# ifdef ARM_NO_INDEX_REGISTER
/* We're never using the two-register addressing mode, so this
   always uses an intermediate add.  */
#  define LDST_INDEXED(OP, R, T, X, Y)	LDST_INDEXED_NOINDEX (OP, R, T, X, Y)
#  define LDST_PC_INDEXED(OP, R, T, X)	LDST_INDEXED_NOINDEX (OP, R, T, pc, X)
# else
/* The two-register addressing mode is OK, except on Thumb with pc.  */
#  define LDST_INDEXED(OP, R, T, X, Y)	LDST_INDEXED_INDEX (OP, R, X, Y)
#  ifdef __thumb2__
#   define LDST_PC_INDEXED(OP, R, T, X)	LDST_INDEXED_NOINDEX (OP, R, T, pc, X)
#  else
#   define LDST_PC_INDEXED(OP, R, T, X)	LDST_INDEXED_INDEX (OP, R, pc, X)
#  endif
# endif

/* Load or store to/from a pc-relative EXPR into/from R, using T.  */
# ifdef __thumb2__
#  define LDST_PCREL(OP, R, T, EXPR) \
	ldr	T, 98f;					\
	.subsection 2;					\
98:	.word	EXPR - 99f - PC_OFS;			\
	.previous;					\
99:	add	T, T, pc;				\
	OP	R, [T]
# elif defined (ARCH_HAS_T2) && ARM_PCREL_MOVW_OK
#  define LDST_PCREL(OP, R, T, EXPR)			\
	movw	T, #:lower16:EXPR - 99f - PC_OFS;	\
	movt	T, #:upper16:EXPR - 99f - PC_OFS;	\
99:	LDST_PC_INDEXED (OP, R, T, T)
# else
#  define LDST_PCREL(OP, R, T, EXPR) \
	ldr	T, 98f;					\
	.subsection 2;					\
98:	.word	EXPR - 99f - PC_OFS;			\
	.previous;					\
99:	OP	R, [pc, T]
# endif

/* Load from a global SYMBOL + CONSTANT into R, using T.  */
# if defined (ARCH_HAS_T2) && !defined (PIC)
#  define LDR_GLOBAL(R, T, SYMBOL, CONSTANT)				\
	movw	T, #:lower16:SYMBOL;					\
	movt	T, #:upper16:SYMBOL;					\
	ldr	R, [T, $CONSTANT]
# elif defined (ARCH_HAS_T2) && defined (PIC) && ARM_PCREL_MOVW_OK
#  define LDR_GLOBAL(R, T, SYMBOL, CONSTANT)				\
	movw	R, #:lower16:_GLOBAL_OFFSET_TABLE_ - 97f - PC_OFS;	\
	movw	T, #:lower16:99f - 98f - PC_OFS;			\
	movt	R, #:upper16:_GLOBAL_OFFSET_TABLE_ - 97f - PC_OFS;	\
	movt	T, #:upper16:99f - 98f - PC_OFS;			\
	.pushsection .rodata.cst4, "aM", %progbits, 4;			\
	.balign 4;							\
99:	.word	SYMBOL##(GOT);						\
	.popsection;							\
97:	add	R, R, pc;						\
98:	LDST_PC_INDEXED (ldr, T, T, T);					\
	LDST_INDEXED (ldr, R, T, R, T);					\
	ldr	R, [R, $CONSTANT]
# else
#  define LDR_GLOBAL(R, T, SYMBOL, CONSTANT)		\
	ldr	T, 99f;					\
	ldr	R, 100f;				\
98:	add	T, T, pc;				\
	ldr	T, [T, R];				\
	.subsection 2;					\
99:	.word	_GLOBAL_OFFSET_TABLE_ - 98b - PC_OFS;	\
100:	.word	SYMBOL##(GOT);				\
	.previous;					\
	ldr	R, [T, $CONSTANT]
# endif

/* This is the same as LDR_GLOBAL, but for a SYMBOL that is known to
   be in the same linked object (as for one with hidden visibility).
   We can avoid the GOT indirection in the PIC case.  For the pure
   static case, LDR_GLOBAL is already optimal.  */
# ifdef PIC
#  define LDR_HIDDEN(R, T, SYMBOL, CONSTANT) \
  LDST_PCREL (ldr, R, T, SYMBOL + CONSTANT)
# else
#  define LDR_HIDDEN(R, T, SYMBOL, CONSTANT) \
  LDR_GLOBAL (R, T, SYMBOL, CONSTANT)
# endif

/* Cope with negative memory offsets, which thumb can't encode.
   Use NEGOFF_ADJ_BASE to (conditionally) alter the base register,
   and then NEGOFF_OFF1 to use 0 for thumb and the offset for arm,
   or NEGOFF_OFF2 to use A-B for thumb and A for arm.  */
# ifdef __thumb2__
#  define NEGOFF_ADJ_BASE(R, OFF)	add R, R, $OFF
#  define NEGOFF_ADJ_BASE2(D, S, OFF)	add D, S, $OFF
#  define NEGOFF_OFF1(R, OFF)		[R]
#  define NEGOFF_OFF2(R, OFFA, OFFB)	[R, $((OFFA) - (OFFB))]
# else
#  define NEGOFF_ADJ_BASE(R, OFF)
#  define NEGOFF_ADJ_BASE2(D, S, OFF)	mov D, S
#  define NEGOFF_OFF1(R, OFF)		[R, $OFF]
#  define NEGOFF_OFF2(R, OFFA, OFFB)	[R, $OFFA]
# endif

/* Helper to get the TLS base pointer.  The interface is that TMP is a
   register that may be used to hold the LR, if necessary.  TMP may be
   LR itself to indicate that LR need not be saved.  The base pointer
   is returned in R0.  Only R0 and TMP are modified.  */

# ifdef ARCH_HAS_HARD_TP
/* If the cpu has cp15 available, use it.  */
#  define GET_TLS(TMP)		mrc p15, 0, r0, c13, c0, 3
# else
/* At this generic level we have no tricks to pull.  Call the ABI routine.  */
#  define GET_TLS(TMP)					\
	push	{ r1, r2, r3, lr };			\
	cfi_remember_state;				\
	cfi_adjust_cfa_offset (16);			\
	cfi_rel_offset (r1, 0);				\
	cfi_rel_offset (r2, 4);				\
	cfi_rel_offset (r3, 8);				\
	cfi_rel_offset (lr, 12);			\
	bl	__aeabi_read_tp;			\
	pop	{ r1, r2, r3, lr };			\
	cfi_restore_state
# endif /* ARCH_HAS_HARD_TP */

/* These are the directives used for EABI unwind info.
   Wrap them in macros so another configuration's sysdep.h
   file can define them away if it doesn't use EABI unwind info.  */
# define eabi_fnstart		.fnstart
# define eabi_fnend		.fnend
# define eabi_save(...)		.save __VA_ARGS__
# define eabi_cantunwind	.cantunwind
# define eabi_pad(n)		.pad n

#endif	/* __ASSEMBLER__ */

/* This number is the offset from the pc at the current location.  */
#ifdef __thumb__
# define PC_OFS  4
#else
# define PC_OFS  8
#endif

/* Pointer mangling support.  */
#if (IS_IN (rtld) || \
     (!defined SHARED && (IS_IN (libc) || IS_IN (libpthread))))
# ifdef __ASSEMBLER__
#  define PTR_MANGLE_LOAD(guard, tmp)					\
  LDR_HIDDEN (guard, tmp, C_SYMBOL_NAME(__pointer_chk_guard_local), 0)
#  define PTR_MANGLE(dst, src, guard, tmp)				\
  PTR_MANGLE_LOAD(guard, tmp);						\
  PTR_MANGLE2(dst, src, guard)
/* Use PTR_MANGLE2 for efficiency if guard is already loaded.  */
#  define PTR_MANGLE2(dst, src, guard)		\
  eor dst, src, guard
#  define PTR_DEMANGLE(dst, src, guard, tmp)	\
  PTR_MANGLE (dst, src, guard, tmp)
#  define PTR_DEMANGLE2(dst, src, guard)	\
  PTR_MANGLE2 (dst, src, guard)
# else
extern uintptr_t __pointer_chk_guard_local attribute_relro attribute_hidden;
#  define PTR_MANGLE(var) \
  (var) = (__typeof (var)) ((uintptr_t) (var) ^ __pointer_chk_guard_local)
#  define PTR_DEMANGLE(var)     PTR_MANGLE (var)
# endif
#else
# ifdef __ASSEMBLER__
#  define PTR_MANGLE_LOAD(guard, tmp)					\
  LDR_GLOBAL (guard, tmp, C_SYMBOL_NAME(__pointer_chk_guard), 0);
#  define PTR_MANGLE(dst, src, guard, tmp)				\
  PTR_MANGLE_LOAD(guard, tmp);						\
  PTR_MANGLE2(dst, src, guard)
/* Use PTR_MANGLE2 for efficiency if guard is already loaded.  */
#  define PTR_MANGLE2(dst, src, guard)		\
  eor dst, src, guard
#  define PTR_DEMANGLE(dst, src, guard, tmp)	\
  PTR_MANGLE (dst, src, guard, tmp)
#  define PTR_DEMANGLE2(dst, src, guard)	\
  PTR_MANGLE2 (dst, src, guard)
# else
extern uintptr_t __pointer_chk_guard attribute_relro;
#  define PTR_MANGLE(var) \
  (var) = (__typeof (var)) ((uintptr_t) (var) ^ __pointer_chk_guard)
#  define PTR_DEMANGLE(var)     PTR_MANGLE (var)
# endif
#endif
Commit	Line	Data
d80b3f3c	1	/* Assembler macros for ARM.
688903eb	2	Copyright (C) 1997-2018 Free Software Foundation, Inc.
d80b3f3c UD	3	This file is part of the GNU C Library.
	4
	5	The GNU C Library is free software; you can redistribute it and/or
3214b89b AJ	6	modify it under the terms of the GNU Lesser General Public
	7	License as published by the Free Software Foundation; either
	8	version 2.1 of the License, or (at your option) any later version.
d80b3f3c UD	9
	10	The GNU C Library is distributed in the hope that it will be useful,
	11	but WITHOUT ANY WARRANTY; without even the implied warranty of
	12	MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
3214b89b	13	Lesser General Public License for more details.
d80b3f3c	14
3214b89b	15	You should have received a copy of the GNU Lesser General Public
ab84e3ff PE	16	License along with the GNU C Library. If not, see
ab84e3ff PE	17	<http://www.gnu.org/licenses/>. */
d80b3f3c UD	18
d80b3f3c UD	19	#include <sysdeps/generic/sysdep.h>
94fd527b	20	#include <features.h>
d80b3f3c	21
6f64e7d7 RM	22	#ifndef __ASSEMBLER__
6f64e7d7 RM	23	# include <stdint.h>
8c2b1ed8 RM	24	#else
8c2b1ed8 RM	25	# include <arm-features.h>
6f64e7d7 RM	26	#endif
6f64e7d7 RM	27
3377126b RH	28	/* The __ARM_ARCH define is provided by gcc 4.8. Construct it otherwise. */
	29	#ifndef __ARM_ARCH
	30	# ifdef __ARM_ARCH_2__
	31	# define __ARM_ARCH 2
	32	# elif defined (__ARM_ARCH_3__) \|\| defined (__ARM_ARCH_3M__)
	33	# define __ARM_ARCH 3
	34	# elif defined (__ARM_ARCH_4__) \|\| defined (__ARM_ARCH_4T__)
	35	# define __ARM_ARCH 4
	36	# elif defined (__ARM_ARCH_5__) \|\| defined (__ARM_ARCH_5E__) \
	37	\|\| defined(__ARM_ARCH_5T__) \|\| defined(__ARM_ARCH_5TE__) \
	38	\|\| defined(__ARM_ARCH_5TEJ__)
	39	# define __ARM_ARCH 5
	40	# elif defined (__ARM_ARCH_6__) \|\| defined(__ARM_ARCH_6J__) \
	41	\|\| defined (__ARM_ARCH_6Z__) \|\| defined(__ARM_ARCH_6ZK__) \
	42	\|\| defined (__ARM_ARCH_6K__) \|\| defined(__ARM_ARCH_6T2__)
	43	# define __ARM_ARCH 6
	44	# elif defined (__ARM_ARCH_7__) \|\| defined(__ARM_ARCH_7A__) \
	45	\|\| defined(__ARM_ARCH_7R__) \|\| defined(__ARM_ARCH_7M__) \
	46	\|\| defined(__ARM_ARCH_7EM__)
	47	# define __ARM_ARCH 7
	48	# else
	49	# error unknown arm architecture
	50	# endif
	51	#endif
	52
	53	#if __ARM_ARCH > 4 \|\| defined (__ARM_ARCH_4T__)
	54	# define ARCH_HAS_BX
	55	#endif
	56	#if __ARM_ARCH > 4
	57	# define ARCH_HAS_BLX
	58	#endif
79fd8731 RH	59	#if __ARM_ARCH > 6 \|\| defined (__ARM_ARCH_6K__) \|\| defined (__ARM_ARCH_6ZK__)
	60	# define ARCH_HAS_HARD_TP
	61	#endif
3377126b RH	62	#if __ARM_ARCH > 6 \|\| defined (__ARM_ARCH_6T2__)
3377126b RH	63	# define ARCH_HAS_T2
47f0752a RM	64	#endif
47f0752a RM	65
e0ebc3b2	66	#ifdef __ASSEMBLER__
d80b3f3c UD	67
	68	/* Syntactic details of assembler. */
	69
0c56aa63	70	#define ALIGNARG(log2) log2
d80b3f3c UD	71	#define ASM_SIZE_DIRECTIVE(name) .size name,.-name
d80b3f3c UD	72
fe0955cd UD	73	#define PLTJMP(_x) _x##(PLT)
fe0955cd UD	74
3377126b	75	#ifdef ARCH_HAS_BX
46dede0c RH	76	# define BX(R) bx R
46dede0c RH	77	# define BXC(C, R) bx##C R
3377126b	78	# ifdef ARCH_HAS_BLX
46dede0c	79	# define BLX(R) blx R
3377126b RH	80	# else
3377126b RH	81	# define BLX(R) mov lr, pc; bx R
46dede0c	82	# endif
644d8224	83	#else
46dede0c RH	84	# define BX(R) mov pc, R
	85	# define BXC(C, R) mov##C pc, R
	86	# define BLX(R) mov lr, pc; mov pc, R
d80b3f3c UD	87	#endif
d80b3f3c UD	88
46dede0c RH	89	#define DO_RET(R) BX(R)
	90	#define RETINSTR(C, R) BXC(C, R)
	91
d80b3f3c	92	/* Define an entry point visible from C. */
63cc0e75 RH	93	#define ENTRY(name) \
	94	.globl C_SYMBOL_NAME(name); \
	95	.type C_SYMBOL_NAME(name),%function; \
	96	.align ALIGNARG(4); \
	97	C_LABEL(name) \
	98	CFI_SECTIONS; \
	99	cfi_startproc; \
	100	CALL_MCOUNT
	101
	102	#define CFI_SECTIONS \
	103	.cfi_sections .debug_frame
f4564ff0	104
d80b3f3c	105	#undef END
63cc0e75 RH	106	#define END(name) \
	107	cfi_endproc; \
	108	ASM_SIZE_DIRECTIVE(name)
d80b3f3c UD	109
	110	/* If compiled for profiling, call `mcount' at the start of each function. */
	111	#ifdef PROF
6a0dd472	112	/* Call __gnu_mcount_nc (GCC >= 4.4). */
63cc0e75	113	#define CALL_MCOUNT \
55668624	114	push {lr}; \
63cc0e75 RH	115	cfi_adjust_cfa_offset (4); \
	116	cfi_rel_offset (lr, 0); \
	117	bl PLTJMP(mcount); \
	118	cfi_adjust_cfa_offset (-4); \
	119	cfi_restore (lr)
d80b3f3c UD	120	#else
	121	#define CALL_MCOUNT /* Do nothing. */
	122	#endif
	123
d80b3f3c UD	124	/* Since C identifiers are not normally prefixed with an underscore
	125	on this system, the asm identifier `syscall_error' intrudes on the
	126	C name space. Make sure we use an innocuous name. */
	127	#define syscall_error __syscall_error
94fd527b	128	#define mcount __gnu_mcount_nc
d80b3f3c	129
27489557 DG	130	/* Tag_ABI_align8_preserved: This code preserves 8-byte
	131	alignment in any callee. */
	132	.eabi_attribute 25, 1
	133	/* Tag_ABI_align8_needed: This code may require 8-byte alignment from
	134	the caller. */
	135	.eabi_attribute 24, 1
27489557	136
5ff5dfe7 RH	137	/* The thumb2 encoding is reasonably complete. Unless suppressed, use it. */
	138	.syntax unified
	139	# if defined(__thumb2__) && !defined(NO_THUMB)
	140	.thumb
	141	#else
	142	# undef __thumb__
	143	# undef __thumb2__
	144	.arm
	145	# endif
	146
8c2b1ed8 RM	147	/* Load or store to/from address X + Y into/from R, (maybe) using T.
	148	X or Y can use T freely; T can be R if OP is a load. The first
	149	version eschews the two-register addressing mode, while the
	150	second version uses it. */
	151	# define LDST_INDEXED_NOINDEX(OP, R, T, X, Y) \
	152	add T, X, Y; \
8c2b1ed8 RM	153	OP R, [T]
	154	# define LDST_INDEXED_INDEX(OP, R, X, Y) \
	155	OP R, [X, Y]
	156
	157	# ifdef ARM_NO_INDEX_REGISTER
	158	/* We're never using the two-register addressing mode, so this
	159	always uses an intermediate add. */
	160	# define LDST_INDEXED(OP, R, T, X, Y) LDST_INDEXED_NOINDEX (OP, R, T, X, Y)
	161	# define LDST_PC_INDEXED(OP, R, T, X) LDST_INDEXED_NOINDEX (OP, R, T, pc, X)
	162	# else
	163	/* The two-register addressing mode is OK, except on Thumb with pc. */
	164	# define LDST_INDEXED(OP, R, T, X, Y) LDST_INDEXED_INDEX (OP, R, X, Y)
	165	# ifdef __thumb2__
	166	# define LDST_PC_INDEXED(OP, R, T, X) LDST_INDEXED_NOINDEX (OP, R, T, pc, X)
	167	# else
	168	# define LDST_PC_INDEXED(OP, R, T, X) LDST_INDEXED_INDEX (OP, R, pc, X)
	169	# endif
	170	# endif
	171
cd24e113 RH	172	/* Load or store to/from a pc-relative EXPR into/from R, using T. */
	173	# ifdef __thumb2__
	174	# define LDST_PCREL(OP, R, T, EXPR) \
	175	ldr T, 98f; \
	176	.subsection 2; \
	177	98: .word EXPR - 99f - PC_OFS; \
	178	.previous; \
	179	99: add T, T, pc; \
	180	OP R, [T]
8c2b1ed8 RM	181	# elif defined (ARCH_HAS_T2) && ARM_PCREL_MOVW_OK
	182	# define LDST_PCREL(OP, R, T, EXPR) \
	183	movw T, #:lower16:EXPR - 99f - PC_OFS; \
	184	movt T, #:upper16:EXPR - 99f - PC_OFS; \
	185	99: LDST_PC_INDEXED (OP, R, T, T)
cd24e113 RH	186	# else
	187	# define LDST_PCREL(OP, R, T, EXPR) \
	188	ldr T, 98f; \
	189	.subsection 2; \
	190	98: .word EXPR - 99f - PC_OFS; \
	191	.previous; \
	192	99: OP R, [pc, T]
	193	# endif
3ae44082	194
8c2b1ed8 RM	195	/* Load from a global SYMBOL + CONSTANT into R, using T. */
	196	# if defined (ARCH_HAS_T2) && !defined (PIC)
	197	# define LDR_GLOBAL(R, T, SYMBOL, CONSTANT) \
	198	movw T, #:lower16:SYMBOL; \
	199	movt T, #:upper16:SYMBOL; \
81cb7a0b	200	ldr R, [T, $CONSTANT]
8c2b1ed8 RM	201	# elif defined (ARCH_HAS_T2) && defined (PIC) && ARM_PCREL_MOVW_OK
	202	# define LDR_GLOBAL(R, T, SYMBOL, CONSTANT) \
	203	movw R, #:lower16:_GLOBAL_OFFSET_TABLE_ - 97f - PC_OFS; \
	204	movw T, #:lower16:99f - 98f - PC_OFS; \
	205	movt R, #:upper16:_GLOBAL_OFFSET_TABLE_ - 97f - PC_OFS; \
	206	movt T, #:upper16:99f - 98f - PC_OFS; \
	207	.pushsection .rodata.cst4, "aM", %progbits, 4; \
	208	.balign 4; \
	209	99: .word SYMBOL##(GOT); \
	210	.popsection; \
	211	97: add R, R, pc; \
	212	98: LDST_PC_INDEXED (ldr, T, T, T); \
	213	LDST_INDEXED (ldr, R, T, R, T); \
81cb7a0b	214	ldr R, [R, $CONSTANT]
8c2b1ed8 RM	215	# else
8c2b1ed8 RM	216	# define LDR_GLOBAL(R, T, SYMBOL, CONSTANT) \
b7f2d27d WN	217	ldr T, 99f; \
	218	ldr R, 100f; \
	219	98: add T, T, pc; \
	220	ldr T, [T, R]; \
	221	.subsection 2; \
	222	99: .word _GLOBAL_OFFSET_TABLE_ - 98b - PC_OFS; \
8c2b1ed8	223	100: .word SYMBOL##(GOT); \
b7f2d27d	224	.previous; \
8c2b1ed8 RM	225	ldr R, [T, $CONSTANT]
	226	# endif
	227
	228	/* This is the same as LDR_GLOBAL, but for a SYMBOL that is known to
	229	be in the same linked object (as for one with hidden visibility).
	230	We can avoid the GOT indirection in the PIC case. For the pure
	231	static case, LDR_GLOBAL is already optimal. */
	232	# ifdef PIC
	233	# define LDR_HIDDEN(R, T, SYMBOL, CONSTANT) \
	234	LDST_PCREL (ldr, R, T, SYMBOL + CONSTANT)
	235	# else
	236	# define LDR_HIDDEN(R, T, SYMBOL, CONSTANT) \
	237	LDR_GLOBAL (R, T, SYMBOL, CONSTANT)
	238	# endif
b7f2d27d	239
3ae44082 RH	240	/* Cope with negative memory offsets, which thumb can't encode.
	241	Use NEGOFF_ADJ_BASE to (conditionally) alter the base register,
	242	and then NEGOFF_OFF1 to use 0 for thumb and the offset for arm,
	243	or NEGOFF_OFF2 to use A-B for thumb and A for arm. */
	244	# ifdef __thumb2__
	245	# define NEGOFF_ADJ_BASE(R, OFF) add R, R, $OFF
	246	# define NEGOFF_ADJ_BASE2(D, S, OFF) add D, S, $OFF
	247	# define NEGOFF_OFF1(R, OFF) [R]
	248	# define NEGOFF_OFF2(R, OFFA, OFFB) [R, $((OFFA) - (OFFB))]
	249	# else
	250	# define NEGOFF_ADJ_BASE(R, OFF)
	251	# define NEGOFF_ADJ_BASE2(D, S, OFF) mov D, S
	252	# define NEGOFF_OFF1(R, OFF) [R, $OFF]
	253	# define NEGOFF_OFF2(R, OFFA, OFFB) [R, $OFFA]
	254	# endif
5232b909 RH	255
	256	/* Helper to get the TLS base pointer. The interface is that TMP is a
	257	register that may be used to hold the LR, if necessary. TMP may be
	258	LR itself to indicate that LR need not be saved. The base pointer
79fd8731	259	is returned in R0. Only R0 and TMP are modified. */
5232b909	260
79fd8731 RH	261	# ifdef ARCH_HAS_HARD_TP
	262	/* If the cpu has cp15 available, use it. */
	263	# define GET_TLS(TMP) mrc p15, 0, r0, c13, c0, 3
	264	# else
	265	/* At this generic level we have no tricks to pull. Call the ABI routine. */
	266	# define GET_TLS(TMP) \
5232b909 RH	267	push { r1, r2, r3, lr }; \
	268	cfi_remember_state; \
	269	cfi_adjust_cfa_offset (16); \
	270	cfi_rel_offset (r1, 0); \
	271	cfi_rel_offset (r2, 4); \
	272	cfi_rel_offset (r3, 8); \
	273	cfi_rel_offset (lr, 12); \
	274	bl __aeabi_read_tp; \
	275	pop { r1, r2, r3, lr }; \
	276	cfi_restore_state
79fd8731	277	# endif /* ARCH_HAS_HARD_TP */
5232b909	278
7214d558 RM	279	/* These are the directives used for EABI unwind info.
	280	Wrap them in macros so another configuration's sysdep.h
	281	file can define them away if it doesn't use EABI unwind info. */
	282	# define eabi_fnstart .fnstart
	283	# define eabi_fnend .fnend
	284	# define eabi_save(...) .save __VA_ARGS__
	285	# define eabi_cantunwind .cantunwind
	286	# define eabi_pad(n) .pad n
	287
e0ebc3b2	288	#endif /* __ASSEMBLER__ */
783a65c2 RH	289
783a65c2 RH	290	/* This number is the offset from the pc at the current location. */
5ff5dfe7	291	#ifdef __thumb__
783a65c2 RH	292	# define PC_OFS 4
	293	#else
	294	# define PC_OFS 8
	295	#endif
6f64e7d7 RM	296
6f64e7d7 RM	297	/* Pointer mangling support. */
a3848485	298	#if (IS_IN (rtld) \|\| \
4f41c682	299	(!defined SHARED && (IS_IN (libc) \|\| IS_IN (libpthread))))
6f64e7d7 RM	300	# ifdef __ASSEMBLER__
6f64e7d7 RM	301	# define PTR_MANGLE_LOAD(guard, tmp) \
8c2b1ed8	302	LDR_HIDDEN (guard, tmp, C_SYMBOL_NAME(__pointer_chk_guard_local), 0)
6f64e7d7 RM	303	# define PTR_MANGLE(dst, src, guard, tmp) \
	304	PTR_MANGLE_LOAD(guard, tmp); \
	305	PTR_MANGLE2(dst, src, guard)
	306	/* Use PTR_MANGLE2 for efficiency if guard is already loaded. */
	307	# define PTR_MANGLE2(dst, src, guard) \
	308	eor dst, src, guard
	309	# define PTR_DEMANGLE(dst, src, guard, tmp) \
	310	PTR_MANGLE (dst, src, guard, tmp)
	311	# define PTR_DEMANGLE2(dst, src, guard) \
	312	PTR_MANGLE2 (dst, src, guard)
	313	# else
	314	extern uintptr_t __pointer_chk_guard_local attribute_relro attribute_hidden;
	315	# define PTR_MANGLE(var) \
	316	(var) = (__typeof (var)) ((uintptr_t) (var) ^ __pointer_chk_guard_local)
	317	# define PTR_DEMANGLE(var) PTR_MANGLE (var)
	318	# endif
	319	#else
	320	# ifdef __ASSEMBLER__
	321	# define PTR_MANGLE_LOAD(guard, tmp) \
8c2b1ed8	322	LDR_GLOBAL (guard, tmp, C_SYMBOL_NAME(__pointer_chk_guard), 0);
6f64e7d7 RM	323	# define PTR_MANGLE(dst, src, guard, tmp) \
	324	PTR_MANGLE_LOAD(guard, tmp); \
	325	PTR_MANGLE2(dst, src, guard)
	326	/* Use PTR_MANGLE2 for efficiency if guard is already loaded. */
	327	# define PTR_MANGLE2(dst, src, guard) \
	328	eor dst, src, guard
	329	# define PTR_DEMANGLE(dst, src, guard, tmp) \
	330	PTR_MANGLE (dst, src, guard, tmp)
	331	# define PTR_DEMANGLE2(dst, src, guard) \
	332	PTR_MANGLE2 (dst, src, guard)
	333	# else
	334	extern uintptr_t __pointer_chk_guard attribute_relro;
	335	# define PTR_MANGLE(var) \
	336	(var) = (__typeof (var)) ((uintptr_t) (var) ^ __pointer_chk_guard)
	337	# define PTR_DEMANGLE(var) PTR_MANGLE (var)
	338	# endif
	339	#endif