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Commit | Line | Data |
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8f5ca04b RM |
1 | /* Pentium __mpn_sub_n -- Subtract two limb vectors of the same length > 0 |
2 | and store difference in a third limb vector. | |
f7a9f785 | 3 | Copyright (C) 1992-2016 Free Software Foundation, Inc. |
5929563f | 4 | This file is part of the GNU MP Library. |
8f5ca04b | 5 | |
5929563f | 6 | The GNU MP Library is free software; you can redistribute it and/or modify |
6d84f89a AJ |
7 | it under the terms of the GNU Lesser General Public License as published by |
8 | the Free Software Foundation; either version 2.1 of the License, or (at your | |
5929563f | 9 | option) any later version. |
8f5ca04b | 10 | |
5929563f UD |
11 | The GNU MP Library is distributed in the hope that it will be useful, but |
12 | WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY | |
6d84f89a | 13 | or FITNESS FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public |
5929563f | 14 | License for more details. |
8f5ca04b | 15 | |
6d84f89a | 16 | You should have received a copy of the GNU Lesser General Public License |
59ba27a6 PE |
17 | along with the GNU MP Library; see the file COPYING.LIB. If not, |
18 | see <http://www.gnu.org/licenses/>. */ | |
8f5ca04b | 19 | |
77a58cad RM |
20 | #include "sysdep.h" |
21 | #include "asm-syntax.h" | |
3f02f778 | 22 | |
2366713d | 23 | #define PARMS 4+16 /* space for 4 saved regs */ |
3f02f778 | 24 | #define RES PARMS |
2366713d JM |
25 | #define S1 RES+4 |
26 | #define S2 S1+4 | |
27 | #define SIZE S2+4 | |
77a58cad | 28 | |
ae828bc6 | 29 | .text |
2366713d | 30 | ENTRY (__mpn_sub_n) |
3f02f778 | 31 | |
8f5ca04b | 32 | pushl %edi |
1ad9da69 | 33 | cfi_adjust_cfa_offset (4) |
8f5ca04b | 34 | pushl %esi |
1ad9da69 | 35 | cfi_adjust_cfa_offset (4) |
8f5ca04b | 36 | pushl %ebp |
1ad9da69 | 37 | cfi_adjust_cfa_offset (4) |
f9e7bbce | 38 | pushl %ebx |
1ad9da69 | 39 | cfi_adjust_cfa_offset (4) |
8f5ca04b | 40 | |
3f02f778 | 41 | movl RES(%esp),%edi |
1ad9da69 | 42 | cfi_rel_offset (edi, 12) |
3f02f778 | 43 | movl S1(%esp),%esi |
1ad9da69 | 44 | cfi_rel_offset (esi, 8) |
f9e7bbce | 45 | movl S2(%esp),%ebx |
1ad9da69 | 46 | cfi_rel_offset (ebx, 0) |
3f02f778 | 47 | movl SIZE(%esp),%ecx |
f9e7bbce | 48 | movl (%ebx),%ebp |
fee732e5 | 49 | cfi_rel_offset (ebp, 4) |
8f5ca04b RM |
50 | |
51 | decl %ecx | |
6b628d36 | 52 | movl %ecx,%edx |
8f5ca04b | 53 | shrl $3,%ecx |
6b628d36 | 54 | andl $7,%edx |
8f5ca04b | 55 | testl %ecx,%ecx /* zero carry flag */ |
5929563f | 56 | jz L(end) |
6b628d36 | 57 | pushl %edx |
1ad9da69 | 58 | cfi_adjust_cfa_offset (4) |
8f5ca04b RM |
59 | |
60 | ALIGN (3) | |
5929563f | 61 | L(oop): movl 28(%edi),%eax /* fetch destination cache line */ |
6b628d36 RM |
62 | leal 32(%edi),%edi |
63 | ||
5929563f | 64 | L(1): movl (%esi),%eax |
6b628d36 | 65 | movl 4(%esi),%edx |
f9e7bbce GM |
66 | sbbl %ebp,%eax |
67 | movl 4(%ebx),%ebp | |
68 | sbbl %ebp,%edx | |
69 | movl 8(%ebx),%ebp | |
6b628d36 RM |
70 | movl %eax,-32(%edi) |
71 | movl %edx,-28(%edi) | |
72 | ||
5929563f | 73 | L(2): movl 8(%esi),%eax |
6b628d36 | 74 | movl 12(%esi),%edx |
f9e7bbce GM |
75 | sbbl %ebp,%eax |
76 | movl 12(%ebx),%ebp | |
77 | sbbl %ebp,%edx | |
78 | movl 16(%ebx),%ebp | |
6b628d36 RM |
79 | movl %eax,-24(%edi) |
80 | movl %edx,-20(%edi) | |
81 | ||
5929563f | 82 | L(3): movl 16(%esi),%eax |
6b628d36 | 83 | movl 20(%esi),%edx |
f9e7bbce GM |
84 | sbbl %ebp,%eax |
85 | movl 20(%ebx),%ebp | |
86 | sbbl %ebp,%edx | |
87 | movl 24(%ebx),%ebp | |
6b628d36 RM |
88 | movl %eax,-16(%edi) |
89 | movl %edx,-12(%edi) | |
90 | ||
5929563f | 91 | L(4): movl 24(%esi),%eax |
6b628d36 | 92 | movl 28(%esi),%edx |
f9e7bbce GM |
93 | sbbl %ebp,%eax |
94 | movl 28(%ebx),%ebp | |
95 | sbbl %ebp,%edx | |
96 | movl 32(%ebx),%ebp | |
6b628d36 RM |
97 | movl %eax,-8(%edi) |
98 | movl %edx,-4(%edi) | |
99 | ||
100 | leal 32(%esi),%esi | |
f9e7bbce | 101 | leal 32(%ebx),%ebx |
8f5ca04b | 102 | decl %ecx |
5929563f | 103 | jnz L(oop) |
8f5ca04b | 104 | |
6b628d36 | 105 | popl %edx |
1ad9da69 | 106 | cfi_adjust_cfa_offset (-4) |
5929563f | 107 | L(end): |
6b628d36 | 108 | decl %edx /* test %edx w/o clobbering carry */ |
5929563f | 109 | js L(end2) |
6b628d36 | 110 | incl %edx |
5929563f | 111 | L(oop2): |
6b628d36 RM |
112 | leal 4(%edi),%edi |
113 | movl (%esi),%eax | |
f9e7bbce GM |
114 | sbbl %ebp,%eax |
115 | movl 4(%ebx),%ebp | |
6b628d36 RM |
116 | movl %eax,-4(%edi) |
117 | leal 4(%esi),%esi | |
f9e7bbce | 118 | leal 4(%ebx),%ebx |
6b628d36 | 119 | decl %edx |
5929563f UD |
120 | jnz L(oop2) |
121 | L(end2): | |
6b628d36 | 122 | movl (%esi),%eax |
f9e7bbce | 123 | sbbl %ebp,%eax |
6b628d36 | 124 | movl %eax,(%edi) |
8f5ca04b RM |
125 | |
126 | sbbl %eax,%eax | |
127 | negl %eax | |
128 | ||
8f5ca04b | 129 | popl %ebx |
1ad9da69 UD |
130 | cfi_adjust_cfa_offset (-4) |
131 | cfi_restore (ebx) | |
f9e7bbce | 132 | popl %ebp |
1ad9da69 UD |
133 | cfi_adjust_cfa_offset (-4) |
134 | cfi_restore (ebp) | |
8f5ca04b | 135 | popl %esi |
1ad9da69 UD |
136 | cfi_adjust_cfa_offset (-4) |
137 | cfi_restore (esi) | |
8f5ca04b | 138 | popl %edi |
1ad9da69 UD |
139 | cfi_adjust_cfa_offset (-4) |
140 | cfi_restore (edi) | |
3f02f778 | 141 | |
8f5ca04b | 142 | ret |
2366713d | 143 | END (__mpn_sub_n) |