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6d4752d8 1/* Install given floating-point environment and raise exceptions.
568035b7 2 Copyright (C) 1997-2013 Free Software Foundation, Inc.
6d4752d8 3 This file is part of the GNU C Library.
7210de33 4 Contributed by Ulrich Drepper <drepper@cygnus.com>, 1997.
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5
6 The GNU C Library is free software; you can redistribute it and/or
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7 modify it under the terms of the GNU Lesser General Public
8 License as published by the Free Software Foundation; either
9 version 2.1 of the License, or (at your option) any later version.
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10
11 The GNU C Library is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
41bdb6e2 14 Lesser General Public License for more details.
6d4752d8 15
41bdb6e2 16 You should have received a copy of the GNU Lesser General Public
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17 License along with the GNU C Library; if not, see
18 <http://www.gnu.org/licenses/>. */
6d4752d8 19
7210de33 20#include <fenv_libc.h>
edba7a54 21#include <fpu_control.h>
e279e90b 22#include <bp-sym.h>
6d4752d8 23
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24#define _FPU_MASK_ALL (_FPU_MASK_ZM | _FPU_MASK_OM | _FPU_MASK_UM | _FPU_MASK_XM | _FPU_MASK_IM)
25
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26int
27__feupdateenv (const fenv_t *envp)
6d4752d8 28{
7210de33 29 fenv_union_t old, new;
6d4752d8 30
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31 /* Save the currently set exceptions. */
32 new.fenv = *envp;
33 old.fenv = fegetenv_register ();
6d4752d8 34
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35 /* Restore rounding mode and exception enable from *envp and merge
36 exceptions. Leave fraction rounded/inexact and FP result/CC bits
37 unchanged. */
38 new.l[1] = (old.l[1] & 0x1FFFFF00) | (new.l[1] & 0x1FF80FFF);
39
40 /* If the old env has no eabled exceptions and the new env has any enabled
41 exceptions, then unmask SIGFPE in the MSR FE0/FE1 bits. This will put
42 the hardware into "precise mode" and may cause the FPU to run slower on
43 some hardware. */
edba7a54 44 if ((old.l[1] & _FPU_MASK_ALL) == 0 && (new.l[1] & _FPU_MASK_ALL) != 0)
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45 (void)__fe_nomask_env ();
46
47 /* If the old env had any eabled exceptions and the new env has no enabled
48 exceptions, then mask SIGFPE in the MSR FE0/FE1 bits. This may allow the
49 FPU to run faster because it always takes the default action and can not
50 generate SIGFPE. */
edba7a54 51 if ((old.l[1] & _FPU_MASK_ALL) != 0 && (new.l[1] & _FPU_MASK_ALL) == 0)
4a59e9ad 52 (void)__fe_mask_env ();
6d4752d8 53
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54 /* Atomically enable and raise (if appropriate) exceptions set in `new'. */
55 fesetenv_register (new.fenv);
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56
57 /* Success. */
58 return 0;
6d4752d8 59}
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60
61#include <shlib-compat.h>
62#if SHLIB_COMPAT (libm, GLIBC_2_1, GLIBC_2_2)
63ae7b63 63strong_alias (__feupdateenv, __old_feupdateenv)
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64compat_symbol (libm, BP_SYM (__old_feupdateenv), BP_SYM (feupdateenv), GLIBC_2_1);
65#endif
66
9ff8d36f 67libm_hidden_ver (__feupdateenv, feupdateenv)
4eb8a862 68versioned_symbol (libm, BP_SYM (__feupdateenv), BP_SYM (feupdateenv), GLIBC_2_2);