[thirdparty/glibc.git] / sysdeps / powerpc / powerpc32 / dl-trampoline.S

/* PLT trampolines.  PPC32 version.
   Copyright (C) 2005-2014 Free Software Foundation, Inc.
   This file is part of the GNU C Library.

   The GNU C Library is free software; you can redistribute it and/or
   modify it under the terms of the GNU Lesser General Public
   License as published by the Free Software Foundation; either
   version 2.1 of the License, or (at your option) any later version.

   The GNU C Library is distributed in the hope that it will be useful,
   but WITHOUT ANY WARRANTY; without even the implied warranty of
   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
   Lesser General Public License for more details.

   You should have received a copy of the GNU Lesser General Public
   License along with the GNU C Library; if not, see
   <http://www.gnu.org/licenses/>.  */

#include <sysdep.h>

	.section ".text"
	.align 2
	.globl _dl_runtime_resolve
	.type _dl_runtime_resolve,@function
_dl_runtime_resolve:
	cfi_startproc
 # We need to save the registers used to pass parameters, and register 0,
 # which is used by _mcount; the registers are saved in a stack frame.
	stwu r1,-64(r1)
	cfi_adjust_cfa_offset (64)
	stw r0,12(r1)
	stw r3,16(r1)
	stw r4,20(r1)
 # The code that calls this has put parameters for `fixup' in r12 and r11.
	mr r3,r12
	stw r5,24(r1)
	mr r4,r11
	stw r6,28(r1)
	mflr r0
 # We also need to save some of the condition register fields
	stw r7,32(r1)
 # Don't clobber the caller's LRSAVE, it is needed by _mcount.
	stw r0,48(r1)
 	cfi_offset (lr, -16)
	stw r8,36(r1)
	mfcr r0
	stw r9,40(r1)
	stw r10,44(r1)
	stw r0,8(r1)
	bl _dl_fixup@local
 # 'fixup' returns the address we want to branch to.
	mtctr r3
 # Put the registers back...
	lwz r0,48(r1)
	lwz r10,44(r1)
	lwz r9,40(r1)
	mtlr r0
	lwz r8,36(r1)
	lwz r0,8(r1)
	lwz r7,32(r1)
	lwz r6,28(r1)
	mtcrf 0xFF,r0
	lwz r5,24(r1)
	lwz r4,20(r1)
	lwz r3,16(r1)
	lwz r0,12(r1)
 # ...unwind the stack frame, and jump to the PLT entry we updated.
	addi r1,r1,64
	bctr
	cfi_endproc
	.size	 _dl_runtime_resolve,.-_dl_runtime_resolve

#ifndef PROF
	.align 2
	.globl _dl_prof_resolve
	.type _dl_prof_resolve,@function
_dl_prof_resolve:
	cfi_startproc
 # We need to save the registers used to pass parameters, and register 0,
 # which is used by _mcount; the registers are saved in a stack frame.
	stwu r1,-320(r1)
	cfi_adjust_cfa_offset (320)
	/* Stack layout:

	  +312   stackframe
	  +308   lr
	  +304   r1
	  +288   v12
	  +272   v11
	  +256   v10
	  +240   v9
	  +224   v8
	  +208   v7
	  +192   v6
	  +176   v5
	  +160   v4
	  +144   v3
	  +128   v2
	  +112   v1
	  +104   fp8
	  +96    fp7
	  +88    fp6
	  +80    fp5
	  +72    fp4
	  +64    fp3
	  +56    fp2
	  +48    fp1
	  +44    r10
	  +40    r9
	  +36    r8
	  +32    r7
	  +28    r6
	  +24    r5
	  +20    r4
	  +16    r3
	  +12    r0
	  +8     cr
	   r1    link
	*/
        stw r0,12(r1)
	stw r3,16(r1)
	stw r4,20(r1)
 # The code that calls this has put parameters for `fixup' in r12 and r11.
	mr r3,r12
	stw r5,24(r1)
	mr r4,r11
	stw r6,28(r1)
	mflr r5
 # We also need to save some of the condition register fields.
	stw r7,32(r1)
 # Don't clobber the caller's LRSAVE, it is needed by _mcount.
	stw r5,308(r1)
	cfi_offset (lr, -12)
	stw r8,36(r1)
	mfcr r0
	stw r9,40(r1)
	stw r10,44(r1)
	stw r0,8(r1)
#ifndef __NO_FPRS__
 # Save the floating point registers
	stfd fp1,48(r1)
	stfd fp2,56(r1)
	stfd fp3,64(r1)
	stfd fp4,72(r1)
	stfd fp5,80(r1)
	stfd fp6,88(r1)
	stfd fp7,96(r1)
	stfd fp8,104(r1)
#endif
 # XXX TODO: store vmx registers
 # Load the extra parameters.
	addi r6,r1,16
	addi r7,r1,312
	li r0,-1
	stw r0,0(r7)
	bl _dl_profile_fixup@local
 # 'fixup' returns the address we want to branch to.
	mtctr r3
 # Put the registers back...
	lwz r0,308(r1)
	lwz r10,44(r1)
	lwz r9,40(r1)
	mtlr r0
	lwz r8,36(r1)
	lwz r0,8(r1)
	lwz r7,32(r1)
	lwz r6,28(r1)
	mtcrf 0xFF,r0
	lwz r5,24(r1)
	lwz r4,20(r1)
	lwz r3,16(r1)
        lwz r0,12(r1)
#ifndef __NO_FPRS__
 # Load the floating point registers.
	lfd fp1,48(r1)
	lfd fp2,56(r1)
	lfd fp3,64(r1)
	lfd fp4,72(r1)
	lfd fp5,80(r1)
	lfd fp6,88(r1)
	lfd fp7,96(r1)
	lfd fp8,104(r1)
#endif
 # ...unwind the stack frame, and jump to the PLT entry we updated.
	addi r1,r1,320
	bctr
	cfi_endproc
	.size	 _dl_prof_resolve,.-_dl_prof_resolve
#endif
Commit	Line	Data
2413fdba	1	/* PLT trampolines. PPC32 version.
d4697bc9	2	Copyright (C) 2005-2014 Free Software Foundation, Inc.
2413fdba UD	3	This file is part of the GNU C Library.
	4
	5	The GNU C Library is free software; you can redistribute it and/or
	6	modify it under the terms of the GNU Lesser General Public
	7	License as published by the Free Software Foundation; either
	8	version 2.1 of the License, or (at your option) any later version.
	9
	10	The GNU C Library is distributed in the hope that it will be useful,
	11	but WITHOUT ANY WARRANTY; without even the implied warranty of
	12	MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
	13	Lesser General Public License for more details.
	14
	15	You should have received a copy of the GNU Lesser General Public
59ba27a6 PE	16	License along with the GNU C Library; if not, see
59ba27a6 PE	17	<http://www.gnu.org/licenses/>. */
2413fdba UD	18
	19	#include <sysdep.h>
	20
	21	.section ".text"
	22	.align 2
	23	.globl _dl_runtime_resolve
	24	.type _dl_runtime_resolve,@function
	25	_dl_runtime_resolve:
a7e91561	26	cfi_startproc
2413fdba UD	27	# We need to save the registers used to pass parameters, and register 0,
2413fdba UD	28	# which is used by _mcount; the registers are saved in a stack frame.
85555eeb	29	stwu r1,-64(r1)
a7e91561	30	cfi_adjust_cfa_offset (64)
85555eeb UD	31	stw r0,12(r1)
	32	stw r3,16(r1)
	33	stw r4,20(r1)
2413fdba	34	# The code that calls this has put parameters for `fixup' in r12 and r11.
85555eeb UD	35	mr r3,r12
	36	stw r5,24(r1)
	37	mr r4,r11
	38	stw r6,28(r1)
	39	mflr r0
2413fdba	40	# We also need to save some of the condition register fields
85555eeb	41	stw r7,32(r1)
f17efcb4 UD	42	# Don't clobber the caller's LRSAVE, it is needed by _mcount.
	43	stw r0,48(r1)
	44	cfi_offset (lr, -16)
85555eeb UD	45	stw r8,36(r1)
	46	mfcr r0
	47	stw r9,40(r1)
	48	stw r10,44(r1)
	49	stw r0,8(r1)
2413fdba UD	50	bl _dl_fixup@local
2413fdba UD	51	# 'fixup' returns the address we want to branch to.
85555eeb	52	mtctr r3
2413fdba	53	# Put the registers back...
f17efcb4	54	lwz r0,48(r1)
85555eeb UD	55	lwz r10,44(r1)
	56	lwz r9,40(r1)
	57	mtlr r0
	58	lwz r8,36(r1)
	59	lwz r0,8(r1)
	60	lwz r7,32(r1)
	61	lwz r6,28(r1)
	62	mtcrf 0xFF,r0
	63	lwz r5,24(r1)
	64	lwz r4,20(r1)
	65	lwz r3,16(r1)
	66	lwz r0,12(r1)
2413fdba	67	# ...unwind the stack frame, and jump to the PLT entry we updated.
85555eeb	68	addi r1,r1,64
2413fdba	69	bctr
a7e91561	70	cfi_endproc
2413fdba UD	71	.size _dl_runtime_resolve,.-_dl_runtime_resolve
2413fdba UD	72
9f0d7b6d	73	#ifndef PROF
2413fdba UD	74	.align 2
	75	.globl _dl_prof_resolve
	76	.type _dl_prof_resolve,@function
	77	_dl_prof_resolve:
a7e91561	78	cfi_startproc
2413fdba UD	79	# We need to save the registers used to pass parameters, and register 0,
2413fdba UD	80	# which is used by _mcount; the registers are saved in a stack frame.
85555eeb	81	stwu r1,-320(r1)
a7e91561	82	cfi_adjust_cfa_offset (320)
85555eeb UD	83	/* Stack layout:
	84
	85	+312 stackframe
	86	+308 lr
	87	+304 r1
	88	+288 v12
	89	+272 v11
	90	+256 v10
	91	+240 v9
	92	+224 v8
	93	+208 v7
	94	+192 v6
	95	+176 v5
	96	+160 v4
	97	+144 v3
	98	+128 v2
	99	+112 v1
	100	+104 fp8
	101	+96 fp7
	102	+88 fp6
	103	+80 fp5
	104	+72 fp4
	105	+64 fp3
	106	+56 fp2
	107	+48 fp1
	108	+44 r10
	109	+40 r9
	110	+36 r8
	111	+32 r7
	112	+28 r6
	113	+24 r5
	114	+20 r4
	115	+16 r3
	116	+12 r0
	117	+8 cr
	118	r1 link
	119	*/
	120	stw r0,12(r1)
	121	stw r3,16(r1)
	122	stw r4,20(r1)
2413fdba	123	# The code that calls this has put parameters for `fixup' in r12 and r11.
85555eeb UD	124	mr r3,r12
	125	stw r5,24(r1)
	126	mr r4,r11
	127	stw r6,28(r1)
	128	mflr r5
2413fdba	129	# We also need to save some of the condition register fields.
85555eeb	130	stw r7,32(r1)
f17efcb4 UD	131	# Don't clobber the caller's LRSAVE, it is needed by _mcount.
	132	stw r5,308(r1)
	133	cfi_offset (lr, -12)
85555eeb UD	134	stw r8,36(r1)
	135	mfcr r0
	136	stw r9,40(r1)
	137	stw r10,44(r1)
	138	stw r0,8(r1)
a2421a68	139	#ifndef __NO_FPRS__
85555eeb UD	140	# Save the floating point registers
	141	stfd fp1,48(r1)
	142	stfd fp2,56(r1)
	143	stfd fp3,64(r1)
	144	stfd fp4,72(r1)
	145	stfd fp5,80(r1)
	146	stfd fp6,88(r1)
	147	stfd fp7,96(r1)
	148	stfd fp8,104(r1)
a2421a68	149	#endif
85555eeb UD	150	# XXX TODO: store vmx registers
	151	# Load the extra parameters.
	152	addi r6,r1,16
	153	addi r7,r1,312
	154	li r0,-1
	155	stw r0,0(r7)
2413fdba UD	156	bl _dl_profile_fixup@local
2413fdba UD	157	# 'fixup' returns the address we want to branch to.
85555eeb	158	mtctr r3
2413fdba	159	# Put the registers back...
f17efcb4	160	lwz r0,308(r1)
85555eeb UD	161	lwz r10,44(r1)
	162	lwz r9,40(r1)
	163	mtlr r0
	164	lwz r8,36(r1)
	165	lwz r0,8(r1)
	166	lwz r7,32(r1)
	167	lwz r6,28(r1)
	168	mtcrf 0xFF,r0
	169	lwz r5,24(r1)
	170	lwz r4,20(r1)
	171	lwz r3,16(r1)
	172	lwz r0,12(r1)
a2421a68	173	#ifndef __NO_FPRS__
85555eeb UD	174	# Load the floating point registers.
	175	lfd fp1,48(r1)
	176	lfd fp2,56(r1)
	177	lfd fp3,64(r1)
	178	lfd fp4,72(r1)
	179	lfd fp5,80(r1)
	180	lfd fp6,88(r1)
	181	lfd fp7,96(r1)
	182	lfd fp8,104(r1)
a2421a68	183	#endif
2413fdba	184	# ...unwind the stack frame, and jump to the PLT entry we updated.
85555eeb	185	addi r1,r1,320
2413fdba	186	bctr
a7e91561	187	cfi_endproc
2413fdba	188	.size _dl_prof_resolve,.-_dl_prof_resolve
9f0d7b6d	189	#endif