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f9f70e68 | 1 | /* roundf function. PowerPC32 version. |
bfff8b1b | 2 | Copyright (C) 2004-2017 Free Software Foundation, Inc. |
f9f70e68 UD |
3 | This file is part of the GNU C Library. |
4 | ||
5 | The GNU C Library is free software; you can redistribute it and/or | |
6 | modify it under the terms of the GNU Lesser General Public | |
7 | License as published by the Free Software Foundation; either | |
8 | version 2.1 of the License, or (at your option) any later version. | |
9 | ||
10 | The GNU C Library is distributed in the hope that it will be useful, | |
11 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
12 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
13 | Lesser General Public License for more details. | |
14 | ||
15 | You should have received a copy of the GNU Lesser General Public | |
59ba27a6 PE |
16 | License along with the GNU C Library; if not, see |
17 | <http://www.gnu.org/licenses/>. */ | |
f9f70e68 UD |
18 | |
19 | #include <sysdep.h> | |
20 | ||
b0e196a4 | 21 | .section .rodata.cst8,"aM",@progbits,8 |
6a31fe7f | 22 | .align 3 |
f9f70e68 | 23 | .LC0: /* 2**23 */ |
4d37c8aa | 24 | .long 0x4b000000 |
f9f70e68 | 25 | .LC1: /* 0.5 */ |
4d37c8aa | 26 | .long 0x3f000000 |
f9f70e68 UD |
27 | |
28 | /* float [fp1] roundf (float x [fp1]) | |
9c84384c | 29 | IEEE 1003.1 round function. IEEE specifies "round to the nearest |
f9f70e68 UD |
30 | integer value, rounding halfway cases away from zero, regardless of |
31 | the current rounding mode." However PowerPC Architecture defines | |
9c84384c JM |
32 | "Round to Nearest" as "Choose the best approximation. In case of a |
33 | tie, choose the one that is even (least significant bit o).". | |
f9f70e68 UD |
34 | So we can't use the PowerPC "Round to Nearest" mode. Instead we set |
35 | "Round toward Zero" mode and round by adding +-0.5 before rounding | |
36 | to the integer value. */ | |
37 | ||
f7d78e18 | 38 | .section ".text" |
f9f70e68 | 39 | ENTRY (__roundf ) |
f9f70e68 UD |
40 | #ifdef SHARED |
41 | mflr r11 | |
a7e91561 | 42 | cfi_register(lr,r11) |
91d2a845 WS |
43 | SETUP_GOT_ACCESS(r9,got_label) |
44 | addis r9,r9,.LC0-got_label@ha | |
45 | addi r9,r9,.LC0-got_label@l | |
f9f70e68 | 46 | mtlr r11 |
a7e91561 | 47 | cfi_same_value (lr) |
4d37c8aa | 48 | lfs fp13,0(r9) |
f9f70e68 UD |
49 | #else |
50 | lis r9,.LC0@ha | |
4d37c8aa | 51 | lfs fp13,.LC0@l(r9) |
f9f70e68 UD |
52 | #endif |
53 | fabs fp0,fp1 | |
54 | fsubs fp12,fp13,fp13 /* generate 0.0 */ | |
55 | fcmpu cr7,fp0,fp13 /* if (fabs(x) > TWO23) */ | |
21378ae0 JM |
56 | mffs fp11 /* Save current FPU rounding mode and |
57 | "inexact" state. */ | |
f9f70e68 | 58 | fcmpu cr6,fp1,fp12 /* if (x > 0.0) */ |
debf7618 | 59 | bnl- cr7,.L10 |
f9f70e68 UD |
60 | mtfsfi 7,1 /* Set rounding mode toward 0. */ |
61 | #ifdef SHARED | |
b0e196a4 | 62 | lfs fp10,.LC1-.LC0(r9) |
f9f70e68 | 63 | #else |
4d37c8aa | 64 | lfs fp10,.LC1@l(r9) |
f9f70e68 UD |
65 | #endif |
66 | ble- cr6,.L4 | |
67 | fadds fp1,fp1,fp10 /* x+= 0.5; */ | |
68 | fadds fp1,fp1,fp13 /* x+= TWO23; */ | |
69 | fsubs fp1,fp1,fp13 /* x-= TWO23; */ | |
4d37c8aa UD |
70 | fabs fp1,fp1 /* if (x == 0.0) */ |
71 | /* x = 0.0; */ | |
21378ae0 JM |
72 | mtfsf 0xff,fp11 /* Restore previous rounding mode and |
73 | "inexact" state. */ | |
f9f70e68 UD |
74 | blr |
75 | .L4: | |
76 | fsubs fp9,fp1,fp10 /* x+= 0.5; */ | |
77 | bge- cr6,.L9 /* if (x < 0.0) */ | |
78 | fsubs fp1,fp9,fp13 /* x-= TWO23; */ | |
79 | fadds fp1,fp1,fp13 /* x+= TWO23; */ | |
4d37c8aa UD |
80 | fnabs fp1,fp1 /* if (x == 0.0) */ |
81 | /* x = -0.0; */ | |
82 | .L9: | |
21378ae0 JM |
83 | mtfsf 0xff,fp11 /* Restore previous rounding mode and |
84 | "inexact" state. */ | |
f9f70e68 | 85 | blr |
debf7618 JM |
86 | .L10: |
87 | /* Ensure sNaN input is converted to qNaN. */ | |
88 | fcmpu cr7,fp1,fp1 | |
89 | beqlr cr7 | |
90 | fadds fp1,fp1,fp1 | |
91 | blr | |
f9f70e68 UD |
92 | END (__roundf) |
93 | ||
94 | weak_alias (__roundf, roundf) | |
95 |