sysdeps/aarch64/sfp-machine.h

   1 #include <fenv.h>
   2 #include <fpu_control.h>
   3
   4 #define _FP_W_TYPE_SIZE         64
   5 #define _FP_W_TYPE              unsigned long long
   6 #define _FP_WS_TYPE             signed long long
   7 #define _FP_I_TYPE              long long
   8
   9 #define _FP_MUL_MEAT_S(R,X,Y)                                   \
  10   _FP_MUL_MEAT_1_imm(_FP_WFRACBITS_S,R,X,Y)
  11 #define _FP_MUL_MEAT_D(R,X,Y)                                   \
  12   _FP_MUL_MEAT_1_wide(_FP_WFRACBITS_D,R,X,Y,umul_ppmm)
  13 #define _FP_MUL_MEAT_Q(R,X,Y)                                   \
  14   _FP_MUL_MEAT_2_wide_3mul(_FP_WFRACBITS_Q,R,X,Y,umul_ppmm)
  15
  16 #define _FP_DIV_MEAT_S(R,X,Y)   _FP_DIV_MEAT_1_imm(S,R,X,Y,_FP_DIV_HELP_imm)
  17 #define _FP_DIV_MEAT_D(R,X,Y)   _FP_DIV_MEAT_1_udiv_norm(D,R,X,Y)
  18 #define _FP_DIV_MEAT_Q(R,X,Y)   _FP_DIV_MEAT_2_udiv(Q,R,X,Y)
  19
  20 #define _FP_NANFRAC_S           ((_FP_QNANBIT_S << 1) - 1)
  21 #define _FP_NANFRAC_D           ((_FP_QNANBIT_D << 1) - 1)
  22 #define _FP_NANFRAC_Q           ((_FP_QNANBIT_Q << 1) - 1), -1
  23 #define _FP_NANSIGN_S           0
  24 #define _FP_NANSIGN_D           0
  25 #define _FP_NANSIGN_Q           0
  26
  27 #define _FP_KEEPNANFRACP 1
  28 #define _FP_QNANNEGATEDP 0
  29
  30 /* From my experiments it seems X is chosen unless one of the
  31    NaNs is sNaN,  in which case the result is NANSIGN/NANFRAC.  */
  32 #define _FP_CHOOSENAN(fs, wc, R, X, Y, OP)                      \
  33   do {                                                          \
  34     if ((_FP_FRAC_HIGH_RAW_##fs(X) |                            \
  35          _FP_FRAC_HIGH_RAW_##fs(Y)) & _FP_QNANBIT_##fs)         \
  36       {                                                         \
  37         R##_s = _FP_NANSIGN_##fs;                               \
  38         _FP_FRAC_SET_##wc(R,_FP_NANFRAC_##fs);                  \
  39       }                                                         \
  40     else                                                        \
  41       {                                                         \
  42         R##_s = X##_s;                                          \
  43         _FP_FRAC_COPY_##wc(R,X);                                \
  44       }                                                         \
  45     R##_c = FP_CLS_NAN;                                         \
  46   } while (0)
  47
  48 #define _FP_DECL_EX             fpu_control_t _fcw
  49
  50 #define FP_ROUNDMODE            (_fcw & _FPU_FPCR_RM_MASK)
  51
  52 #define FP_RND_NEAREST          FE_TONEAREST
  53 #define FP_RND_ZERO             FE_TOWARDZERO
  54 #define FP_RND_PINF             FE_UPWARD
  55 #define FP_RND_MINF             FE_DOWNWARD
  56
  57 #define FP_EX_INVALID           FE_INVALID
  58 #define FP_EX_OVERFLOW          FE_OVERFLOW
  59 #define FP_EX_UNDERFLOW         FE_UNDERFLOW
  60 #define FP_EX_DIVZERO           FE_DIVBYZERO
  61 #define FP_EX_INEXACT           FE_INEXACT
  62
  63 #define _FP_TININESS_AFTER_ROUNDING 0
  64
  65 #define FP_INIT_ROUNDMODE                       \
  66 do {                                            \
  67   _FPU_GETCW (_fcw);                            \
  68 } while (0)
  69
  70 #define FP_HANDLE_EXCEPTIONS                                            \
  71   do {                                                                  \
  72     const float fp_max = __FLT_MAX__;                                   \
  73     const float fp_min = __FLT_MIN__;                                   \
  74     const float fp_1e32 = 1.0e32f;                                      \
  75     const float fp_zero = 0.0;                                          \
  76     const float fp_one = 1.0;                                           \
  77     unsigned fpsr;                                                      \
  78     if (_fex & FP_EX_INVALID)                                           \
  79       {                                                                 \
  80         __asm__ __volatile__ ("fdiv\ts0, %s0, %s0"                      \
  81                               :                                         \
  82                               : "w" (fp_zero)                           \
  83                               : "s0");                                  \
  84         __asm__ __volatile__ ("mrs\t%0, fpsr" : "=r" (fpsr));           \
  85       }                                                                 \
  86     if (_fex & FP_EX_DIVZERO)                                           \
  87       {                                                                 \
  88         __asm__ __volatile__ ("fdiv\ts0, %s0, %s1"                      \
  89                               :                                         \
  90                               : "w" (fp_one), "w" (fp_zero)             \
  91                               : "s0");                                  \
  92         __asm__ __volatile__ ("mrs\t%0, fpsr" : "=r" (fpsr));           \
  93       }                                                                 \
  94     if (_fex & FP_EX_OVERFLOW)                                          \
  95       {                                                                 \
  96         __asm__ __volatile__ ("fadd\ts0, %s0, %s1"                      \
  97                               :                                         \
  98                               : "w" (fp_max), "w" (fp_1e32)             \
  99                               : "s0");                                  \
 100         __asm__ __volatile__ ("mrs\t%0, fpsr" : "=r" (fpsr));           \
 101       }                                                                 \
 102     if (_fex & FP_EX_UNDERFLOW)                                         \
 103       {                                                                 \
 104         __asm__ __volatile__ ("fmul\ts0, %s0, %s0"                      \
 105                               :                                         \
 106                               : "w" (fp_min)                            \
 107                               : "s0");                                  \
 108         __asm__ __volatile__ ("mrs\t%0, fpsr" : "=r" (fpsr));           \
 109       }                                                                 \
 110     if (_fex & FP_EX_INEXACT)                                           \
 111       {                                                                 \
 112         __asm__ __volatile__ ("fsub\ts0, %s0, %s1"                      \
 113                               :                                         \
 114                               : "w" (fp_max), "w" (fp_one)              \
 115                               : "s0");                                  \
 116         __asm__ __volatile__ ("mrs\t%0, fpsr" : "=r" (fpsr));           \
 117       }                                                                 \
 118   } while (0)
 119
 120 #define FP_TRAPPING_EXCEPTIONS ((_fcw >> FE_EXCEPT_SHIFT) & FE_ALL_EXCEPT)