sysdeps/powerpc/fpu/fenv_private.h

   1 /* Private floating point rounding and exceptions handling. PowerPC version.
   2    Copyright (C) 2013-2019 Free Software Foundation, Inc.
   3    This file is part of the GNU C Library.
   4
   5    The GNU C Library is free software; you can redistribute it and/or
   6    modify it under the terms of the GNU Lesser General Public
   7    License as published by the Free Software Foundation; either
   8    version 2.1 of the License, or (at your option) any later version.
   9
  10    The GNU C Library is distributed in the hope that it will be useful,
  11    but WITHOUT ANY WARRANTY; without even the implied warranty of
  12    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  13    Lesser General Public License for more details.
  14
  15    You should have received a copy of the GNU Lesser General Public
  16    License along with the GNU C Library.  If not, see
  17    <http://www.gnu.org/licenses/>.  */
  18
  19 #ifndef POWERPC_FENV_PRIVATE_H
  20 #define POWERPC_FENV_PRIVATE_H 1
  21
  22 #include <fenv.h>
  23 #include <fenv_libc.h>
  24 #include <fpu_control.h>
  25
  26 /* Mask for the exception enable bits.  */
  27 #define _FPU_ALL_TRAPS (_FPU_MASK_ZM | _FPU_MASK_OM | _FPU_MASK_UM \
  28                       | _FPU_MASK_XM | _FPU_MASK_IM)
  29
  30 /* Mask the rounding mode bits.  */
  31 #define _FPU_MASK_RN 0xfffffffffffffffcLL
  32
  33 /* Mask everything but the rounding modes and non-IEEE arithmetic flags.  */
  34 #define _FPU_MASK_NOT_RN_NI 0xffffffff00000807LL
  35
  36 /* Mask restore rounding mode and exception enabled.  */
  37 #define _FPU_MASK_TRAPS_RN 0xffffffffffffff00LL
  38
  39 /* Mask FP result flags, preserve fraction rounded/inexact bits.  */
  40 #define _FPU_MASK_FRAC_INEX_RET_CC 0xfffffffffff80fffLL
  41
  42 static __always_inline void
  43 __libc_feholdbits_ppc (fenv_t *envp, unsigned long long mask,
  44         unsigned long long bits)
  45 {
  46   fenv_union_t old, new;
  47
  48   old.fenv = *envp = fegetenv_register ();
  49
  50   new.l = (old.l & mask) | bits;
  51
  52   /* If the old env had any enabled exceptions, then mask SIGFPE in the
  53      MSR FE0/FE1 bits.  This may allow the FPU to run faster because it
  54      always takes the default action and can not generate SIGFPE.  */
  55   if ((old.l & _FPU_ALL_TRAPS) != 0)
  56     (void) __fe_mask_env ();
  57
  58   fesetenv_register (new.fenv);
  59 }
  60
  61 static __always_inline void
  62 libc_feholdexcept_ppc (fenv_t *envp)
  63 {
  64   __libc_feholdbits_ppc (envp, _FPU_MASK_NOT_RN_NI, 0LL);
  65 }
  66
  67 static __always_inline void
  68 libc_feholdexcept_setround_ppc (fenv_t *envp, int r)
  69 {
  70   __libc_feholdbits_ppc (envp, _FPU_MASK_NOT_RN_NI & _FPU_MASK_RN, r);
  71 }
  72
  73 static __always_inline void
  74 libc_fesetround_ppc (int r)
  75 {
  76   __fesetround_inline (r);
  77 }
  78
  79 static __always_inline int
  80 libc_fetestexcept_ppc (int e)
  81 {
  82   fenv_union_t u;
  83   u.fenv = fegetenv_register ();
  84   return u.l & e;
  85 }
  86
  87 static __always_inline void
  88 libc_feholdsetround_ppc (fenv_t *e, int r)
  89 {
  90   __libc_feholdbits_ppc (e, _FPU_MASK_TRAPS_RN, r);
  91 }
  92
  93 static __always_inline unsigned long long
  94 __libc_femergeenv_ppc (const fenv_t *envp, unsigned long long old_mask,
  95         unsigned long long new_mask)
  96 {
  97   fenv_union_t old, new;
  98
  99   new.fenv = *envp;
 100   old.fenv = fegetenv_register ();
 101
 102   /* Merge bits while masking unwanted bits from new and old env.  */
 103   new.l = (old.l & old_mask) | (new.l & new_mask);
 104
 105   /* If the old env has no enabled exceptions and the new env has any enabled
 106      exceptions, then unmask SIGFPE in the MSR FE0/FE1 bits.  This will put the
 107      hardware into "precise mode" and may cause the FPU to run slower on some
 108      hardware.  */
 109   if ((old.l & _FPU_ALL_TRAPS) == 0 && (new.l & _FPU_ALL_TRAPS) != 0)
 110     (void) __fe_nomask_env_priv ();
 111
 112   /* If the old env had any enabled exceptions and the new env has no enabled
 113      exceptions, then mask SIGFPE in the MSR FE0/FE1 bits.  This may allow the
 114      FPU to run faster because it always takes the default action and can not
 115      generate SIGFPE.  */
 116   if ((old.l & _FPU_ALL_TRAPS) != 0 && (new.l & _FPU_ALL_TRAPS) == 0)
 117     (void) __fe_mask_env ();
 118
 119   /* Atomically enable and raise (if appropriate) exceptions set in `new'.  */
 120   fesetenv_register (new.fenv);
 121
 122   return old.l;
 123 }
 124
 125 static __always_inline void
 126 libc_fesetenv_ppc (const fenv_t *envp)
 127 {
 128   /* Replace the entire environment.  */
 129   __libc_femergeenv_ppc (envp, 0LL, -1LL);
 130 }
 131
 132 static __always_inline void
 133 libc_feresetround_ppc (fenv_t *envp)
 134 {
 135   fenv_union_t new = { .fenv = *envp };
 136
 137   /* If the old env has no enabled exceptions and the new env has any enabled
 138      exceptions, then unmask SIGFPE in the MSR FE0/FE1 bits.  This will put the
 139      hardware into "precise mode" and may cause the FPU to run slower on some
 140      hardware.  */
 141   if ((new.l & _FPU_ALL_TRAPS) != 0)
 142     (void) __fe_nomask_env_priv ();
 143
 144   /* Atomically enable and raise (if appropriate) exceptions set in `new'.  */
 145   fesetenv_mode (new.fenv);
 146 }
 147
 148 static __always_inline int
 149 libc_feupdateenv_test_ppc (fenv_t *envp, int ex)
 150 {
 151   return __libc_femergeenv_ppc (envp, _FPU_MASK_TRAPS_RN,
 152                                 _FPU_MASK_FRAC_INEX_RET_CC) & ex;
 153 }
 154
 155 static __always_inline void
 156 libc_feupdateenv_ppc (fenv_t *e)
 157 {
 158   libc_feupdateenv_test_ppc (e, 0);
 159 }
 160
 161 #define libc_feholdexceptf           libc_feholdexcept_ppc
 162 #define libc_feholdexcept            libc_feholdexcept_ppc
 163 #define libc_feholdexcept_setroundf  libc_feholdexcept_setround_ppc
 164 #define libc_feholdexcept_setround   libc_feholdexcept_setround_ppc
 165 #define libc_fetestexceptf           libc_fetestexcept_ppc
 166 #define libc_fetestexcept            libc_fetestexcept_ppc
 167 #define libc_fesetroundf             libc_fesetround_ppc
 168 #define libc_fesetround              libc_fesetround_ppc
 169 #define libc_fesetenvf               libc_fesetenv_ppc
 170 #define libc_fesetenv                libc_fesetenv_ppc
 171 #define libc_feupdateenv_testf       libc_feupdateenv_test_ppc
 172 #define libc_feupdateenv_test        libc_feupdateenv_test_ppc
 173 #define libc_feupdateenvf            libc_feupdateenv_ppc
 174 #define libc_feupdateenv             libc_feupdateenv_ppc
 175 #define libc_feholdsetroundf         libc_feholdsetround_ppc
 176 #define libc_feholdsetround          libc_feholdsetround_ppc
 177 #define libc_feresetroundf           libc_feresetround_ppc
 178 #define libc_feresetround            libc_feresetround_ppc
 179
 180
 181 /* We have support for rounding mode context.  */
 182 #define HAVE_RM_CTX 1
 183
 184 static __always_inline void
 185 libc_feholdsetround_ppc_ctx (struct rm_ctx *ctx, int r)
 186 {
 187   fenv_union_t old, new;
 188
 189   old.fenv = fegetenv_status ();
 190
 191   new.l = (old.l & ~(FPSCR_ENABLES_MASK|FPSCR_RN_MASK)) | r;
 192
 193   ctx->env = old.fenv;
 194   if (__glibc_unlikely (new.l != old.l))
 195     {
 196       if ((old.l & _FPU_ALL_TRAPS) != 0)
 197         (void) __fe_mask_env ();
 198       fesetenv_mode (new.fenv);
 199       ctx->updated_status = true;
 200     }
 201   else
 202     ctx->updated_status = false;
 203 }
 204
 205 static __always_inline void
 206 libc_feholdsetround_noex_ppc_ctx (struct rm_ctx *ctx, int r)
 207 {
 208   fenv_union_t old, new;
 209
 210   old.fenv = fegetenv_register ();
 211
 212   new.l = (old.l & ~(FPSCR_ENABLES_MASK|FPSCR_RN_MASK)) | r;
 213
 214   ctx->env = old.fenv;
 215   if (__glibc_unlikely (new.l != old.l))
 216     {
 217       if ((old.l & _FPU_ALL_TRAPS) != 0)
 218         (void) __fe_mask_env ();
 219       fesetenv_register (new.fenv);
 220       ctx->updated_status = true;
 221     }
 222   else
 223     ctx->updated_status = false;
 224 }
 225
 226 static __always_inline void
 227 libc_fesetenv_ppc_ctx (struct rm_ctx *ctx)
 228 {
 229   libc_fesetenv_ppc (&ctx->env);
 230 }
 231
 232 static __always_inline void
 233 libc_feupdateenv_ppc_ctx (struct rm_ctx *ctx)
 234 {
 235   if (__glibc_unlikely (ctx->updated_status))
 236     libc_feresetround_ppc (&ctx->env);
 237 }
 238
 239 static __always_inline void
 240 libc_feresetround_ppc_ctx (struct rm_ctx *ctx)
 241 {
 242   if (__glibc_unlikely (ctx->updated_status))
 243     libc_feresetround_ppc (&ctx->env);
 244 }
 245
 246 #define libc_fesetenv_ctx                libc_fesetenv_ppc_ctx
 247 #define libc_fesetenvf_ctx               libc_fesetenv_ppc_ctx
 248 #define libc_fesetenvl_ctx               libc_fesetenv_ppc_ctx
 249 #define libc_feholdsetround_ctx          libc_feholdsetround_ppc_ctx
 250 #define libc_feholdsetroundf_ctx         libc_feholdsetround_ppc_ctx
 251 #define libc_feholdsetroundl_ctx         libc_feholdsetround_ppc_ctx
 252 #define libc_feholdsetround_noex_ctx     libc_feholdsetround_noex_ppc_ctx
 253 #define libc_feholdsetround_noexf_ctx    libc_feholdsetround_noex_ppc_ctx
 254 #define libc_feholdsetround_noexl_ctx    libc_feholdsetround_noex_ppc_ctx
 255 #define libc_feresetround_ctx            libc_feresetround_ppc_ctx
 256 #define libc_feresetroundf_ctx           libc_feresetround_ppc_ctx
 257 #define libc_feresetroundl_ctx           libc_feresetround_ppc_ctx
 258 #define libc_feupdateenv_ctx             libc_feupdateenv_ppc_ctx
 259 #define libc_feupdateenvf_ctx            libc_feupdateenv_ppc_ctx
 260 #define libc_feupdateenvl_ctx            libc_feupdateenv_ppc_ctx
 261
 262 #include_next <fenv_private.h>
 263
 264 #endif