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1 /* Machine-dependent ELF dynamic relocation functions. PowerPC version.
2 Copyright (C) 1995-2006, 2008, 2011 Free Software Foundation, Inc.
3 This file is part of the GNU C Library.
4
5 The GNU C Library is free software; you can redistribute it and/or
6 modify it under the terms of the GNU Lesser General Public
7 License as published by the Free Software Foundation; either
8 version 2.1 of the License, or (at your option) any later version.
9
10 The GNU C Library is distributed in the hope that it will be useful,
11 but WITHOUT ANY WARRANTY; without even the implied warranty of
12 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
13 Lesser General Public License for more details.
14
15 You should have received a copy of the GNU Lesser General Public
16 License along with the GNU C Library; if not, write to the Free
17 Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
18 02111-1307 USA. */
19
20 #include <unistd.h>
21 #include <string.h>
22 #include <sys/param.h>
23 #include <link.h>
24 #include <ldsodefs.h>
25 #include <elf/dynamic-link.h>
26 #include <dl-machine.h>
27 #include <stdio-common/_itoa.h>
28
29 /* The value __cache_line_size is defined in dl-sysdep.c and is initialised
30 by _dl_sysdep_start via DL_PLATFORM_INIT. */
31 extern int __cache_line_size attribute_hidden;
32
33 /* Because ld.so is now versioned, these functions can be in their own file;
34 no relocations need to be done to call them.
35 Of course, if ld.so is not versioned... */
36 #if defined SHARED && !(DO_VERSIONING - 0)
37 #error This will not work with versioning turned off, sorry.
38 #endif
39
40
41 /* Stuff for the PLT. */
42 #define PLT_INITIAL_ENTRY_WORDS 18
43 #define PLT_LONGBRANCH_ENTRY_WORDS 0
44 #define PLT_TRAMPOLINE_ENTRY_WORDS 6
45 #define PLT_DOUBLE_SIZE (1<<13)
46 #define PLT_ENTRY_START_WORDS(entry_number) \
47 (PLT_INITIAL_ENTRY_WORDS + (entry_number)*2 \
48 + ((entry_number) > PLT_DOUBLE_SIZE \
49 ? ((entry_number) - PLT_DOUBLE_SIZE)*2 \
50 : 0))
51 #define PLT_DATA_START_WORDS(num_entries) PLT_ENTRY_START_WORDS(num_entries)
52
53 /* Macros to build PowerPC opcode words. */
54 #define OPCODE_ADDI(rd,ra,simm) \
55 (0x38000000 | (rd) << 21 | (ra) << 16 | ((simm) & 0xffff))
56 #define OPCODE_ADDIS(rd,ra,simm) \
57 (0x3c000000 | (rd) << 21 | (ra) << 16 | ((simm) & 0xffff))
58 #define OPCODE_ADD(rd,ra,rb) \
59 (0x7c000214 | (rd) << 21 | (ra) << 16 | (rb) << 11)
60 #define OPCODE_B(target) (0x48000000 | ((target) & 0x03fffffc))
61 #define OPCODE_BA(target) (0x48000002 | ((target) & 0x03fffffc))
62 #define OPCODE_BCTR() 0x4e800420
63 #define OPCODE_LWZ(rd,d,ra) \
64 (0x80000000 | (rd) << 21 | (ra) << 16 | ((d) & 0xffff))
65 #define OPCODE_LWZU(rd,d,ra) \
66 (0x84000000 | (rd) << 21 | (ra) << 16 | ((d) & 0xffff))
67 #define OPCODE_MTCTR(rd) (0x7C0903A6 | (rd) << 21)
68 #define OPCODE_RLWINM(ra,rs,sh,mb,me) \
69 (0x54000000 | (rs) << 21 | (ra) << 16 | (sh) << 11 | (mb) << 6 | (me) << 1)
70
71 #define OPCODE_LI(rd,simm) OPCODE_ADDI(rd,0,simm)
72 #define OPCODE_ADDIS_HI(rd,ra,value) \
73 OPCODE_ADDIS(rd,ra,((value) + 0x8000) >> 16)
74 #define OPCODE_LIS_HI(rd,value) OPCODE_ADDIS_HI(rd,0,value)
75 #define OPCODE_SLWI(ra,rs,sh) OPCODE_RLWINM(ra,rs,sh,0,31-sh)
76
77
78 #define PPC_DCBST(where) asm volatile ("dcbst 0,%0" : : "r"(where) : "memory")
79 #define PPC_SYNC asm volatile ("sync" : : : "memory")
80 #define PPC_ISYNC asm volatile ("sync; isync" : : : "memory")
81 #define PPC_ICBI(where) asm volatile ("icbi 0,%0" : : "r"(where) : "memory")
82 #define PPC_DIE asm volatile ("tweq 0,0")
83
84 /* Use this when you've modified some code, but it won't be in the
85 instruction fetch queue (or when it doesn't matter if it is). */
86 #define MODIFIED_CODE_NOQUEUE(where) \
87 do { PPC_DCBST(where); PPC_SYNC; PPC_ICBI(where); } while (0)
88 /* Use this when it might be in the instruction queue. */
89 #define MODIFIED_CODE(where) \
90 do { PPC_DCBST(where); PPC_SYNC; PPC_ICBI(where); PPC_ISYNC; } while (0)
91
92
93 /* The idea here is that to conform to the ABI, we are supposed to try
94 to load dynamic objects between 0x10000 (we actually use 0x40000 as
95 the lower bound, to increase the chance of a memory reference from
96 a null pointer giving a segfault) and the program's load address;
97 this may allow us to use a branch instruction in the PLT rather
98 than a computed jump. The address is only used as a preference for
99 mmap, so if we get it wrong the worst that happens is that it gets
100 mapped somewhere else. */
101
102 ElfW(Addr)
103 __elf_preferred_address (struct link_map *loader, size_t maplength,
104 ElfW(Addr) mapstartpref)
105 {
106 ElfW(Addr) low, high;
107 struct link_map *l;
108 Lmid_t nsid;
109
110 /* If the object has a preference, load it there! */
111 if (mapstartpref != 0)
112 return mapstartpref;
113
114 /* Otherwise, quickly look for a suitable gap between 0x3FFFF and
115 0x70000000. 0x3FFFF is so that references off NULL pointers will
116 cause a segfault, 0x70000000 is just paranoia (it should always
117 be superceded by the program's load address). */
118 low = 0x0003FFFF;
119 high = 0x70000000;
120 for (nsid = 0; nsid < DL_NNS; ++nsid)
121 for (l = GL(dl_ns)[nsid]._ns_loaded; l; l = l->l_next)
122 {
123 ElfW(Addr) mapstart, mapend;
124 mapstart = l->l_map_start & ~(GLRO(dl_pagesize) - 1);
125 mapend = l->l_map_end | (GLRO(dl_pagesize) - 1);
126 assert (mapend > mapstart);
127
128 /* Prefer gaps below the main executable, note that l ==
129 _dl_loaded does not work for static binaries loading
130 e.g. libnss_*.so. */
131 if ((mapend >= high || l->l_type == lt_executable)
132 && high >= mapstart)
133 high = mapstart;
134 else if (mapend >= low && low >= mapstart)
135 low = mapend;
136 else if (high >= mapend && mapstart >= low)
137 {
138 if (high - mapend >= mapstart - low)
139 low = mapend;
140 else
141 high = mapstart;
142 }
143 }
144
145 high -= 0x10000; /* Allow some room between objects. */
146 maplength = (maplength | (GLRO(dl_pagesize) - 1)) + 1;
147 if (high <= low || high - low < maplength )
148 return 0;
149 return high - maplength; /* Both high and maplength are page-aligned. */
150 }
151
152 /* Set up the loaded object described by L so its unrelocated PLT
153 entries will jump to the on-demand fixup code in dl-runtime.c.
154 Also install a small trampoline to be used by entries that have
155 been relocated to an address too far away for a single branch. */
156
157 /* There are many kinds of PLT entries:
158
159 (1) A direct jump to the actual routine, either a relative or
160 absolute branch. These are set up in __elf_machine_fixup_plt.
161
162 (2) Short lazy entries. These cover the first 8192 slots in
163 the PLT, and look like (where 'index' goes from 0 to 8191):
164
165 li %r11, index*4
166 b &plt[PLT_TRAMPOLINE_ENTRY_WORDS+1]
167
168 (3) Short indirect jumps. These replace (2) when a direct jump
169 wouldn't reach. They look the same except that the branch
170 is 'b &plt[PLT_LONGBRANCH_ENTRY_WORDS]'.
171
172 (4) Long lazy entries. These cover the slots when a short entry
173 won't fit ('index*4' overflows its field), and look like:
174
175 lis %r11, %hi(index*4 + &plt[PLT_DATA_START_WORDS])
176 lwzu %r12, %r11, %lo(index*4 + &plt[PLT_DATA_START_WORDS])
177 b &plt[PLT_TRAMPOLINE_ENTRY_WORDS]
178 bctr
179
180 (5) Long indirect jumps. These replace (4) when a direct jump
181 wouldn't reach. They look like:
182
183 lis %r11, %hi(index*4 + &plt[PLT_DATA_START_WORDS])
184 lwz %r12, %r11, %lo(index*4 + &plt[PLT_DATA_START_WORDS])
185 mtctr %r12
186 bctr
187
188 (6) Long direct jumps. These are used when thread-safety is not
189 required. They look like:
190
191 lis %r12, %hi(finaladdr)
192 addi %r12, %r12, %lo(finaladdr)
193 mtctr %r12
194 bctr
195
196
197 The lazy entries, (2) and (4), are set up here in
198 __elf_machine_runtime_setup. (1), (3), and (5) are set up in
199 __elf_machine_fixup_plt. (1), (3), and (6) can also be constructed
200 in __process_machine_rela.
201
202 The reason for the somewhat strange construction of the long
203 entries, (4) and (5), is that we need to ensure thread-safety. For
204 (1) and (3), this is obvious because only one instruction is
205 changed and the PPC architecture guarantees that aligned stores are
206 atomic. For (5), this is more tricky. When changing (4) to (5),
207 the `b' instruction is first changed to `mtctr'; this is safe
208 and is why the `lwzu' instruction is not just a simple `addi'.
209 Once this is done, and is visible to all processors, the `lwzu' can
210 safely be changed to a `lwz'. */
211 int
212 __elf_machine_runtime_setup (struct link_map *map, int lazy, int profile)
213 {
214 if (map->l_info[DT_JMPREL])
215 {
216 Elf32_Word i;
217 Elf32_Word *plt = (Elf32_Word *) D_PTR (map, l_info[DT_PLTGOT]);
218 Elf32_Word num_plt_entries = (map->l_info[DT_PLTRELSZ]->d_un.d_val
219 / sizeof (Elf32_Rela));
220 Elf32_Word rel_offset_words = PLT_DATA_START_WORDS (num_plt_entries);
221 Elf32_Word data_words = (Elf32_Word) (plt + rel_offset_words);
222 Elf32_Word size_modified;
223
224 extern void _dl_runtime_resolve (void);
225 extern void _dl_prof_resolve (void);
226
227 /* Convert the index in r11 into an actual address, and get the
228 word at that address. */
229 plt[PLT_LONGBRANCH_ENTRY_WORDS] = OPCODE_ADDIS_HI (11, 11, data_words);
230 plt[PLT_LONGBRANCH_ENTRY_WORDS + 1] = OPCODE_LWZ (11, data_words, 11);
231
232 /* Call the procedure at that address. */
233 plt[PLT_LONGBRANCH_ENTRY_WORDS + 2] = OPCODE_MTCTR (11);
234 plt[PLT_LONGBRANCH_ENTRY_WORDS + 3] = OPCODE_BCTR ();
235
236 if (lazy)
237 {
238 Elf32_Word *tramp = plt + PLT_TRAMPOLINE_ENTRY_WORDS;
239 Elf32_Word dlrr = (Elf32_Word)(profile
240 ? _dl_prof_resolve
241 : _dl_runtime_resolve);
242 Elf32_Word offset;
243
244 if (profile && GLRO(dl_profile) != NULL
245 && _dl_name_match_p (GLRO(dl_profile), map))
246 /* This is the object we are looking for. Say that we really
247 want profiling and the timers are started. */
248 GL(dl_profile_map) = map;
249
250 /* For the long entries, subtract off data_words. */
251 tramp[0] = OPCODE_ADDIS_HI (11, 11, -data_words);
252 tramp[1] = OPCODE_ADDI (11, 11, -data_words);
253
254 /* Multiply index of entry by 3 (in r11). */
255 tramp[2] = OPCODE_SLWI (12, 11, 1);
256 tramp[3] = OPCODE_ADD (11, 12, 11);
257 if (dlrr <= 0x01fffffc || dlrr >= 0xfe000000)
258 {
259 /* Load address of link map in r12. */
260 tramp[4] = OPCODE_LI (12, (Elf32_Word) map);
261 tramp[5] = OPCODE_ADDIS_HI (12, 12, (Elf32_Word) map);
262
263 /* Call _dl_runtime_resolve. */
264 tramp[6] = OPCODE_BA (dlrr);
265 }
266 else
267 {
268 /* Get address of _dl_runtime_resolve in CTR. */
269 tramp[4] = OPCODE_LI (12, dlrr);
270 tramp[5] = OPCODE_ADDIS_HI (12, 12, dlrr);
271 tramp[6] = OPCODE_MTCTR (12);
272
273 /* Load address of link map in r12. */
274 tramp[7] = OPCODE_LI (12, (Elf32_Word) map);
275 tramp[8] = OPCODE_ADDIS_HI (12, 12, (Elf32_Word) map);
276
277 /* Call _dl_runtime_resolve. */
278 tramp[9] = OPCODE_BCTR ();
279 }
280
281 /* Set up the lazy PLT entries. */
282 offset = PLT_INITIAL_ENTRY_WORDS;
283 i = 0;
284 while (i < num_plt_entries && i < PLT_DOUBLE_SIZE)
285 {
286 plt[offset ] = OPCODE_LI (11, i * 4);
287 plt[offset+1] = OPCODE_B ((PLT_TRAMPOLINE_ENTRY_WORDS + 2
288 - (offset+1))
289 * 4);
290 i++;
291 offset += 2;
292 }
293 while (i < num_plt_entries)
294 {
295 plt[offset ] = OPCODE_LIS_HI (11, i * 4 + data_words);
296 plt[offset+1] = OPCODE_LWZU (12, i * 4 + data_words, 11);
297 plt[offset+2] = OPCODE_B ((PLT_TRAMPOLINE_ENTRY_WORDS
298 - (offset+2))
299 * 4);
300 plt[offset+3] = OPCODE_BCTR ();
301 i++;
302 offset += 4;
303 }
304 }
305
306 /* Now, we've modified code. We need to write the changes from
307 the data cache to a second-level unified cache, then make
308 sure that stale data in the instruction cache is removed.
309 (In a multiprocessor system, the effect is more complex.)
310 Most of the PLT shouldn't be in the instruction cache, but
311 there may be a little overlap at the start and the end.
312
313 Assumes that dcbst and icbi apply to lines of 16 bytes or
314 more. Current known line sizes are 16, 32, and 128 bytes.
315 The following gets the __cache_line_size, when available. */
316
317 /* Default minimum 4 words per cache line. */
318 int line_size_words = 4;
319
320 if (lazy && __cache_line_size != 0)
321 /* Convert bytes to words. */
322 line_size_words = __cache_line_size / 4;
323
324 size_modified = lazy ? rel_offset_words : 6;
325 for (i = 0; i < size_modified; i += line_size_words)
326 PPC_DCBST (plt + i);
327 PPC_DCBST (plt + size_modified - 1);
328 PPC_SYNC;
329
330 for (i = 0; i < size_modified; i += line_size_words)
331 PPC_ICBI (plt + i);
332 PPC_ICBI (plt + size_modified - 1);
333 PPC_ISYNC;
334 }
335
336 return lazy;
337 }
338
339 Elf32_Addr
340 __elf_machine_fixup_plt (struct link_map *map,
341 Elf32_Addr *reloc_addr, Elf32_Addr finaladdr)
342 {
343 Elf32_Sword delta = finaladdr - (Elf32_Word) reloc_addr;
344 if (delta << 6 >> 6 == delta)
345 *reloc_addr = OPCODE_B (delta);
346 else if (finaladdr <= 0x01fffffc || finaladdr >= 0xfe000000)
347 *reloc_addr = OPCODE_BA (finaladdr);
348 else
349 {
350 Elf32_Word *plt, *data_words;
351 Elf32_Word index, offset, num_plt_entries;
352
353 num_plt_entries = (map->l_info[DT_PLTRELSZ]->d_un.d_val
354 / sizeof(Elf32_Rela));
355 plt = (Elf32_Word *) D_PTR (map, l_info[DT_PLTGOT]);
356 offset = reloc_addr - plt;
357 index = (offset - PLT_INITIAL_ENTRY_WORDS)/2;
358 data_words = plt + PLT_DATA_START_WORDS (num_plt_entries);
359
360 reloc_addr += 1;
361
362 if (index < PLT_DOUBLE_SIZE)
363 {
364 data_words[index] = finaladdr;
365 PPC_SYNC;
366 *reloc_addr = OPCODE_B ((PLT_LONGBRANCH_ENTRY_WORDS - (offset+1))
367 * 4);
368 }
369 else
370 {
371 index -= (index - PLT_DOUBLE_SIZE)/2;
372
373 data_words[index] = finaladdr;
374 PPC_SYNC;
375
376 reloc_addr[1] = OPCODE_MTCTR (12);
377 MODIFIED_CODE_NOQUEUE (reloc_addr + 1);
378 PPC_SYNC;
379
380 reloc_addr[0] = OPCODE_LWZ (12,
381 (Elf32_Word) (data_words + index), 11);
382 }
383 }
384 MODIFIED_CODE (reloc_addr);
385 return finaladdr;
386 }
387
388 void
389 _dl_reloc_overflow (struct link_map *map,
390 const char *name,
391 Elf32_Addr *const reloc_addr,
392 const Elf32_Sym *refsym)
393 {
394 char buffer[128];
395 char *t;
396 t = stpcpy (buffer, name);
397 t = stpcpy (t, " relocation at 0x00000000");
398 _itoa_word ((unsigned) reloc_addr, t, 16, 0);
399 if (refsym)
400 {
401 const char *strtab;
402
403 strtab = (const void *) D_PTR (map, l_info[DT_STRTAB]);
404 t = stpcpy (t, " for symbol `");
405 t = stpcpy (t, strtab + refsym->st_name);
406 t = stpcpy (t, "'");
407 }
408 t = stpcpy (t, " out of range");
409 _dl_signal_error (0, map->l_name, NULL, buffer);
410 }
411
412 void
413 __process_machine_rela (struct link_map *map,
414 const Elf32_Rela *reloc,
415 struct link_map *sym_map,
416 const Elf32_Sym *sym,
417 const Elf32_Sym *refsym,
418 Elf32_Addr *const reloc_addr,
419 Elf32_Addr const finaladdr,
420 int rinfo)
421 {
422 switch (rinfo)
423 {
424 case R_PPC_NONE:
425 return;
426
427 case R_PPC_ADDR32:
428 case R_PPC_GLOB_DAT:
429 case R_PPC_RELATIVE:
430 *reloc_addr = finaladdr;
431 return;
432
433 case R_PPC_IRELATIVE:
434 *reloc_addr = ((Elf32_Addr (*) (void)) finaladdr) ();
435 return;
436
437 case R_PPC_UADDR32:
438 ((char *) reloc_addr)[0] = finaladdr >> 24;
439 ((char *) reloc_addr)[1] = finaladdr >> 16;
440 ((char *) reloc_addr)[2] = finaladdr >> 8;
441 ((char *) reloc_addr)[3] = finaladdr;
442 break;
443
444 case R_PPC_ADDR24:
445 if (__builtin_expect (finaladdr > 0x01fffffc && finaladdr < 0xfe000000, 0))
446 _dl_reloc_overflow (map, "R_PPC_ADDR24", reloc_addr, refsym);
447 *reloc_addr = (*reloc_addr & 0xfc000003) | (finaladdr & 0x3fffffc);
448 break;
449
450 case R_PPC_ADDR16:
451 if (__builtin_expect (finaladdr > 0x7fff && finaladdr < 0xffff8000, 0))
452 _dl_reloc_overflow (map, "R_PPC_ADDR16", reloc_addr, refsym);
453 *(Elf32_Half*) reloc_addr = finaladdr;
454 break;
455
456 case R_PPC_UADDR16:
457 if (__builtin_expect (finaladdr > 0x7fff && finaladdr < 0xffff8000, 0))
458 _dl_reloc_overflow (map, "R_PPC_UADDR16", reloc_addr, refsym);
459 ((char *) reloc_addr)[0] = finaladdr >> 8;
460 ((char *) reloc_addr)[1] = finaladdr;
461 break;
462
463 case R_PPC_ADDR16_LO:
464 *(Elf32_Half*) reloc_addr = finaladdr;
465 break;
466
467 case R_PPC_ADDR16_HI:
468 *(Elf32_Half*) reloc_addr = finaladdr >> 16;
469 break;
470
471 case R_PPC_ADDR16_HA:
472 *(Elf32_Half*) reloc_addr = (finaladdr + 0x8000) >> 16;
473 break;
474
475 case R_PPC_ADDR14:
476 case R_PPC_ADDR14_BRTAKEN:
477 case R_PPC_ADDR14_BRNTAKEN:
478 if (__builtin_expect (finaladdr > 0x7fff && finaladdr < 0xffff8000, 0))
479 _dl_reloc_overflow (map, "R_PPC_ADDR14", reloc_addr, refsym);
480 *reloc_addr = (*reloc_addr & 0xffff0003) | (finaladdr & 0xfffc);
481 if (rinfo != R_PPC_ADDR14)
482 *reloc_addr = ((*reloc_addr & 0xffdfffff)
483 | ((rinfo == R_PPC_ADDR14_BRTAKEN)
484 ^ (finaladdr >> 31)) << 21);
485 break;
486
487 case R_PPC_REL24:
488 {
489 Elf32_Sword delta = finaladdr - (Elf32_Word) reloc_addr;
490 if (delta << 6 >> 6 != delta)
491 _dl_reloc_overflow (map, "R_PPC_REL24", reloc_addr, refsym);
492 *reloc_addr = (*reloc_addr & 0xfc000003) | (delta & 0x3fffffc);
493 }
494 break;
495
496 case R_PPC_COPY:
497 if (sym == NULL)
498 /* This can happen in trace mode when an object could not be
499 found. */
500 return;
501 if (sym->st_size > refsym->st_size
502 || (GLRO(dl_verbose) && sym->st_size < refsym->st_size))
503 {
504 const char *strtab;
505
506 strtab = (const void *) D_PTR (map, l_info[DT_STRTAB]);
507 _dl_error_printf ("\
508 %s: Symbol `%s' has different size in shared object, consider re-linking\n",
509 rtld_progname ?: "<program name unknown>",
510 strtab + refsym->st_name);
511 }
512 memcpy (reloc_addr, (char *) finaladdr, MIN (sym->st_size,
513 refsym->st_size));
514 return;
515
516 case R_PPC_REL32:
517 *reloc_addr = finaladdr - (Elf32_Word) reloc_addr;
518 return;
519
520 case R_PPC_JMP_SLOT:
521 /* It used to be that elf_machine_fixup_plt was used here,
522 but that doesn't work when ld.so relocates itself
523 for the second time. On the bright side, there's
524 no need to worry about thread-safety here. */
525 {
526 Elf32_Sword delta = finaladdr - (Elf32_Word) reloc_addr;
527 if (delta << 6 >> 6 == delta)
528 *reloc_addr = OPCODE_B (delta);
529 else if (finaladdr <= 0x01fffffc || finaladdr >= 0xfe000000)
530 *reloc_addr = OPCODE_BA (finaladdr);
531 else
532 {
533 Elf32_Word *plt, *data_words;
534 Elf32_Word index, offset, num_plt_entries;
535
536 plt = (Elf32_Word *) D_PTR (map, l_info[DT_PLTGOT]);
537 offset = reloc_addr - plt;
538
539 if (offset < PLT_DOUBLE_SIZE*2 + PLT_INITIAL_ENTRY_WORDS)
540 {
541 index = (offset - PLT_INITIAL_ENTRY_WORDS)/2;
542 num_plt_entries = (map->l_info[DT_PLTRELSZ]->d_un.d_val
543 / sizeof(Elf32_Rela));
544 data_words = plt + PLT_DATA_START_WORDS (num_plt_entries);
545 data_words[index] = finaladdr;
546 reloc_addr[0] = OPCODE_LI (11, index * 4);
547 reloc_addr[1] = OPCODE_B ((PLT_LONGBRANCH_ENTRY_WORDS
548 - (offset+1))
549 * 4);
550 MODIFIED_CODE_NOQUEUE (reloc_addr + 1);
551 }
552 else
553 {
554 reloc_addr[0] = OPCODE_LIS_HI (12, finaladdr);
555 reloc_addr[1] = OPCODE_ADDI (12, 12, finaladdr);
556 reloc_addr[2] = OPCODE_MTCTR (12);
557 reloc_addr[3] = OPCODE_BCTR ();
558 MODIFIED_CODE_NOQUEUE (reloc_addr + 3);
559 }
560 }
561 }
562 break;
563
564 #define DO_TLS_RELOC(suffix) \
565 case R_PPC_DTPREL##suffix: \
566 /* During relocation all TLS symbols are defined and used. \
567 Therefore the offset is already correct. */ \
568 if (sym_map != NULL) \
569 do_reloc##suffix ("R_PPC_DTPREL"#suffix, \
570 TLS_DTPREL_VALUE (sym, reloc)); \
571 break; \
572 case R_PPC_TPREL##suffix: \
573 if (sym_map != NULL) \
574 { \
575 CHECK_STATIC_TLS (map, sym_map); \
576 do_reloc##suffix ("R_PPC_TPREL"#suffix, \
577 TLS_TPREL_VALUE (sym_map, sym, reloc)); \
578 } \
579 break;
580
581 inline void do_reloc16 (const char *r_name, Elf32_Addr value)
582 {
583 if (__builtin_expect (value > 0x7fff && value < 0xffff8000, 0))
584 _dl_reloc_overflow (map, r_name, reloc_addr, refsym);
585 *(Elf32_Half *) reloc_addr = value;
586 }
587 inline void do_reloc16_LO (const char *r_name, Elf32_Addr value)
588 {
589 *(Elf32_Half *) reloc_addr = value;
590 }
591 inline void do_reloc16_HI (const char *r_name, Elf32_Addr value)
592 {
593 *(Elf32_Half *) reloc_addr = value >> 16;
594 }
595 inline void do_reloc16_HA (const char *r_name, Elf32_Addr value)
596 {
597 *(Elf32_Half *) reloc_addr = (value + 0x8000) >> 16;
598 }
599 DO_TLS_RELOC (16)
600 DO_TLS_RELOC (16_LO)
601 DO_TLS_RELOC (16_HI)
602 DO_TLS_RELOC (16_HA)
603
604 default:
605 _dl_reloc_bad_type (map, rinfo, 0);
606 return;
607 }
608
609 MODIFIED_CODE_NOQUEUE (reloc_addr);
610 }